Semiconductor process equipment

Abstract

A semiconductor process equipment according to one embodiment of the present invention comprises: a chamber including a plurality of electrostatic chucks on which a plurality of wafers are placed, and a chamber housing having at least one window; a first optical system and a second optical system mounted at different positions of the window; a plurality of first optical pickup units connected in common to the first optical system and having different line of sight areas; a light collecting unit having a plurality of second optical pickup units connected in common to the second optical system and having different line of sight areas; a sensor having a plurality of photodetectors that convert a first optical signal transmitted by the plurality of first optical pickup units and a second optical signal transmitted by the plurality of second optical pickup units into an electrical signal; and a processor that generates a spatial image inside the chamber housing using the electrical signal output by the plurality of photodetectors and determines the location where an arc occurred inside the chamber housing based on the spatial image.

Description

Technology Field

[0001] The present invention relates to semiconductor process equipment. Background Technology

[0003] Semiconductor process equipment is a chamber-type device that performs various semiconductor processes on substrates such as wafers, and plasma can form inside the chamber during these processes. Radicals and ions form this plasma driven by the power supplied to the equipment, enabling semiconductor processes such as deposition and etching. During these processes, arcs may occur within the plasma; such arcs can damage the wafer or degrade the characteristics of the semiconductor devices formed on it. Therefore, a method is required to accurately detect arcs within the semiconductor process equipment while the semiconductor process is in progress. The problem to be solved

[0005] One of the objectives of the technical concept of the present invention is to provide semiconductor process equipment capable of accurately determining not only whether a discharge has occurred but also the location where the discharge has occurred by applying a tomography technique to optical signals received by a plurality of optical pickup units through an optical system mounted on the window of the chamber housing to generate a spatial image inside the chamber. means of solving the problem

[0007] A semiconductor process equipment according to one embodiment of the present invention comprises: a chamber including a plurality of electrostatic chucks on which a plurality of wafers are placed, and a chamber housing having at least one window; a first optical system and a second optical system mounted at different positions of the window; a plurality of first optical pickup units connected in common to the first optical system and having different line of sight areas; a light collecting unit having a plurality of second optical pickup units connected in common to the second optical system and having different line of sight areas; a sensor having a plurality of photodetectors that convert a first optical signal transmitted by the plurality of first optical pickup units and a second optical signal transmitted by the plurality of second optical pickup units into an electrical signal; and a processor that generates a spatial image inside the chamber housing using the electrical signal output by the plurality of photodetectors and determines the location where an arc occurred inside the chamber housing based on the spatial image.

[0009] A semiconductor process equipment according to one embodiment of the present invention comprises: a chamber housing including a first window mounted on a first surface and a second window mounted on a second surface intersecting the first surface; a plurality of first optical pickup units mounted on the first window and collecting a first optical signal inside the chamber housing at a first angle of view; a plurality of second optical pickup units mounted on the second window and collecting a second optical signal inside the chamber housing at a second angle of view; a sensor including a plurality of first photodetectors outputting a first voltage signal corresponding to the first optical signal and a plurality of second photodetectors outputting a second voltage signal corresponding to the second optical signal; and a processor that generates a spatial image inside the chamber housing using the first voltage signal and the second voltage signal.

[0011] A semiconductor process equipment according to one embodiment of the present invention comprises a chamber housing including a first surface and a second surface that intersect each other, a first window disposed on the first surface, a second window disposed on the second surface, a first optical system mounted on the first window and having a first angle of view, a plurality of first optical pickup units that receive an optical signal from inside the chamber housing through the first optical system, a second optical system mounted on the second window and having a second angle of view, and a plurality of second optical pickup units that receive an optical signal from inside the chamber housing through the second optical system. Effects of the invention

[0013] According to one embodiment of the present invention, a plurality of optical pickup units receive optical signals through an optical system mounted on a window of a chamber housing, and the optical signals can be converted into electrical signals by a plurality of photodetectors. A processor connected to the plurality of photodetectors determines whether a discharge has occurred inside the chamber housing based on a change in the level of the electrical signal, and can accurately determine the location where the discharge occurred by applying a tomography technique to the electrical signal to generate a spatial image inside the chamber housing. Accordingly, a wafer and its area significantly affected by the discharge can be identified, and the yield of the semiconductor process can be improved.

[0014] The various and beneficial advantages and effects of the present invention are not limited to those described above and will be more easily understood in the process of explaining specific embodiments of the present invention. Brief explanation of the drawing

[0016] FIG. 1 is a simplified diagram showing a system including semiconductor process equipment according to one embodiment of the present invention. FIG. 2 is a simplified diagram showing semiconductor process equipment according to one embodiment of the present invention. FIGS. 3 and FIGS. 4 are drawings briefly illustrating semiconductor process equipment according to one embodiment of the present invention. FIG. 5 is a simplified diagram showing semiconductor process equipment according to one embodiment of the present invention. FIG. 6 is a simplified diagram showing a photo array included in a semiconductor process equipment according to one embodiment illustrated in FIG. 5. FIGS. 7 to 10 are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention. FIGS. 11a to 14c are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention. FIGS. 15 and FIGS. 16 are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention. FIG. 17 is a flowchart provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention. Specific details for implementing the invention

[0017] Hereinafter, preferred embodiments of the present invention are described as follows with reference to the attached drawings.

[0019] FIG. 1 is a simplified diagram showing a system including semiconductor process equipment according to one embodiment of the present invention.

[0020] Referring to FIG. 1, a semiconductor process system (10) according to one embodiment of the present invention may include a wafer transfer device (30), a load lock chamber (40), a transfer chamber (50), and a plurality of process chambers (60). For example, the wafer transfer device (30) may receive a wafer through a container such as a FOUP (Front Open Unified Pod, 20) inside a line where the semiconductor process system (10) is placed. The wafer transfer device (30) may transfer the wafer received through the FOUP (20) to the load lock chamber (40), or receive a wafer from the load lock chamber (40) after the semiconductor process is completed in the process chambers (60) and store it in the FOUP (20).

[0021] A wafer transfer device (30) may include a wafer transfer robot (31) having an arm capable of gripping a wafer, a rail section (32) for moving the wafer transfer robot (31), and an aligner (33) for aligning the wafer. Assuming an operation to transfer a wafer from a FOUP (20) to a load lock chamber (40), the wafer transfer robot (31) can take out a wafer stored in the FOUP (20) and place it on the aligner (33). In the aligner (33), the wafer can be rotated to align the wafer in a predetermined direction. Once the wafer alignment is completed in the aligner (33), the wafer transfer robot (31) can take the wafer out of the aligner (33) and transfer it to the load lock chamber (40).

[0022] The load lock chamber (40) is connected to the wafer transfer device (30) and may include a loading chamber (41) where wafers brought into the process chamber (60) for semiconductor process progress temporarily stay, and an unloading chamber (42) where wafers removed from the process chamber (60) after the process is completed temporarily stay. When a wafer aligned in the aligner (33) is brought into the loading chamber (41), the inside of the loading chamber (41) is depressurized to prevent external contaminants from entering.

[0023] The load lock chamber (40) may be connected to the transfer chamber (50), and a plurality of process chambers (60) may be connected around the transfer chamber (50). A wafer transfer robot (51) for transferring wafers between the load lock chamber (40) and the plurality of process chambers (60) may be placed inside the transfer chamber (50). The wafer transfer robot (31) of the wafer transfer device (30) may be referred to as the first wafer transfer robot, and the wafer transfer robot (51) of the transfer chamber (50) may be referred to as the second wafer transfer robot.

[0024] Each of the plurality of process chambers (60) can perform a semiconductor process on a wafer. For example, the semiconductor process performed by the plurality of process chambers (60) may include a deposition process, an etching process, a photolithography process, an annealing process, a polishing process, an ion implantation process, etc. Depending on the semiconductor process to be performed, plasma may be formed inside at least one of the plurality of process chambers (60) to perform the semiconductor process.

[0025] For example, while a semiconductor process is being carried out with plasma formed, an arc may occur inside the process chamber (60). The arc may be an unintended abnormal discharge. If an arc occurs during the semiconductor process, damage may occur to the semiconductor substrate, such as a wafer, or the characteristics of the semiconductor device formed by the semiconductor process may deviate from the desired range. Therefore, a function to determine whether an arc has occurred may be implemented in the process chamber (60).

[0026] Recently, a multi-station process chamber (60) has been proposed in which multiple wafers are simultaneously introduced into a single process chamber (60), the multiple wafers are placed on multiple electrostatic chucks inside the single process chamber (60), and then the semiconductor process is performed simultaneously. In the multi-station process chamber (60), it may be important to determine whether a discharge has occurred and to determine the location where the discharge has occurred. For example, when semiconductor processes for a first wafer and a second wafer are performed simultaneously within the process chamber (60), the impact on either the first wafer or the second wafer may vary depending on the location where the discharge has occurred.

[0027] Whether a discharge has occurred can be determined by detecting the voltage and / or current of the bias power supplied to the process chamber (60), but it may be difficult to determine the location where the discharge has occurred in this manner. In one embodiment of the present invention, optical pickup units capable of receiving optical signals from inside the process chamber (60) through a window included in the process chamber (60) may be mounted in the process chamber (60). The optical signals received by the optical pickup units are converted into electrical signals by photodetectors, and a processor can determine whether a discharge has occurred and the location where the discharge has occurred using the electrical signals. Accordingly, the effect of the discharge occurring inside the process chamber (60) on the wafer can be analyzed in detail, and the yield of the semiconductor process can be improved.

[0029] FIG. 2 is a simplified diagram showing semiconductor process equipment according to one embodiment of the present invention.

[0030] Referring to FIG. 2, a semiconductor process equipment (100) according to one embodiment of the present invention may be equipment that performs a semiconductor process using plasma. The semiconductor process equipment (100) may include a chamber housing (101), an electrostatic chuck (110, 120), a chuck voltage supply unit (104, 105), a power supply unit (106, 107), and a gas supply unit (108), etc.

[0031] In the space inside the chamber housing (101), an electrostatic chuck (110, 120), a first bias electrode (130), a second bias electrode (140), and a gas passage (150) may be installed. A semiconductor substrate, for example, a wafer (W1, W2), to be subjected to a semiconductor process may be placed on the electrostatic chuck (110, 120). In the semiconductor process equipment (100) according to one embodiment illustrated in FIG. 2, a first electrostatic chuck (110) and a second electrostatic chuck (120) may be arranged inside a single chamber housing (101).

[0032] The first electrostatic chuck (110) may include an electrostatic chuck body (111), a chuck electrode (112) and a protrusion (113) inside the electrostatic chuck body (111). The second electrostatic chuck (120) may also include an electrostatic chuck body (121), a chuck electrode (122) and a protrusion (123). In each of the first electrostatic chuck (110) and the second electrostatic chuck (120), a first wafer (W1) and a second wafer (W2) are placed on the protrusions (113, 123), and the space between the protrusions (113, 123) may be filled with helium gas or the like for the purpose of cooling the wafers (W1, W2).

[0033] In one embodiment, a first wafer (W1) can be fixed on the first electrostatic chuck (110) by a Coulomb force generated from the voltage supplied by the first chuck voltage supply unit (104) to the chuck electrode (122) of the first electrostatic chuck (110), and likewise, a second wafer (W2) can be fixed on the second electrostatic chuck (120) by the voltage supplied by the second chuck voltage supply unit (105) to the second electrostatic chuck (120). For example, the chuck voltage supply units (104, 105) can output a static voltage having a level of hundreds to thousands of volts.

[0034] Meanwhile, to proceed with the semiconductor process, the gas supply unit (108) can flow reaction gas into the interior of the chamber housing (101) through the gas flow path (150). The first power supply unit (106) supplies first RF power to the first bias electrode (130) located at the bottom of the electrostatic chuck (110, 120), and the second power supply unit (107) can supply second RF power to the second bias electrode (140) located at the top of the electrostatic chuck (110, 120). Each of the first power supply unit (106) and the second power supply unit (107) may include an RF power source and a matching network for supplying bias power.

[0035] Plasma (160), including ions, radicals, and electrons of the reaction gas, can be generated on wafers (W1, W2) by first RF power and second RF power, and the reaction gas can be activated by the plasma (160) to increase reactivity. For example, if the semiconductor process equipment (100) is an etching equipment, ions, radicals, and electrons of the reaction gas can be accelerated to wafers (W1, W2) by first RF power supplied by the first power supply unit (106) to the first bias electrode (130). At least some of the layers or structures formed on wafers (W1, W2) or wafers (W1, W2) can be dry-etched by ions, radicals, and electrons of the reaction gas.

[0036] While the plasma (160) is formed and the semiconductor process is in progress, an arc may occur inside the chamber housing (101). When an arc occurs, the ions, radicals, and electrons of the reaction gas may be controlled in an undesirable direction, causing the wafers (W1, W2) to be damaged or the characteristics of the semiconductor device intended to be formed on the wafers (W1, W2) during the semiconductor process may change.

[0037] In one embodiment of the present invention, it is possible to determine whether a discharge occurs during the semiconductor process and whether the discharge occurs at a location affecting either the first wafer (W1) or the second wafer (W2). For example, if a discharge occurs during the semiconductor process, light can be observed as a result. Light caused by the discharge can be observed through windows (102, 103) provided in the chamber housing (101), but continuously observing the inside of the chamber housing (101) through the windows (102, 103) to determine whether a discharge occurs and the location of the discharge may be an extremely inefficient method.

[0038] In one embodiment of the present invention, an optical system and optical pickup units may be mounted on at least one of the windows (102, 103), and the optical pickup units may be connected to photodetectors. When a discharge occurs inside the chamber housing (101), the optical pickup units may receive an optical signal generated by the discharge and transmit it to the photodetectors. Each of the photodetectors may convert the optical signal into an electrical signal. For example, the electrical signal may be a voltage signal.

[0039] A processor connected to photodetectors can determine whether a discharge has occurred by referring to the level of an electrical signal. If it is determined that a discharge has occurred within the chamber housing (101) based on the level of the electrical signal, the processor can generate a spatial image of the inside of the chamber housing (101) using raw data obtained by digitally converting the electrical signals. Therefore, the processor can accurately determine not only whether a discharge has occurred but also the location where the discharge has occurred, and by controlling the semiconductor process based on this, the yield of the semiconductor process can be improved.

[0041] FIGS. 3 and FIGS. 4 are drawings briefly illustrating semiconductor process equipment according to one embodiment of the present invention.

[0042] First, referring to FIG. 3, a semiconductor process equipment (200) according to one embodiment of the present invention may include a chamber (210), a sensor (220), a processor (230), and a server (240), etc. The chamber (210) may include a plurality of windows (201-204) and a plurality of electrostatic chucks (211-214). Wafers (W1-W4), which are targets of the semiconductor process, are placed on each of the plurality of electrostatic chucks (211-214), and plasma (205) may be formed on the plurality of electrostatic chucks (211-214) while the semiconductor process is in progress.

[0043] The sensor (220) can receive an optical signal from inside the chamber (210) through a plurality of windows (201-204). For example, an optical system for collecting an optical signal from inside the chamber (210) may be installed in each of the plurality of windows (201-204). The optical system may include a plurality of lenses and may be configured to have a predetermined aperture value. The optical system may be shared by a plurality of optical pickup units, and each of the plurality of optical pickup units may be implemented as an optical guide. The plurality of optical pickup units may be connected to a plurality of photodetectors included in the sensor (220) through a plurality of optical fibers. For example, the plurality of photodetectors in the sensor (220) may be arranged in an array form.

[0044] A plurality of photodetectors included in the sensor (220) can convert an optical signal into an electrical signal and output it to the processor (230). For example, the electrical signal output by the plurality of photodetectors may be a voltage signal, and the analog-to-digital converter (231) of the processor (230) can convert the electrical signal into raw data, which is a digital signal. The logic circuit (232) can determine whether a discharge has occurred inside the chamber (210) and the location of the discharge using the raw data output by the analog-to-digital converter (231).

[0045] For example, the logic circuit (232) can obtain a spatial image of the inside of the chamber (210) by applying a tomography technique. An optical system mounted on a plurality of windows (201-204) and a plurality of optical pickup units can be installed to receive an optical signal from the space where plasma (205) is formed inside the chamber (210). The logic circuit (232) can generate a spatial image of the space where plasma (205) is formed by applying a tomography technique to raw data corresponding to the optical signal received by the plurality of optical pickup units.

[0046] However, to reduce the computational burden on the logic circuit (232), the logic circuit (232) may generate a spatial image only when it is determined that a discharge has occurred in the plasma (205). The logic circuit (232) may first determine whether a discharge has occurred by using raw data or an electrical signal output by the sensor (220). For example, the logic circuit (232) may determine whether a discharge has occurred by comparing the voltage level of the electrical signal with a predetermined reference level or by comparing the level change of the electrical signal with a predetermined reference range.

[0047] When it is determined that a discharge has occurred, the logic circuit (232) can generate a spatial image using raw data and determine the location where the discharge occurred based on the spatial image. For example, when a discharge occurs in the plasma (205), a very bright discharge light signal may be generated instantaneously in the space where the discharge occurred. Therefore, some of the multiple optical pickup units mounted on the multiple windows (201-204) can detect the discharge light signal and transmit a light signal that is significantly different from other optical pickup units to the sensor (220). In the spatial image configured by the processor (230), the location where the discharge light signal occurred can be indicated, and the location where the discharge occurred within the chamber (210) can be determined along with whether a discharge occurred. Thus, among the multiple wafers (W1-W4), the wafer that was significantly affected by the discharge can be determined, and subsequent measures can be taken accordingly.

[0048] The time at which the discharge occurs and the spatial image generated at that time can be stored in a separate server (240). The server (240) can store the time at which the discharge occurs and the location where the discharge occurs, along with control parameters input to control the chamber (210) at that time. The data stored in the server (240) can be used for purposes such as controlling the chamber (210) to minimize the occurrence of discharge or controlling other chambers.

[0049] As described with reference to FIG. 3, in one embodiment of the present invention, instead of a method of determining discharge by detecting the voltage, current, power, etc. of RF power supplied to bias electrodes inside the chamber (210), optical signals inside the chamber (210) can be collected to determine whether a discharge has occurred and the location of the discharge. Therefore, compared to a method of determining discharge by detecting changes in the voltage, current, and power of RF power, a discharge of a small intensity can be detected, thereby improving the precision of the discharge detection operation.

[0051] Referring to FIG. 4, a semiconductor process system (300) according to one embodiment of the present invention may include a plurality of chambers (301-303), a sensor (310), and a processor (320), etc. The plurality of chambers (301-303) may be arranged in a single process line, and the same or different semiconductor processes may be performed in the plurality of chambers (301-303).

[0052] Each of the plurality of chambers (301-303) is provided with at least one window (CW), and a plurality of optical pickup units (OP) may be mounted in the window (CW). As previously described, the plurality of optical pickup units (OP) are mounted in the window (CW) through an optical system to collect optical signals from the internal space of the chambers (301-303) and transmit them to the sensor (310).

[0053] The sensor (310) includes a plurality of photo arrays (311-313), and for example, the plurality of arrays (311-313) may correspond to a plurality of chambers (301-303). The sensor (310) and the processor (320) may be installed at a location different from the plurality of chambers (301-303) in a process line where a semiconductor process system (300) is installed. For example, the plurality of photo arrays (311-313) of the sensor (310) may be connected to the plurality of chambers (301-303) through optical fibers (LF).

[0054] The first photo array (311) can receive an optical signal from the optical pickup units (OP) of the first chamber (301) through optical fibers (LF) and the second photo array (312) can receive an optical signal from the optical pickup units (OP) of the second chamber (302) through optical fibers (LF). The Nth photo array (313) can receive an optical signal from the optical pickup units (OP) of the Nth chamber (303) through optical fibers (LF).

[0055] Each of the plurality of photo arrays (311-313) includes a plurality of photo detectors, and for example, the number of photo detectors in each of the plurality of photo arrays (311-313) may be equal to the number of optical fibers (LF) connected to each of the plurality of photo arrays (311-313). The plurality of photo detectors are arranged in an array form in each of the plurality of photo arrays (311-313) and can convert an optical signal received from the optical fibers (LF) into an electrical signal and output it to the processor (320).

[0056] The processor (320) can determine whether a discharge has occurred in each of the plurality of chambers (301-303) using an electrical signal. For example, if the voltage level of the electrical signal received from the first photo array (311) connected to the first chamber (301) is detected to be above a reference level, the processor (320) can determine that a discharge has occurred in the first chamber (301). The processor (320) can convert the electrical signal output by the first photo array (311) into raw data and use it to construct a spatial image inside the first chamber (301) to determine the location where the discharge has occurred inside the first chamber (301).

[0058] FIG. 5 is a simplified drawing of semiconductor process equipment according to one embodiment of the present invention. FIG. 6 is a simplified drawing of a photo array included in the semiconductor process equipment according to one embodiment of FIG. 5.

[0059] First, referring to FIG. 5, a semiconductor process equipment (400) according to one embodiment of the present invention may include a light collection unit (410), a sensor (420), and a processor (430), etc. The light collection unit (410) may include an optical system (411) attached to a window of a chamber to collect a light signal inside a chamber where a semiconductor process is performed, a plurality of optical pickup units (413) connected to the optical system (411), and optical fibers (415).

[0060] The optical system (411) includes an aperture and a plurality of lenses to have a predetermined wide angle and can be connected to a plurality of optical pickup units (413). Each of the plurality of optical pickup units (413) can function as an optical guide and can be connected to a plurality of photodetectors (421) included in the sensor (420) through a plurality of optical fibers (415). Referring to FIG. 5, an optical signal can be totally reflected from each of the plurality of optical fibers (415) and transmitted to each of the plurality of photodetectors (421).

[0061] As illustrated in FIG. 5, the plurality of optical fibers (415) may have flexible characteristics, unlike the plurality of optical pickup units (413). Therefore, unlike the optical system (411) and the plurality of optical pickup units (413) which must be mounted directly on the window of the chamber, the sensor (420) may be positioned at a location different from the chamber within the process line and may be connected to the plurality of optical pickup units (413) by the plurality of optical fibers (415).

[0062] Each of the plurality of photo detectors (421) can convert an optical signal received through the plurality of optical fibers (415) into a voltage signal and provide it to the processor (430). The analog-to-digital converter (431) of the processor (430) converts the voltage signal into digital data to generate raw data, and the logic circuit (433) can use the raw data to generate a spatial image representing the space that the wide angle of the optical system (411) can cover.

[0063] Referring to FIG. 5, a plurality of optical pickup units (413) are commonly connected to a single optical system (411) and may have different line of sight areas. By the sum of the line of sight areas of each of the plurality of optical pickup units (413), the angle of view of the optical system (411) and the area of ​​space that can be covered by the optical system (411) can be determined. Therefore, if necessary, the angle of view of the optical system (411) can be changed by changing the line of sight area of ​​each of the plurality of optical pickup units (413), and the area of ​​space corresponding to the spatial image generated by the processor (430) can be adjusted. For example, the length of each of the plurality of optical pickup units (413) can be adjusted to change the line of sight area of ​​each of the plurality of optical pickup units (413), and thereby the angle of view of the optical system (411) can be adjusted.

[0065] Next, referring to FIG. 6, a sensor (420) according to one embodiment of the present invention may include a plurality of photodetectors (421) arranged in an array form along a plurality of rows corresponding to the X-axis direction and a plurality of columns corresponding to the Y-axis direction. The sensor (420) according to one embodiment illustrated in FIG. 6 may be connected to a plurality of optical pickup units mounted in a plurality of chambers.

[0066] For example, photodetectors (421) arranged along one of a plurality of rows may be connected to a light collecting unit (410) of an embodiment described above with reference to FIG. 5. A sensor (420) according to an embodiment illustrated in FIG. 6 may be connected to a plurality of light collecting units (410) mounted at different locations in a single chamber. For example, the sensor (420) may be connected to four light collecting units (410) mounted at four different locations in a single chamber, and the four light collecting units (410) may be connected to photodetectors (421) arranged along four rows.

[0067] Assuming that first to fourth light collection units are provided in a single chamber, the first optical pickup units of the first light collection unit may be connected to a plurality of first photodetectors arranged in the first row. The second optical pickup units of the second light collection unit may be connected to a plurality of second photodetectors arranged in the second row, and the third optical pickup units of the third light collection unit may be connected to a plurality of third photodetectors arranged in the third row. The fourth optical pickup units of the fourth light collection unit may be connected to a plurality of fourth photodetectors arranged in the fourth row. Depending on the number of light collection units provided in the chamber, the number of photodetectors (421) included in the sensor (420) and their arrangement may vary.

[0068] Meanwhile, according to an embodiment, a sensor (420) according to one embodiment illustrated in FIG. 6 may be connected to a plurality of chambers. For example, the sensor (420) may be connected to a plurality of optical pickup units mounted in four chambers, and a processor (430) may select a plurality of photodetectors (421) placed in the sensor (420) in rows to determine whether a discharge has occurred and the location of the discharge occurrence in each of the plurality of chambers. In this case, a light collection unit may be provided in each of the four chambers.

[0069] Alternatively, two light collecting units may be mounted in each of the two chambers, and the two chambers may be connected to the sensor (420). For example, the photodetectors in the first row and the second row may be connected to the two light collecting units provided in the first chamber, and the photodetectors in the third row and the fourth row may be connected to the two light collecting units provided in the second chamber. However, the method of connecting the sensor (420) and the chambers is not limited to the embodiments described above, and the corresponding relationship between the plurality of photodetectors (421) and the plurality of chambers may be varied in many ways.

[0071] FIGS. 7 to 10 are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention.

[0072] First, referring to FIG. 7, a semiconductor process equipment (500) according to one embodiment of the present invention may have a plurality of electrostatic chucks (501-504) arranged inside a chamber, and a window (506) may be provided on one side of the chamber housing. An optical system (510) having a predetermined wide angle (θ) may be mounted on the window (506). During the semiconductor process, plasma (505) may be formed on the upper portion of the plurality of electrostatic chucks (501-504). As previously described, plasma (505) may be formed by RF power input to bias electrodes arranged on the upper and lower portions of the plurality of electrostatic chucks (501-504) within the chamber.

[0073] While the plasma (505) is formed and the semiconductor process is in progress, the optical signal of the cover area (515) can be introduced into the optical system (510). The optical system (510) is connected to a plurality of optical pickup units having different directional view areas, so that the optical signal of the cover area (515) can be distributed to the plurality of optical pickup units according to its direction of travel.

[0074] An optical signal passing through multiple optical pickup units is transmitted to multiple photodetectors through multiple optical fibers, and each of the multiple photodetectors can output an electrical signal corresponding to the optical signal. The processor can determine whether a discharge has occurred and the location of the discharge using the electrical signal.

[0075] In one embodiment illustrated in FIG. 7, the optical system (510) may be mounted only on one window provided on one side of the chamber. Therefore, in order for a processor to generate a spatial image to determine the location of discharge occurrence using tomography techniques, etc., it may be necessary to make certain assumptions about the distribution of light signals generated in the region where plasma (505) is formed.

[0077] Next, referring to FIG. 8, a semiconductor process equipment (500A) according to one embodiment of the present invention may include a chamber in which a plurality of electrostatic chucks (501A-504A) are arranged. A first window (506A) and a second window (507A) may be provided on one side of the chamber housing. A first optical system (510A) having a first wide angle (θ1) may be mounted in the first window (506A), and a second optical system (520A) having a second wide angle (θ2) may be mounted in the second window (507A). During the semiconductor process, a plasma (505) may be formed on the upper surface of the plurality of electrostatic chucks (501A-504A). There is no limitation on the relationship between the first wide angle (θ1) and the second wide angle (θ2), and they may be the same or different from each other.

[0078] While the plasma (505) is formed and the semiconductor process is in progress, a first optical signal from a first cover area (515A) may be introduced into a first optical system (510A), and a second optical signal from a second cover area (525A) may be introduced into a second optical system (520A). Each of the first optical system (510A) and the second optical system (520A) may be connected to a plurality of optical pickup units having different directional line-of-sight areas. For example, the number of a plurality of first optical pickup units connected to the first optical system (510A) may be equal to the number of a plurality of second optical pickup units connected to the second optical system (520A).

[0079] A first optical signal passing through a plurality of first optical pickup units is transmitted to a plurality of first photodetectors through a plurality of first optical fibers, and a second optical signal passing through a plurality of second optical pickup units can be transmitted to a plurality of second photodetectors through a plurality of second optical fibers. The plurality of first photodetectors and the plurality of second photodetectors can output a first electrical signal and a second electrical signal corresponding to the first optical signal and the second optical signal to a processor. The processor can determine whether a discharge occurs in the plasma (505) and the location of the discharge using the first electrical signal and the second electrical signal.

[0080] For example, if a first electrical signal output by at least one of a plurality of first photodetectors increases above a predetermined reference level, the processor may determine that a discharge has occurred on the first electrostatic chuck (501A) and / or the second electrostatic chuck (502A). The processor may use the first electrical signal to construct a spatial image representing the first cover area (515A) and use the spatial image to determine the location where the discharge occurred.

[0082] Next, referring to FIG. 9, a semiconductor process equipment (500B) according to one embodiment of the present invention may include a chamber in which a plurality of electrostatic chucks (501B-504B) are arranged. A first window (506B) may be provided on a first surface of the chamber housing, and a second window (507B) may be provided on a second surface different from the first surface. In one embodiment illustrated in FIG. 9, the first surface and the second surface may extend in different directions and intersect each other. During the semiconductor process, plasma (505) may be formed on the upper portion of the plurality of electrostatic chucks (501B-504B).

[0083] A first optical system (510B) having a first wide angle (θ1) may be mounted in the first window (506B), and a second optical system (520B) having a second wide angle (θ2) may be mounted in the second window (507B). While the plasma (505) is formed and the semiconductor process is in progress, a first optical signal from the first cover area (515B) may be introduced into the first optical system (510B), and a second optical signal from the second cover area (525B) may be introduced into the second optical system (520B). Each of the first optical system (510B) and the second optical system (520B) may be connected to a plurality of optical pickup units having line-of-sight areas in different directions.

[0084] A first optical signal passing through a plurality of first optical pickup units is transmitted to a plurality of first photodetectors through a plurality of first optical fibers, and a second optical signal passing through a plurality of second optical pickup units can be transmitted to a plurality of second photodetectors through a plurality of second optical fibers. The plurality of first photodetectors and the plurality of second photodetectors can output a first electrical signal and a second electrical signal corresponding to the first optical signal and the second optical signal to a processor. The processor can determine whether a discharge occurs in the plasma (505) and the location of the discharge using the first electrical signal and the second electrical signal.

[0085] In one embodiment illustrated in FIG. 9, when a discharge occurs at a specific location of the plasma (505), the level of a first electrical signal output by at least one of a plurality of first photodetectors and the level of a second electrical signal output by at least one of a plurality of second photodetectors can be simultaneously detected at a reference level or higher. The processor can construct a spatial image representing the space inside the chamber using the first electrical signal and the second electrical signal, and can determine the location where the discharge occurred using the spatial image. In one embodiment illustrated in FIG. 9, since the first optical system (510B) and the second optical system (520B) are respectively mounted on the first surface and the second surface in different directions, the processor can generate a spatial image using a tomography technique without any separate assumptions as previously explained with reference to FIG. 7.

[0087] Referring to FIG. 10, in a semiconductor process equipment (500C) according to one embodiment of the present invention, a plurality of electrostatic chucks (501C-504C) are arranged inside a chamber, and a plurality of windows (506C-509C) may be provided in the chamber housing. In one embodiment illustrated in FIG. 10, a first window (506C) and a second window (507C) may be provided on a first surface of the chamber housing, and a third window (508C) and a fourth window (509C) may be provided on a second surface facing a direction different from the first surface. During the semiconductor process, plasma (505) may be formed on the upper surface of the plurality of electrostatic chucks (501C-504C).

[0088] A first optical system (510C) having a first wide angle (θ1) may be mounted in the first window (506C), and a second optical system (520C) having a second wide angle (θ2) may be mounted in the second window (507C). ​​A third optical system (530C) having a third wide angle (θ3) may be mounted in the third window (508C), and a fourth optical system (540C) having a fourth wide angle (θ4) may be mounted in the fourth window (509C). A first optical signal from the first cover area (515C) may be fed into the first optical system (510C), and a second optical signal from the second cover area (525C) may be fed into the second optical system (520C). The first optical signal of the third cover area (535C) is fed into the third optical system (530C), and the second optical signal of the fourth cover area (545C) can be fed into the fourth optical system (540C). Each of the first to fourth optical systems (510C-540C) can be connected to a plurality of optical pickup units having line-of-sight areas in different directions.

[0089] A first optical signal is transmitted to a plurality of first photodetectors through a plurality of first optical fibers, and a second optical signal can be transmitted to a plurality of second photodetectors through a plurality of second optical fibers. Meanwhile, a third optical signal is transmitted to a plurality of third photodetectors through a plurality of third optical fibers, and a fourth optical signal can be transmitted to a plurality of fourth photodetectors through a plurality of fourth optical fibers. The plurality of first to fourth photodetectors output first to fourth electrical signals corresponding to the first to fourth optical signals to a processor, and the processor can determine whether a discharge has occurred inside the chamber and the location of the discharge using the first to fourth electrical signals.

[0090] For example, when a discharge occurs on the first electrostatic chuck (501C), the level of a first electrical signal output by at least one of the plurality of first photodetectors and the level of a third electrical signal output by at least one of the plurality of third photodetectors can be simultaneously detected to be above a reference level. Meanwhile, when a discharge occurs on the fourth electrostatic chuck (504C), the level of a second electrical signal output by at least one of the plurality of second photodetectors and the level of a fourth electrical signal output by at least one of the plurality of fourth photodetectors can be simultaneously detected to be above a reference level.

[0091] In addition to the method of identifying photodetectors in which an electrical signal above a reference level is detected as described above, the processor can accurately determine the location of discharge occurrence by converting the first to fourth electrical signals into raw data and constructing a spatial image representing the space inside the chamber based thereon. For example, if the level of an electrical signal output by at least one of the plurality of first to fourth photodetectors is detected above a reference level, the processor can convert the first to fourth electrical signals into raw data and generate a spatial image based thereon.

[0092] Alternatively, in one embodiment, only electrical signals detected above a reference level may be converted into raw data to generate a spatial image representing only a portion of the space inside the chamber. For example, if the levels of a first electrical signal output by at least one of a plurality of first photodetectors and a fourth electrical signal output by at least one of a plurality of fourth photodetectors are simultaneously detected above a reference level, the processor may select the first electrical signal and the fourth electrical signal, convert them into raw data, and construct a spatial image based thereon. The spatial image may represent a space defined above the second electrostatic chuck (502C).

[0094] FIGS. 11a to 14c are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention.

[0095] FIGS. 11a to 11c, FIGS. 12a to 12c, FIGS. 13a to 13c, and FIGS. 14a to 14c may be graphs showing changes in first to third voltage signals output by first to third photodetectors connected to a single chamber over a certain period of time. For example, the first to third photodetectors may share a single optical system and receive light signals in different line-of-sight regions through the single optical system and convert them into voltage signals.

[0096] While plasma is formed inside the chamber and the semiconductor process is in progress, each of the first to third voltage signals output by the first to third photodetectors may increase and decrease within a predetermined normal range (△NR). In other words, a change in the level of a voltage signal within the normal range (△NR) may not be recognized as a discharge occurring inside the chamber.

[0097] In the graphs illustrated in FIGS. 11a to 11c, the levels of the first to third voltage signals may fluctuate in an abnormal range (△AR) greater than the normal range (△NR) at a specific point in time. Accordingly, a processor receiving the first to third voltage signals may determine that a discharge has occurred within the chamber at that point in time. At the time when the processor determines that a discharge has occurred, it converts the received first to third voltage signals into raw data and uses this to generate a spatial image of the inside of the chamber to determine the location of the discharge.

[0099] In the embodiment described with reference to FIGS. 12a to 12c, each of the first to third voltage signals output by the first to third photodetectors can increase and decrease only within a normal range (△NR) while plasma is formed in the chamber and the semiconductor process is being carried out. Therefore, the processor can determine that no discharge occurs in the chamber while the semiconductor process is being carried out.

[0101] In the embodiment described with reference to FIGS. 13a to 13c, each of the first to third voltage signals output by the first to third photodetectors may increase to a level outside the normal range (△NR) within a predetermined time interval (△T) while plasma is formed in the chamber and the semiconductor process is being carried out. However, compared to the embodiment described above with reference to FIGS. 11a to 11c, the length of the time interval (△T) in which each of the first to third voltage signals has a level outside the normal range (△NR) may be relatively long.

[0102] In the event that an unintended discharge occurs inside the chamber, the first to third voltage signals may have levels outside the normal range (△NR) for a very short period of time, as illustrated in FIGS. 11a to 11c. Accordingly, as illustrated in FIGS. 13a to 13c, if the first to third voltage signals have levels outside the normal range (△NR) for a long time interval (△T), the processor may determine that an abnormal state other than a discharge has occurred in the chamber.

[0104] In the embodiment described with reference to FIGS. 14a to 14c, while plasma is formed in the chamber and the semiconductor process is in progress, only the first voltage signal may increase to a level outside the normal range (△NR) at a specific point in time. Referring to FIGS. 14b and 14c, the second voltage signal and the third voltage signal have levels within the normal range (△NR), and as shown in FIG. 14a, only the first voltage signal may increase to a level outside the normal range (△NR) at a specific point in time.

[0105] In this way, even if only the voltage signals output by some photodetectors fall outside the normal range (△NR), the processor can determine that a discharge has occurred within the chamber. The processor can convert the voltage signal at that time into raw data and generate a spatial image based on it to determine the location of the voltage occurrence.

[0107] FIGS. 15 and FIGS. 16 are drawings provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention.

[0108] FIGS. 15 and 16 may be drawings showing spatial images (600, 600A) generated by a processor in semiconductor process equipment according to one embodiment of the present invention. In one embodiment, the spatial images (600, 610) described with reference to FIGS. 15 and 16 may be generated in one of the semiconductor process equipment (500, 500A, 500B, 500C) according to the embodiments described with reference to FIGS. 7 to 10. Each of the spatial images (600, 610) illustrated in FIGS. 15 and 16 includes first to fourth regions (601-604, 611-614), and the first to fourth regions (601-604, 611-614) may correspond to first to fourth electrostatic chucks provided inside a chamber.

[0109] The first spatial image (600) illustrated in FIG. 15 may be an image generated by the processor at a first time point. At the first time point, a discharge may occur on the third electrostatic chuck inside the chamber. Accordingly, as illustrated in the first spatial image (600), peak data corresponding to the maximum voltage signal may appear in the third region (603) among the first to fourth regions (601-604). Based on the first spatial image (600), the processor may determine that a discharge has occurred in the space adjacent to the third electrostatic chuck.

[0110] The second spatial image (610) illustrated in FIG. 16 may be an image generated by the processor at a second time point different from the first time point. At the second time point, a discharge may occur simultaneously on the second electrostatic chuck and the third electrostatic chuck inside the chamber. Accordingly, as illustrated in the second spatial image (610), peak data corresponding to the maximum voltage signal may appear in the second region (612) and the third region (613) among the first to fourth regions (611-614). Based on the first spatial image (610), the processor may determine that a discharge has occurred in the space adjacent to the second electrostatic chuck and the third electrostatic chuck.

[0111] In one embodiment described with reference to FIGS. 15 and 16, the processor receives electrical signals corresponding to optical signals entering an optical system mounted in a chamber from a plurality of photodetectors and monitors changes in the level of the electrical signals to determine the time at which a discharge is presumed to have occurred. Once the time at which a discharge occurs is determined, the processor can generate a spatial image to determine the location of the discharge. For example, the processor does not generate spatial images continuously, but may generate spatial images only during a partial time interval that includes the time at which the discharge is confirmed to have occurred.

[0112] Accordingly, the processor can generate multiple spatial images representing the state inside the chamber within a time interval including the time of discharge occurrence, and analyze the pattern of discharge occurrence based thereon. To generate spatial images of a time point preceding the time of discharge occurrence, the processor may store some of the continuously received electrical signals in internal and / or external memory. However, according to an embodiment, the processor may generate spatial images whenever electrical signals are received from photodetectors without determining the time of discharge occurrence.

[0114] FIG. 17 is a flowchart provided to explain the operation of semiconductor process equipment according to one embodiment of the present invention.

[0115] Referring to FIG. 17, the operation of a semiconductor process equipment according to one embodiment of the present invention may begin with the introduction of a wafer (S10). The wafer is transported in a container such as a FOUP in a process line where the semiconductor process equipment is placed, and a wafer transfer robot or the like may take the wafer out of the FOUP and introduce it into the semiconductor process equipment. The introduced wafer may be placed on an electrostatic chuck provided inside the chamber of the semiconductor process equipment.

[0116] When the wafer is placed on the electrostatic chuck, RF power is supplied to the bias electrodes inside the chamber, and a reaction gas is introduced to start the semiconductor process (S20). During the semiconductor process, plasma can be formed on the upper part of the electrostatic chuck. As the semiconductor process proceeds, an optical signal is transmitted to photodetectors through an optical system mounted on the window of the chamber, and the photodetectors can convert the optical signal into a voltage signal. A processor connected to the photodetectors can acquire the voltage signal (S30).

[0117] The processor can determine whether the level of the voltage signal increases above a reference level (S40). For example, the processor may not consider it abnormal if the level of the voltage signal fluctuates within a predetermined normal range, taking into account the environment inside the chamber during the semiconductor process. In other words, the reference level may be set to a level that is outside the normal range.

[0118] The reference level may be set as an absolute value greater than the normal range, or as a predetermined ratio to the normal range. For example, the reference level may be set as an absolute value such as 1.5V or 2.0V. Alternatively, the reference level may be set as a ratio to the normal range, such as 1.5 times or 2 times the maximum level of the voltage signal in the normal range.

[0119] If, as a result of the judgment in step S40, the level of the voltage signal does not increase above a reference level, the processor can continue to receive voltage signals from the photodetectors without any further action. On the other hand, if, as a result of the judgment in step S40, the level of the voltage signal increases above a reference level, the processor can digitally convert the voltage signal to obtain raw data and construct a spatial image inside the chamber based on this (S50).

[0120] For example, the spatial image can be configured as described above with reference to FIGS. 15 and FIGS. 16. In the spatial image, peak data resulting from the discharge may appear on a plane corresponding to the space inside the chamber, and thus the processor can determine the location where the discharge occurred based on the spatial image and determine the wafer affected therefrom (S60).

[0122] The present invention is not limited by the embodiments described above and the attached drawings, but is intended to be limited by the appended claims. Accordingly, various substitutions, modifications, and changes may be made by those skilled in the art within the scope of the technical concept of the present invention as described in the claims, and such are also to be considered to fall within the scope of the present invention. Explanation of the symbols

[0124] 10, 300: Semiconductor process system 100, 200, 500, 500A, 500B, 500C: Semiconductor process equipment 102, 103, 201, 202, 203, 204, 506, 506A, 507A, 506B, 507B, 506C, 507C, 508C, 509C: Windows 220, 310, 420: Sensor 230, 320, 430: Processors 410: Light Collector 411, 510, 510A, 520A, 510B, 520B, 510C, 520C, 530C, 540C: Optical system 413: Optical pickup units 415: Optical fibers 600, 610: Space image

Claims

Claim 1 A chamber comprising a plurality of electrostatic chucks on which a plurality of wafers are placed, and a chamber housing provided with at least one window; a light collecting unit having a first optical system and a second optical system mounted at different positions of the window, a plurality of first optical pickup units commonly connected to the first optical system and having different line of sight regions, and a plurality of second optical pickup units commonly connected to the second optical system and having different line of sight regions; a sensor having a plurality of photodetectors that convert a first optical signal transmitted by the plurality of first optical pickup units and a second optical signal transmitted by the plurality of second optical pickup units into an electrical signal; and a processor that generates a spatial image inside the chamber housing using the electrical signal output by the plurality of photodetectors and determines the location where an arc occurred inside the chamber housing based on the spatial image. A semiconductor process equipment comprising, wherein the first angle of view of the first optical system is determined according to the length of each of the plurality of first optical pickup units, and the second angle of view of the second optical system is determined according to the length of each of the plurality of second optical pickup units. Claim 2 A semiconductor process equipment according to claim 1, wherein the light collecting unit further comprises a plurality of optical fibers connecting the plurality of photodetectors to the plurality of first optical pickup units and the plurality of second optical pickup units. Claim 3 A semiconductor process equipment according to claim 1, wherein the window comprises a first window and a second window located at different positions in the chamber housing, and the first optical system is mounted on the first window and the second optical system is mounted on the second window. Claim 4 In paragraph 3, the first window is located on the first surface of the chamber housing and the second window is located on the second surface of the chamber housing, and the first surface and the second surface are perpendicular to each other, in a semiconductor process equipment. Claim 5 A semiconductor process equipment according to claim 1, wherein each of the first optical system and the second optical system provides an aperture region, and the plurality of first optical pickup units collect the first optical signal through the aperture region of the first optical system, and the plurality of second optical pickup units collect the second optical signal through the aperture region of the second optical system. Claim 6 A semiconductor process equipment according to claim 1, wherein the first angle of view corresponds to the sum of the angles of view of each of the plurality of first optical pickup units, and the second angle of view corresponds to the sum of the angles of view of each of the plurality of second optical pickup units. Claim 7 delete Claim 8 A semiconductor process equipment according to claim 1, wherein the processor, when it is determined that a discharge has occurred inside the chamber housing, processes the electrical signal by a tomography method to generate an image of the space inside the chamber housing. Claim 9 A semiconductor process equipment comprising: a chamber housing including a first window mounted on a first surface and a second window mounted on a second surface intersecting the first surface; a plurality of first optical pickup units mounted on the first window and collecting a first optical signal inside the chamber housing at a first angle of view; a plurality of second optical pickup units mounted on the second window and collecting a second optical signal inside the chamber housing at a second angle of view; a sensor including a plurality of first photodetectors outputting a first voltage signal corresponding to the first optical signal and a plurality of second photodetectors outputting a second voltage signal corresponding to the second optical signal; and a processor generating a spatial image inside the chamber housing using the first voltage signal and the second voltage signal; wherein the first angle of view is determined according to the length of each of the plurality of first optical pickup units and the second angle of view is determined according to the length of each of the plurality of second optical pickup units. Claim 10 A semiconductor process equipment comprising: a chamber housing including a first surface and a second surface that intersect each other; a first window disposed on the first surface; a second window disposed on the second surface; a first optical system mounted on the first window and having a first angle of view; a plurality of first optical pickup units receiving an optical signal from inside the chamber housing through the first optical system; a second optical system mounted on the second window and having a second angle of view; and a plurality of second optical pickup units receiving an optical signal from inside the chamber housing through the second optical system; wherein the first angle of view is determined according to the length of each of the plurality of first optical pickup units, and the second angle of view is determined according to the length of each of the plurality of second optical pickup units.

Images