HEMT with Improved Ohmic Properties

KR103013129B1Active Publication Date: 2026-09-02A PRO SEMICON CO LTD
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Patent Information

Application Number
KR1020240000894
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-09-04
Filing Date
2024-01-03
Publication Date
2026-09-02
Estimated Expiration
2044-01-03

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Abstract

A HEMT with improved ohmic characteristics is disclosed. According to one aspect of the present embodiment, a HEMT (High Electron Mobility Transistor) is provided, comprising: a substrate providing a space for each component within the HEMT to grow or be deposited; a buffer layer grown on the substrate to allow the remaining layer to grow smoothly on itself; a high-resistance buffer layer that improves the breakdown voltage of the HEMT and minimizes damage caused by leakage current; a GaN channel layer that allows electrons to move along itself; a barrier layer that controls electron flow within the GaN channel layer and improves the withstand voltage characteristics of the HEMT; a plurality of electrodes each located on the barrier layer and the GaN channel layer; and an ohmic electrode layer formed between the GaN channel layer and each electrode layer, wherein the ohmic electrode layer is formed such that different components have a superlattice structure.
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Description

Technology Field

[0001] This embodiment relates to a HEMT with improved ohmic properties. Background Technology

[0002] The content described in this section merely provides background information regarding the present embodiment and does not constitute prior art.

[0003] A HEMT (High Electron Mobility Transistor) is a type of field-effect transistor comprising a heterojunction of materials with different band gaps, such as GaN and AlGaN. The orientation of the transistor can be lateral or vertical, meaning that the current flow between the source and drain contacts of the transistor can be perpendicular or parallel to the surface of the transistor or the substrate on which the transistor is based. In a vertical HEMT, the drain contact can be placed at the bottom of the device, while the source contact can be placed at the top. Transistor operation, that is, whether current is conducted between the source and drain contacts, is controlled by the application of voltage to the gate contact. In a more traditional horizontal HEMT, current flows primarily horizontally through the transistor and is mediated by a so-called 2-dimensional electron gas (2DEG) formed at the interface between the heterojunctions of different band gap materials.

[0004] To control the flow of current within the HEMT, an ohmic contact layer is formed between each component so that the channel and the source and drain electrodes, respectively, make contact. The ohmic contact layer in a conventional HEMT is n + GaN n + AlGaN / GaN or n +It has been realized using materials doped with high concentrations of n-type dopants (e.g., silicon), such as InGaN / GaN. However, as materials doped with high concentrations of n-type dopants are used as ohmic contact layers, a problem has arisen regarding the deterioration of the crystallinity of the ohmic contact layer. The problem to be solved

[0005] One embodiment of the present invention has the objective of providing a HEMT that prevents a decrease in crystallinity by improving ohmic properties. means of solving the problem

[0006] According to one aspect of the present embodiment, a HEMT (High Electron Mobility Transistor) is provided, comprising: a substrate providing a space for each component within the HEMT to grow or be deposited; a buffer layer grown on the substrate to allow the remaining layer to grow smoothly on itself; a high-resistance buffer layer that improves the breakdown voltage of the HEMT and minimizes damage caused by leakage current; a GaN channel layer that allows electrons to move along itself; a barrier layer that controls electron flow within the GaN channel layer and improves the withstand voltage characteristics of the HEMT; a plurality of electrodes each located on the barrier layer and the GaN channel layer; and an ohmic electrode layer formed between the GaN channel layer and each electrode layer, wherein the ohmic electrode layer is formed such that different components have a superlattice structure.

[0007] According to one aspect of the present embodiment, the ohmic electrode layer is characterized by being formed such that an undoped (Al)GaN layer and a SiN layer are arranged in a superlattice structure.

[0008] According to one aspect of the present embodiment, each layer included in the ohmic electrode layer is characterized by having a thickness of 2 mm or less.

[0009] According to one aspect of the present embodiment, the ohmic electrode layer is characterized by being formed such that an undoped (Al)GaN layer and a SiN layer are arranged in one or more cycles.

[0010] According to one aspect of the present embodiment, the ohmic electrode layer is characterized by having a total thickness of 100 mm or less.

[0011] According to one aspect of the present embodiment, the ohmic electrode layer is characterized in that an n-(Al)GaN layer, a GaN layer, and a SiN layer are arranged in a superlattice structure.

[0012] According to one aspect of the present embodiment, the n-(Al)GaN layer is characterized by being doped with an n-type dopant below a preset reference value. Effects of the invention

[0013] As described above, according to one aspect of the present embodiment, there is an advantage of preventing a decrease in crystallinity by improving ohmic properties. Brief explanation of the drawing

[0014] FIG. 1 is a diagram illustrating the configuration of a HEMT according to one embodiment of the present invention. FIG. 2 is a diagram illustrating the configuration of an ohmic contact layer according to one embodiment of the present invention. FIG. 3 is a diagram illustrating the configuration of an ohmic contact layer according to another embodiment of the present invention. FIGS. 4 to 7 are drawings illustrating the manufacturing process of HEMT according to one embodiment of the present invention. Specific details for implementing the invention

[0015] The present invention is susceptible to various modifications and may have various embodiments, and specific embodiments are illustrated in the drawings and described in detail. However, this is not intended to limit the invention to specific embodiments, and it should be understood that the invention includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention. Similar reference numerals have been used for similar components in the description of each drawing.

[0016] Terms such as first, second, A, B, etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be named the second component, and similarly, the second component may be named the first component. The term "and / or" includes a combination of a plurality of related described items or any of a plurality of related described items.

[0017] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0018] The terms used in this application are used merely to describe specific embodiments and are not intended to limit the invention. The singular expression includes the plural expression unless the context clearly indicates otherwise. In this application, terms such as "comprising" or "having" should be understood as not precluding the existence or addition of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification.

[0019] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which this invention pertains.

[0020] Terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this application.

[0021] In addition, each component, process, procedure, or method included in each embodiment of the present invention may be shared within a scope that is not technically contradictory to one another.

[0022] FIG. 1 is a diagram illustrating the configuration of a HEMT according to one embodiment of the present invention.

[0023] Referring to FIG. 1, a HEMT (100) according to one embodiment of the present invention comprises a substrate (110), a buffer layer (120), a transition layer (130), a high-resistance buffer layer (140), a GaN channel (150), a barrier layer (160), a p-GaN layer (170), electrodes (180, 184, 188) and ohmic electrode layers (190, 195).

[0024] The HEMT (100, High Electron Mobility Transistor) is a FET that secures high electron mobility by using a heterojunction of AlGaN and a broadband semiconductor component such as gallium nitride (GaN). Based on these characteristics, the HEMT (100) can operate at relatively low power and secure fast switching speeds.

[0025] At this time, HEMT (100) includes an ohmic electrode layer (190, 195) to be described later, thereby improving ohmic characteristics and preventing a decrease in crystallinity.

[0026] The substrate (110) provides a space for the remaining components within the HEMT (100) to be grown or deposited. The substrate (110) can be made of silicon (Si).

[0027] The buffer layer (120) is grown on the substrate (110) to allow the remaining layers to grow smoothly on itself. As the buffer layer (120) grows on the substrate (110), it minimizes lattice mismatch between the layer to be grown on itself and the substrate (110). This allows the remaining layers to grow smoothly on the substrate (110). The buffer layer (120) can be implemented with aluminum nitride (AlN).

[0028] A transition layer (130) is formed on a buffer layer (120) to have a super lattice structure, thereby mitigating lattice mismatch and enabling the formation of a GaN channel (150). The transition layer (130) is formed such that aluminum nitride (AlN) and (Al)GaN have a super lattice structure. When the transition layer (130) is implemented on the buffer layer (120) in this manner, it mitigates defects caused by lattice mismatch between the substrate (110) and the remaining layers, and improves the formation of the GaN channel (150) and the quality of the channel.

[0029] The high-resistance buffer layer (140) improves the breakdown voltage of the HEMT (100) and minimizes damage caused by leakage current. It is structurally difficult for the HEMT (100) to prevent the occurrence of leakage current. Accordingly, the HEMT (100) includes a high-resistance buffer layer (140) to minimize damage caused by leakage current even if it occurs. The high-resistance buffer layer (140) is implemented with carbon (C)-doped gallium nitride (GaN) and performs an action similar to resistance in terms of current. Accordingly, the high-resistance buffer layer (140) improves the breakdown voltage and minimizes damage caused by leakage current. The high-resistance buffer layer (140) is made of carbon 10 18 to 10 20 / cm 3 It can be implemented through doping based on concentration. If the doping concentration is lower than this level, the resistance value decreases, reducing the (leakage) current blocking effect. Conversely, even if the doping concentration increases beyond this level, the resistance value does not increase; rather, the carbon concentration rises, leading to adverse effects.

[0030] The GaN channel (150) is a channel that allows electrons to move along itself, and controls the movement of electrons depending on whether power is applied to the electrode (190). The GaN channel (150) is implemented with gallium nitride (GaN) and formed on the high-resistance buffer layer (140). Accordingly, when power is applied to the electrode (180), electrons can move along the GaN channel (150) from the electrode (184) to the electrode (188). Since the GaN channel (150) is implemented with gallium nitride, it has high electron mobility. Accordingly, the GaN channel (150) allows electrons to move quickly along itself.

[0031] A barrier layer (160) is grown on a GaN channel (150) to control electron flow within the GaN channel (150) and improve the withstand voltage characteristics of the HEMT (100). The barrier layer (160) is implemented with AlGaN and has a higher energy bandgap than the GaN channel (150). Accordingly, the barrier layer (160) enables the HEMT (100) to withstand a high voltage, thereby improving the withstand voltage characteristics of the HEMT (100). Additionally, the barrier layer (160) controls electron flow within the GaN channel (150) using an electric field together with the p-GaN layer (170) and the electrode (180).

[0032] The p-GaN layer (170) is grown on the barrier layer (160) and controls the electric field together with the electrode (180).

[0033] The electrode (180) is formed on the p-GaN layer (170) and controls whether an electric field is applied to the GaN channel (150) and whether electrons flow in the GaN channel (150). The electrode (180) determines whether an electric field is applied to the GaN channel (150) depending on whether power is applied. The electrode (180) receives power from an external source and applies an electric field to the GaN channel (150) through the p-GaN layer (170) and the barrier layer (160). Accordingly, electrons can flow along the GaN channel (150).

[0034] The electrodes (184) and (188) are positioned on the GaN channel (150) and serve to provide electrons to move along the GaN channel (150) to the HEMT (100). When a situation is realized in which electrons can flow into the GaN channel (150) by the electrodes (180), the electrodes (184) and (188) receive power from an external source to enable electrons to move along the GaN channel (150).

[0035] The ohmic electrode layer (190, 195) is formed between the GaN channel (150) and the electrodes (184, 188) so that the two can make ohmic contact. Accordingly, electrons from one electrode (184) are smoothly supplied to the GaN channel (150), and electrons passing through the GaN channel (150) can smoothly flow into the other electrode (188).

[0036] At this time, the ohmic electrode layer (190, 195) is implemented as a superlattice structure of undoped (Al)GaN and SiN as shown in FIG. 2, or as a superlattice structure of n-(Al)GaN / GaN / SiN, and can resolve the problem of crystallinity degradation of the conventional ohmic electrode layer.

[0037] FIG. 2 is a diagram illustrating the configuration of an ohmic contact layer according to one embodiment of the present invention.

[0038] Referring to FIG. 2, an ohmic contact layer (190, 195) according to one embodiment of the present invention includes one or more undoped (Al)GaN layers (210) and SiN layers (220).

[0039] The ohmic contact layer (190, 195) has a form in which one or more undoped (Al)GaN layers (210) and SiN layers (220) are arranged in a superlattice structure. At this time, each layer (210, 22) has a thickness of 2 mm or less and is arranged in one or more cycles, but the total thickness of the ohmic contact layer (190, 195) is implemented so that it does not exceed 100 nm. In this way, as the ohmic contact layer (190, 195) is implemented with undoped layers, the problem of crystallinity degradation occurring due to high concentration doping of n-type dopants can be fundamentally prevented.

[0040] At this time, when the undoped (Al)GaN layer (210) is implemented as AlGaN, the concentration of aluminum (Al) is implemented to increase towards the bottom (in the direction away from the electrodes (184, 188). As the undoped (Al)GaN layer (210) is implemented in this way, stress within the ohmic contact layer (190, 195) can be relieved.

[0041] FIG. 3 is a diagram illustrating the configuration of an ohmic contact layer according to another embodiment of the present invention.

[0042] Referring to FIG. 3, an ohmic contact layer (190, 195) according to one embodiment of the present invention includes one or more n-(Al)GaN layers (310), GaN layers (320), and SiN layers (220).

[0043] The ohmic contact layer (190, 195) has a form in which one or more n-(Al)GaN layers (310), GaN layers (320), and SiN layers (220) are arranged in a superlattice structure. Likewise, each layer (210, 22) has a thickness of 2 mm or less and is arranged in one or more cycles, but the total thickness of the ohmic contact layer (190, 195) is implemented so that it does not exceed 100 nm. In particular, the SiN layer (220) is implemented to have a thickness of 1 mm or less.

[0044] Meanwhile, the ohmic contact layer (190, 195) includes an (Al)GaN layer (310) doped with an n-type dopant, but is arranged in a superlattice structure and additionally includes a GaN layer (320) and a SiN layer (220), so there is no need for the n-type dopant to be doped at a high concentration above a preset reference value as in the conventional method. Accordingly, the problem of crystallinity degradation of the ohmic contact layer due to high concentration doping of the dopant can be prevented.

[0045] FIGS. 4 to 6 are drawings illustrating the manufacturing process of HEMT according to one embodiment of the present invention.

[0046] Referring to FIG. 4, a buffer layer (120), a transition layer (130), a high-resistance buffer layer (140), a GaN channel (150), a barrier layer (160), and a p-GaN layer (170) are sequentially grown on a substrate (110).

[0047] Referring to FIG. 5, etching is performed vertically at both ends up to the location of the barrier layer (160) or the GaN channel (150). Afterwards, additional etching is performed vertically at both ends of the p-GaN layer (170). Accordingly, the p-GaN layer (170) and the barrier layer (160) each have a mesa structure.

[0048] Referring to FIG. 6, ohmic electrode layers (190, 195) are formed at both ends of the vertically exposed GaN channel (150) as etching proceeds.

[0049] Referring to FIG. 7, electrodes (180, 184, 188) are respectively placed on top of the p-GaN layer (170) and ohmic electrode layers (190, 195) and are manufactured into a HEMT (100).

[0050] The above description is merely an illustrative explanation of the technical concept of the present embodiment, and a person skilled in the art to which the present embodiment belongs would be able to make various modifications and variations within the scope of the essential characteristics of the present embodiment. Accordingly, the present embodiments are intended to explain, not limit, the technical concept of the present embodiment, and the scope of the technical concept of the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present embodiment. Explanation of the symbols

[0051] 100: HEMT 110: Substrate 120: Buffer layer 130: Transition layer 140: High-resistance buffer layer 150: GaN channel 160: Barrier layer 170: p-GaN layer 180, 184, 188: Electrodes 190, 195: Ohmic electrode layer 210: Undoped (Al)GaN layer 220: SiN layer 310: n-(Al)GaN layer 320: GaN layer

Claims

Claim 1 A High Electron Mobility Transistor (HEMT) comprises: a substrate providing a space for each component within the HEMT to grow or be deposited; a buffer layer grown on the substrate to allow the remaining layer to grow smoothly on itself; a transition layer formed on the buffer layer to have a superlattice structure to mitigate lattice mismatch; a high-resistance buffer layer that improves the breakdown voltage of the HEMT and minimizes damage caused by leakage current; a GaN channel layer formed on the high-resistance buffer layer to allow electrons to move along itself; a barrier layer grown on the GaN channel layer to control electron flow within the GaN channel layer and improve the breakdown voltage characteristics of the HEMT; a p-GaN layer grown on the barrier layer to regulate an electric field; a first electrode formed on the p-GaN layer to adjust whether an electric field is applied to the GaN channel and to control whether electrons flow in the GaN channel; and second and third electrodes respectively located on the GaN channel layer to provide electrons to move along the GaN channel layer. A HEMT comprising a GaN channel layer and a second electrode and an ohmic electrode layer formed between the GaN channel layer and a third electrode to bring the two into ohmic contact, wherein the transition layer allows the GaN channel layer to be formed, and the ohmic electrode layer is formed such that an undoped (Al)GaN layer and a SiN layer are arranged in a superlattice structure, or an n-(Al)GaN layer, a GaN layer, and a SiN layer are arranged in a superlattice structure. Claim 2 delete Claim 3 delete Claim 4 A HEMT according to claim 1, wherein the ohmic electrode layer is formed by arranging the undoped (Al)GaN layer and the SiN layer in a superlattice structure, and wherein the undoped (Al)GaN layer and the SiN layer are arranged in one or more periods. Claim 5 delete Claim 6 delete Claim 7 In claim 1, the HEMT is characterized in that the n-(Al)GaN layer is doped with an n-type dopant below a preset reference value.

Citation Information

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