Display device and method for manufacturing of the same

Abstract

A display device according to one embodiment includes a substrate, an auxiliary electrode disposed on the substrate, a bank layer disposed on the auxiliary electrode, a conductive layer disposed on the auxiliary electrode and comprising a base and a plurality of protrusions protruding from the base, an organic film layer disposed on the conductive layer, and a cathode electrode disposed on the organic film layer and in contact with the plurality of protrusions.

Description

Technology Field

[0001] The present invention relates to a display device and a method for manufacturing the same. Background Technology

[0002] As the information society develops, the demand for display devices to show images is increasing in various forms. For example, display devices are being applied to a wide range of electronic devices, such as smartphones, digital cameras, laptop computers, navigation systems, and smart televisions.

[0003] The display device may be a flat panel display device such as a Liquid Crystal Display Device, a Field Emission Display Device, or a Light Emitting Display Device. The light emitting display device includes an organic light emitting display device comprising an organic light emitting element, an inorganic light emitting display device comprising an inorganic light emitting element such as an inorganic semiconductor, and a micro light emitting display device comprising a micro light emitting element.

[0004] An organic light-emitting device may include opposing anode electrodes and cathode electrodes, and a light-emitting layer interposed between them. The light-emitting layer receives electrons and holes from the anode electrodes and cathode electrodes, recombines to generate excitons, and light may be emitted as the generated excitons change from an excited state to a ground state.

[0005] Organic light-emitting diodes can have a thin cathode electrode to emit light upward. However, the thinness of the cathode electrode can cause problems such as voltage drop, so efforts are needed to address this issue. The problem to be solved

[0006] The problem that the present invention aims to solve is to provide a display device and a method for manufacturing the same that improve the voltage drop of the cathode electrode and facilitate the process.

[0007] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0008] A display device according to one embodiment for solving the above problem may include a substrate, an auxiliary electrode disposed on the substrate, a bank layer disposed on the auxiliary electrode, a conductive layer disposed on the auxiliary electrode and comprising a base and a plurality of protrusions protruding from the base, an organic film layer disposed on the conductive layer, and a cathode electrode disposed on the organic film layer and in contact with the plurality of protrusions.

[0009] The base portion extends in a first direction parallel to the substrate, and the plurality of protrusions may extend in a second direction intersecting the first direction.

[0010] The above plurality of protrusions may be formed in a rod shape.

[0011] The base and the plurality of protrusions are integrally formed and may contain the same material.

[0012] The above base and the plurality of protrusions may include zinc oxide.

[0013] The length of the plurality of protrusions is 500 Å or more and may be smaller than the thickness of the bank layer.

[0014] The above plurality of protrusions can be randomly arranged on a plane.

[0015] The above organic film layer may include one or more of an electron transport layer and an electron injection layer.

[0016] The above organic film layer can be in contact with the upper surface of each of the base and the plurality of protrusions.

[0017] The above cathode electrode can make contact with the side of the plurality of protrusions.

[0018] The bank layer includes an opening that exposes the auxiliary electrode, and the conductive layer may be disposed within the opening.

[0019] At least a portion of the above base is positioned below the bank layer and can overlap with the bank layer.

[0020] The above conductive layer can be arranged in a plurality of dot shapes on a plane.

[0021] Additionally, a display device according to one embodiment may include a substrate comprising a light-emitting region and a non-light-emitting region, an anode electrode disposed on the light-emitting region of the substrate and an auxiliary electrode disposed on the non-light-emitting region, a bank layer disposed on the anode electrode and the auxiliary electrode, a conductive layer disposed on the auxiliary electrode and comprising a base and a plurality of protrusions protruding from the base, an organic film layer disposed on the anode electrode and the conductive layer, and a cathode electrode disposed on the organic film layer and in contact with the plurality of protrusions.

[0022] The anode electrode and the auxiliary electrode are disposed on the same layer and may contain the same material.

[0023] The above organic film layer includes a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, wherein the hole injection layer, the hole transport layer, the light-emitting layer, the electron transport layer, and the electron injection layer overlap with the anode electrode, the hole injection layer, the hole transport layer, and the light-emitting layer do not overlap with the conductive layer, and the electron transport layer and the electron injection layer may overlap with the conductive layer.

[0024] The base and the plurality of protrusions are integrally formed, and the cathode electrode can contact the side of the plurality of protrusions.

[0025] In addition, a method for manufacturing a display device according to one embodiment may include the steps of forming an auxiliary electrode on a substrate, forming a bank layer that exposes the auxiliary electrode on the auxiliary electrode, forming a base portion of a conductive layer by spraying seed ink on the auxiliary electrode, growing a plurality of protrusions from the base portion by spraying precursor ink on the base portion, forming an organic film layer on the plurality of protrusions, and forming a cathode electrode on the organic film layer.

[0026] The above seed ink includes zinc acetate dihydrate, and the above precursor ink may include zinc nitrate hexahydrate.

[0027] The step of forming the base of the conductive layer above may involve performing a drying and baking process after spraying the seed ink.

[0028] The step of growing the plurality of protrusions involves the seed of the base reacting with the precursor ink to grow the plurality of protrusions, and the length of the plurality of protrusions can be controlled by adjusting the reaction time.

[0029] After the above plurality of protrusions have grown, the precursor ink can be removed by performing a drying and baking process.

[0030] The above organic film layer can be formed by a deposition method, and the above cathode electrode can be formed by sputtering or a deposition method.

[0031] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0032] According to the display device and the method for manufacturing the same according to the embodiments, by growing a plurality of protrusions on an auxiliary electrode to form a conductive layer, the contact area between the cathode electrode and the conductive layer is increased, thereby lowering the resistance of the cathode electrode and improving the voltage drop.

[0033] Accordingly, the contact area between the cathode electrode and the conductive layer can be increased within the limited planar size of the auxiliary electrode, thereby preventing a decrease in the aperture ratio due to the auxiliary electrode.

[0034] In addition, according to the method for manufacturing a display device according to the embodiments, there is an advantage in that the process of removing the organic film layer can be omitted in order to electrically connect the auxiliary electrode and the cathode electrode.

[0035] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0036] FIG. 1 is a plan view of a display device according to one embodiment. FIG. 2 is a schematic layout diagram of the circuit of the first substrate of a display device according to one embodiment. FIG. 3 is an equivalent circuit diagram of a pixel of a display device according to one embodiment. FIG. 4 is a plan view showing a pixel of an organic light-emitting display device according to one embodiment. Figure 5 is a cross-sectional view taken along the line Q1-Q1' of Figure 4. FIG. 6 is a plan view showing the layout of a plurality of pixels of a display device according to one embodiment. Figure 7 is a cross-sectional view taken along the line Q2-Q2' of Figure 6. Figure 8 is an enlarged cross-sectional view of area A of Figure 7. Figure 9 is an enlarged cross-sectional view of region B of Figure 8. Figure 10 is a plan view showing area A of Figure 7. FIGS. 11 to 13 are cross-sectional views showing variations of a conductive layer according to one embodiment. FIG. 14 is a cross-sectional view showing a display device according to another embodiment. FIG. 15 is a plan view showing a conductive layer of a display device according to another embodiment. FIG. 16 is a cross-sectional view showing a display device according to another embodiment. FIG. 17 is a cross-sectional view showing a conductive layer of a display device according to another embodiment. FIG. 18 is a plan view showing a conductive layer of a display device according to another embodiment. FIGS. 19 to 27 are cross-sectional views showing a method for manufacturing a display device according to one embodiment, by process. FIGS. 28 and 29 are cross-sectional views showing a method for manufacturing a display device according to another embodiment, by process. Specific details for implementing the invention

[0037] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0038] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0039] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0040] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0041] Specific embodiments will be described below with reference to the attached drawings.

[0042] FIG. 1 is a plan view of a display device according to one embodiment.

[0043] Referring to FIG. 1, a display device (10) according to one embodiment can be applied to various home appliances or Internet of Things devices such as smartphones, mobile phones, tablet PCs, PDAs (Personal Digital Assistants), PMPs (Portable Multimedia Players), televisions, game consoles, wristwatch-type electronic devices, head-mounted displays, monitors of personal computers, laptop computers, car navigation systems, car dashboards, digital cameras, camcorders, external billboards, electronic display boards, medical devices, inspection devices, refrigerators and washing machines, etc. In this specification, a television is described as an example of a display device, and the TV may have high resolution or ultra-high resolution such as HD, UHD, 4K, 8K, etc.

[0044] Additionally, the display device (10) according to the embodiments may be classified in various ways depending on the display method. For example, the classification of the display device may include an organic light-emitting display device (OLED), an inorganic light-emitting display device (inorganic EL), a quantum dot light-emitting display device (QED), a micro-LED display device (micro-LED), a nano-LED display device (nano-LED), a plasma display device (PDP), a field emission display device (FED), a cathode ray display device (CRT), a liquid crystal display device (LCD), an electrophoretic display device (EPD), etc. In the following description, an organic light-emitting display device is used as an example of a display device, and unless a special distinction is required, the organic light-emitting display device applied to the embodiment will be simply abbreviated as a display device. However, the embodiment is not limited to an organic light-emitting display device, and other display devices listed above or known in the art field may be applied within the scope of sharing the technical concept.

[0045] A display device (10) according to one embodiment may have a square shape in a plan view, for example, and may have a rectangular shape. If the display device (10) is a television, it is positioned so that the long side is located in the horizontal direction. However, it is not limited thereto, and the long side may be located in the vertical direction, and it may be installed to be rotatable so that the long side is variably positioned in the horizontal or vertical direction.

[0046] The display device (10) may include a display area (DPA) and a non-display area (NDA). The display area (DPA) may be an active area where an image is displayed. The display area (DPA) may have a rectangular shape in a plan view similar to the overall shape of the display device (10), but is not limited thereto.

[0047] The display area (DPA) may include a plurality of pixels (PX). The plurality of pixels (PX) may be arranged in a matrix direction. The shape of each pixel (PX) may be a rectangle or a square in a planar view, but is not limited thereto, and may be a rhombus shape with each side tilted toward one side direction of the display device (10). The plurality of pixels (PX) may include multiple color pixels (PX). For example, the plurality of pixels (PX) may include a first color pixel (PX) of red, a second color pixel (PX) of green, and a third color pixel (PX) of blue, though is not limited thereto. Each color pixel (PX) may be arranged alternately in a stripe type or a pentile type.

[0048] A non-display area (NDA) may be placed around a display area (DPA). The non-display area (NDA) may surround the display area (DPA) in whole or in part. The display area (DPA) is rectangular in shape, and the non-display area (NDA) may be placed adjacent to the four sides of the display area (DPA). The non-display area (NDA) may form the bezel of the display device (10).

[0049] A driving circuit or driving element for driving a display area (DPA) may be disposed in a non-display area (NDA). In one embodiment, a pad portion is provided on the display substrate of the display device (10) in a first non-display area (NDA) disposed adjacent to the first long side (lower side in FIG. 1) and a second non-display area (NDA) disposed adjacent to the second long side (upper side in FIG. 1), and an external device (EXD) may be mounted on the pad electrode of the pad portion. Examples of the external device (EXD) include a connecting film, a printed circuit board, a driving chip (DIC), a connector, a wiring connecting film, etc. A scan driving unit (SDR), etc., formed directly on the display substrate of the display device (10) may be disposed in a third non-display area (NDA) disposed adjacent to the first short side (left side in FIG. 1).

[0050] FIG. 2 is a schematic layout diagram of the circuit of the first substrate of a display device according to one embodiment.

[0051] Referring to FIG. 2, a plurality of wires are arranged on a first substrate. The plurality of wires may include a scan line (SCL), a sensing signal line (SSL), a data line (DTL), a reference voltage line (RVL), a first power line (ELVDL), etc.

[0052] Scan line (SCL) and sensing signal line (SSL) may be extended in a first direction (DR1). Scan line (SCL) and sensing signal line (SSL) may be connected to a scan driver (SDR). The scan driver (SDR) may include a driving circuit composed of a circuit layer (CCL). The scan driver (SDR) may be placed in a third non-display area (NDA) on a first substrate, but is not limited thereto, and may be placed in a fourth non-display area (NDA), or placed in both the third non-display area (NDA) and the fourth non-display area (NDA). The scan driver (SDR) is connected to a signal connection wire (CWL), and at least one end of the signal connection wire (CWL) may be connected to an external device ('EXD' in FIG. 1) by forming a pad (WPD_CW) on the first non-display area (NDA) and / or the second non-display area (NDA).

[0053] The data line (DTL) and the reference voltage line (RVL) may extend into a second direction (DR2) that intersects the first direction (DR1). The first power line (ELVDL) may include a portion that extends into the second direction (DR2). The first power line (ELVDL) may further include a portion that extends into the first direction (DR1). The first power line (ELVDL) may have a mesh structure, but is not limited thereto.

[0054] A wiring pad (WPD) may be placed at least one end of a data line (DTL), a reference voltage line (RVL), and a first power line (ELVDL). Each wiring pad (WPD) may be placed in a pad section (PDA) of a non-display area (NDA). In one embodiment, a wiring pad of the data line (DTL) (WPD_DT, hereinafter referred to as the 'data pad') may be placed in a pad section (PDA) of the first non-display area (NDA), and a wiring pad of the reference voltage line (RVL) (WPD_RV, hereinafter referred to as the 'reference voltage pad') and a wiring pad of the first power line (ELVDL) (WPD_ELVD, hereinafter referred to as the 'first power pad') may be placed in a pad section (PDA) of the second non-display area (NDA). As another example, the data pad (WPD_DT), reference voltage pad (WPD_RV), and first power pad (WPD_ELVD) may all be placed in the same area, for example, the first non-display area (NDA). An external device ('EXD' in FIG. 1) may be mounted on the wiring pad (WPD) as described above. The external device (EXD) may be mounted on the wiring pad (WPD) through an anisotropic conductive film, ultrasonic bonding, etc.

[0055] Each pixel (PX) on the first substrate includes a pixel driving circuit. The wiring described above may pass through each pixel (PX) or around it and apply a driving signal to each pixel driving circuit. The pixel driving circuit may include transistors and capacitors. The number of transistors and capacitors in each pixel driving circuit may vary. Hereinafter, the pixel driving circuit is described using a 3T1C structure in which the pixel driving circuit includes three transistors and one capacitor as an example, but is not limited thereto, and various other modified pixel (PX) structures such as a 2T1C structure, a 7T1C structure, and a 6T1C structure may be applied.

[0056] FIG. 3 is an equivalent circuit diagram of a pixel of a display device according to one embodiment.

[0057] Referring to FIG. 3, each pixel (PX) of a display device according to one embodiment includes, in addition to a light-emitting element (EMD), three transistors (DTR, STR1, STR2) and one storage capacitor (CST).

[0058] The light-emitting diode (EMD) emits light according to the current supplied through the driving transistor (DTR). The light-emitting diode (EMD) can be implemented as an organic light-emitting diode, a micro light-emitting diode, a nano light-emitting diode, etc.

[0059] The first electrode (i.e., anode electrode) of the light-emitting element (EMD) is connected to the source electrode of the driving transistor (DTR), and the second electrode (i.e., cathode electrode) can be connected to a second power line (ELVSL) to which a low potential voltage (second power voltage) lower than the high potential voltage (first power voltage) of the first power line (ELVDL) is supplied.

[0060] The driving transistor (DTR) adjusts the current flowing from the first power line (ELVDL), to which the first power supply voltage is supplied, to the light-emitting element (EMD) according to the voltage difference between the gate electrode and the source electrode. The gate electrode of the driving transistor (DTR) is connected to the first source / drain electrode of the first switching transistor (STR1), the source electrode is connected to the first electrode of the light-emitting element (EMD), and the drain electrode can be connected to the first power line (ELVDL), to which the first power supply voltage is applied.

[0061] The first switching transistor (STR1) is turned on by a scan signal of the scan line (SCL) to connect the data line (DTL) to the gate electrode of the driving transistor (DTR). The gate electrode of the first switching transistor (STR1) is connected to the scan line (SCL), the first source / drain electrode is connected to the gate electrode of the driving transistor (DTR1), and the second source / drain electrode can be connected to the data line (DTL).

[0062] The second switching transistor (STR2) is turned on by the sensing signal of the sensing signal line (SSL) to connect the reference voltage line (RVL) to the source electrode of the driving transistor (DTR). The gate electrode of the second switching transistor (STR2) is connected to the sensing signal line (SSL), the first source / drain electrode is connected to the reference voltage line (RVL), and the second source / drain electrode can be connected to the source electrode of the driving transistor (DTR).

[0063] In one embodiment, the first source / drain electrode of each of the first and second switching transistors (STR1, STR2) may be a source electrode and the second source / drain electrode may be a drain electrode, but is not limited thereto and may be the opposite case.

[0064] A capacitor (CST) is formed between the gate electrode and the source electrode of the driving transistor (DTR). The storage capacitor (CST) stores the voltage difference between the gate voltage and the source voltage of the driving transistor (DTR).

[0065] The driving transistor (DTR) and the first and second switching transistors (STR1, STR2) can be formed as thin film transistors. Additionally, while FIG. 3 describes the driving transistor (DTR) and the first and second switching transistors (STR1, STR2) as N-type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), it is not limited thereto. That is, the driving transistor (DTR) and the first and second switching transistors (STR1, STR2) may be P-type MOSFETs, or some may be N-type MOSFETs and others P-type MOSFETs.

[0066] FIG. 4 is a plan view showing a pixel of an organic light-emitting display device according to one embodiment. FIG. 5 is a cross-sectional view cut along the line Q1-Q1' of FIG. 4.

[0067] Referring to FIG. 4, a plurality of light-emitting regions (LA1, LA2, LA3) and a non-light-emitting region (NLA) may be defined on the substrate in the display area (DPA). In some embodiments, the plurality of light-emitting regions (LA1, LA2, LA3) of the display area (DPA) may include a first light-emitting region (LA1), a second light-emitting region (LA2), and a third light-emitting region (LA3). The first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) may be regions where light generated from a light-emitting element on the substrate is emitted to the outside, and the non-light-emitting region (NLA) may be a region where light is not emitted to the outside.

[0068] In some embodiments, the light emitted externally from the first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) may be light of different colors. For example, the first light-emitting region (LA1) may emit light of a first color, the second light-emitting region (LA2) may emit light of a second color, and the third light-emitting region (LA3) may emit light of a third color. Here, the light of the first color may be blue light having a peak wavelength in the range of about 440 nm to about 480 nm. The light of the second color may be red light having a peak wavelength in the range of about 610 nm to about 650 nm. The light of the third color may be green light having a peak wavelength in the range of about 510 nm to about 550 nm. However, it is not limited thereto, and the light of the second color may be green light and the light of the third color may be red light.

[0069] In some embodiments, the first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) form a group, and the group may be defined as a plurality in the display area (DPA).

[0070] In some embodiments, as shown in FIG. 4, the first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) may be arranged sequentially along one direction. In some embodiments, the first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) may be arranged repeatedly within a display area (DPA) to form a group.

[0071] However, this is not limited thereto, and the arrangement of the first light-emitting region (LA1), the second light-emitting region (LA2), and the third light-emitting region (LA3) can be varied.

[0072] Referring to FIG. 5, an anode electrode (ANO), an organic film layer (ORL), and a cathode electrode (CAT) may be disposed in the first light-emitting region (LA1). FIG. 5 describes the first light-emitting region (LA1) as an example, but is not limited thereto, and the same can be applied to the second and third light-emitting regions (LA2, LA3).

[0073] The anode electrode (ANO) may be a reflective electrode. The anode electrode (ANO) may include a reflective layer and a metal oxide layer stacked on the reflective layer. In an exemplary embodiment, the anode electrode (ANO) may have a multilayer structure, for example, a two-layer structure such as ITO / Ag, Ag / ITO, ITO / Mg, ITO / MgF2, or a three-layer structure such as ITO / Ag / ITO.

[0074] The organic film layer (ORL) may include a plurality of functional layers. Specifically, the organic film layer (ORL) may include a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL).

[0075] The hole injection layer (HIL) can be placed directly on the anode electrode (ANO). The hole injection layer (HIL) can serve to facilitate the injection of holes into the emissive layer (EML). In some embodiments, the hole injection layer (HIL) may be composed of one or more selected from the group consisting of CuPc (cupper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), and NPD (N,N-dinaphthyl-N,N'-diphenyl benzidine), but is not limited thereto.

[0076] The hole transport layer (HTL) can be placed on the hole injection layer (HIL). The hole transport layer (HTL) serves to facilitate the transport of holes and may contain a hole transport material. Hole transport materials may include, but are not limited to, carbazole derivatives such as N-phenylcarbazole and polyvinylcarbazole, fluorene derivatives, triphenylamine derivatives such as TPD (N,N'-bis(3-methylphenyl)-N,N'-diphenyl-[1,1-biphenyl]-4,4'-diamine) and TCTA (4,4',4"-tris(N-carbazolyl)triphenylamine), NPB (N,N'-di(1-naphthyl)-N,N'-diphenylbenzidine), TAPC (4,4-Cyclohexylidene bis[N,N-bis(4-methylphenyl)benzenamine]).

[0077] The light-emitting layer (EML) can be disposed on the hole transport layer (HTL). The light-emitting layer (EML) can emit light of a different color for each light-emitting region (LA1, LA2, LA3). For example, the light-emitting layer (EML) of the first light-emitting region (LA1) can emit light of a first color, e.g., blue light. The light-emitting layer (EML) of the second light-emitting region (LA2) can emit light of a second color, e.g., red light. The light-emitting layer (EML) of the third light-emitting region (LA3) can emit light of a third color, e.g., green light.

[0078] In some embodiments, the blue light-emitting layer (EML) may comprise a host and a dopant. The host is not particularly limited as long as it is a commonly used material, but, for example, Alq3 (tris(8-hydroxyquinolino)aluminum), CBP (4,4'-bis(N-carbazolyl)-1,1'-biphenyl), PVK (poly(n-vinylcabazole)), ADN (9,10-di(naphthalene-2-yl)anthracene), TCTA (4,4',4''-Tris(carbazol-9-yl)-triphenylamine), TPBi (1,3,5-tris(N-phenylbenzimidazole-2-yl)benzene), TBADN (3-tert-butyl-9,10-di(naphth-2-yl)anthracene), DSA (distyrylarylene), CDBP (4,4'-bis(9-carbazolyl)-2,2', ADN (2-Methyl-9,10-bis(naphthalen-2-yl)anthracene), etc., can be used.

[0079] Additionally, the blue light-emitting layer (EML) may include a fluorescent material selected from the group consisting of, for example, spiro-DPVBi, spiro-6P, distyryl-benzene (DSB), distyryl-arylene (DSA), polyfluorene-based polymers and poly(p-phenylene vinylene)-based polymers. As another example, it may include a phosphorescent material comprising an organometallic complex such as (4,6-F2ppy)2Irpic.

[0080] In some embodiments, the light-emitting layer (EML) emitting red light comprises a host material comprising CBP (carbazole biphenyl) or mCP (1,3-bis(carbazol-9-yl)) and may be composed of a phosphorescent material comprising one or more dopants selected from the group consisting of PIQIr(acac)(bis(1-phenylisoquinoline)acetylacetonate iridium), PQIr(acac)(bis(1-phenylquinoline)acetylacetonate iridium), PQIr(tris(1-phenylquinoline)iridium), and PtOEP (octaethylporphyrin platinum), or may be composed of a fluorescent material comprising PBD:Eu(DBM)3 (Phen) or Perylene, but is not limited thereto.

[0081] In some embodiments, the light-emitting layer (EML) emitting green light comprises a host material comprising CBP or mCP and may be composed of a phosphorescent material comprising a dopant material comprising Ir(ppy)3(fac tris(2-phenylpyridine)iridium), or alternatively may be composed of a fluorescent material comprising Alq3(tris(8-hydroxyquinolino)aluminum), but is not limited thereto.

[0082] However, not limited thereto, the light-emitting layer (EML) of each light-emitting region (LA1, LA2, LA3) may emit light of the same color. For example, the light-emitting layer (EML) may emit blue light of the first color or white light of the fourth color.

[0083] The electron transport layer (ETL) can be disposed on the emissive layer (EML). The electron transport layer (ETL) is Alq3 (Tris(8-hydroxyquinolinato)aluminum), TPBi (1,3,5-Tri(1-phenyl-1H-benzo[d]imidazol-2-yl)phenyl), BCP (2,9-Dimethyl-4,7-diphenyl-1,10-phenanthroline), Bphen (4,7-Diphenyl-1,10-phenanthroline), TAZ (3-(4-Biphenylyl)-4-phenyl-5-tert-butylphenyl-1,2,4-triazole), NTAZ (4-(Naphthalen-1-yl)-3,5-diphenyl-4H-1,2,4-triazole), tBu-PBD (2-(4-Biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), It may include electron transport materials such as BAlq(Bis(2-methyl-8-quinolinolato-N1,O8)-(1,1'-Biphenyl-4-olato)aluminum), Bebq2(berylliumbis(benzoquinolin-10-olate), ADN(9,10-di(naphthalene-2-yl)anthracene), and mixtures thereof. However, the present invention is not limited to the types of electron transport materials.

[0084] An electron injection layer (EIL) may be disposed on an electron transport layer (ETL). The electron injection layer (EIL) serves to facilitate electron injection and may use Alq3 (tris(8-hydroxyquinolino)aluminum), PBD, TAZ, spiro-PBD, BAlq, or SAlq, but is not limited thereto. Additionally, the electron injection layer (EIL) may be a metal halide compound and may be, for example, one or more selected from the group consisting of MgF2, LiF, NaF, KF, RbF, CsF, FrF, LiI, NaI, KI, RbI, CsI, FrI, and CaF2, but is not limited thereto. Furthermore, the electron injection layer (EIL) may include lanthanide materials such as Yb, Sm, and Eu. Alternatively, the electron injection layer (EIL) may simultaneously include a metal halide material and a lanthanide material, such as RbI:Yb, KI:Yb, etc. When the electron injection layer (EIL) includes both a metal halide material and a lanthanum-based material, the electron injection layer can be formed by co-deposition of the metal halide material and the lanthanum-based material.

[0085] A cathode electrode (CAT) may be disposed on the aforementioned organic film layer (ORL). The cathode electrode (CAT) may be permeable. When the cathode electrode (CAT) is permeable, it may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, or compounds or mixtures thereof, for example, a mixture of Ag and Mg. Additionally, when the thickness of the cathode electrode (CAT) is tens to hundreds of angstroms, the cathode electrode (CAT) may be semipermeable. Furthermore, the cathode electrode (CAT) may include a transparent conductive oxide (TCO). For example, the cathode electrode (CAT) may include WxOy (tungsten oxide), TiO2 (titanium oxide), ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), ITZO (indium tin zinc oxide), MgO (magnesium oxide), etc.

[0086] The cathode electrode (CAT) described above may be placed entirely on the display area (DPA). The cathode electrode (CAT) may be made with a thin thickness of tens to hundreds of angstroms to be transparent so that light is emitted over the cathode electrode (CAT). In this case, a voltage drop may occur due to the thin thickness of the cathode electrode (CAT). Hereinafter, embodiments of the present invention will describe an organic light-emitting display device that improves the voltage drop of the cathode electrode (CAT) and facilitates processability.

[0087] FIG. 6 is a plan view showing the layout of a plurality of pixels of a display device according to one embodiment. FIG. 7 is a cross-sectional view taken along the line Q2-Q2' of FIG. 6. FIG. 8 is an enlarged cross-sectional view of area A of FIG. 7. FIG. 9 is an enlarged cross-sectional view of area B of FIG. 8. FIG. 10 is a plan view showing area A of FIG. 7. FIG. 11 to 13 are cross-sectional views showing variations of a conductive layer according to one embodiment.

[0088] Referring to FIG. 6, a plurality of light-emitting regions (LA1, LA2, LA3) and non-light-emitting regions (NLA) may be arranged on a substrate. Each light-emitting region (LA1, LA2, LA3) may be arranged sequentially in a first direction (DR1), and the same light-emitting region may be arranged in a second direction (DR2). In an exemplary embodiment, the arrangement of each light-emitting region (LA1, LA2, LA3) may be in a stripe shape. However, it is not limited thereto, and the arrangement of each light-emitting region (LA1, LA2, LA3) may be in various shapes such as a pentile.

[0089] A cathode electrode (CAT) may be disposed on each light-emitting region (LA1, LA2, LA3) and non-light-emitting region (NLA). As described above, the cathode electrode (CAT) may be disposed across the entire display region (DPA). The cathode electrode (CAT) may be disposed on a plurality of light-emitting regions (LA1, LA2, LA3) and non-light-emitting regions (NLA).

[0090] In one embodiment, an auxiliary electrode (AXE) may be disposed between the first light-emitting region (LA1) and the third light-emitting region (LA3). The auxiliary electrode (AXE) may be disposed extending in a second direction (DR2). The auxiliary electrode (AXE) may be electrically connected to the cathode electrode (CAT) to lower the resistance of the cathode electrode (CAT).

[0091] In this embodiment, an auxiliary electrode (AXE) is shown positioned between the first light-emitting region (LA1) and the third light-emitting region (LA3), but is not limited thereto. In some embodiments, the auxiliary electrode (AXE) may be positioned between each light-emitting region (LA1, LA2, LA3). In other embodiments, the auxiliary electrode (AXE) may be positioned between four or more light-emitting regions.

[0092] Hereinafter, the cross-sectional structure of the light-emitting regions (LA1, LA3) and the auxiliary electrode (AXE) is described with reference to other drawings.

[0093] Referring to FIG. 7, a display device (10) according to one embodiment may include a transistor layer (TFTL) disposed on a substrate (110) and a light-emitting element (EMD) including an anode electrode (ANO), an organic film layer (ORL), and a cathode electrode (CAT). Additionally, a display device (10) according to one embodiment may further include an auxiliary wiring (AXL), an auxiliary electrode (AXE), and a conductive layer (COL).

[0094] Specifically, the substrate (110) may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, etc. The substrate (110) may be made of an insulating material such as glass, quartz, or polymer resin. Examples of polymeric materials may include polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylenenapthalate (PEN), polyethyleneterephthalate (PET), polyphenylenesulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), or a combination thereof. The substrate (110) may include a metal material.

[0095] A transistor layer (TFTL) may be disposed on a substrate (110). The transistor layer (TFTL) may include a transistor (TFT), a buffer layer (120), a gate insulating layer (140), an interlayer insulating layer (160), and a planarization layer (200).

[0096] A buffer layer (120) may be disposed on a substrate (110). The buffer layer (120) may be disposed on the substrate (110) to protect the transistor (TFT) and light-emitting diode (EMD) from moisture penetrating through the substrate (110), which is susceptible to moisture permeability. The buffer layer (120) may be composed of a plurality of inorganic films that are alternately stacked. For example, the buffer layer (120) may be a multilayer film in which one or more inorganic films of silicon oxide (SiO2), silicon nitride (SiN), and silicon nitride (SiON) are alternately stacked. However, it is not limited thereto, and the buffer layer (120) may be omitted.

[0097] A transistor (TFT) may be disposed on a buffer layer (120). The transistor (TFT) may include an active layer (130), a gate electrode (150), a source electrode (170), and a drain electrode (180). In FIG. 7, the transistor (TFT) is illustrated as being formed in a top gate configuration where the gate electrode (150) is located on the upper side of the active layer (130), but is not limited thereto. That is, the transistor (TFT) may be formed in a bottom gate configuration where the gate electrode (150) is located on the lower side of the active layer (130), or in a double gate configuration where the gate electrode (150) is located on both the upper and lower sides of the active layer (130).

[0098] An active layer (130) may be disposed on a buffer layer (120). The active layer (130) may include polycrystalline silicon, single-crystal silicon, an oxide semiconductor, etc. If the semiconductor layer includes an oxide semiconductor, the active layer (130) may include a plurality of conductive regions and channel regions between them. The oxide semiconductor may be an oxide semiconductor containing indium (In). For example, the oxide semiconductor may be indium-tin oxide (ITO), indium-zinc oxide (IZO), indium-gallium oxide (IGO), indium-zinc-tin oxide (IZTO), indium-gallium-tin oxide (IGTO), indium-gallium-zinc-tin oxide (IGZTO), etc.

[0099] In another embodiment, the active layer (130) may include polycrystalline silicon. Polycrystalline silicon may be formed by crystallizing amorphous silicon, in which case the conductive regions of the active layer (130) may each be doped regions doped with impurities.

[0100] A light-blocking layer may be further disposed between the buffer layer (120) and the active layer (130) to block external light incident on the active layer (130). When the light-blocking layer is disposed, the light-blocking layer may be disposed overlapping the active layer (130) and may be formed of an opaque metallic material that blocks the transmission of light.

[0101] A gate insulating layer (140) may be formed on the active layer (130). The gate insulating layer (140) may be disposed on the buffer layer (120), including the active layer (130). The gate insulating layer (140) may be composed of an inorganic layer including, for example, silicon oxide (SiO2), silicon nitride (SiN), or silicon oxynitride (SiON), or may be formed in a stacked structure.

[0102] A gate electrode (150) may be disposed on the gate insulating layer (140). A gate line and a storage capacitor electrode may be further disposed on the same layer as the gate electrode (150). The gate electrode (150) may be disposed to overlap with the active layer (130) in the thickness direction. The gate electrode (150) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, it is not limited thereto.

[0103] An interlayer insulating layer (160) may be disposed on the gate electrode (150). The interlayer insulating layer (160) may function as an insulating film between the gate electrode (150) and other layers disposed thereon. Additionally, the interlayer insulating layer (160) may be disposed to cover the gate electrode (150) and perform a protective function. The interlayer insulating layer (160) may be composed of an inorganic layer including inorganic materials, such as silicon oxide (SiO2), silicon nitride (SiN), and silicon oxynitride (SiON), or may be formed in a stacked structure.

[0104] A source electrode (170), a drain electrode (180), and an auxiliary wiring (AXL) may be disposed on an interlayer insulating layer (160). Each of the source electrode (170) and the drain electrode (180) may be connected to an active layer (130) through contact holes penetrating the gate insulating layer (140) and the interlayer insulating layer (160). The auxiliary wiring (AXL) may be disposed between a first light-emitting region (LA1) and a third light-emitting region (LA3), and may be disposed in a non-light-emitting region (NLA). As shown in FIG. 6, the auxiliary wiring (AXL) may be disposed extending parallel to the auxiliary electrode (AXE) and overlapping with the auxiliary electrode (AXE). For example, it may be disposed extending in a second direction (DR2) between the first light-emitting region (LA1) and the third light-emitting region (LA3).

[0105] The source electrode (170), drain electrode (180), and auxiliary wiring (AXL) may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or alloys thereof. However, they are not limited thereto. Accordingly, a transistor (TFT) comprising an active layer (130), a gate electrode (150), a source electrode (170), and a drain electrode (180) may be arranged. Additionally, an auxiliary wiring (AXL) spaced apart from the transistor (TFT) may be arranged.

[0106] A flattening layer (200) may be disposed on the source electrode (170), drain electrode (180), and auxiliary wiring (AXL) to flatten the step caused by the transistor (TFT) and auxiliary wiring (AXL). The flattening layer (200) may include a first via hole (205) for connecting the anode electrode (ANO) to the transistor (TFT), and a second via hole (208) for connecting the auxiliary electrode (AXE) to the auxiliary wiring (AXL). Through the first via hole (205), the anode electrode (ANO) may be connected to the drain electrode (180) of the transistor (TFT). Through the second via hole (208), the auxiliary electrode (AXE) may be connected to the auxiliary wiring (AXL).

[0107] The flattening layer (200) may include organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin, and may perform a surface flattening function. However, it is not limited thereto.

[0108] A bank layer (BNL) and a light-emitting element (EMD) may be disposed on the planarization layer (200). The light-emitting element (EMD) may include an anode electrode (ANO), an organic film layer (ORL), and a cathode electrode (CAT).

[0109] The anode electrode (ANO) acts as a pixel electrode and can be connected to the drain electrode (180) of the transistor (TFT) through the first via hole (205). The description of the anode electrode (ANO) has been described above and is therefore omitted.

[0110] The bank layer (BNL) may be positioned to cover the edges of the anode electrode (ANO) on the flattening layer (200) to partition each light-emitting region. The bank layer (BNL) may define pixels, i.e., light-emitting regions, by including a first opening (OP1) that exposes the lower anode electrode (ANO). The bank layer (BNL) may also perform a surface flattening function by including organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. Additionally, the bank layer (BNL) may include a liquid-repellent material or be treated to be liquid-repellent.

[0111] An organic film layer (ORL) may be disposed on an anode electrode (ANO) and a bank layer (BNL). As described above, the organic film layer (ORL) may include at least one of a hole injection layer (HIL in FIG. 5), a hole transport layer (HTL in FIG. 5), a light-emitting layer (EML in FIG. 5), an electron transport layer (ETL in FIG. 5), and an electron injection layer (EIL in FIG. 5).

[0112] In this embodiment, the hole injection layer (HIL), hole transport layer (HTL), and light-emitting layer (EML) are applied to each light-emitting region (LA1, LA2, LA3) using an inkjet printing method, and the electron transport layer (ETL) and electron injection layer (EIL) can be formed by depositing them over the entire surface of the display region (DPA) of the substrate (110). Accordingly, among the organic film layers (ORL), the hole injection layer (HIL), hole transport layer (HTL), light-emitting layer (EML), electron transport layer (ETL), and electron injection layer (EIL) can overlap with the anode electrode (ANO) exposed by the first opening (OP1). Additionally, the hole injection layer (HIL), hole transport layer (HTL), and light-emitting layer (EML) can overlap with the anode electrode (ANO) but not overlap with the bank layer (BNL). Additionally, the electron transport layer (ETL) and the electron injection layer (EIL) may overlap with the bank layer (BNL). However, this is not limited to the following: the hole injection layer (HIL), the hole transport layer (HTL), and the light-emitting layer (EML) may overlap with the bank layer (BNL), and the electron transport layer (ETL) and the electron injection layer (EIL) may not overlap with the bank layer (BNL).

[0113] The cathode electrode (CAT) can be placed on the organic film layer (ORL). The description of the cathode electrode (CAT) has also been explained above and is therefore omitted.

[0114] Meanwhile, in one embodiment, the bank layer (BNL) may be disposed on an auxiliary electrode (AXE) positioned between a first light-emitting region (LA1) and a third light-emitting region (LA3). The bank layer (BNL) may include a second opening (OP2) that exposes the auxiliary electrode (AXE). The planar shape of the second opening (OP2) may be formed similarly to the planar shape of the auxiliary electrode (AXE). For example, the planar shape of the second opening (OP2) may overlap with the auxiliary electrode (AXE) and extend in a second direction (DR2) parallel to the auxiliary electrode (AXE). However, it is not limited thereto, and the second opening (OP2) may be formed of a plurality of holes that overlap with the auxiliary electrode (AXE).

[0115] A conductive layer (COL) can be placed on an auxiliary electrode (AXE) exposed by a bank layer (BNL).

[0116] Referring to FIG. 8 to FIG. 10 in conjunction with FIG. 7, a conductive layer (COL) can be placed on an auxiliary electrode (AXE). The conductive layer (COL) can electrically connect the auxiliary electrode (AXE) and the cathode electrode (CAT) to lower the resistance of the cathode electrode (CAT).

[0117] The conductive layer (COL) may include a base (COB) and a plurality of protrusions (COD) protruding on the base (COB).

[0118] The base (COB) may be an area forming the base of the conductive layer (COL). Additionally, the base (COB) may be a seed layer on which a plurality of protrusions (COD) can be grown. The base (COB) may be placed in direct contact with the upper surface of the auxiliary electrode (AXE). The base (COB) may be an area consisting of a single layer. The base (COB) may be formed by applying it within the second opening (OP2) of the bank layer (BNL) using an inkjet method. Thus, the side of the base (COB) may be in contact with the side of the bank layer (BNL), be placed within the second opening (OP2) of the bank layer (BNL), and may have an area similar to or substantially the same as the second opening (OP2).

[0119] A plurality of protrusions (CODs) may be disposed on the base (COB) and may extend in a third direction (DR3). The plurality of protrusions (CODs) may be integrally formed with the base (COB) and made of the same material. The plurality of protrusions (CODs) may be randomly arranged in a plane on the base (COB). The plurality of protrusions (CODs) may be nanorods grown in a random area in the third direction (DR3) from a seed of the base (COB). However, they are not limited thereto, and the shape of the plurality of protrusions (CODs) may be cylindrical.

[0120] A plurality of protrusions (COD) may have a length (L) and a width (W) extended in a third direction (DR3). The length (L) of the plurality of protrusions (COD) may be 500 Å to 1 μm. If the length (L) of the plurality of protrusions (COD) is 500 Å or more, the contact area with the cathode electrode (CAT) can be increased, thereby effectively reducing the resistance of the cathode electrode (CAT). In particular, if the length (L) of the protrusion (COD) is 500 Å or more, it may be formed higher than the thickness of the electron transport layer (ETL) and electron injection layer (EIL) of the organic film layer (ORL) formed on the protrusion (COD), thereby enabling contact with the cathode electrode (CAT). If the length (L) of the plurality of protrusions (COD) is 1 μm or less, the process time required for the growth of the protrusion (COD) can be shortened and manufacturing costs can be reduced. Preferably, the length (L) of the plurality of protrusions (COD) may be 500 Å to 2000 Å, but is not limited thereto. However, it is preferable that the maximum length (L) of the plurality of protrusions (COD) be formed lower than the height of the bank layer (BNL). In addition, the lengths (L) of the plurality of protrusions (COD) may be equal to each other within the above-described range.

[0121] The width (W) of the plurality of protrusions (COD) can be in the range of tens of Å to hundreds of Å and is not particularly limited. However, if the width (W) of the plurality of protrusions (COD) is less than hundreds of Å, the contact area with the cathode electrode (CAT) is increased, so the resistance of the cathode electrode (CAT) can be effectively reduced.

[0122] The aforementioned conductive layer (COL) may include a conductive material. The conductive layer (COL) may include a metal oxide, for example, zinc oxide (ZnO) or a metal oxide containing zinc oxide (ZnO). Zinc oxide (ZnO) is a material capable of growing at low temperatures, which enables a low-temperature process. However, it is not limited thereto, and other materials capable of growing at low temperatures, such as zinc oxide (ZnO), may also be used.

[0123] Meanwhile, an organic film layer (ORL) may be disposed on the conductive layer (COL). Specifically, the organic film layer (ORL) may include an electron transport layer (ETL) and an electron injection layer (EIL). As described above, the electron transport layer (ETL) and the electron injection layer (EIL) can be disposed on the conductive layer (COL) because they are formed by being deposited entirely on the display area (DPA) of the substrate (110).

[0124] Specifically, the electron transport layer (ETL) can be placed directly on the conductive layer (COL). The electron transport layer (ETL) can be in contact with the upper surface of the base (COB) of the conductive layer (COL) and the upper surface of the protrusion (COD) of the conductive layer (COL). Additionally, the electron transport layer (ETL) can be placed in contact with the side and upper surfaces of the bank layer (BNL). The electron transport layer (ETL) can be placed between each of the multiple protrusions (COD). The electron transport layer (ETL) can be formed by a deposition method and formed on the upper surface of the base (COB) and the upper surface of the protrusion (COD). On the other hand, the electron transport layer (ETL) is not placed on the side of the protrusion (COD).

[0125] The electron injection layer (EIL) can be placed directly on the electron transport layer (ETL). The electron injection layer (EIL) is formed directly on the electron transport layer (ETL) by a deposition method similar to that of the electron transport layer (ETL) and is not placed on the side of the protrusion (COD).

[0126] In the present embodiment, an electron transport layer (ETL) and an electron injection layer (EIL) were described as examples of an organic film layer (ORL) disposed on a conductive layer (COL), but are not limited thereto. The organic film layer (ORL) disposed on the conductive layer (COL) may be an electron transport layer (ETL) or an electron injection layer (EIL), and may be one or more of a hole injection layer (HIL), a hole transport layer (HTL), and an emitting layer (EML) in addition to these.

[0127] A cathode electrode (CAT) may be disposed on the organic film layer (ORL). The cathode electrode (CAT) may be disposed on the electron injection layer (EIL) of the organic film layer (ORL). The cathode electrode (CAT) may make direct contact with the upper surface of the electron injection layer (EIL) and the side of the electron transport layer (ETL). The cathode electrode (CAT) may be formed by sputtering or deposition. The thickness of the cathode electrode (CAT) is made thicker than the thickness of the aforementioned organic film layer (ORL) so that it may make contact with the side of each of the multiple protrusions (COD). That is, the cathode electrode (CAT) may make contact with the side of the multiple protrusions (COD) and be electrically connected to the multiple protrusions (COD). Accordingly, the cathode electrode (CAT) may be electrically connected to the auxiliary electrode (AXE) and auxiliary wiring (AXL) through the conductive layer (COL) to reduce resistance.

[0128] In the present invention, a conductive layer (COL) can be formed between a cathode electrode (CAT) and an auxiliary electrode (AXE). In particular, the conductive layer (COL) is provided with a plurality of protrusions (COD) to make direct contact with the cathode electrode (CAT), thereby significantly increasing the contact area between the cathode electrode (CAT) and the plurality of protrusions (COD). By doing so, the current path between the cathode electrode (CAT) and the plurality of protrusions (COD) is increased, thereby significantly reducing the resistance of the cathode electrode (CAT). Accordingly, since the contact area between the cathode electrode (CAT) and the conductive layer (COL) can be increased within the limited planar size of the auxiliary electrode (AXE), it is possible to prevent the aperture ratio from being reduced due to the auxiliary electrode (AXE).

[0129] Meanwhile, the aforementioned multiple protrusions (CODs) may be formed with different lengths, widths, and spacings.

[0130] Referring to FIG. 11, a plurality of protrusions (CODs) may have different lengths (L). For example, the lengths (L) of two adjacent or spaced-apart protrusions (CODs) may differ from each other. However, this is not limited thereto, and some of the protrusions (CODs) may have different lengths (L) and others may have the same length (L). In this case, the widths (W) of the plurality of protrusions (CODs) may be the same or different from each other.

[0131] Additionally, referring to FIG. 12, a plurality of protrusions (CODs) may be formed with different widths (W). For example, the widths (W) of two adjacent or spaced-apart protrusions (CODs) may be different from each other. However, this is not limited thereto, and some of the protrusions (CODs) may be formed with different widths (W) and others with the same width (W). In this case, the lengths (L) of the plurality of protrusions (CODs) may be the same or different from each other.

[0132] Additionally, referring to FIG. 13, a plurality of protrusions (CODs) may be spaced apart at different intervals (IN). For example, the interval (IN) between two adjacent protrusions (CODs) may be different from the interval (IN) between two other adjacent protrusions (CODs). However, this is not limited thereto, and some of the protrusions (CODs) may be spaced apart at different intervals (IN) while others may be spaced apart at the same interval (IN). In this case, the length (L) and width (W) of the plurality of protrusions (CODs) may be the same or different from each other.

[0133] FIG. 14 is a cross-sectional view showing a display device according to another embodiment. FIG. 15 is a plan view showing a conductive layer of a display device according to another embodiment.

[0134] Referring to FIGS. 14 and 15, this embodiment differs from the embodiments of FIGS. 7 to 13 described above in that the base (COB) of the conductive layer (COL) is positioned below the bank layer (BNL) and partially overlaps with the bank layer (BNL). Hereinafter, the description of identical configurations will be omitted, and the differences will be described in detail.

[0135] The base (COB) of the conductive layer (COL) can be placed directly on the auxiliary electrode (AXE). At least one side of the base (COB) of the conductive layer (COL) can be aligned and matched with one side of the auxiliary electrode (AXE). Unlike the embodiment described above, the base (COB) of the conductive layer (COL) can be formed by a deposition method. For example, the base material can be deposited on the auxiliary electrode (AXE) and patterned to form the base (COB). Accordingly, the base (COB) can be formed to have a side that matches at least one side of the auxiliary electrode (AXE).

[0136] Additionally, at least a portion of the base (COB) of the conductive layer (COL) may be positioned below the bank layer (BNL) and covered by the bank layer (BNL). That is, the bank layer (BNL) may cover the edge of the base (COB). Accordingly, at least a portion of the base (COB) may be positioned below the bank layer (BNL) and may overlap with the bank layer (BNL). Additionally, the base (COB) may overlap with the second opening (OP2) of the bank layer (BNL), and the planar size of the base (COB) may be larger than the planar size of the second opening (OP2).

[0137] FIG. 16 is a cross-sectional view showing a display device according to another embodiment. FIG. 17 is a cross-sectional view showing a conductive layer of a display device according to another embodiment. FIG. 18 is a plan view showing a conductive layer of a display device according to another embodiment.

[0138] Referring to FIGS. 16 to 18, this embodiment differs from the embodiments of FIGS. 7 to 15 described above in that the conductive layer (COL) is arranged in a planar dot shape. Hereinafter, the description of identical configurations will be omitted, and the differences will be described in detail.

[0139] The conductive layer (COL) may be arranged in a planar dot shape. Specifically, the conductive layer (COL) may include a plurality of bases (COB) and a plurality of protrusions (COD) each disposed on the plurality of bases (COB). The plurality of bases (COB) are disposed on the auxiliary electrode (AXE), and their planar shape may be polygonal or circular. The plurality of bases (COB) may be arranged regularly on the auxiliary electrode (AXE). The bases (COB) may be formed by patterning after deposition by a deposition method and arranged regularly. However, this is not limited thereto, and the patterning shape may be arranged randomly or adjusted in various ways. The plurality of protrusions (COD) may each be disposed on the plurality of bases (COB). The plurality of protrusions (COD) may grow from the bases (COB) to form a nanorod shape.

[0140] The organic film layer (ORL) can be disposed on the auxiliary electrode (AXE) and the conductive layer (COL). The organic film layer (ORL) can be in direct contact with the upper surface of the auxiliary electrode (AXE) between the conductive layers (COL). Specifically, the electron transport layer (ETL) among the organic film layers (ORL) can be in direct contact with the upper surface of the auxiliary electrode (AXE) and can be in direct contact with the side and upper surfaces of the conductive layer (COL). Additionally, the electron injection layer (EIL) can be in direct contact with the upper surface of the electron transport layer (ETL) and can be in direct contact with the side surface of the conductive layer (COL).

[0141] The cathode electrode (CAT) can make direct contact with the upper and side surfaces of the organic film layer (ORL) and with the side surfaces of the conductive layer (COL). By positioning the organic film layer (ORL) on the auxiliary electrode (AXE) in the same manner as the base (COB) of the conductive layer (COL), the contact area between the cathode electrode (CAT) and the conductive layer (COL) can be further increased. Accordingly, the resistance of the cathode electrode (CAT) can be further reduced.

[0142] Hereinafter, a method for manufacturing the above-described display device will be described.

[0143] FIGS. 19 to 27 are cross-sectional views showing a method for manufacturing a display device according to one embodiment, by process.

[0144] FIGS. 19 to 27 may correspond to the third light-emitting region and the region of the conductive layer of the display device illustrated in FIG. 7 above. In the description of the manufacturing method below, the materials of each layer are omitted as they have been described above.

[0145] Referring to FIG. 19, a buffer layer (120) is formed on a substrate (110), and an active layer (130) is formed on the buffer layer (120). The active layer (130) can be formed by a mask process. For example, an oxide semiconductor or silicon can be deposited on the entire surface of the buffer layer (120), and then patterned through a photolithography process to form an active layer (130) as shown in FIG. 19.

[0146] Next, a gate insulating layer (140) is formed on the active layer (130), and a gate electrode (150) that overlaps with the active layer (130) is formed on the gate insulating layer (140). The gate electrode (150) can be formed by a mask process. For example, a material layer for the gate electrode is deposited over the entire surface of the gate insulating layer (140). Then, a photoresist layer is applied on the material layer for the gate electrode, and a photoresist pattern is formed through exposure and development, and then the material layer for the gate electrode is etched using this as an etching mask. Afterward, the gate electrode (150) can be formed by removing the photoresist pattern through a stripping or ashing process.

[0147] Next, an interlayer insulating layer (160) is formed on the gate electrode (150), and a source electrode (170), a drain electrode (180), and an auxiliary wiring (AXL) are formed on the interlayer insulating layer (160). The source electrode (170), the drain electrode (180), and the auxiliary wiring (AXL) can be formed by the mask process described above. Before forming the source electrode (170), the drain electrode (180), and the auxiliary wiring (AXL), contact holes are formed that penetrate the interlayer insulating layer (160) and the gate insulating layer (140) to expose the active layer (130). Subsequently, a source / drain electrode material layer is deposited over the entire surface of the interlayer insulating layer (160) and patterned through a photolithography process to form the source electrode (170), the drain electrode (180), and the auxiliary wiring (AXL). The source electrode (170) and the drain electrode (180) can each be connected to the active layer (130) through contact holes. Thus, a transistor (TFT) comprising the active layer (130), the gate electrode (150), the source electrode (170), and the drain electrode (180) is manufactured.

[0148] Next, referring to FIG. 20, a planarization layer (200) is formed on the source electrode (170), the drain electrode (180), and the auxiliary wiring (AXL). The planarization layer (200) can be formed by coating an organic material using a solution process, such as spin coating. Then, a first via hole (205) exposing the drain electrode (180) of the thin film transistor (TFT) and a second via hole (208) exposing the auxiliary wiring (AXL) are formed through a photolithography process.

[0149] Next, an anode electrode (ANO) and an auxiliary electrode (AXE) are formed on the planarization layer (200). The anode electrode (ANO) and the auxiliary electrode (AXE) can be formed by the mask process described above. Specifically, an anode electrode material layer is deposited on the entire surface of the planarization layer (200) and patterned through a photolithography process to form the anode electrode (ANO) and the auxiliary electrode (AXE). The anode electrode (ANO) can be connected to the drain electrode (180) of the transistor (TFT) through the first via hole (205), and the auxiliary electrode (AXE) can be connected to the auxiliary wiring (AXL) through the second via hole (208).

[0150] Next, a bank layer material layer is applied on a substrate (110), and a first opening (OP1) exposing an anode electrode (ANO) and a second opening (OP2) exposing an auxiliary electrode (AXE) are formed through a photolithography process to form a bank layer (BNL).

[0151] Referring to FIGS. 21 and 22, a seed ink (INK1) is prepared. The seed ink (INK1) may be a solution for preparing the base (COB) of a conductive layer (COL) to be manufactured in a subsequent process. Additionally, the seed ink (INK1) may be a solution for preparing a metal oxide, such as zinc oxide (ZnO), that forms the conductive layer (COL).

[0152] Seed ink (INK1) may be prepared by mixing a seed material with a solvent. In an exemplary embodiment, seed ink (INK1) may be prepared by dissolving zinc acetate dihydrate (Zn(CH3COO)22H2O), which is a seed material, in isopropanol (IPA), which is a solvent, and then adding monoethanolamine. The prepared seed ink (INK1) may be stirred at a temperature of about 60 degrees for about 20 minutes.

[0153] The manufactured seed ink (INK1) is sprayed via an inkjet nozzle (NZ) using an inkjet method. At this time, the seed ink (INK1) may be sprayed onto the second opening (OP2) of the bank layer (BNL) where the auxiliary electrode (AXE) is exposed. After the seed ink (INK1) is sprayed, drying and baking processes may be performed to produce the base (COB) of the conductive layer (COL). In an exemplary embodiment, the drying process may be performed at a temperature of about 150 degrees for about 10 minutes, and the baking process may be performed at a temperature of about 500 degrees for about 2 hours. However, it is not limited thereto.

[0154] Next, referring to FIGS. 23 and 24, a precursor ink (INK2) is sprayed onto a second opening (OP2) of a bank layer (BNL) in which a base (COB) of a conductive layer (COL) is formed. The precursor ink (INK2) may be intended to grow a plurality of protrusions (COD) from a metal oxide seed of the base (COB). In an exemplary embodiment, the precursor ink (INK2) may be prepared by dissolving zinc nitrate hexahydrate (Zn(NO3)26H2O) in DI water, which is a solvent, and then adding hexamethylene.

[0155] The manufactured precursor ink (INK2) can be sprayed onto the base (COB) of the conductive layer (COL) through an inkjet nozzle (NZ). When the precursor ink (INK2) is sprayed, the seeds of the base (COB) react with the precursor ink (INK2) and grow in a third direction (DR3) to form a plurality of protrusions (COD). The height and width of the plurality of protrusions (COD) can be controlled by adjusting the reaction time with the precursor ink (INK2). In an exemplary embodiment, the reaction process can be performed at a temperature of about 90 degrees. When the protrusions grow to a desired height, the reaction is terminated by performing a drying and baking process to remove the precursor ink (INK2). Thus, a conductive layer (COL) comprising the base (COB) and the plurality of protrusions (COD) can be formed.

[0156] Next, referring to FIG. 25, a first organic film layer (ORL1) is formed on a first opening (OP1) of a bank layer (BNL) where an anode electrode (ANO) is exposed. The first organic film layer (ORL1) can be manufactured by spraying a first organic film layer ink (INK3) through a nozzle (NZ) using an inkjet method. At this time, the first organic film layer (ORL1) may be a hole injection layer, a hole transport layer, and a light-emitting layer. The hole injection layer, the hole transport layer, and the light-emitting layer can each be manufactured by being prepared as ink, sprayed, and then subjected to drying and baking processes.

[0157] Next, referring to FIG. 26, a second organic film layer (ORL2) is formed on the front surface of the substrate (110). The second organic film layer (ORL2) can be deposited on the front surface of the substrate (110) using a deposition method. At this time, the second organic film layer (ORL2) may be an electron transport layer and an electron injection layer. The electron transport layer and the electron injection layer can each be sequentially stacked through a deposition method. The second organic film layer (ORL2) can be stacked on the first organic film layer (ORL1), the bank layer (BNL), and the conductive layer (COL). In particular, the second organic film layer (ORL2) can be stacked on the upper surface of the base (COB) and the upper surface of the protrusion (COD) of the conductive layer (COL).

[0158] Next, referring to FIG. 27, a cathode electrode (CAT) is formed on the front surface of the substrate (110). The cathode electrode (CAT) can be deposited on the front surface of the substrate (110) using a deposition method. The cathode electrode (CAT) is laminated on the second organic film layer (ORL2) and can be in direct contact with the side of the protrusion (COD) of the conductive layer (COL). Thus, a display device according to one embodiment can be manufactured.

[0159] As described above, a method for manufacturing a display device according to one embodiment can lower the resistance of the cathode electrode (CAT) and improve voltage drop by growing a plurality of protrusions (COD) on an auxiliary electrode (AXE) to form a conductive layer (COL), thereby increasing the contact area between the cathode electrode (CAT) and the conductive layer (COL).

[0160] In addition, there is an advantage in that the process for removing the organic film layers (ORL1, ORL2) can be omitted to electrically connect the auxiliary electrode (AXE) and the cathode electrode (CAT).

[0161] FIGS. 28 and 29 are cross-sectional views showing a method for manufacturing a display device according to another embodiment, by process.

[0162] FIGS. 28 and 29 show some processes for manufacturing the structure of FIG. 14 described above, and other processes are the same as those of the example described above, so the description is omitted.

[0163] Referring to FIG. 28, an anode electrode (ANO) and an auxiliary electrode (AXE) are formed on a planarization layer (200) as described above in FIG. 20. Subsequently, a metal oxide is deposited on the auxiliary electrode (AXE) and patterned by photolithography to form a base (COB) of a conductive layer (COL). The base (COB) can be formed to be aligned and matched with at least one side of the anode electrode (ANO).

[0164] Next, referring to FIG. 29, a bank layer material is applied on a substrate (110) and patterned to form a first opening (OP1) that exposes an anode electrode (ANO) and a second opening (OP2) that exposes the base (COB) of a conductive layer (COL). The bank layer (BNL) may be formed to cover the edge of the base (COB) of the conductive layer (COL).

[0165] Next, the process of FIG. 21 to FIG. 27 described above is performed to manufacture a display device according to another embodiment.

[0166] In this embodiment, the shape of the conductive layer (COL) can be varied by forming the base (COB) by a deposition method. Accordingly, the voltage drop of the cathode electrode (CAT) can be effectively improved by controlling the arrangement of a plurality of protrusions (COD) grown on the base (COB).

[0167] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0168] 1: Display device 110: Substrate 200: Flattening layer AXL: Auxiliary wiring AXE: Auxiliary electrode ANO: Anode electrode ORL: Organic film layer CAT: Cathode electrode BNL: Bank layer COL: Challenge layer COB: Base COD: Protrusion

Claims

Claim 1 A display device comprising: a substrate; an auxiliary electrode disposed on the substrate; a bank layer disposed on the auxiliary electrode and including an opening that exposes the auxiliary electrode; a conductive layer disposed on the auxiliary electrode exposed by the opening and including a base and a plurality of protrusions protruding from the base; an organic film layer disposed on the bank layer and the conductive layer and exposing the side of the plurality of protrusions; and a cathode electrode disposed on the organic film layer and in contact with the side of the plurality of protrusions, wherein the base of the conductive layer contacts the side of the bank layer but does not contact the upper surface of the bank layer. Claim 2 A display device according to claim 1, wherein the base portion extends in a first direction parallel to the substrate, and the plurality of protrusions extend in a second direction intersecting the first direction. Claim 3 In claim 1, the plurality of protrusions are formed in a rod shape in a display device. Claim 4 A display device according to claim 1, wherein the base and the plurality of protrusions are integrally formed and include the same material. Claim 5 In claim 4, the base and the plurality of protrusions are a display device comprising zinc oxide. Claim 6 A display device according to claim 1, wherein the length of the plurality of protrusions is 500 Å or more and is smaller than the thickness of the bank layer. Claim 7 In claim 1, the plurality of protrusions are a display device randomly arranged on a plane. Claim 8 A display device according to claim 1, wherein the organic film layer comprises one or more of an electron transport layer and an electron injection layer. Claim 9 In claim 1, the organic film layer is a display device in contact with the upper surface of each of the base and the plurality of protrusions. Claim 10 delete Claim 11 In claim 1, the conductive layer is a display device disposed within the opening. Claim 12 In claim 1, the base portion is positioned at least partially below the bank layer and is a display device overlapping with the bank layer. Claim 13 In claim 1, the conductive layer is a display device arranged in a plurality of dot shapes on a planar surface. Claim 14 A display device comprising: a substrate including a light-emitting region and a non-light-emitting region; an anode electrode disposed on the light-emitting region of the substrate and an auxiliary electrode disposed on the non-light-emitting region; a bank layer disposed on the anode electrode and the auxiliary electrode, comprising a first opening exposing the anode electrode and a second opening exposing the auxiliary electrode; a conductive layer disposed on the auxiliary electrode exposed by the second opening, comprising a base and a plurality of protrusions protruding from the base; an organic film layer disposed on the bank layer, the anode electrode and the conductive layer, and exposing the side of the plurality of protrusions; and a cathode electrode disposed on the organic film layer and in contact with the side of the plurality of protrusions, wherein the base of the conductive layer contacts the side of the bank layer but does not contact the upper surface of the bank layer. Claim 15 In claim 14, the anode electrode and the auxiliary electrode are disposed on the same layer and the display device comprises the same material. Claim 16 A display device according to claim 14, wherein the organic film layer comprises a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer, wherein the hole injection layer, the hole transport layer, the light-emitting layer, the electron transport layer, and the electron injection layer overlap with the anode electrode, the hole injection layer, the hole transport layer, and the light-emitting layer do not overlap with the conductive layer, and the electron transport layer and the electron injection layer overlap with the conductive layer. Claim 17 In claim 14, the display device in which the base and the plurality of protrusions are integrally formed. Claim 18 A method for manufacturing a display device comprising: forming an auxiliary electrode on a substrate; forming a bank layer including an opening that exposes the auxiliary electrode on the auxiliary electrode; spraying seed ink onto the auxiliary electrode to form a base portion of a conductive layer; spraying precursor ink onto the base portion to grow a plurality of protrusions from the base portion; forming an organic film layer on the plurality of protrusions; and forming a cathode electrode on the base portion and the organic film layer, wherein the organic film layer exposes the side of the plurality of protrusions and the cathode electrode contacts the side of the plurality of protrusions. Claim 19 A method for manufacturing a display device according to claim 18, wherein the seed ink comprises zinc acetate dihydrate and the precursor ink comprises zinc nitrate hexahydrate. Claim 20 In claim 18, the step of forming the base portion of the conductive layer is a method for manufacturing a display device that performs drying and baking processes after spraying the seed ink. Claim 21 In claim 18, the step of growing the plurality of protrusions is a method for manufacturing a display device in which the seed of the base and the precursor ink react to grow the plurality of protrusions, and the length of the plurality of protrusions is controlled by adjusting the reaction time. Claim 22 A method for manufacturing a display device according to claim 21, wherein after the plurality of protrusions are grown, a drying and baking process is performed to remove the precursor ink. Claim 23 A method for manufacturing a display device according to claim 18, wherein the organic film layer is formed by a deposition method and the cathode electrode is formed by sputtering or a deposition method.

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