Display device

Abstract

The display device includes a transistor substrate comprising a first transistor and a second transistor, a first color conversion layer and a second color conversion layer disposed on the transistor substrate, a bank layer disposed surrounding the first color conversion layer and the second color conversion layer and including a concave pattern, a first light-emitting element and a second light-emitting element disposed overlapping the first color conversion layer and the second color conversion layer on the first color conversion layer and the second color conversion layer and emitting light in the direction in which the first color conversion layer and the second color conversion layer are disposed, and a pixel defining film disposed surrounding the first light-emitting element and the second light-emitting element and filling the concave pattern.

Description

Technology Field

[0001] The present invention relates to a display device. More specifically, the present invention relates to a display device capable of displaying an image. Background Technology

[0002] Display devices are manufactured and used in various ways. Display devices can provide visual information to users by emitting light. To emit light, display devices may include various light-emitting materials. For example, display devices may include liquid crystal displays that emit light using a liquid crystal layer, inorganic light-emitting displays that emit light using inorganic light-emitting diodes, and organic light-emitting displays that emit light using organic light-emitting diodes.

[0003] A display device may include a color conversion layer to convert the color of light emitted from a light-emitting element. At this time, much research is being conducted to increase the display efficiency of the light emitted from the light-emitting element. The problem to be solved

[0004] The objective of the present invention is to provide a display device capable of displaying images.

[0005] However, the present invention is not limited to the purposes described above and may be extended in various ways without departing from the spirit and scope of the invention. means of solving the problem

[0006] To achieve the objectives of the present invention as described above, a display device according to embodiments of the present invention may include a transistor substrate comprising a first transistor and a second transistor, a first color conversion layer and a second color conversion layer disposed on the transistor substrate, a bank layer disposed surrounding the first color conversion layer and the second color conversion layer and including a concave pattern, a first light-emitting element and a second light-emitting element disposed overlapping the first color conversion layer and the second color conversion layer on the first color conversion layer and the second color conversion layer and emitting light in the direction in which the first color conversion layer and the second color conversion layer are disposed, and a pixel defining film disposed surrounding the first light-emitting element and the second light-emitting element and filling the concave pattern.

[0007] In one embodiment, the apparatus may further include a plurality of color filters disposed between the transistor substrate, the first color conversion layer, the second color conversion layer, and the bank layer, and a refractive layer disposed between the plurality of color filters and the first color conversion layer, the second color conversion layer, and the bank layer.

[0008] In one embodiment, a plurality of color filters may include openings that expose the transistor substrate in an area overlapping with the first color conversion layer.

[0009] In one embodiment, the plurality of color filters may be arranged to overlap each other in an area that overlaps with the concave pattern.

[0010] In one embodiment, the first color conversion layer includes a scatterer, and the second color conversion layer may further include the quantum dot in the scatterer.

[0011] In one embodiment, the first light-emitting element is connected to the first transistor through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate, and the second light-emitting element can be connected to the second transistor through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate.

[0012] In one embodiment, the first angle that each of the first contact hole and the third contact hole has with respect to the lower surface of the bank layer may be smaller than the second angle that each of the second contact hole and the fourth contact hole has with respect to the upper surface of the transistor substrate.

[0013] In one embodiment, the first angle may be 60 to 80 degrees, and the second angle may be 80 to 90 degrees.

[0014] In one embodiment, the transistor substrate further includes a first voltage electrode connected to the first light-emitting element and a second voltage electrode connected to the second light-emitting element, wherein the first light-emitting element is connected to the first voltage electrode through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate, and the second light-emitting element may be connected to the second voltage electrode through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate.

[0015] In one embodiment, the first angle that each of the first contact hole and the third contact hole has with respect to the lower surface of the bank layer may be smaller than the second angle that each of the second contact hole and the fourth contact hole has with respect to the upper surface of the transistor substrate.

[0016] In one embodiment, the first angle may be 60 to 80 degrees, and the second angle may be 80 to 90 degrees.

[0017] To achieve the objectives of the present invention as described above, a display device according to embodiments of the present invention may include a transistor substrate comprising first to fourth transistors, a plurality of color filters disposed on the transistor substrate, a refractive layer disposed on the plurality of color filters, first to fourth color conversion layers disposed on the refractive layer, a bank layer disposed surrounding the first to fourth color conversion layers and having a concave pattern, first to fourth light-emitting elements disposed overlapping the first to fourth color conversion layers and emitting light in the direction in which the first to fourth color conversion layers are disposed, and a pixel defining film disposed surrounding the first to fourth light-emitting elements and filling the concave pattern.

[0018] In one embodiment, the first to fourth light-emitting elements may be arranged in a stripe shape on a planar view.

[0019] In one embodiment, the first to fourth light-emitting elements may be arranged in a diamond shape on a planar view.

[0020] In one embodiment, a plurality of color filters include an opening that exposes the transistor substrate in an area overlapping with the first color conversion layer, and the plurality of color filters may be arranged to overlap each other in an area overlapping with the concave pattern.

[0021] In one embodiment, the first color conversion layer includes a scatterer, and the second to fourth color conversion layers may each further include quantum dots in the scatterer.

[0022] In one embodiment, the first light-emitting element is connected to the first transistor through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; the second light-emitting element is connected to the second transistor through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; the third light-emitting element is connected to the third transistor through a fifth contact hole penetrating the bank layer and a sixth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; and the fourth light-emitting element is connected to the fourth transistor through a seventh contact hole penetrating the bank layer and an eighth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate.

[0023] In one embodiment, the first angle that each of the first contact hole, the third contact hole, the fifth contact hole, and the seventh contact hole has with respect to the upper surface of the bank layer is smaller than the second angle that each of the second contact hole, the fourth contact hole, the sixth contact hole, and the eighth contact hole has with respect to the upper surface of the transistor substrate, and the first angle may be 60 to 80 degrees, and the second angle may be 80 to 90 degrees.

[0024] In one embodiment, the transistor substrate further includes first to fourth voltage electrodes connected to the first to fourth light-emitting elements, and the first light-emitting element is connected to the first voltage electrode through a first contact hole penetrating the bank layer and the refractive layer, the plurality of color filters, and a second contact hole penetrating the transistor substrate; the second light-emitting element is connected to the second voltage electrode through a third contact hole penetrating the bank layer and the refractive layer, the plurality of color filters, and a fourth contact hole penetrating the transistor substrate; the third light-emitting element is connected to the third voltage electrode through a fifth contact hole penetrating the bank layer and the refractive layer, the plurality of color filters, and a sixth contact hole penetrating the transistor substrate; and the fourth light-emitting element can be connected to the fourth voltage electrode through a seventh contact hole penetrating the bank layer and the refractive layer, the plurality of color filters, and an eighth contact hole penetrating the transistor substrate.

[0025] In one embodiment, the first angle that each of the first contact hole, the third contact hole, the fifth contact hole, and the seventh contact hole has with respect to the upper surface of the bank layer is smaller than the second angle that each of the second contact hole, the fourth contact hole, the sixth contact hole, and the eighth contact hole has with respect to the upper surface of the transistor substrate, and the first angle may be 60 to 80 degrees, and the second angle may be 80 to 90 degrees. Effects of the invention

[0026] To achieve the objectives of the present invention described above, a display device according to embodiments of the present invention may have color conversion layers, a refractive layer, and a color filter disposed between a transistor substrate and light-emitting elements. Accordingly, the distance between the light-emitting elements and the color conversion layers may be shortened compared to conventional methods. Accordingly, the conversion rate of light incident on the color conversion layers may be increased, and even if the thickness of the color conversion layers is disposed thinner than conventional methods, substantially the same conversion rate as conventional methods can be obtained. Therefore, the thickness of the display device may be reduced.

[0027] It may include a bank layer having a concave pattern for receiving ink that is mis-attached. A pixel defining film may be positioned to fill the concave pattern. As the pixel defining film is positioned to fill the concave pattern, the bank layer and the pixel defining film together can effectively prevent color mixing of light emitted from light-emitting elements.

[0028] However, the effects of the present invention are not limited to the effects described above, and may be extended in various ways without departing from the spirit and scope of the present invention. Brief explanation of the drawing

[0029] FIG. 1 is a plan view showing a display device according to one embodiment of the present invention. FIGS. 2 and FIGS. 3 are drawings showing an embodiment of a pixel included in the display device of FIG. 1. FIG. 4 is a cross-sectional view showing one embodiment cut along line II' of FIG. 3. FIG. 5 is a cross-sectional view showing one embodiment cut along the line II-II' of FIG. 3. FIG. 6 is a cross-sectional view illustrating an embodiment of light-emitting elements included in the display device of FIG. 1. FIG. 7 is a plan view showing an example of the arrangement relationship of light-emitting elements included in the display device of FIG. 1. FIGS. 8 to 17 are drawings illustrating an embodiment of a method for manufacturing the display device of FIG. 1. Specific details for implementing the invention

[0030] Hereinafter, embodiments of the present invention will be described in more detail with reference to the attached drawings. Identical or similar reference numerals are used for identical components in the attached drawings.

[0031] FIG. 1 is a plan view showing a display device according to one embodiment of the present invention.

[0032] Referring to FIG. 1, the display device (DD) may include a display area (DA) and a non-display area (NDA). The display area (DA) may be positioned to surround the non-display area (NDA).

[0033] A display area (DA) can be defined as an area for displaying an image. To this end, a plurality of pixels (P) may be arranged in the display area (DA). Each of the plurality of pixels (P) may include a plurality of subpixels. For example, each of the plurality of pixels (P) may include a red subpixel emitting red light, a green subpixel emitting green light, and a blue subpixel emitting blue light. Alternatively, each of the plurality of pixels (P) may include a red subpixel emitting red light, a green subpixel emitting green light, a blue subpixel emitting blue light, and a white subpixel emitting white light. In addition, each of the plurality of pixels (P) may have various structures, but the following description will be based on an embodiment in which each of the plurality of pixels (P) includes a red subpixel, a green subpixel, a blue subpixel, and a white subpixel.

[0034] Driving units for driving multiple pixels (P) may be disposed in the non-display area (NDA). The driving units are connected to the multiple pixels (P) and can perform the role of transmitting various signals to the multiple pixels (P).

[0035] FIGS. 2 and FIGS. 3 are drawings showing an embodiment of a pixel included in the display device of FIG. 1.

[0036] Referring to FIG. 2, a pixel (P) may include a plurality of subpixels. The plurality of subpixels may be arranged in different regions. The region where the plurality of subpixels are arranged may be divided into four regions. The four regions may include a first subpixel region in which a first color conversion layer (CCL1), a first power electrode (SSE1), and a first driving transistor (DTR1) are arranged; a second subpixel region in which a second color conversion layer (CCL2), a second power electrode (SSE2), and a second driving transistor (DTR2) are arranged; a third subpixel region in which a third color conversion layer (CCL3), a third power electrode (SSE3), and a third driving transistor (DTR3) are arranged; and a fourth subpixel region in which a fourth color conversion layer (CCL4), a fourth power electrode (SSE4), and a fourth driving transistor (DTR4) are arranged. The configurations shown here illustrate only some of the configurations placed in each subpixel area for the sake of convenience of explanation, and various additional configurations may be placed in each subpixel area.

[0037] The first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4) may be partitioned by a bank layer (BK). The first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4) may be formed by an inkjet process. A concave pattern (BW) may be formed in the bank layer (BK). The concave pattern (BK) is formed by patterning the bank layer (BK) and may have a predetermined space. The display device (DD) may receive ink that is deposited during the inkjet process or ink that overflows the first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4) in the concave pattern (BW).

[0038] In FIG. 2, a concave pattern (BW) is shown formed only on the side of each of the first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4), but this is exemplary and the location where the concave pattern (BW) is formed may not be limited thereto. For example, the concave pattern (BW) may be formed surrounding the first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4).

[0039] Referring to FIG. 3, a first light-emitting element (ED1) may be placed on a first sub-pixel area, a second light-emitting element (ED2) may be placed on a second sub-pixel area, a third light-emitting element (ED3) may be placed on a third sub-pixel area, and a fourth light-emitting element (ED4) may be placed on a fourth sub-pixel area.

[0040] At this time, each of the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) may correspond to a light-emitting element that emits white light. To this end, each of the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) may have a structure in which a plurality of light-emitting layers are stacked. For example, each of the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) may have a structure in which a blue light-emitting layer emitting blue light, a yellow light-emitting layer emitting yellow light, and a blue light-emitting layer emitting blue light are stacked sequentially. However, this is merely an example, and in addition to this, light-emitting layers emitting light of various colors may be stacked. The white light emitted from the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) may be converted into light of the same color or a different color by passing through the first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4).

[0041] In the embodiments, the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) may be arranged in a stripe shape on a planar view.

[0042] FIG. 4 is a cross-sectional view showing one embodiment cut along line II' of FIG. 3.

[0043] Referring to FIGS. 3 and 4, the display device (DD) may include a substrate (SUB), a first insulating layer (IL1), a buffer layer (BUF), a first lower electrode (BML1), a first electrode (ME1), a second electrode (ME2), a third electrode (ME3), a fourth electrode (ME4), a second insulating layer (IL2), a passivation layer (PAS), a first color filter (CF1), a second color filter (CF2), a third color filter (CF3), a refractive layer (RL), a third insulating layer (IL3), a bank layer (BK), a fourth insulating layer (BK), a first connecting electrode (CE1), a first anode electrode (ANO1), a pixel defining layer (PDL), a first emitting layer (ML1), a cathode electrode (CATH), an adhesive layer (ADL), and a protective layer (PTL).

[0044] The substrate (SUB) can serve to support the display device (DD). The substrate (SUB) can be made of various materials. For example, the substrate (SUB) can be made of glass.

[0045] A first lower electrode (BML1) may be disposed on a substrate (SUB). The first lower electrode (BML1) may be electrically connected to the plurality of driving units to receive signals transmitted from the plurality of driving units. Various signals may be applied to the first lower electrode (BML1). For example, a first power supply voltage applied to the first anode electrode (ANO1) may be applied to the first lower electrode (BML1). The first lower electrode (BML1) may include a metal, an alloy, a metal oxide, a transparent conductive material, etc. For example, the first lower electrode (BML1) may include silver (Ag), a silver-containing alloy, molybdenum (Mo), a molybdenum-containing alloy, aluminum (Al), an aluminum-containing alloy, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other.

[0046] A first insulating layer (IL1) may be disposed on a substrate (SUB) covering a first lower electrode (BML1). The first insulating layer (IL1) may include an insulating material. Examples of the insulating material may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), etc. These may be used alone or in combination with each other.

[0047] A buffer layer (BUF) may be disposed on the first insulating layer (IL1). The buffer layer (BUF) may include an insulating material. Examples of the insulating material may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), etc. These may be used alone or in combination with each other.

[0048] A first active layer (ACT1) may be disposed on a buffer layer (BUF). In the embodiments, the first active layer (ACT1) may include a silicon semiconductor. For example, the first active layer (ACT1) may include amorphous silicon, polycrystalline silicon, etc. Alternatively, in the embodiments, the first active layer (ACT1) may include an oxide semiconductor. For example, the first active layer (ACT1) may include indium-gallium-zinc oxide (IGZO), indium-gallium oxide (IGO), indium-zinc oxide (IZO), etc.

[0049] A first electrode (ME1) and a second electrode (ME2) may be disposed covering both sides of a first active layer (ACT1). A second insulating layer (IL2) may be disposed covering the central part of the first active layer (ACT1). A third electrode (ME3) may be disposed on the second insulating layer (IL2). Based on a signal applied to the third electrode (ME3), the first electrode (ME1) and the second electrode (ME2) may be electrically connected. The second electrode (ME2) may be connected to the first lower electrode (BML1) by a contact hole. A fourth electrode (ME4) may be disposed on a buffer layer (BUF). A second power supply voltage may be applied to the fourth electrode (ME4). The fourth electrode (ME4) may correspond to the first power supply electrode (SSE1) of FIG. 2. The first power supply voltage may have a higher voltage level than the second power supply voltage. Based on voltage levels, the first power supply voltage may be defined as a high power supply voltage and the second power supply voltage as a low power supply voltage. The first power supply voltage and the second power supply voltage may each be delivered to a first light-emitting element (ED1). The first to fourth electrodes (ME1, ME2, ME3, ME4) may include metals, alloys, metal oxides, transparent conductive materials, etc. For example, the first lower electrode (BML1) may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other.

[0050] The first lower electrode (BML1), the first to third electrodes (ME1, ME2, ME3), and the first active layer (ACT1) can be defined as the first driving transistor (DRT1).

[0051] A passivation layer (PAS) may be disposed covering the first to fourth electrodes (ME1, ME2, ME3, ME4). The passivation layer (PAS) may include an insulating material. Examples of the insulating material may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), etc. These may be used alone or in combination with each other.

[0052] The aforementioned substrate (SUB) or passivation layer (PAS) can be defined as a transistor substrate.

[0053] First to third color filters (CF1, CF2, CF3) may be disposed on a passivation layer (PAS). Each of the first to third color filters (CF1, CF2, CF3) may transmit light of a different color. The first color filter (CF1) may transmit light of a first color and block light of a color other than the first color. The second color filter (CF2) may transmit light of a second color and block light of a color other than the second color. The third color filter (CF3) may transmit light of a second color and block light of a color other than the third color. For example, the first color filter (CF1) may transmit red light, blue light, and green light, the second color filter (CF2) may transmit one other than the one mentioned above, and the third color filter (CF3) may transmit the remaining one.

[0054] The first to third color filters (CF1, CF2, CF3) can be arranged to overlap each other in an area that overlaps with the area where the concave pattern (BW) is formed. By doing so, the first to third color filters (CF1, CF2, CF3) can prevent other colors of light from being mixed.

[0055] A refractive layer (RL) may be placed on the first to third color filters (CF1, CF2, CF3). The refractive layer (RL) may have a low refractive index. For example, the refractive layer (RL) may have a refractive index of 2 or less. Through this, the refractive layer (RL) can increase the luminous efficiency of the display device (DD) by controlling the path of light coming from the first light-emitting element (ED1).

[0056] A third insulating layer (IL3) may be disposed on the refractive layer (RL). The third insulating layer (IL3) may include an insulating material. Examples of the insulating material may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), etc. These may be used alone or in combination with each other.

[0057] A first color conversion layer (CCL1) may be disposed on a third insulating layer (IL3). The first color conversion layer (CCL1) can convert the color of light emitted from a light-emitting element (ED1). For example, the first color conversion layer (CCL1) can convert white light emitted from the light-emitting element (ED1) into red, green, or blue. To this end, the first color conversion layer (CCL1) may include quantum dots and scatterers. The quantum dots may include a core and a shell surrounding the core. The scatterers may scatter light incident on the first color conversion layer (CCL1).

[0058] The above quantum dots may be semiconductor nanocrystalline materials. Depending on their composition and size, the quantum dots may have a specific bandgap and emit light having a specific wavelength after absorbing incident light. Examples of the semiconductor nanocrystalline materials include group IV nanocrystalline materials, group IIVI compound nanocrystalline materials, group III-V compound nanocrystalline materials, group IV-VI nanocrystalline materials, or combinations thereof. The quantum dots may have a core-shell structure comprising a core containing the semiconductor nanocrystalline materials and a shell surrounding the core. Examples of the shell of the quantum dots include oxides of metals or non-metals, semiconductor compounds, or combinations thereof.

[0059] A bank layer (BK) may be disposed on the third insulating layer (IL3). The bank layer (BK) may be disposed surrounding the first color conversion layer (CCL1). The bank layer (BK) may include an organic material. The bank layer (BK) may include a light-absorbing material that absorbs the visible light wavelength band. That is, the bank layer (BK) may include an organic light-blocking material. Examples of the above organic light-blocking materials include polystyrene, polymethylmethacrylate (PMMA), polyacrylonitrile (PAN), polyamide (PA), polyimide (PI), polyarylether (PAE), heterocyclic polymer, parylene, epoxy, benzocyclobutene (BCB), siloxane-based resin, silane-based resin, etc. These may be used alone or in combination with each other. Additionally, the bank layer (BK) may include a colored pigment. For example, the bank layer (BK) may include a black and / or blue pigment. Through this, the bank layer (BK) can prevent the light emitted from the aforementioned light-emitting elements (ED1, ED2, ED3, ED4) from being mixed.

[0060] A concave pattern (BW) can be formed in the bank layer (BK). The concave pattern (BW) can accommodate ink that is deposited or flooded when the first to fourth color conversion layers (CCL1, CCL2, CCL3, CCL4) are formed by an inkjet process.

[0061] A fourth insulating layer (IL4) may be disposed on the bank layer (BK). The fourth insulating layer (IL4) may include an insulating material. Examples of the insulating material may include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiON), etc. These may be used alone or in combination with each other.

[0062] A first anode electrode (ANO1) may be disposed on a fourth insulating layer (IL4). One side of the first anode electrode (ANO1) may overlap with a first color conversion layer (CCL1), and the other side may be connected to a first driving transistor (DRT1) by contact holes. The contact holes may include a first contact hole (PT1) penetrating a bank layer (BK), a refractive layer (RL), first to third color filters (CF1, CF2, CF3), and a second contact hole (PT2) penetrating a portion of the transistor substrate. The first anode electrode (ANO1) may include a metal, an alloy, a metal oxide, a transparent conductive material, etc. For example, the first anode electrode (ANO1) may include silver (Ag), a silver-containing alloy, molybdenum (Mo), a molybdenum-containing alloy, aluminum (Al), an aluminum-containing alloy, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), gallium tin oxide (GTO), fluorinated tin oxide (FTO), etc. These may be used alone or in combination with each other.

[0063] A first connecting electrode (CE1) may be disposed on a fourth insulating layer (IL4). One side of the first connecting electrode (CE1) may be in contact with a cathode electrode (CATH), and the other side may be connected to a fourth electrode (ME4) by contact holes. The contact holes may include a third contact hole (PT3) penetrating a bank layer (BK), a refractive layer (RL), first to third color filters (CF1, CF2, CF3), and a fourth contact hole (PT4) penetrating a portion of the transistor substrate. The first connecting electrode (CE1) may include a metal, an alloy, a metal oxide, a transparent conductive material, etc. For example, the first connecting electrode (CE1) may include silver (Ag), a silver-containing alloy, molybdenum (Mo), a molybdenum-containing alloy, aluminum (Al), an aluminum-containing alloy, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), gallium tin oxide (GTO), fluorinated tin oxide (FTO), etc. These may be used alone or in combination with each other.

[0064] The first angle (a1) that the first contact hole (PT1) and the third contact hole (PT3) have with respect to the lower surface of the bank layer (BK) may be about 60 degrees to about 80 degrees. The second angle (a2) that the second contact hole (PT2) and the fourth contact hole (PT4) have with respect to the lower surface of the bank layer (BK) may be about 80 degrees to about 90 degrees. The second contact hole (PT2) and the fourth contact hole (PT4) may be formed by a laser drilling process and may be formed thinner and more inclined than the first contact hole (PT1) and the third contact hole (PT3).

[0065] A pixel defining layer (PDL) may be disposed on the fourth insulating layer (IL4). The pixel defining layer (PDL) may include an opening that exposes the first anode electrode (ANO1) and the first connecting electrode (CE1). The pixel defining layer (PDL) may include an organic light-blocking material. Examples of the organic light-blocking material include polystyrene, polymethylmethacrylate (PMMA), polyacrylonitrile (PAN), polyamide (PA), polyimide (PI), polyarylether (PAE), heterocyclic polymer, parylene, epoxy, benzocyclobutene (BCB), siloxane-based resin, silane-based resin, etc. These may be used individually or in combination with each other. The pixel defining layer (PDL) may include a light-absorbing material that absorbs the visible light wavelength band. That is, the pixel defining layer (PDL) may include an organic light-blocking material. Additionally, the pixel defining layer (PDL) may include a colored pigment. For example, the pixel defining layer (PDL) may include black and / or blue pigments. Through this, the pixel defining layer (PDL) can prevent the light emitted from the aforementioned light-emitting elements (ED1, ED2, ED3, ED4) from being mixed.

[0066] A pixel defining film (PDL) can be placed to fill a concave pattern (BW). The concave pattern (BW) is formed to accommodate ink, but if it is left as an empty space, the bank layer (BK) cannot effectively prevent the mixing of light emitted from the light-emitting elements (ED1, ED2, ED3, ED4). In the display device (DD) according to the embodiments, as the pixel defining film (PDL) is placed to fill the concave pattern (BW), the bank layer (BK) and the pixel defining film (PDL) together can effectively prevent the mixing of light emitted from the light-emitting elements (ED1, ED2, ED3, ED4).

[0067] The first light-emitting layer (ML1) may have a structure in which a plurality of light-emitting layers are superimposed. For example, the first light-emitting layer (ML1) may have a structure in which a blue light-emitting layer emitting blue light, a yellow light-emitting layer emitting yellow light, and a blue light-emitting layer emitting blue light are sequentially stacked. However, this is merely an example, and in addition to this, light-emitting layers emitting light of various colors may be stacked in various other orders.

[0068] A cathode electrode (CATH) may be disposed covering a pixel defining film (PDL) and in contact with a first light-emitting layer (ML1) and a first connecting electrode (CE1). The cathode electrode (CATH) may receive the second power supply voltage from a fourth electrode (ME4). The cathode electrode (CATH) may include a metal, an alloy, a metal oxide, a transparent conductive material, etc. For example, the cathode electrode (CATH) may include silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), etc. These can be used individually or in combination with each other.

[0069] In the embodiments, the first light-emitting element (ED1) may be a back-emitting element. In this case, the first anode electrode (ANO) may be a transmissive electrode, and the cathode electrode (CATH) may be a reflective electrode.

[0070] Examples of the above-mentioned transparent electrodes include indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), gallium tin oxide (GTO), fluorinated tin oxide (FTO), etc. These can be used individually or in combination.

[0071] Examples of the above-mentioned reflective electrodes may include aluminum (Al), silver (Ag), chromium (Cr), molybdenum (Mo), platinum (Pt), nickel (Ni), etc. These may be used individually or in combination.

[0072] The protective layer (PTL) can be attached to the cathode electrode (CATH) by an adhesive layer (ADL). The protective layer (PTL) can serve to protect the display device (DD) from external impacts. To this end, the protective layer (PTL) may include a material having rigidity.

[0073] In this way, the display device (DD) may have a first color conversion layer (CCL1), a refractive layer (RL), and first to third color filters (CF1, CF2, CF3) disposed between the transistor substrate and the first light-emitting element (ED1). Accordingly, the distance between the first light-emitting element (ED1) and the first color conversion layer (CCL1) may be shortened compared to the conventional method. Accordingly, the conversion rate of light incident on the first color conversion layer (CCL1) may be increased, and even if the thickness of the first color conversion layer (CCL1) is disposed thinner than the conventional method, substantially the same conversion rate as the conventional method can be obtained. Therefore, the thickness of the display device may be reduced.

[0074] Although the above-described structure has been explained based on the first sub-pixel region, this is exemplary and is not limited thereto. For example, the above-described structure may be applied in the same way to the second sub-pixel region and the third sub-pixel region.

[0075] FIG. 5 is a cross-sectional view showing an embodiment cut along the line II-II' of FIG. 3. The configurations of FIG. 5 may be substantially identical to the configurations of FIG. 4. Therefore, the description of redundant configurations is omitted.

[0076] Referring to FIGS. 3 and 5, the second light-emitting element (ED2) may be arranged to overlap with the second color conversion layer (CCL2). The second color conversion layer (CCL2) may not include quantum dots and may include only scatterers. Accordingly, white light passing through the second color conversion layer (CCL2) may be scattered by the scatterers and emitted to the outside of the display device (DD).

[0077] That is, white light passing through the first, third, and fourth color conversion layers (CCL1, CCL3, CCL4) is converted into blue, green, red, etc., but white light passing through the second color conversion layer (CCL2) can be emitted as white light.

[0078] Since white light does not need to pass through the color filters (CF1, CF2, CF3), the color filters (CF1, CF2, CF3) may not be placed in the region overlapping with the second color conversion layer (CCL2). That is, the color filters (CF1, CF2, CF3) may include an opening that exposes the transistor substrate.

[0079] The second anode electrode (ANO2) of the second light-emitting element (ED2) can be connected to the second driving transistor (DTR2) by a fifth contact hole (PT5) penetrating the bank layer (BK) and the refractive layer (RL), the first to third color filters (CF1, CF2, CF3), and a sixth contact hole (PT6) penetrating the passivation layer (PAS). The second anode electrode (ANO2) can receive the first power supply voltage through the second driving transistor (DTR2).

[0080] The cathode electrode (ANO2) of the second light-emitting element (ED2) can be connected to the second connecting electrode (CE2). The cathode electrode (ANO2) can be connected to the eighth electrode (ME8) by a sixth contact hole (PT7) penetrating the bank layer (BK) and the refractive layer (RL), the first to third color filters (CF1, CF2, CF3), and an eighth contact hole (PT8) penetrating the passivation layer (PAS). The cathode electrode (ANO2) can receive the second power supply voltage through the second connecting electrode (CE2). The eighth electrode (ME8) may correspond to the second power supply electrode (SSE2) of FIG. 2.

[0081] The first angle (a1) that the fifth contact hole (PT5) and the seventh contact hole (PT7) have with respect to the lower surface of the bank layer (BK) may be about 60 degrees to about 80 degrees. The second angle (a2) that the sixth contact hole (PT6) and the eighth contact hole (PT8) have with respect to the lower surface of the bank layer (BK) may be about 80 degrees to about 90 degrees. The sixth contact hole (PT6) and the eighth contact hole (PT8) may be formed by a laser drilling process and may be formed thinner and more inclined than the fifth contact hole (PT5) and the seventh contact hole (PT7).

[0082] The second driving transistor (DTR2) may include a second lower electrode (BML2), a second active layer (ACT2), and fifth to seventh electrodes (ME5, ME6, ME7).

[0083] FIG. 6 is a cross-sectional view illustrating an embodiment of light-emitting elements included in the display device of FIG. 1. FIG. 6 may correspond to a drawing illustrating the arrangement relationship of different light-emitting elements.

[0084] Referring to FIG. 6, different light-emitting elements and different color conversion layers may be arranged adjacent to each other. Although FIG. 6 illustrates first and second light-emitting elements (ED1, ED2) and first and second color conversion layers (CCL1, CCL2), other light-emitting elements and other color conversion layers may also be arranged adjacent to each other.

[0085] FIG. 7 is a plan view showing an embodiment of the arrangement relationship of light-emitting elements included in the display device of FIG. 1. FIG. 7 may correspond to a drawing that schematically shows only the arrangement relationship of the light-emitting elements.

[0086] Referring to FIG. 7, the first to fourth light-emitting elements (ED1, ED2, ED3, ED4) can be arranged in a diamond shape on a plane.

[0087] FIGS. 8 to 17 are drawings illustrating an embodiment of a method for manufacturing the display device of FIG. 1.

[0088] Referring to FIG. 8, first to third color filters (CF1, CF2, CF3) may be formed on the transistor substrate. Subsequently, as shown in FIG. 9, a refractive layer (RL) may be formed on the first to third color filters (CF1, CF2, CF3). Then, as shown in FIG. 10, a third insulating layer (IL3) and a bank layer (BK) may be formed sequentially.

[0089] As illustrated in FIGS. 11 and 12, a pattern may be formed on the bank layer (BK). The pattern may be formed by an etching process. The inclined region of the pattern may be formed to have an angle of approximately 60 to approximately 80 degrees relative to the bottom surface. Subsequently, as illustrated in FIG. 13, a fourth insulating layer (IL4) may be placed to cover the bank layer (BK).

[0090] Afterwards, as illustrated in FIGS. 14 and 15, a pattern penetrating the refractive layer (RL), the first to third color filters (CF1, CF2, CF3), and the passivation layer (PAS) may be formed. The pattern may be formed by laser drilling. The area formed by the laser drilling may be formed to have an angle of about 80 to about 90 degrees with respect to the bottom surface. Afterwards, the first anode electrode (ANO1) may be arranged to be connected to the second electrode (ME2) through the first contact hole (PT1) and the second contact hole (PT2), and the first connecting electrode (CE1) may be arranged to be connected to the fourth electrode (ME4) through the third contact hole (PT3) and the fourth contact hole (PT4).

[0091] Referring to FIG. 16, a pixel defining film (PDL) can be placed to fill a concave pattern (BW). Then, an opening can be formed in the pixel defining film (PDL) to expose a first connecting electrode (CE1) and a first anode electrode (ANO1). Then, as shown in FIG. 17, a first light-emitting layer (ML1), a cathode electrode (CATH), an adhesive layer (ADL), and a protective layer (PT) can be additionally formed.

[0092] Although the foregoing description refers to exemplary embodiments of the present invention, those skilled in the art will understand that various modifications and changes can be made to the present invention without departing from the spirit and scope of the invention as set forth in the following claims. Industrial applicability

[0093] The present invention can be applied to various display devices. For example, the present invention can be applied to various display devices such as display devices for vehicles, ships, and aircraft, portable communication devices, display devices for exhibition or information transmission, medical display devices, etc.

[0094] Although the present invention has been described above with reference to exemplary embodiments, those skilled in the art will understand that various modifications and changes can be made to the invention without departing from the spirit and scope of the invention as set forth in the following claims. Explanation of the symbols

[0095] DD: Display device DA: Display area NDA: Non-displayed area BML1, BML2: 1st and 2nd lower electrodes CCL1, CCL2, CCL3, CCL4: 1st to 4th color conversion layers BK: Bank layer BW: Concave pattern SSE1, SSE2, SSE3, SSE4: 1st to 4th power electrodes DRTR1, DTR2, DTR3, DTR4: 1st to 4th driving transistors ED1, ED2, ED3, ED4: First to fourth light-emitting elements SUB: Substrate IL1, IL2, IL3, IL4: 1st to 4th insulating layers BUF: Buffer layer PAS: Passivation layer CF1, CF2, CF3: 1st to 3rd color filters RL: Refractive layer ADL: Adhesive layer PT1, PT2, PT3, PT4, PT5, PT6, PT7, PT8: 1st to 8th contact holes PDL: Pixel Definition Layer PTL: Protective Layer

Claims

Claim 1 A display device comprising: a transistor substrate including a first transistor and a second transistor; a first color conversion layer and a second color conversion layer disposed on the transistor substrate; a bank layer disposed surrounding the first color conversion layer and the second color conversion layer and including a concave pattern; a first light-emitting element and a second light-emitting element disposed overlapping the first color conversion layer and the second color conversion layer on the first color conversion layer and the second color conversion layer and emitting light in the direction in which the first color conversion layer and the second color conversion layer are disposed; and a pixel defining film disposed surrounding the first light-emitting element and the second light-emitting element and filling the concave pattern, wherein the first light-emitting element and the second light-emitting element are each connected to the first transistor and the second transistor through a plurality of contact holes penetrating the bank layer, and the concave pattern is spaced apart from the plurality of contact holes in a plane. Claim 2 A display device according to claim 1, further comprising: a plurality of color filters disposed between the transistor substrate and the first color conversion layer, the second color conversion layer, and the bank layer; and a refractive layer disposed between the plurality of color filters and the first color conversion layer, the second color conversion layer, and the bank layer. Claim 3 A display device according to claim 2, wherein the plurality of color filters include an opening that exposes the transistor substrate in an area overlapping with the first color conversion layer. Claim 4 A display device according to claim 2, characterized in that the plurality of color filters are arranged to overlap each other in an area overlapping with the concave pattern. Claim 5 A display device according to claim 2, wherein the first color conversion layer comprises a scatterer, and the second color conversion layer further comprises quantum dots in the scatterer. Claim 6 A display device according to claim 2, wherein the first light-emitting element is connected to the first transistor through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate, and the second light-emitting element is connected to the second transistor through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate. Claim 7 A display device according to claim 6, characterized in that the first angle each of the first contact hole and the third contact hole has with respect to the lower surface of the bank layer is smaller than the second angle each of the second contact hole and the fourth contact hole has with respect to the upper surface of the transistor substrate. Claim 8 A display device according to claim 7, characterized in that the first angle is 60 to 80 degrees and the second angle is 80 to 90 degrees. Claim 9 A display device according to claim 2, wherein the transistor substrate further comprises a first voltage electrode connected to the first light-emitting element and a second voltage electrode connected to the second light-emitting element, wherein the first light-emitting element is connected to the first voltage electrode through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate, and the second light-emitting element is connected to the second voltage electrode through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters and the transistor substrate. Claim 10 A display device according to claim 9, characterized in that the first angle each of the first contact hole and the third contact hole has with respect to the lower surface of the bank layer is smaller than the second angle each of the second contact hole and the fourth contact hole has with respect to the upper surface of the transistor substrate. Claim 11 A display device according to claim 10, characterized in that the first angle is 60 to 80 degrees and the second angle is 80 to 90 degrees. Claim 12 A display device comprising: a transistor substrate including first to fourth transistors; a plurality of color filters disposed on the transistor substrate; a refractive layer disposed on the plurality of color filters; first to fourth color conversion layers disposed on the refractive layer; a bank layer disposed surrounding the first to fourth color conversion layers and having a concave pattern; first to fourth light-emitting elements disposed overlapping the first to fourth color conversion layers and emitting light in the direction in which the first to fourth color conversion layers are disposed; and a pixel defining film disposed surrounding the first to fourth light-emitting elements and filling the concave pattern, wherein the first to fourth light-emitting elements are each connected to the first to fourth transistors through a plurality of contact holes penetrating the bank layer, and the concave pattern is spaced apart from the plurality of contact holes in a plane. Claim 13 A display device according to claim 12, characterized in that the first to fourth light-emitting elements are arranged in a stripe shape on a planar view. Claim 14 A display device according to claim 12, characterized in that the first to fourth light-emitting elements are arranged in a diamond shape on a planar view. Claim 15 A display device according to claim 12, wherein the plurality of color filters include an opening that exposes the transistor substrate in an area overlapping with the first color conversion layer, and the plurality of color filters are arranged to overlap each other in an area overlapping with the concave pattern. Claim 16 A display device according to claim 12, wherein the first color conversion layer comprises a scatterer, and the second to fourth color conversion layers each further comprise quantum dots in the scatterer. Claim 17 A display device according to claim 12, wherein the first light-emitting element is connected to the first transistor through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; the second light-emitting element is connected to the second transistor through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; the third light-emitting element is connected to the third transistor through a fifth contact hole penetrating the bank layer and a sixth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate; and the fourth light-emitting element is connected to the fourth transistor through a seventh contact hole penetrating the bank layer and an eighth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate. Claim 18 A display device according to claim 17, wherein the first angle that each of the first contact hole, the third contact hole, the fifth contact hole, and the seventh contact hole has with respect to the upper surface of the bank layer is smaller than the second angle that each of the second contact hole, the fourth contact hole, the sixth contact hole, and the eighth contact hole has with respect to the upper surface of the transistor substrate, and wherein the first angle is 60 to 80 degrees and the second angle is 80 to 90 degrees. Claim 19 A display device according to claim 12, wherein the transistor substrate further comprises first to fourth voltage electrodes connected to the first to fourth light-emitting elements, wherein the first light-emitting element is connected to the first voltage electrode through a first contact hole penetrating the bank layer and a second contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate, the second light-emitting element is connected to the second voltage electrode through a third contact hole penetrating the bank layer and a fourth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate, the third light-emitting element is connected to the third voltage electrode through a fifth contact hole penetrating the bank layer and a sixth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate, and the fourth light-emitting element is connected to the fourth voltage electrode through a seventh contact hole penetrating the bank layer and an eighth contact hole penetrating the refractive layer, the plurality of color filters, and the transistor substrate. Claim 20 A display device according to claim 19, wherein the first angle that each of the first contact hole, the third contact hole, the fifth contact hole, and the seventh contact hole has with respect to the upper surface of the bank layer is smaller than the second angle that each of the second contact hole, the fourth contact hole, the sixth contact hole, and the eighth contact hole has with respect to the upper surface of the transistor substrate, and wherein the first angle is 60 to 80 degrees and the second angle is 80 to 90 degrees.

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