Packaging substrate and semiconductor package comprising the same

Abstract

A packaging substrate according to an embodiment comprises a core layer, a first electrically conductive layer disposed in contact with the upper surface of the core layer, and an adhesion reinforcing layer disposed on the core layer and surrounding at least a portion of the upper surface of the first electrically conductive layer. The adhesion reinforcing layer comprises any one selected from the group consisting of silicon-based compounds, acrylic-based compounds, and combinations thereof. The Ra value, which is the arithmetic mean roughness of the upper surface of the first electrically conductive layer, is 150 nm or less. In this case, the adhesion of the insulating layer to the first electrically conductive layer can be effectively improved without excessively roughening the first electrically conductive layer.

Description

Technology Field

[0001] An embodiment relates to a packaging substrate and a semiconductor package including the same. Background Technology

[0003] In the production of electronic components, implementing circuits on a semiconductor wafer is called the front-end process (FE), and assembling the wafer into a state usable in an actual product is called the back-end process (BE), and the packaging process is included in the back-end process.

[0004] The four core technologies of the semiconductor industry that have enabled the rapid development of electronic products in recent years are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. While semiconductor technology is evolving into various forms, such as sub-micron and nano-scale linewidths, over ten million cells, high-speed operation, and significant heat dissipation, the technology to perfectly package these technologies has not yet been sufficiently supported. Consequently, the electrical performance of semiconductors is sometimes determined by packaging technology and the resulting electrical connections, rather than by the performance of the semiconductor technology itself.

[0005] Ceramic or resin is used as the material for packaging substrates. In the case of ceramic substrates, it is difficult to mount high-performance, high-frequency semiconductor devices due to high resistance or dielectric constant. While resin substrates allow for the mounting of relatively high-performance, high-frequency semiconductor devices, there are limitations in reducing the wiring pitch.

[0006] Recently, research is underway on applying silicon or glass as packaging substrates for high-end applications. By forming through-holes in silicon or glass substrates and applying conductive materials to these holes, the wiring length between the device and the motherboard can be shortened, and superior electrical characteristics can be achieved. Prior art literature

[0007] Korean Published Patent No. 10-2021-0127188 The problem to be solved

[0008] The objective of the embodiment is to provide a packaging substrate that improves the adhesion between the electrically conductive layer and the insulating layer without excessively roughening the electrically conductive layer. means of solving the problem

[0010] A packaging substrate according to one embodiment of the present specification comprises a core layer, a first electrically conductive layer disposed in contact with the upper surface of the core layer, and an adhesion reinforcing layer disposed on the core layer and surrounding at least a portion of the upper surface of the first electrically conductive layer.

[0011] The above-mentioned adhesion reinforcing layer comprises any one selected from the group consisting of silicone-based compounds, acrylic-based compounds, and combinations thereof.

[0012] The Ra value, which is the arithmetic mean roughness of the upper surface of the first electrically conductive layer, is 150 nm or less.

[0013] The above silicon-based compound may include a silicon resin.

[0014] The Ry value, which is the maximum height roughness of the upper surface of the first electrically conductive layer, may be 200 nm or less.

[0015] The above core layer may be a glass core layer.

[0016] The upper surface of the core layer may include an exposed area in which the first electrically conductive layer is not formed.

[0017] The above-mentioned adhesion reinforcing layer may be disposed in contact with at least a portion of the above-mentioned exposed area.

[0018] The above core layer may include a cavity portion, which is an area where a component is mounted inside.

[0019] The above cavity portion may include an opening disposed on the upper surface side of the core layer, an inner surface of the cavity formed extending from the opening in the thickness direction of the core layer, and a device mounting space surrounded by the inner surface of the cavity.

[0020] The above packaging substrate may include a device disposed in the device mounting space.

[0021] The above-mentioned attachment reinforcing layer may be disposed in contact with at least a portion of the upper surface of the element.

[0022] The thickness of the above-mentioned adhesion reinforcing layer may be 1㎛ to 25㎛.

[0023] The above packaging substrate may include an insulating layer disposed in contact with the above attachment reinforcing layer.

[0024] The above packaging substrate may include a multilayer insulating layer comprising the attachment reinforcing layer and the insulating layer.

[0025] The adhesion strength between the first electrically conductive layer and the multilayer insulating layer may be 300 gf / cm or more.

[0026] A method for manufacturing a packaging substrate according to another embodiment of the present specification comprises a preparation step of preparing a pre-substrate comprising a core layer and a first electrically conductive layer disposed in contact with the upper surface of the core layer; an attachment reinforcing layer forming step of forming an attachment reinforcing layer surrounding at least a portion of the upper surface of the first electrically conductive layer; and a manufacturing step of manufacturing a packaging substrate from the pre-substrate on which the attachment reinforcing layer is formed.

[0027] The surface roughness Ra value of the upper surface of the first electrically conductive layer is 150 nm or less.

[0028] The above-mentioned adhesion reinforcing layer comprises any one selected from the group consisting of silicone-based compounds, acrylic-based compounds, and combinations thereof.

[0029] The above preparation step may include a surface roughness control process for controlling the roughness of the upper surface of the first electrically conductive layer.

[0030] The above step of forming an adhesion reinforcing layer may include a placement process of placing a composition for manufacturing an adhesion reinforcing layer to surround at least a portion of the upper surface of the first electrically conductive layer, and a heat treatment process of heat-treating the composition for manufacturing an adhesion reinforcing layer to form an adhesion reinforcing layer.

[0031] The above manufacturing step may include an insulating layer forming process that forms an insulating layer disposed in contact with the upper surface of the attachment reinforcing layer. Effects of the invention

[0033] The embodiment can improve the adhesion between the electrically conductive layer and the insulating layer without excessively roughening the electrically conductive layer in the packaging substrate. Brief explanation of the drawing

[0035] FIG. 1 is a cross-sectional view illustrating a packaging substrate according to one embodiment of the embodiment. FIG. 2 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the embodiment. FIG. 3 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the embodiment. Specific details for implementing the invention

[0036] Hereinafter, embodiments are described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present invention. However, the present invention may be embodied in various different forms and is not limited to the embodiments described herein. Throughout the specification, similar parts are denoted by the same reference numerals.

[0037] Throughout this specification, the term “combination thereof” included in the Markush-type expression means one or more mixtures or combinations selected from the group consisting of the components described in the Markush-type expression, and means including one or more selected from the group consisting of said components.

[0038] Throughout this specification, terms such as “first,” “second,” or “A,” “B” are used to distinguish identical terms from one another. Additionally, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0039] In this specification, the “~” system may mean that the compound contains a compound corresponding to “~” or a derivative of “~”.

[0040] In this specification, the meaning that B is located on A means that B is located in direct contact with A or that B is located on A with another layer located between them, and is not interpreted as being limited to B being located in contact with the surface of A.

[0041] In this specification, the meaning of being connected to B on A means that A and B are directly connected or connected through other components between A and B, and unless otherwise specifically stated, it is not interpreted as being limited to a direct connection between A and B.

[0042] In this specification, singular expressions are interpreted to include singular or plural forms as interpreted in context unless otherwise specified.

[0043] In this specification, the shapes, relative sizes, angles, etc., of each component in the drawings are exemplary and may be exaggerated for illustrative purposes, and the rights are not interpreted as being limited to the drawings.

[0044] In this specification, "A and B are adjacent" means that A and B are located in contact with each other, or that A and B are located close to each other even if they are not in contact. Unless otherwise specified, the expression "A and B are adjacent" in this specification is not interpreted as being limited to A and B being in contact with each other.

[0045] Unless otherwise specified in this specification, the physical property values ​​of each component within the packaging substrate are interpreted as being measured at room temperature. Room temperature is 20°C to 25°C.

[0047] The following describes specific examples of implementation.

[0049] FIG. 1 is a cross-sectional view illustrating a packaging substrate according to one embodiment of an embodiment. Hereinafter, an embodiment will be described with reference to FIG. 1.

[0051] A packaging substrate (100) according to an embodiment comprises a core layer (10), a first electrically conductive layer (20) disposed in contact with the upper surface of the core layer (10), and an attachment reinforcing layer (30) disposed on the core layer (10) and surrounding at least a portion of the upper surface of the first electrically conductive layer (20).

[0053] core layer

[0054] The core layer (10) may have the shape of a substrate. A substrate applicable in the field of packaging substrates may be applied as the core layer (10).

[0055] The core layer (10) may include a through via (not shown) penetrating in the thickness direction of the core layer (10).

[0056] A through-via consists of an internal space (not shown) and a via inner diameter surface (not shown) surrounding the internal space. The internal space is an empty space, and the via inner diameter surface refers to the surface of a core layer (10) formed inside the through-via.

[0057] The through via may have a diameter that varies in the thickness direction of the core layer (10). The through via may have a diameter that is virtually uniform in the thickness direction of the core layer (10).

[0058] The surface of the core layer (10) may include an upper surface and a side surface formed in the thickness direction of the core layer (10) connected to the upper surface. The surface of the core layer (10) may include a lower surface facing the upper surface.

[0059] The statement that the above side is formed in the thickness direction of the core layer (10) is interpreted to mean that the above side is not only perpendicular to the upper surface of the core layer (10), but also includes at least a portion of the above side forming an angle other than 90 degrees (angle of inclination) with respect to the upper surface.

[0060] The above side may be a flat surface or a curved surface.

[0061] The core layer (10) may be a glass core layer. The glass core layer may have properties suitable for implementing an electrically conductive layer having a fine pitch.

[0062] The glass core layer may have the shape of a glass substrate. The glass core layer may be, for example, alkali borosilicate plate glass, alkali-free borosilicate plate glass, alkali-free alkaline earth borosilicate plate glass, etc., and any plate glass used for electronic components may be used. The glass core layer may be a glass substrate for electronic devices, and for example, may be manufactured by Schott, AGC, Corning, etc., but is not limited thereto.

[0063] The thickness of the core layer (10) may be 100 μm or more. The thickness may be 200 μm or more. The thickness may be 300 μm or more. The thickness may be 3000 μm or less. The thickness may be 2000 μm or less. The thickness may be 1000 μm or less. In this case, the core layer (10) may have mechanical properties suitable for application to a packaging substrate (100).

[0065] electrical conductive layer

[0066] The packaging substrate (100) may include an electrically conductive layer disposed on a core layer (10). The electrically conductive layer may include a first electrically conductive layer (20) disposed in contact with the upper surface of the core layer (10) and a second electrically conductive layer (not shown) disposed on the first electrically conductive layer (20).

[0067] An electrically conductive layer is a conductor that transmits electrical signals. An electrically conductive layer can have a patterned shape.

[0068] The electrically conductive layer may include an electrically conductive material. The electrically conductive layer may have a structure of one or more layers. The electrically conductive layer may include a seed layer (not shown) and a conductive layer (not shown) formed on the seed layer.

[0069] A seed layer may be disposed between the upper surface of the core layer (10) or an insulating layer (not shown) and a conductive layer to improve the adhesion of the electrically conductive layer to the upper surface of the core layer (10). The seed layer may include a first seed layer disposed in contact with the upper surface of the core layer (10) or an insulating layer, and a second seed layer disposed on the first seed layer. The first seed layer may be made of a material different from the material applied to the conductive layer. For example, the first seed layer may include titanium, chromium, nickel, etc. The second seed layer may be made of the same material as the material applied to the conductive layer. For example, the second seed layer may include copper.

[0070] The conductive layer may function as a channel for transmitting a signal within the packaging substrate (100). The conductive layer may include at least one of copper, nickel, aluminum, gold, or silver. Copper or the like may be applied as the material of the conductive layer.

[0071] The first electrically conductive layer (20) may include an upper surface. The Ra value, which is the arithmetic mean roughness of the upper surface of the first electrically conductive layer (20), may be 40 nm or less.

[0072] Roughening the surface of the electrically conductive layer can be considered to enhance adhesion between the electrically conductive layer and the insulating layer. However, if high-frequency power is applied to an electrically conductive layer that has been roughened beyond a certain level, the resistance of the electrically conductive layer may increase excessively due to the skin effect.

[0073] In an embodiment, the surface roughness characteristics of the upper surface of the electrically conductive layer, particularly the first electrically conductive layer (20), can be adjusted to a level below a certain level, and an adhesion reinforcing layer (30), which will be described in detail below, can be introduced. Through this, a sufficient amount of the adhesion reinforcing layer is maintained on the upper surface of the first electrically conductive layer (20), thereby improving the adhesion between the first electrically conductive layer (20) and the insulating layer, and providing a first electrically conductive layer (20) suitable for high-frequency power.

[0074] The Ra value, which is the arithmetic mean roughness of the upper surface of the first electrical conductive layer (20), may be 150 nm or less. The Ra value may be 120 nm or less. The Ra value may be 100 nm or less. The Ra value may be 25 nm or more. The Ra value may be 35 nm or more. The Ra value may be 45 nm or more.

[0075] The Ry value, which is the maximum height roughness of the upper surface of the first electrical conductive layer (20), may be 200 nm or less. The Ry value may be 180 nm or less. The Ry value may be 160 nm or less. The Ry value may be 20 nm or more.

[0076] In this case, the first electrical conductive layer (20) can smoothly transmit signals even when high-frequency power is applied.

[0077] The above Ra and Ry values ​​are measured in accordance with the provisions of the standard ISO4287:1997.

[0078] The thickness of the first electrically conductive layer (20) may be 10㎛ or more. The thickness may be 15㎛ or more. The thickness may be 20㎛ or more. The thickness may be 50㎛ or less.

[0079] The width of the first electrically conductive layer (20) may be 10㎛ or more. The width may be 15㎛ or more. The width may be 20㎛ or more. The width may be 50㎛ or less.

[0080] In this case, the packaging substrate (100) can help to have high integration and stable electrical reliability.

[0081] The packaging substrate (100) may include a second electrically conductive layer disposed on the first electrically conductive layer (20). In terms of composition, roughness, and layer structure, the second electrically conductive layer may be the same as the first electrically conductive layer (20). The description of the composition, roughness, and layer structure of the second electrically conductive layer is omitted as it overlaps with the preceding content.

[0082] The thickness and / or width of the second electrically conductive layer may each be smaller than or equal to the first electrically conductive layer (20). The thickness and / or width of the second electrically conductive layer may each be smaller than the first electrically conductive layer (20). In this case, a packaging substrate (100) that can be easily electrically connected to a device may be provided.

[0083] The packaging substrate (100) may further include a third electrically conductive layer, which is an electrically conductive layer disposed under the core layer (10). The description of the composition, roughness, and layer structure of the third electrically conductive layer is omitted as it overlaps with the preceding content.

[0084] The thickness and / or width of the third electrically conductive layer may each be greater than or equal to the first electrically conductive layer (20). The thickness and / or width of the third electrically conductive layer may each be greater than the first electrically conductive layer (20). In this case, the packaging substrate (100) can perform seamless signal transmission with the motherboard.

[0086] Adhesion reinforcement layer

[0087] In an embodiment, an adhesion reinforcing layer (30) may be introduced on the upper surface side of the first electrically conductive layer (20). The adhesion reinforcing layer (30) may be placed between the first electrically conductive layer (20) and the insulating layer. The adhesion reinforcing layer (30) may enable the insulating layer to have stable adhesion to the first electrically conductive layer (20) even if the first electrically conductive layer (20) has a relatively smooth surface.

[0088] The attachment reinforcing layer (30) may be placed on the core layer (10). The attachment reinforcing layer (30) may surround at least a portion of the upper surface of the first electrically conductive layer (20). The attachment reinforcing layer (30) may surround the upper surface of the first electrically conductive layer (20). The attachment reinforcing layer (30) may surround at least a portion of the side surface of the first electrically conductive layer (20). The attachment reinforcing layer (30) may surround the side surface of the first electrically conductive layer (20).

[0089] The attachment reinforcing layer (30) may be in contact with the first electrically conductive layer (20) and surround the first electrically conductive layer (20). The attachment reinforcing layer (30) may be spaced apart from the first electrically conductive layer (20) and surround the first electrically conductive layer (20).

[0090] An embodiment may further include an adhesion reinforcing layer (30) introduced on the upper surface side of the second electrically conductive layer. The adhesion reinforcing layer (30) may be disposed between the second electrically conductive layer and the insulating layer. In this case, the insulating layer may exhibit stable adhesion to the second electrically conductive layer without excessive roughening of the second electrically conductive layer.

[0091] The attachment reinforcing layer (30) may surround at least a portion of the upper surface of the second electrically conductive layer. The attachment reinforcing layer (30) may surround the upper surface of the second electrically conductive layer. The attachment reinforcing layer (30) may surround at least a portion of the side surface of the second electrically conductive layer. The attachment reinforcing layer (30) may surround the side surface of the second electrically conductive layer.

[0092] The attachment reinforcing layer (30) may surround the second electrically conductive layer by being in contact with it. The attachment reinforcing layer (30) may surround the second electrically conductive layer while being spaced apart from it.

[0093] The attachment reinforcing layer (30) formed in contact with the second electrically conductive layer may be placed on the attachment reinforcing layer (30) formed in contact with the first electrically conductive layer (20). The attachment reinforcing layer (30) formed in contact with the second electrically conductive layer may form a separate layer separated from the attachment reinforcing layer (30) formed in contact with the first electrically conductive layer (20).

[0094] The upper surface of the core layer (10) may include an exposed area (EA) in which the first electrically conductive layer (20) is not formed. An attachment reinforcing layer (30) may be disposed in contact with at least a portion of the exposed area (EA).

[0095] The upper surface of the core layer (10) may have low roughness characteristics for the precise implementation of a fine pattern. In this case, a sufficient level of anchoring effect may not occur at the part formed where the core layer (10) and the insulating layer are in contact, and the insulating layer may not exhibit sufficient adhesion to the upper surface of the core layer (10).

[0096] An embodiment may place the attachment reinforcing layer (30) in contact with at least a portion of the exposed area (EA) to help the insulating layer be stably maintained on the exposed area (EA).

[0097] The adhesion reinforcing layer (30) may be placed in contact with at least a portion of the exposed area (EA). The adhesion reinforcing layer (30) may be placed in contact with the exposed area (EA).

[0098] An attachment reinforcing layer (30) disposed in contact with at least a portion of the exposed area (EA) can be connected to an attachment reinforcing layer (30) surrounding at least a portion of the upper surface of the first electrically conductive layer (20) to form a single layer. An attachment reinforcing layer (30) disposed in contact with at least a portion of the exposed area (EA) can be formed so as not to be connected to an attachment reinforcing layer (30) surrounding at least a portion of the upper surface of the first electrically conductive layer (20).

[0100] FIG. 2 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the embodiment. Hereinafter, an embodiment will be described with reference to FIG. 2.

[0101] A packaging substrate (100) comprises a core layer (10), a first electrically conductive layer (20) disposed in contact with the upper surface of the core layer (10), and an adhesion reinforcing layer (30) disposed on the core layer (10) and surrounding at least a portion of the upper surface of the first electrically conductive layer (20). Regarding the components of the packaging substrate (100), those described in FIG. 1 above apply as they are. The following description focuses on the parts that differ.

[0103] The core layer (10) may include a cavity portion (11), which is a space in which a device is mounted. The cavity portion (11) may include an opening (111) disposed on the upper side of the core layer (10), an inner cavity surface (112) formed extending from the opening (111) in the thickness direction of the core layer (10), and a device mounting space (113) surrounded by the inner cavity surface (112).

[0104] The statement that the inner surface of the cavity (112) is formed in the thickness direction of the core layer (10) is interpreted to mean that the inner surface of the cavity (112) is not only perpendicular to the upper surface of the core layer (10), but also that at least a portion of the inner surface of the cavity (112) is formed at an angle other than 90 degrees to the upper surface (angle of inclination).

[0105] The inner surface (112) of the cavity may be flat or curved.

[0106] The device mounting space (113) may be a space formed by a portion of the upper surface being indented in the thickness direction when the core layer (10) is observed from the upper surface side. The device mounting space (113) may have a shape that penetrates the core layer (10) in the thickness direction. The device mounting space (113) may have a shape in which a portion of the core layer (10) is indented in the thickness direction of the core layer (10).

[0107] A device (40) can be mounted in the device mounting space (113) so that the packaging substrate (100) and the device (40) can be electrically connected. The device (40) may be a semiconductor device such as a CPU, GPU, or memory chip, as well as a capacitor device, transistor device, impedance device, or other module. In other words, any semiconductor device mounted on a semiconductor device can be applied without limitation.

[0108] In an embodiment, an attachment reinforcing layer (30) can be formed on the upper surface side of the device (40). Through this, the insulating layer can be stably maintained on the cavity portion (11), and the packaging substrate (100) can contribute to having stable electrical reliability.

[0109] The attachment reinforcing layer (30) may be disposed in contact with at least a portion of the upper surface of the element (40). The attachment reinforcing layer (30) disposed in contact with at least a portion of the upper surface of the element (40) may be connected to the attachment reinforcing layer (30) surrounding at least a portion of the upper surface of the first electrically conductive layer (20) to form a single layer. The attachment reinforcing layer (30) disposed in contact with at least a portion of the upper surface of the element (40) may be formed to be separated from the attachment reinforcing layer (30) surrounding at least a portion of the upper surface of the first electrically conductive layer (20). The attachment reinforcing layer (30) disposed in contact with at least a portion of the upper surface of the element (40) may be connected to the attachment reinforcing layer (30) surrounding at least a portion of the exposed area (EA) to form a single layer. An attachment reinforcing layer (30) disposed in contact with at least a portion of the upper surface of the element (40) can be formed to be separated from an attachment reinforcing layer (30) surrounding at least a portion of the exposed area (EA).

[0110] The adhesion reinforcing layer (30) may include any one selected from the group consisting of silicone-based compounds, acrylic-based compounds, and combinations thereof. When the adhesion reinforcing layer (30) with such a composition is placed in contact with the insulating layer in a high-temperature environment, a chemical bond may be formed with the insulating layer. This can contribute to further improving the adhesion of the insulating layer to the electrically conductive layer.

[0111] Silicone-based compounds may include silicone resins. Silicone-based compounds may be silicone resins. Silicone resins may be formed by curing silicone adhesives. Silicone resins may be formed by curing silane compounds. Silicone resins may be formed by curing a mixture of silicone adhesives and silane compounds.

[0112] The silicone adhesive may be a peroxide-curing silicone adhesive. The silicone adhesive may be an addition-reaction silicone adhesive. Peroxide-curing silicone adhesives and addition-reaction silicone adhesives are not limited to those that are commonly applicable in the field of adhesive or bonding technology. For example, peroxide-curing silicone adhesives may include DOWSIL SH 4280 from Dow and KR-100 from Shin-Etsu. For example, addition-reaction silicone adhesives may include DOWSIL 4585 from Dow and KR-3700 from Shin-Etsu.

[0113] Silicon-based compounds may include silane compounds. The silane compound may be a silane coupling agent, or it may be a silane coupling agent with added functional groups.

[0114] For example, the silane compound may include, for example, a methoxy group and / or an ethoxy group at one end. Additionally, the silane compound may include an amino group, a vinyl group, an epoxy group, a methacryloxy group, an acryloxy group, a ureido group, a mercapto group, a sulfido group, or an isocyanate group at the other end.

[0115] The acrylic compound may include an acrylic resin. The acrylic compound may be an acrylic resin. The acrylic compound may be formed by curing a compound comprising any one selected from the group consisting of an acrylic monomer, an acrylic prepolymer, an acrylic resin, and combinations thereof. The acrylic prepolymer may include an acrylate residue. The acrylic resin may include an acrylate residue. The acrylate monomer may be any one selected from the group consisting of an acrylate compound, a methacrylate compound, an alkyl group-containing acrylate compound, an alkyl group-containing methacrylate compound, a hydroxyl group-containing acrylate compound, a hydroxyl group-containing methacrylate compound, a siloxane-modified acrylate compound, a siloxane-modified methacrylate compound, and combinations thereof. Acrylate residues may be derived from any one selected from the group consisting of acrylate compounds, methacrylate compounds, alkyl group-containing acrylate compounds, alkyl group-containing methacrylate compounds, hydroxyl group-containing acrylate compounds, hydroxyl group-containing methacrylate compounds, siloxane-modified acrylate compounds, siloxane-modified methacrylate compounds, and combinations thereof.

[0116] The thickness of the adhesion reinforcing layer (30) may be 1 μm to 25 μm. The thickness may be 3 μm or more. The thickness may be 5 μm or more. The thickness may be 10 μm or more. The thickness may be 20 μm or less. In this case, it can help maintain the adhesion between the insulating layer and the first electrically conductive layer (20), etc., at a certain level or higher.

[0118] insulating layer

[0119] FIG. 3 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the embodiment. Hereinafter, the embodiment will be described with reference to FIG. 3.

[0120] A packaging substrate (100) comprises a core layer (10), a first electrically conductive layer (20) disposed in contact with the upper surface of the core layer (10), and an adhesion reinforcing layer (30) disposed on the core layer (10) and surrounding at least a portion of the upper surface of the first electrically conductive layer (20). Regarding the components of the packaging substrate (100), those described in FIGS. 1 and 2 above apply as they are. The following description focuses on the parts that differ.

[0122] The packaging substrate (100) may further include an insulating layer (50) disposed on the first electrically conductive layer (20). The insulating layer (50) may be disposed in contact with the attachment reinforcing layer (30). Through this, the insulating layer (50) can be stably fixed to the first electrically conductive layer (20), which has a relatively smooth surface.

[0123] The insulating layer (50) may surround a portion of the first electrically conductive layer (20). The insulating layer (50) may surround at least a portion of the upper surface of the first electrically conductive layer (20). The insulating layer (50) may surround at least a portion of the side surface of the first electrically conductive layer (20).

[0124] The insulating layer (50) and the first electrically conductive layer (20) may be arranged in a mixed manner on the core layer (10). The first electrically conductive layer (20) having a pattern shape may be formed in a form embedded within the insulating layer (50).

[0125] The insulating layer (50) may surround at least a portion of the second electrically conductive layer. The insulating layer (50) may surround at least a portion of the upper surface of the second electrically conductive layer. The insulating layer (50) may surround at least a portion of the side surface of the second electrically conductive layer.

[0126] The second electrically conductive layer may be arranged in combination with the insulating layer (50). The second electrically conductive layer having a pattern shape may be formed in a form embedded within the insulating layer (50).

[0127] The packaging substrate (100) of the embodiment may further include an insulating layer (50) disposed below the core layer (10). The insulating layer (50) may surround at least a portion of the third electrically conductive layer. The insulating layer (50) may surround at least a portion of the upper surface of the third electrically conductive layer. The insulating layer (50) may surround at least a portion of the side surface of the third electrically conductive layer.

[0128] The third electrically conductive layer may be arranged in combination with the insulating layer (50). The third electrically conductive layer having a pattern shape may be formed in a form embedded within the insulating layer (50).

[0129] The insulating layer (50) is not limited to any material that can be conventionally applied in the field of packaging substrates. The insulating layer (50) may, for example, be an epoxy resin containing a filler. The insulating layer (50) may, for example, be formed using a build-up layer material such as Ajinomoto Build-up Film (ABF), an undercoat material, etc., but is not limited thereto.

[0130] The insulating layer (50) can be formed by laminating an uncured or semi-cured insulating film and then curing it.

[0131] The packaging substrate (100) may include a multilayer insulating layer comprising an adhesion reinforcing layer (30) and an insulating layer (50). The packaging substrate (100) may include a multilayer insulating layer composed of an adhesion reinforcing layer (30) and an insulating layer (50). The adhesion strength between the first electrically conductive layer (20) and the multilayer insulating layer may be 300 gf / cm or more. The adhesion strength may be 350 gf / cm or more. The adhesion strength may be 400 gf / cm or more. The adhesion strength may be 450 gf / cm or more. The adhesion strength may be 500 gf / cm or more. The adhesion strength may be 550 gf / cm or more. The adhesion strength may be 600 gf / cm or more. The adhesion strength may be 650 gf / cm or more. The adhesion strength may be 1500 gf / cm or less. In this case, a packaging substrate (100) having excellent durability and electrical reliability can be provided.

[0132] The adhesion strength between the first electrically conductive layer (20) and the multilayer insulating layer is measured using a bond tester according to a 180° peel test. The measurement speed (peeling speed) is set to 10 mm / s, and the measurement distance (peeling distance) is set to 70 mm. For example, the adhesion strength value can be measured using a Condor Sigma bond tester from XYZ TEC.

[0134] Other components

[0135] The packaging substrate (100) may further include a through electrode (not shown) disposed within a through-via. The through electrode may electrically connect the first electrically conductive layer (20) and the third electrically conductive layer. The through electrode may be made of the same material and layer structure as the electrically conductive layer. The through electrode may have a shape that completely fills the through-via and may have a thin film shape that contacts the inner diameter surface within the through-via.

[0136] In an embodiment, an upper surface connection electrode (not shown) that electrically connects the device and the second electrically conductive layer may be disposed on the upper side of the packaging substrate (100) as needed. The upper surface connection electrode may be directly connected to the device through terminals, etc. The upper surface connection electrode may be connected to the device through a device connection part such as a solder ball.

[0137] In an embodiment, a lower surface connection electrode (not shown) that electrically connects the motherboard and the third electrically conductive layer may be placed on the lower side of the packaging substrate (100) as needed. The lower surface connection electrode may be directly connected to the motherboard through a terminal, etc. The lower surface connection electrode may be connected to the motherboard through a connection part such as a bump.

[0138] In an embodiment, a bump (not shown) may be placed in a predetermined shape under the third electrically conductive layer as needed. The bump may be placed in a portion of the lower surface of the packaging substrate (100) so as to come into contact with the motherboard, etc.

[0140] semiconductor package

[0141] A semiconductor package according to another embodiment of the example includes a packaging substrate and a device electrically connected to the packaging substrate.

[0142] The packaging substrate can be mounted on the main board and electrically connected to the main board.

[0143] The same packaging substrates and devices as those described above may be used. The description of the packaging substrates and devices is omitted as it overlaps with the previous content.

[0145] Method for manufacturing a packaging substrate

[0146] A method for manufacturing a packaging substrate according to another embodiment of the embodiment comprises a preparation step of preparing a pre-substrate comprising a core layer and a first electrically conductive layer disposed in contact with the upper surface of the core layer; an attachment reinforcing layer forming step of forming an attachment reinforcing layer surrounding at least a portion of the upper surface of the first electrically conductive layer; and a manufacturing step of manufacturing a packaging substrate from the pre-substrate on which the attachment reinforcing layer is formed.

[0147] The surface roughness Ra value of the upper surface of the first electrically conductive layer is 40 nm or less.

[0148] The above adhesion reinforcing layer includes a silicon-based compound.

[0149] In the preparation stage, a preliminary substrate in which a first electrically conductive layer is already formed can be prepared, and a preliminary substrate can be prepared by forming a first electrically conductive layer on a core layer.

[0150] The description of the core layer and the first electrically conductive layer is omitted as it overlaps with the preceding content.

[0151] The first electrically conductive layer can be provided by forming a first seed layer on the upper surface of the core layer, forming a second seed layer on the first seed layer, and forming a conductive layer on the second seed layer.

[0152] The method of forming a seed layer on a core layer is not limited to any method commonly applied in the field of packaging substrates. For example, the seed layer can be formed through PVD (Physical Vapor Deposition), sputtering, electroless plating, etc.

[0153] The description of the first and second seed layers is omitted as it overlaps with the preceding content.

[0154] A conductive layer can be formed by performing a plating process on the second seed layer. The plating process is not limited to any method commonly used in the packaging substrate field. For example, an electroless plating process may be applied as the plating process.

[0155] The explanation of the challenge layer is omitted as it overlaps with the previous content.

[0156] Before forming the conductive layer, the seed layer can be patterned. Specifically, after forming a resist film on the seed layer, the resist film can be developed according to a pre-designed pattern shape, and the conductive layer can be formed through a plating process. The resist film and the development of the resist film are not limited as long as they are those commonly used in the field of packaging substrates.

[0157] Afterwards, the formation of the first electrically conductive layer can be completed by removing the developed resist film and removing the seed layer present in the region where the conductive layer is not formed. The seed layer can be removed by etching.

[0158] The preparation step may include a surface roughness control process for controlling the roughness of the upper surface of the first electrically conductive layer. During the surface roughness control process, the upper surface of the first electrically conductive layer may be adjusted to have a roughness within a preset range in the embodiment. Through this, the degree of resistance increase of the first electrically conductive layer due to the application of high-frequency power can be mitigated while contributing to the improvement of adhesion between the insulating layer and the first electrically conductive layer.

[0159] In the surface roughness control process, a method of oxidizing and reducing the upper surface of the first electrically conductive layer can be applied. For example, the roughness can be controlled by applying Atotech’s Novabond product to oxidize and reduce the upper surface of the first electrically conductive layer.

[0160] In the process of controlling surface roughness, the upper surface of the first electrically conductive layer can be etched. Wet etching and dry etching can be applied for the etching.

[0161] The description of the surface roughness of the upper surface of the first electrically conductive layer, adjusted through the surface roughness control process, is omitted as it overlaps with the preceding content.

[0162] In the step of forming the adhesion reinforcement layer, the adhesion reinforcement layer may be formed to surround at least a portion of the upper surface of the first electrically conductive layer. In addition, in the step of forming the adhesion reinforcement layer, the adhesion reinforcement layer may be formed to contact at least a portion of the exposed area described above on the upper surface of the core layer. If the packaging substrate includes the cavity portion described above and a device mounted in said cavity portion, the adhesion reinforcement layer may be formed in the step of forming the adhesion reinforcement layer to be positioned in contact with at least a portion of the upper surface of the device.

[0163] The description of the location, shape, thickness, and composition of the adhesion reinforcement layer is omitted as it overlaps with the preceding content.

[0164] The step of forming an adhesion reinforcing layer may include a placement process of placing a composition for manufacturing an adhesion reinforcing layer that surrounds at least a portion of the upper surface of the first electrically conductive layer, and a heat treatment process of heat-treating the composition for manufacturing an adhesion reinforcing layer to form an adhesion reinforcing layer.

[0165] In the placement process, a multilayer film for manufacturing an adhesion reinforcing layer may be prepared in which a composition for manufacturing an adhesion reinforcing layer is placed on a release film. The composition for manufacturing an adhesion reinforcing layer may be placed by laminating the multilayer film on a pre-substrate such that the surface on which the composition for manufacturing an adhesion reinforcing layer is placed faces the upper surface of the first electrically conductive layer. However, the method of placing the composition for manufacturing an adhesion reinforcing layer is not limited thereto, and a method of forming an adhesion reinforcing layer by applying the composition for manufacturing an adhesion reinforcing layer to the upper surface of the first electrically conductive layer and then curing it may also be applied.

[0166] The composition for manufacturing an adhesion reinforcing layer may include a silicone adhesive. The composition for manufacturing an adhesion reinforcing layer may include a silane compound. The composition for manufacturing an adhesion reinforcing layer may include a silicone adhesive and a silane compound. Descriptions of the silicone adhesive and the silane compound are omitted as they overlap with the preceding content.

[0167] The composition for manufacturing an adhesion-reinforcing layer may include an acrylic compound. The acrylic compound may include any one selected from the group consisting of acrylic monomers, acrylic prepolymers, acrylic resins, and combinations thereof. Descriptions of acrylic monomers, acrylic prepolymers, and acrylic resins are omitted as they overlap with the preceding content.

[0168] The composition for manufacturing an adhesion-reinforcing layer may further include additives commonly applied in the field of adhesion and tackification. For example, the composition for manufacturing an adhesion-reinforcing layer may further include a curing agent, an antioxidant, a heat stabilizer, etc.

[0169] In the heat treatment process, by heat-treating a pre-substrate on which a composition for manufacturing an adhesion reinforcing layer is disposed to form an adhesion reinforcing layer, the effect of improving the adhesion strength of the adhesion reinforcing layer to the insulating layer can be further enhanced.

[0170] During the heat treatment process, the heat treatment temperature may be 100°C or higher. The heat treatment temperature may be 110°C or higher. The heat treatment temperature may be 120°C or higher. The heat treatment temperature may be 130°C or higher. The heat treatment temperature may be 250°C or lower.

[0171] During the heat treatment process, the heat treatment time may be 10 seconds or more. The heat treatment time may be 15 seconds or more. The heat treatment time may be 20 seconds or more. The heat treatment time may be 30 seconds or more. The heat treatment time may be 30 minutes or less. The heat treatment time may be 20 minutes or less. The heat treatment time may be 10 minutes or less.

[0172] In such cases, the adhesion strength of the adhesion reinforcing layer to the insulation layer can be further improved.

[0173] In the manufacturing stage, a packaging substrate can be manufactured from a pre-substrate on which an adhesion reinforcement layer is formed.

[0174] The manufacturing step may include an insulating layer formation process that forms an insulating layer in contact with the upper surface of the adhesion reinforcing layer.

[0175] An insulating layer can be formed by laminating a film for forming an insulating layer onto an adhesion-strengthening layer that has been heat-treated and then curing it, or by applying a composition for forming an insulating layer onto the adhesion-strengthening layer and then curing it.

[0176] The film for forming an insulating layer or the composition for forming an insulating layer is not limited to those commonly used in the build-up field. Specifically, the film for forming an insulating layer or the composition for forming an insulating layer may be an epoxy resin-based film or composition.

[0177] The insulating layer may be formed in contact with the upper surface of the adhesion reinforcing layer. The insulating layer may be formed to surround the upper surface of the core layer.

[0178] In an embodiment, a second electrically conductive layer may be formed on the insulating layer as needed. The second electrically conductive layer may be formed in the same manner as the first electrically conductive layer, except that a width and thickness of a pre-designed size are applied.

[0179] An adhesion reinforcing layer can be formed to surround at least a portion of the upper surface of the second electrically conductive layer. The adhesion reinforcing layer can be formed in the same manner as the method of forming an adhesion reinforcing layer to surround at least a portion of the upper surface of the first electrically conductive layer.

[0180] After forming an adhesion reinforcing layer on the second electrically conductive layer, an insulating layer disposed in contact with the upper surface of the adhesion reinforcing layer can be formed. The insulating layer can be formed in the same manner as described above.

[0181] If necessary, a third electrically conductive layer may be formed below the glass core layer, an adhesion reinforcing layer surrounding at least a portion of the upper surface of the third electrically conductive layer, and an insulating layer surrounding the adhesion reinforcing layer. The third electrically conductive layer may be formed in the same manner as the first electrically conductive layer and / or the second electrically conductive layer. However, in terms of width and / or thickness, the third electrically conductive layer may differ from the first electrically conductive layer or the second electrically conductive layer.

[0182] A method for manufacturing a packaging substrate may further include a process of forming connection terminals, bumps, a cover layer, etc., on the upper and / or lower surfaces of the packaging substrate, or mounting a device on the substrate.

[0184] The embodiments are described in more detail below through specific examples. The following examples are merely illustrative to aid in understanding the embodiments, and the scope of the embodiments is not limited thereto.

[0186] Manufacturing Example: Formation of a packaging substrate

[0187] Example 1: A first seed layer, which is a titanium layer with a thickness of 150 nm, was formed on a core layer, which is a glass substrate, via PVD, and a second seed layer, which is a copper layer with a thickness of 150 nm, was formed on the first seed layer via PVD. A first electrically conductive layer was formed by forming a conductive layer, which is a copper layer with a thickness of 30 μm, on the seed layer for forming the conductive layer through an electroless plating process.

[0188] A preliminary substrate was prepared by roughening the upper surface of the first electrically conductive layer using Atotech's Novabond product. Subsequently, the Ra value of the roughened upper surface of the first electrically conductive layer was measured according to the standard ISO 4287:1997. A polyimide tape, PI Carrier Adhesive Tape AS-020PI12 model from Nitto Denko, was attached to the roughened first electrically conductive layer.

[0189] After heat-treating a pre-substrate with an adhesion reinforcing layer formed thereon at 150°C for 30 seconds to 5 minutes, a polyimide film, which is a release film, was removed to form an adhesion reinforcing layer.

[0190] After laminating an Ajinomoto Corporation build-up layer onto an adhesion reinforcement layer, the insulating layer was formed by curing at 150°C for 60 minutes to complete the packaging substrate.

[0191] Example 2: A packaging substrate was manufactured under the same conditions as Example 1, except that the upper surface of the first electrically conductive layer was roughened with MAC’s CZ8101 model etching solution.

[0192] Example 3: A packaging substrate was prepared under the same conditions as Example 1, except that the upper surface of the first electrically conductive layer was not roughened and 3-methacryloxypropyltrimethoxysilane, a silane coupling agent, was vacuum deposited and coated to a thickness of 2 nm to 3 nm.

[0193] Comparative Example 1: A packaging substrate was manufactured under the same conditions as Example 1, except that no separate surface roughening or surface treatment using a compound was performed on the upper surface of the first electrically conductive layer.

[0195] The Ra values ​​measured from the upper surface of the first electrically conductive layer for each example and comparative example are listed in Table 1 below.

[0197] Evaluation Example: Evaluation of adhesion between the first electrically conductive layer and the multilayer insulating layer

[0198] The adhesion strength between the first electrically conductive layer and the multilayer insulating layer (composed of an adhesion reinforcing layer and an insulating layer) was measured using a Condor Sigma bond tester from XYZ TEC according to a 180° peel test. The measurement speed (peeling speed) was set to 10 mm / s, and the measurement distance (peeling distance) was set to 70 mm.

[0200] The measured values ​​for each example and comparative example are listed in Table 1 below.

[0202] Evaluation Example: Long-term durability evaluation

[0203] After leaving the packaging substrates for each example and comparative example at 150°C for 1000 hours, the peeling of the insulating layer on the core layer was evaluated. If no peeling of the insulating layer occurred, it was evaluated as P, and if peeling occurred, it was evaluated as F.

[0205] The measured values ​​for each example and comparative example are listed in Table 1 below.

[0207] Ra(nm) Adhesion (gf / cm) Durability evaluation Example 1 50~80 820 P Example 2 50~80 550 P Example 3 50~80 420 P Comparative Example 1 20 160 F

[0208] In Table 1 above, Examples 1 to 3 exhibited an adhesive strength of 400 gf / cm or more and were rated as P in the durability evaluation, whereas Comparative Example 1 exhibited an adhesive strength of 200 gf / cm or less and was rated as F in the durability evaluation. This is thought to be because, in the case of Comparative Example 1, the surface of the first electrically conductive layer was not roughened, so a sufficient amount of the adhesion reinforcing layer did not remain on the surface of the first electrically conductive layer, and as a result, the insulating layer was not stably adhered to the first electrically conductive layer.

[0210] Although preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention. Explanation of the symbols

[0212] 100: Packaging substrate 10: Core layer 11: Cavity 111: Opening 112: Inner surface of the cavity 113: Device mounting space 20: First electrical conductive layer 30: Adhesion reinforcement layer 40: Element 50: Insulating layer EA: Exposure Area

Claims

Claim 1 A packaging substrate comprising a core layer, a first electrically conductive layer disposed in contact with the upper surface of the core layer, and an adhesion reinforcing layer disposed on the core layer and surrounding at least a portion of the upper surface of the first electrically conductive layer, wherein the adhesion reinforcing layer comprises any one selected from the group consisting of a silicon-based compound, an acrylic-based compound, and combinations thereof, and the arithmetic mean roughness Ra value of the upper surface of the first electrically conductive layer is 150 nm or less, wherein the core layer comprises a cavity portion which is a region in which a device is mounted inside, wherein the cavity portion comprises an opening disposed on the upper surface side of the core layer, an inner surface of the cavity formed extending from the opening in the thickness direction of the core layer, and a device mounting space surrounded by the inner surface of the cavity, and a device disposed in the device mounting space, and wherein the adhesion reinforcing layer is disposed in contact with at least a portion of the upper surface of the device. Claim 2 In claim 1, the silicon-based compound comprises a silicon resin, forming a packaging substrate. Claim 3 A packaging substrate according to claim 1, wherein the Ry value, which is the maximum height roughness of the upper surface of the first electrically conductive layer, is 200 nm or less. Claim 4 A packaging substrate according to claim 1, wherein the core layer is a glass core layer, the upper surface of the core layer includes an exposed area in which the first electrically conductive layer is not formed, and the adhesion reinforcing layer is disposed in contact with at least a portion of the exposed area. Claim 5 delete Claim 6 A packaging substrate according to claim 1, wherein the thickness of the adhesion reinforcing layer is 1 μm to 25 μm. Claim 7 A packaging substrate according to claim 1, comprising an insulating layer disposed in contact with the attachment reinforcing layer. Claim 8 A packaging substrate according to claim 7, comprising a multilayer insulating layer including the adhesion reinforcing layer and the insulating layer, wherein the adhesion force between the first electrically conductive layer and the multilayer insulating layer is 300 gf / cm or more. Claim 9 A method for manufacturing a packaging substrate comprising: a preparation step of preparing a pre-substrate including a core layer and a first electrically conductive layer disposed in contact with the upper surface of the core layer; a step of forming an adhesion reinforcing layer that surrounds at least a portion of the upper surface of the first electrically conductive layer; and a manufacturing step of manufacturing a packaging substrate from the pre-substrate on which the adhesion reinforcing layer is formed, wherein the surface roughness Ra value of the upper surface of the first electrically conductive layer is 150 nm or less, and the adhesion reinforcing layer comprises any one selected from the group consisting of a silicon-based compound, an acrylic-based compound, and a combination thereof, and the core layer comprises a cavity portion which is an area in which a device is mounted inside, and the cavity portion comprises an opening disposed on the upper surface side of the core layer, an inner surface of the cavity formed extending from the opening in the thickness direction of the core layer, and a device mounting space surrounded by the inner surface of the cavity, and the packaging substrate comprises a device disposed in the device mounting space, and the adhesion reinforcing layer disposed in contact with at least a portion of the upper surface of the device. Claim 10 A method for manufacturing a packaging substrate according to claim 9, wherein the preparation step includes a surface roughness control process for controlling the roughness of the upper surface of the first electrically conductive layer. Claim 11 A method for manufacturing a packaging substrate according to claim 9, wherein the attachment reinforcement layer forming step comprises a placement process of placing a composition for manufacturing an attachment reinforcement layer to surround at least a portion of the upper surface of the first electrically conductive layer, and a heat treatment process of heat-treating the composition for manufacturing an attachment reinforcement layer to form an attachment reinforcement layer. Claim 12 A method for manufacturing a packaging substrate according to claim 9, wherein the manufacturing step comprises an insulating layer forming process that forms an insulating layer disposed in contact with the upper surface of the attachment reinforcing layer.

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