Packaging Substrate

Abstract

An embodiment relates to a packaging substrate, comprising: a glass wafer (20); a plurality of vias (25) disposed on the glass wafer (20); a copper electrode (40) disposed on the vias (25) or on the surface of the glass wafer (20); and an insulating layer (30) covering the vias (25) or the copper electrode (40). The above packaging substrate (100) contains P and Zn in the leached impurities, and the content of the leached impurities is the analysis value obtained by adding 70 mol% nitric acid to the packaging substrate (100) and pre-treating the graphite block at 200 degrees for 16 hours, and analyzing the analysis solution using an ICP-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) according to the KS M 0025:2008 test method, and the content of P (based on mass) is 1,500 ppb or less, and the content of Zn (based on mass) is 500 ppb or less. The packaging substrate of the embodiment can provide a packaging substrate with improved thermal stability, electrical stability, electrical conductivity, etc., by having a low content of leached impurities or having a content ratio of a specific impurity among these impurities within a certain range.

Description

Technology Field

[0001] An exemplary embodiment relates to a packaging substrate, etc. Background Technology

[0003] In the manufacture of electronic components, the process of forming circuits on a semiconductor wafer is called the Front-End (FE) process, and the process of assembling the formed wafer so that it can be used in an actual product is called the Back-End (BE) process. The packaging process is included in the Back-End process.

[0004] The four core technologies of the semiconductor industry that have enabled the rapid development of electronic products in recent years are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. While semiconductor technology is evolving into various forms, such as sub-micron and nano-scale linewidths, over ten million cells, high-speed operation, and significant heat dissipation, the technology to perfectly package them is not yet sufficiently supporting this. Consequently, the electrical performance of semiconductors is sometimes determined by packaging technology and the resulting electrical connections rather than by the performance of the semiconductor technology itself.

[0005] Ceramic or resin materials are used for packaging substrates. In the case of ceramic substrates, such as silicon substrates, it is difficult to mount high-performance, high-frequency semiconductor devices due to high resistance or dielectric constant. In the case of resin substrates, it is possible to mount relatively high-performance, high-frequency semiconductor devices. However, there are limitations in reducing the wiring pitch.

[0006] Recently, glass substrates can be applied as substrates for high-end packaging. By forming through-holes in the glass substrate and applying conductive materials to these through-holes, the wiring length between the device and the motherboard can be shortened, and excellent electrical characteristics can be achieved.

[0007] Related prior art includes Korean Publication No. 10-2023-0038664, etc. The problem to be solved

[0009] The objective of the embodiment is to provide a packaging substrate with a low impurity content and a method for manufacturing the packaging substrate. means of solving the problem

[0011] To achieve the above objective, a packaging substrate according to one embodiment comprises: a glass wafer; a plurality of vias disposed on the glass wafer; a copper electrode disposed on the vias or on the surface of the glass wafer; and an insulating layer covering the vias or the copper electrode.

[0012] The above packaging substrate contains P and Zn in the leaching impurities.

[0013] The content of the above-mentioned elution impurities is the result of preparing an analysis solution by adding 70 mol% of nitric acid to the packaging substrate and pre-treating it in a graphite block at 200 degrees Celsius for 16 hours, and analyzing the analysis solution using an ICP (inductively coupled plasma)-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) according to the KS M 0025:2008 test method.

[0014] The content of the above P (on a mass basis) may be 1,500 ppb or less.

[0015] The above Zn content (on a mass basis) may be 500 ppb or less.

[0016] A seed layer may be further included under the copper electrode above.

[0017] The above seed layer may include copper and titanium.

[0018] The above insulating layer may include a polymer resin and inorganic particles.

[0019] The above inorganic particles may include silica.

[0020] The above polymer resin may include any one selected from the group consisting of epoxy resin, acrylic resin, urethane resin, and combinations thereof.

[0021] The above packaging substrate is in the shape of a polyhedron overall.

[0022] The above polyhedron may be a hexahedron. Two or more cross faces of the above hexahedron may be exposed. Two to six cross faces may be exposed on the above polyhedron.

[0023] The above glass wafer may include borosilicate-based plate glass.

[0024] The above-mentioned leaching impurities may further include Si and B.

[0025] The ratio of the content of Si to the content of B (based on mass) may be 1:5 to 7.

[0026] The analysis values ​​of the above-mentioned eluted impurities may include B intensity and F intensity.

[0027] The intensity ratio of the F peak based on the above B peak may be 50 or less.

[0028] The above-mentioned elution impurities may further include B and Ti.

[0029] The ratio of the content of B to the content of Ti (based on mass) may be 1:50 to 70.

[0030] The above-mentioned elution impurities may further contain Al.

[0031] The above Al content (based on mass) may be 900 ppb or less.

[0032] The above-mentioned elution impurities may further include B.

[0033] The ratio of the content of B (based on mass) and the content of Zn (based on mass) above may be 1:2 to 5.

[0034] The ratio of the content of B (based on mass) to the content of P (based on mass) may be 1:5 to 30. Effects of the invention

[0036] A packaging substrate according to an embodiment can provide a packaging substrate with improved thermal stability, electrical stability, electrical conductivity, etc., by having a low content of eluted impurities or a specific impurity content ratio within a defined range. Brief explanation of the drawing

[0038] FIG. 1 is a conceptual diagram illustrating the structure of a packaging substrate according to one embodiment in cross-section. Specific details for implementing the invention

[0039] Hereinafter, embodiments are described in detail with reference to the attached drawings so that those skilled in the art can easily implement them. However, embodiments may be implemented in various different forms and are not limited to the embodiments described herein. Throughout the specification, similar parts are denoted by the same reference numerals.

[0040] Throughout this specification, the term “combination thereof” included in the Markush-type expression means one or more mixtures or combinations selected from the group consisting of the components described in the Markush-type expression, and means including one or more selected from the group consisting of said components.

[0041] Throughout this specification, terms such as “first,” “second,” or “A,” “B” are used to distinguish identical terms from one another. Additionally, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0042] In this specification, “~system” may mean that the compound contains a compound corresponding to “~” or a derivative of “~”.

[0043] In this specification, the meaning that B is located on A means that B is located in direct contact with A or that B is located on A with another layer located between them, and is not interpreted as being limited to B being located in contact with the surface of A.

[0044] In this specification, the meaning of being connected to B on A means that A and B are directly connected or connected through other components between A and B, and unless otherwise specifically stated, it is not interpreted as being limited to a direct connection between A and B.

[0045] In this specification, singular expressions are interpreted to include singular or plural forms as interpreted in context unless otherwise specified.

[0046] Packaging substrates serve to support semiconductor devices by arranging various materials, such as supports, electrodes, and insulators, in a predetermined shape. Additionally, they act as a medium connecting the semiconductor devices to the power supply and rectify the current delivered to the devices, thereby improving the stability of electronic equipment.

[0047] Depending on the design, the position or thickness of the electrodes (including the form of vertical and horizontal electrodes) of the packaging substrate may be changed, but it has a basic form in which an electrically conductive pattern (electrode) is formed on a support substrate and an insulating layer is disposed thereon.

[0048] Recently, packaging substrates are being designed with increasingly fine lines and integrated forms. To achieve this, while it is important to form electrodes precisely and accurately, managing impurities is also becoming more critical.

[0049] For example, if a specific element placed in region A easily diffuses into region B and affects the function of region B, the performance of the packaging substrate may degrade. Therefore, the influence of such impurities must be closely considered not only immediately after manufacturing the packaging substrate but also in the actual usage environment, and it is necessary to ensure more stable characteristics overall.

[0051] FIG. 1 is a conceptual diagram illustrating the structure of a packaging substrate according to one embodiment in cross-section. An embodiment will be described in detail below with reference to FIG. 1.

[0052] A packaging substrate (100) according to one embodiment comprises: a glass wafer (20); a plurality of vias (25) disposed on the glass wafer (20); a copper electrode (40) disposed on the vias (25) or on the surface of the glass wafer (20); and an insulating layer (30) covering the vias (25) or the copper electrode (40).

[0053] The glass wafer (20) is made of plate glass and may include plate glass for semiconductors. For example, the glass wafer (20) may be borosilicate-based plate glass. Borosilicate is glass containing silica and boron trioxide. Examples of commercially available products include those sold by Schott, Corning, Asahi Glass, etc., but the glass wafer (20) of the embodiment is not limited to these.

[0054] A plurality of vias (25) may be disposed on the glass wafer (20).

[0055] The via (25) is in the form of a passage that penetrates the glass wafer (20) and connects to the upper and lower surfaces, and can be filled with electrodes, etc., which will be described later.

[0056] vias (25) can be formed by applying methods such as etching and melting.

[0057] For example, defects can be formed on a glass wafer (20) by a method such as forming defects with a laser or the like, and then performing wet etching.

[0058] For example, a copper electrode (40) may be applied as the electrode. The copper electrode refers to a copper plating layer, a copper alloy layer, etc. arranged in a predetermined electrode shape, and should not be interpreted as being limited to an electrode made of copper. In other words, in the embodiment, a copper electrode is exemplified as an example of an electrically conductive layer. Although expressed as a copper electrode, it is described as representing a metal electrically conductive layer applied to a packaging substrate, and is interpreted in a broad sense including copper, rather than as an electrode made of copper. Furthermore, the inclusion of materials other than copper is not excluded from the scope of rights to the extent that it does not impair the idea of ​​the present invention.

[0059] The copper electrode may be manufactured, for example, by plating. For example, an electroless copper plating method may be applied, but is not limited thereto.

[0060] If necessary, the copper electrode may be plated after applying a seed layer before plating. The seed layer serves to promote the formation of the plating layer, and examples include inorganic seed layers such as a sputtered layer containing titanium, organic seed layers containing copper seeds, etc., but are not limited thereto.

[0061] The insulating layer is formed during the process of forming the copper electrodes (40) and serves to prevent short circuits between the copper electrodes (40).

[0062] The insulating layer may be a mixture of inorganic particles and polymer resin.

[0063] For example, the above-mentioned inorganic particles may be silica particles.

[0064] For example, the polymer resin may include any one selected from the group consisting of epoxy resin, acrylic resin, urethane resin, and combinations thereof.

[0065] For example, an insulating layer may be an ABF (Ajinomoto Build-up Film), but is not limited to this.

[0066] In an embodiment, the impurity content of the packaging substrate (100) can be measured as an elution impurity.

[0067] The content of the above-mentioned eluted impurities is the result of preparing an analysis solution by adding 3 ml of 70 mol% nitric acid to 0.43 g of the above-mentioned packaging substrate (100) and pre-treating it in a graphite block at 200 degrees Celsius for 16 hours, and analyzing the analysis solution using an ICP (inductively coupled plasma)-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) according to the KS M 0025:2008 test method. The program applied for the analysis is a program provided by the manufacturer (Program name: Syngistix for ICP-MS Version: 3.2), and the setting value was Standard Mode.

[0068] The above packaging substrate (100) contains P and Zn in the elution impurities.

[0069] Specifically, the content of P (based on mass, hereinafter the same) may be 1,500 ppb or less. The content of P may be 1,400 ppb or less, 1,300 ppb or less, 1,200 ppb or less, 1,100 ppb or less, or 1,000 ppb or less. The content of P may be 200 ppb or more, 300 ppb or more, 400 ppb or more, 500 ppb or more, or 600 ppb or more.

[0070] Phosphorus (P) is thought to originate from polymer layers placed on the packaging substrate, such as insulating layers and resist layers. Additionally, P can contribute to the improvement of thermal stability and chemical resistance. When the content of P in the leached impurities is within the range described above, the thermal stability of the insulating layer of the substrate can be improved. Furthermore, chemical durability can be further enhanced even if the packaging substrate is repeatedly exposed to high-temperature environments. Along with this, the strength, conductivity, and processability of the electrodes are maintained within a certain range, allowing for the acquisition of a packaging substrate with superior physical properties.

[0071] The content of the above Zn (zinc) (based on mass, hereinafter the same) may be 500 ppb or less. The content of the above Zn may be 450 ppb or less, 400 ppb or less, 350 ppb or less, or 300 ppb or less. The content of the above Zn may be 200 ppb or more, or 220 ppb or more.

[0072] Zn can play a role in preventing corrosion of metal components, such as electrodes. Zn protects metal materials in electrodes, such as copper, from oxidation and can influence the electrical resistance or signal transmission efficiency of the electrodes, thereby improving circuit stability. When the Zn content in the leached impurities falls within the range described above, the electrode's peel stability and heat resistance are maintained within a certain range, allowing for the production of a packaging substrate with superior physical properties.

[0073] The above-mentioned leaching impurities may contain Si.

[0074] The content of the above Si (silicon) may be 120 ppb or less, 110 ppb or less, 100 ppb or less, 90 ppb or less, 80 ppb or less, 70 ppb or less, 60 ppb or less, 50 ppb or less, 40 ppb or less, or 30 ppb or less. The content of the above Si may be 3 ppb or more, 5 ppb or more, or 7 ppb or more.

[0075] Si is one of the major components of glass wafers. Additionally, Si is one of the components of silica, which is used as an inorganic particle included in the insulating layer. When the Si content in the leaching impurities falls within the range described above, a packaging substrate with stable physical properties and minimal loss of inorganic components can be obtained.

[0076] The above-mentioned leaching impurities may include B (boron).

[0077] The content of B may be 250 ppb or less, 220 ppb or less, 180 ppb or less, 150 ppb or less, 120 ppb or less, 110 ppb or less, 100 ppb or less, 90 ppb or less, 80 ppb or less, or 70 ppb or less. The content of B may be 10 ppb or more, 20 ppb or more, 30 ppb or more, 40 ppb or more, or 50 ppb or more.

[0078] B is one of the major components of glass wafers. When the content of B in the eluted impurities is within the range described above, a packaging substrate with stable physical properties and minimal loss of inorganic components can be obtained.

[0079] The above-mentioned leaching impurities may include Ti (titanium).

[0080] The above Ti content may be 7,000 ppb or less, 6,500 ppb or less, 6,000 ppb or less, 5,500 ppb or less, or 5,000 ppb or less. The above Ti content may be 1,000 ppb or more, 1,500 ppb or more, 2,000 ppb or more, 2,500 ppb or more, or 3,000 ppb or more.

[0081] Ti is thought to originate from one of the elements used in the electrode formation process. After forming a seed layer, etc., unnecessary parts are removed or retained as needed. When the content of Ti in the leached impurities is within the range described above, a packaging substrate with high integration density and excellent durability can be obtained.

[0082] The above-mentioned leaching impurities may include Al (aluminum).

[0083] The above Al content may be 900 ppb or less, 800 ppb or less, 700 ppb or less, 600 ppb or less, 500 ppb or less, 400 ppb or less, or 300 ppb or less. The above Al content may be 50 ppb or more, 60 ppb or more, 70 ppb or more, 80 ppb or more, 90 ppb or more, or 100 ppb or more.

[0084] Al can be applied to electrodes, the seed layer of the electrode, etc. Al can affect the signal and power redistribution of the redistribution layer and is related to the electrical performance of the substrate. In addition, by forming an oxide film (Al2O3), it helps to maintain stable long-term performance by suppressing the occurrence of corrosion or damage to the electrode, and it is thought to help with heat dissipation depending on the arrangement. When the content of Al in the leached impurities is within the range described above, the durability of the electrode is improved, and a packaging substrate with excellent physical properties can be obtained.

[0085] In the above-mentioned leached impurities, the ratio of the content of Si to the content of B (based on mass) may be 1:5 to 7. Also, the ratio may be 1:5.5 to 6.5. When having such a ratio, a packaging substrate with excellent mechanical stability and electrical stability can be obtained.

[0086] In the above-mentioned leached impurities, the ratio of the content of B to the content of Ti (based on mass) may be 1:50 to 70. The ratio may be 1:52 to 68 or 1:55 to 63. When having such a ratio, a packaging substrate with excellent electrical stability can be obtained.

[0087] In the above-mentioned leached impurities, the ratio of the content of B (based on mass) to the content of Zn (based on mass) may be 1:2 to 5. The ratio may be 1:2.5 to 4.5, or 1:3 to 4. When having such a ratio, a packaging substrate with excellent electrical stability and mechanical stability can be obtained.

[0088] In the above-mentioned leaching impurities, the ratio of the content of B (based on mass) to the content of P (based on mass) may be 1:5 to 30. The ratio may be 1:8 to 25, or 1:10 to 20. When having such a ratio, a packaging substrate with excellent processing stability and electrical stability can be obtained.

[0089] In the above-mentioned leached impurities, the ratio of the content of B (based on mass) to the content of Al (based on mass) may be 1:1 to 5. The ratio may be 1:1.5 to 4, or 1:2.5 to 3.5. When having such a ratio, a packaging substrate with excellent electrical stability and thermal stability can be obtained.

[0090] The above-mentioned elution impurities may contain F.

[0091] In the analysis value of the above-mentioned elution impurities, the F intensity based on the B intensity (Intensity) is preferably below a certain ratio. Specifically, the intensity ratio of the F peak based on the B peak may be 50 or less. The intensity ratio may be 45 or less, 40 or less, 37 or less, or 36 or less. The intensity ratio may be 1 or more, 15 or more, or 25 or more.

[0092] F is thought to originate from hydrofluoric acid, etc., applied during the etching or cleaning process. Since F is considered to be one of the causes of delamination between the glass wafer and the electrode, and between the glass wafer and the insulating layer, it is desirable to sufficiently remove it. When the strength ratio is within the range described above, the occurrence of delamination of the packaging substrate during manufacturing or use can be substantially suppressed, and a packaging substrate with improved durability can be obtained.

[0093] The above-mentioned elution impurities can be measured using an analysis solution that pre-treated a packaging substrate (100) sample.

[0094] The packaging substrate (100) may be in the form of a rectangular plate having a typical thickness and may be in the shape of a cuboid overall. Electrodes and an insulating layer may be formed on the upper and lower surfaces. Additionally, a cover layer (60) that provides an insulating function and exposes the electrode at a predetermined location may be disposed thereon. The cover layer (60) may be a polyimide layer, but is not limited thereto. The cover layer (60) may be a solder resist layer, but is not limited thereto.

[0095] The packaging substrate (100) can be applied directly to the preparation of the analysis solution according to its size. For example, the packaging substrate (100) can be applied to the preparation of the analysis solution after being cut into an appropriate size. The cutting can be performed using a method applied to the dicing of the packaging substrate. Laser cutting can be performed. However, the cutting method is not limited to this.

[0096] For example, at least two of the four surfaces excluding the top and bottom surfaces may have a cross-section exposed. For example, at least a portion of a glass wafer, an insulating layer, and a cover layer may be exposed on the cross-section.

[0098] Laboratory examples are described below.

[0099] A redistribution line was placed on a borosilicate glass wafer having a core with a thickness of approximately 500 μm or more. The redistribution line was formed by repeating stacking and etching according to the method of forming the redistribution line, and a conventional method was applied. A titanium sputtered layer was used as the seed layer, ABF (manufactured by Ajinomoto) as the insulating layer, and copper electrode layer was applied by copper plating. Cleaning was applied a sufficient number of times at each step in accordance with Korean Patent Publication No. 10-2023-0038664.

[0100] For the packaging substrate of the configuration described above, a sample cut with a glass cutter with a width of 1 cm, a length of 1 cm, and a mass of 0.43 g was applied.

[0101] The sample was pretreated in a graphite block with approximately 3 ml of nitric acid at 200°C for 16 hours, after which the solution was taken and qualitative analysis was performed using the analytical solution. Analysis was conducted using an ICP (inductively coupled plasma)-MS instrument in accordance with the General Rules of Mass Spectrometry KS M 0025:2008. During the analysis, the temperature was approximately 24°C and the relative humidity was 64%.

[0102] The above equipment was the Nexlon 2000 model manufactured by Perkin Elmer, and the analysis program was version 3.2 of the Syngistix for ICP-MS program provided by the manufacturer, and the analysis was performed in Standard Mode. The detection range was 0.001 ppb or higher.

[0103] The measurement results showed that in the case of Cu, the concentration was high, resulting in an over-range.

[0104] The intensity of P was 4704002, and the concentration (unit ppb) was 924.992.

[0105] The intensity of Zn was 2875872, and the concentration (unit ppb) was 246.577.

[0106] The intensity of Si was 250872550, and the concentration (unit ppb) was 11.563.

[0107] The intensity of B was 1,780,351, and the concentration (unit ppb) was 68,828.

[0108] The intensity of Ti was 1,791,96692, and the concentration (unit ppb) was 4,054.503.

[0109] The intensity of Al was 1,463,7243, and the concentration (unit ppb) was 201,417.

[0110] The intensity of F was found to be 60556883.

[0111] The B content based on the Si content was a ratio of approximately 5.95.

[0112] The Ti content based on the B content was approximately 58.9.

[0113] The B content based on the Si content was a ratio of approximately 5.95.

[0114] The ratio of P to B content was approximately 13.5.

[0115] The ratio of Zn content based on B content was approximately 3.58.

[0116] The ratio of Al content based on B content was approximately 2.93.

[0117] The F strength based on the B strength was approximately 34 times.

[0118] A packaging substrate having these characteristics can provide a high-performance packaging substrate by maintaining excellent physical properties even in an operating environment where temperature increases and decreases are repeated.

[0119] The above measurement value is a value measured using a package substrate sample from which the device, capsule layer, and / or leads have been removed, in cases where leads are separately placed or a device is mounted on the package substrate. Specifically, it is a value measured using a sample in which a glass substrate, a redistribution layer, and a cover layer (a PI layer on top and a solder resist layer on the bottom) are placed.

[0121] Although preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention. Explanation of the symbols

[0123] 20: Glass wafer 25: Via 30: Insulating layer 40: Copper electrode 60: Cover layer 100: Packaging substrate

Claims

Claim 1 A glass wafer, a plurality of vias disposed on the glass wafer; a copper electrode disposed on the vias or on the surface of the glass wafer; A packaging substrate comprising an insulating layer surrounding the via or the copper electrode; wherein the glass wafer is a borosilicate-based plate glass; wherein the packaging substrate is generally in the shape of a polyhedron and has a cut surface in which at least two faces of the polyhedron are exposed; wherein the packaging substrate contains P and Zn in the eluted impurities; and wherein the content of the eluted impurities is the analytical value obtained by preparing an analytical solution by adding 70 mol% nitric acid to the packaging substrate and pre-treating it in a graphite block at 200°C for 16 hours, and analyzing the analytical solution using an ICP (inductively coupled plasma)-MS instrument (Nexlon 2000 model manufactured by Perkin Elmer) according to the KS M 0025:2008 test method; wherein the content of P (mass basis) is 200 ppb or more and 1,500 ppb or less; and the content of Zn (mass basis) is 200 ppb or more and 500 ppb. A packaging substrate having the following: the above-mentioned elution impurity further comprises B, the ratio of the content of B (mass basis) to the content of Zn (mass basis) is 1:2 to 5, the analysis value of the above-mentioned elution impurity further comprises B intensity and F intensity, and the intensity ratio of the F peak based on the B peak is 50 or less. Claim 2 A packaging substrate according to claim 1, wherein a seed layer is further included under the copper electrode, the seed layer comprises copper and titanium, the insulating layer comprises a polymer resin and inorganic particles, the inorganic particles comprise silica, and the polymer resin comprises any one selected from the group consisting of epoxy resin, acrylic resin, urethane resin and combinations thereof. Claim 3 delete Claim 4 delete Claim 5 A packaging substrate according to claim 1, wherein the eluted impurities further comprise Si and B, and the ratio of the content of Si to the content of B (based on mass) is 1:5 to 7. Claim 6 delete Claim 7 A packaging substrate according to claim 1, wherein the eluted impurities further comprise B and Ti, and the ratio of the content of B to the content of Ti (based on mass) is 1:50 to 70. Claim 8 A packaging substrate according to claim 1, wherein the eluted impurity further comprises Al, and the content of Al (based on mass) is 900 ppb or less. Claim 9 delete Claim 10 A packaging substrate according to claim 1, wherein the ratio of the content of B (based on mass) to the content of P (based on mass) is 1:5 to 30.

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