Methods for closed loop operation of capacitive accelerometers

Abstract

A capacitive accelerometer comprising a pulse width modulation (PWM) signal generator, a closed-loop circuit (10), and first and second fixed-capacitive electrodes (1, 2) symmetrically arranged on either side of a verification mass along the sensing axis of the verification mass. The verification mass is movable along the sensing axis in response to applied acceleration, and the fixed-capacitive electrodes (1, 2) are arranged such that a gap is defined between each of the electrodes (1, 2) and the verification mass when the applied acceleration is zero. The PWM signal generator is arranged to apply first and second driving signals (V1 and V2) to the first and second fixed-capacitive electrodes (1, 2), respectively. The first and second driving signals each have a periodic waveform whose amplitude varies between zero and a maximum value (Vref). A closed-loop circuit (10) is arranged to control a PWM signal generator for applying first and second driving signals at a constant frequency (fmod) having a variable mark / space ratio to detect a signal generated by the displacement of the verification mass, and to provide a net electrostatic restoring force on the verification mass to balance the inertial force of the applied acceleration and keep the verification mass in a null position. A voltage offset (Vref / 2) is also applied to the verification mass, and the first and second driving signals have waveforms that change such that when either of the first and second driving signals is at Vref / 2 or zero, the other driving signal is at Vref / 2.

Description

Technology Field

[0001] The present invention relates to capacitive accelerometers and control methods thereof, and in particular to improved methods for closed-loop operation of capacitive accelerometers. Background Technology

[0002] Accelerometers are electromechanical devices widely used to measure acceleration forces caused by motion and / or vibration. Capacitive accelerometers can be used in applications including earthquake detection, vibration detection, inertia detection, and tilt detection. Capacitive accelerometers are generally implemented as micro-electromechanical systems (MEMS) and can be manufactured from semiconductor materials such as silicon. A typical MEMS sensing structure for a capacitive accelerometer includes a proof mass movably mounted on a support, and a set of electrode fingers extending from the proof mass engages with one or more sets of fixed electrode fingers to form a differential capacitor. The electrodes of the sensing structure are connected to appropriate driving and pick-off electronics.

[0003] In an open-loop configuration, electronic devices are arranged to drive fixed electrode fingers with any suitable waveform, which may be sinusoidal or square wave signals, so that a pick-off signal appears at the output when the verification mass moves under acceleration. WO 2004 / 076340 provides an example of an open-loop accelerometer. In an open-loop configuration, an AC signal detected on the verification mass can be used to generate a signal representing the applied acceleration. The amplitude of the signal detected on the verification mass from a single fixed electrode will vary as ∝ V / d², where V is the differential voltage between the electrode and the verification mass, and d is the gap size. Accordingly, the signal level will vary quadratically with respect to the gap, which varies linearly with the applied acceleration. This provides a nonlinear scale factor that must be corrected later to achieve high performance. Vibration rectification errors can be large due to the nonlinear signal response. Furthermore, small gap sizes (typically a few microns) limit motion and consequently the dynamic range of the device's operation. Open-loop accelerometers may have limited performance in terms of bandwidth, linearity, and dynamic range.

[0004] An accelerometer sensing structure designed for open-loop operation can also be used in a closed-loop configuration to achieve force equilibrium by providing variable electrostatic force to the electrodes using driving electronics. In closed-loop mode, the verification mass is always maintained in a fixed position by the application of electrostatic force. The output is then given by the applied force. US7267006 provides an example of a closed-loop electronic control scheme using pulse width modulation (PWM) of driving signals. In such a closed-loop configuration, the electronics are arranged to drive pairs of fixed electrode fingers with in-phase and out-phase AC square wave voltage signals. The driving signals have zero and maximum values ​​(V refIt has a waveform with varying amplitude between )(typically 30 V to provide the force required to achieve a 70 g dynamic range). The mark:space ratio of the PWM drive signals can be adjusted to change the average DC voltage of each drive signal and the resulting reaction force according to the applied acceleration. Accordingly, the mark:space ratio can be used to generate an output signal that varies linearly with the applied acceleration level. This design has been proven to provide a high dynamic range, excellent linearity, high bandwidth, and low vibration rectification error.

[0005] A known problem that can degrade the performance of many capacitive sensors is dielectric charging, which can occur in the presence of a DC offset voltage. This effect entails the charging of thin dielectric layers on electrode plate surfaces due to the movement of charged species (electrons and ions) when an electric field gradient is present. In the case of closed-loop accelerometers, such as those described in US7267006, high electric field gradients exist, particularly due to the differential voltage between large fixed and movable electrodes. Verification masses and electrode structures for this type of device are typically fabricated from bulk crystalline silicon using deep reactive ion etching techniques. Such techniques typically generate a thin surface layer of natural oxide that grows naturally on the electrode surfaces after the silicon surface is exposed by etching and before the device is sealed. Charged species, such as sodium and lithium, will be present due to the anode junction of the upper and lower glass wafer layers encapsulating the silicon verification masses and electrode structures. The accumulation of these charges on the dielectric surface layers on the electrodes is due to the voltage (V ref This means that a portion of the voltage drops across the dielectric layer and the effective voltage of the gap (d) changes. Accordingly, this causes a change corresponding to the transducer gain, which will have an adverse effect on device performance.

[0006] Dielectric charging is known to cause slow shifts in both bias and scale factors under constant operating conditions. The slow nature of charge transfer implies that charges will not respond to high-frequency AC voltage modulation and will move when a fixed voltage gradient is present. These effects typically occur more rapidly at high temperatures where ion mobility increases and tend to reach a stable state over time. However, it has been shown that when the voltage is removed, the charge dissipates, and when the device is turned off, the shifts in bias and scale factors ease back to their original starting levels. Yet, when the device is powered back on, the effects will recur. This indicates a significant limitation in the performance capabilities of such devices.

[0007] The objective of the present invention is to overcome one or more of the difficulties outlined above.

[0008] According to a first aspect of the present invention, a method for closed-loop operation of a capacitive accelerometer is provided, wherein the capacitive accelerometer is:

[0009] A verification mass capable of moving along a sensing axis in response to applied acceleration; and

[0010] It includes the first and second fixed capacitive electrodes symmetrically arranged on either side of the verification mass along the sensing axis, having a gap defined between each of the first and second fixed capacitive electrodes and the verification mass when the applied acceleration is zero;

[0011] The above method is:

[0012] A step of applying a first driving signal (V1) to the first fixed capacitive electrode and a second driving signal (V2) to the second fixed capacitive electrode, wherein the first and second driving signals are each zero and a maximum value (V ref The step of applying the above, having a periodic waveform with varying amplitude between );

[0013] A constant frequency (f) to provide a net electrostatic restoring force on the verification mass to detect the displacement of the verification mass, balance the inertial force of the applied acceleration, and maintain the verification mass in a null position. mod A step of applying pulse width modulation to the first and second driving signals having a variable mark / space ratio;

[0014] Voltage offset (V) on the above verification mass ref Step of authorizing / 2); and

[0015] The above first and second driving signals are any one of the first and second driving signals V ref Or when it is at zero, the other driving signal is V ref It is characterized by the step of applying the pulse width modulation to have a waveform that changes to / 2.

[0016] As will be explained further below, the verification mass is V ref By offsetting by / 2, the first and second driving signals are ± V with respect to the verification mass. ref It changes by / 2, and as a result, the average DC offset that is problematic in conventional technology is eliminated. Since the force changes with the square of the voltage, the polarity of the net electrostatic restoring force does not change. V, rather than a mirror image as in conventional technology. ref The first and second driving signals having a waveform that draws a step shape with / 2 ensure that the average force can still be adjusted by varying the mark:space ratio of the pulse width modulation. This balances the inertial force of the applied acceleration, thereby allowing the verification mass to be maintained in the null position. Methods as disclosed herein provide a modified closed-loop scheme that substantially eliminates the effects of dielectric charge while maintaining high-performance capabilities.

[0017] In at least some examples, the periodic waveforms of the first and second driving signals are different driving signals Vref or when at zero V ref It may be a substantially square waveform containing a waveform sequence that draws steps at / 2. In other examples, the first and second driving signals may include any other suitable waveform having such a sequence, e.g., triangular or trapezoidal waveforms instead of a square waveform. In other examples, the first and second driving signals may include a sine-based waveform. In some examples, the sine-based waveform sequence is such that either of the first and second driving signals V during a half-sine wave portion ref / 2 and V ref Between, or V ref When varying between / 2 and zero, the other driving voltage is V ref The sequence may include alternating half-sine waves such that / 2.

[0018] Regardless of waveform shape, the first and second driving signals have a specific waveform sequence. In some examples where the applied acceleration is zero, the second driving signal (V2) is a mirror image of the first driving signal (V1) shifted by 1 / 4 cycle. The 1 / 4 cycle shift is when the driving signal amplitude is V ref Always V for at least 1 / 4 cycle before drawing a staircase shape up to or down to zero. ref Keep it at / 2. This corresponds to a 50:50 mark:space ratio.

[0019] In one or more examples, additionally or alternatively, the first and second driving signals are V in the first half-cycle. ref / 2 and V ref Draw a staircase shape in between, and V in the second accompaniment machine ref It has a waveform that forms a step shape between / 2 and zero. This waveform sequence can be applied regardless of the mark:space ratio.

[0020] In one or more examples, additionally or alternatively, the first and second driving signals are approximately V with respect to a single square wave pulse in the first half-cycle and the single square wave pulse in the first half-cycle in the second half-cycle. ref It has a waveform containing a single square wave pulse that is inverted by / 2. This waveform sequence can be applied regardless of the mark:space ratio.

[0021] In one or more examples, additionally or alternatively, voltage offset V on the verification mass body. ref The step of applying / 2 includes the step of using the verification mass as a reference for the intermediate electrical connection between the first and second fixed capacitive electrodes.

[0022] In one or more examples, additionally or alternatively, the above method is:

[0023] A step of detecting the displacement of the verification mass by sampling the output signal from the verification mass; and

[0024] The method further includes the step of adding a compensation signal to the output signal, wherein the compensation signal is of a constant frequency (f mod It has the same pulse width modulation as ), and the compensation signal is in opposite phase to the output signal.

[0025] Additionally, the above method is:

[0026] The method may further include the step of applying the compensation signal across a compensation capacitor having a capacitance substantially matched to the capacitance of the gap between each of the first and second fixed capacitive electrodes and the verification mass when the applied acceleration is zero. It will be understood that the gap between each of the first and second fixed capacitive electrodes and the verification mass is ideally the same when the applied acceleration is zero, that is, the verification mass is located in the center between the first and second fixed capacitive electrodes. Of course, manufacturing tolerances may cause slight deviations from such an ideal situation.

[0027] In one or more examples, additionally or alternatively, the above method is:

[0028] It further includes the step of outputting a signal indicating the authorized acceleration.

[0029] In one or more examples, additionally or alternatively, the capacitive accelerometer comprises a silicon MEMS structure.

[0030] In one or more examples, additionally or alternatively, the verification mass is substantially planar.

[0031] In one or more examples, additionally or alternatively, the verification mass is mounted on a substrate fixed by flexible support legs so as to be able to move linearly in a plane along the sensing axis in response to applied acceleration, and the first and second fixed capacitive electrodes are formed on the fixed substrate in the same plane.

[0032] In one or more examples, additionally or alternatively, the verification mass comprises first and second sets of movable capacitive electrode fingers extending from the verification mass substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first and second fixed capacitive electrodes each comprise first and second sets of fixed capacitive electrode fingers extending substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first set of fixed capacitive electrodes is arranged to engage with the first set of capacitive electrode fingers movable to a first offset in one direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers, and the second set of fixed capacitive electrodes is arranged to engage with the second set of capacitive electrode fingers movable to a second offset in the opposite direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers.

[0033] According to a second aspect of the present disclosure, as a capacitive accelerometer:

[0034] A verification mass capable of moving along a sensing axis in response to applied acceleration;

[0035] It includes the first and second fixed capacitive electrodes symmetrically arranged on either side of the verification mass along the sensing axis, having a gap defined between each of the first and second fixed capacitive electrodes and the verification mass when the applied acceleration is zero;

[0036] A pulse width modulation signal generator arranged to apply a first driving signal (V1) to the first fixed capacitive electrode and a second driving signal (V2) to the second fixed capacitive electrode, wherein the first and second driving signals are each zero and a maximum value (V ref A pulse width modulation signal generator having a periodic waveform with varying amplitude between ); and

[0037] A constant frequency (f) having a variable mark / space ratio to detect a signal generated by the displacement of the verification mass, balance the inertial force of the applied acceleration, and provide a net electrostatic restoring force on the verification mass to maintain the verification mass in a null position. mod It includes a closed-loop circuit arranged to control a pulse width modulation signal generator for applying the first and second driving signals in );

[0038] Voltage offset (V) on the above verification mass ref / 2) is authorized;

[0039] The above first and second driving signals are any one of the first and second driving signals V ref Or when it is at zero, the other driving signal is V ref A capacitive accelerometer is provided, characterized in that it has a waveform that changes to / 2.

[0040] In one or more examples, the verification mass is based on an intermediate electrical connection between the first and second fixed capacitive electrodes.

[0041] In one or more examples, additionally or alternatively, the capacitive accelerometer further comprises a preamplifier arranged to sample an output signal from the verification mass, wherein the pulse width modulation signal generator is arranged to input a compensation signal to the preamplifier for the preamplifier to add to the output signal, and the compensation signal is of a constant frequency (f mod It has the same pulse width modulation as ), and the compensation signal is in opposite phase to the output signal.

[0042] In at least some examples, the capacitive accelerometer further comprises a compensation capacitor connected between the pulse width modulation signal generator and the preamplifier, and the compensation capacitor has a capacitance substantially matched to the capacitance of the gap between each of the first and second fixed capacitive electrodes and the verification mass body when the applied acceleration is zero.

[0043] In one or more examples, additionally or alternatively, the capacitive accelerometer comprises a silicon MEMS structure.

[0044] In one or more examples, additionally or alternatively, the verification mass is mounted on a substrate fixed by flexible support legs so as to be able to move linearly in a plane along the sensing axis in response to applied acceleration, and the first and second fixed capacitive electrodes are formed on the fixed substrate in the same plane.

[0045] In one or more examples, additionally or alternatively, the verification mass is substantially planar.

[0046] In one or more examples, additionally or alternatively, the verification mass comprises first and second sets of movable capacitive electrode fingers extending from the verification mass substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first and second fixed capacitive electrodes each comprise first and second sets of fixed capacitive electrode fingers extending substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first set of fixed capacitive electrodes is arranged to engage with the first set of capacitive electrode fingers movable to a first offset in one direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers, and the second set of fixed capacitive electrodes is arranged to engage with the second set of capacitive electrode fingers movable to a second offset in the opposite direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers. Brief explanation of the drawing

[0047] Now, one or more non-limited embodiments will be described with reference to the attached drawings, and in the attached drawings: FIG. 1 schematically illustrates an electronic control scheme known for a closed-loop capacitive accelerometer according to the prior art; FIG. 2 illustrates voltage waveforms applied to electrodes 1 and 2 and the corresponding electrostatic forces for a 50:50 mark:space ratio under conditions where the applied acceleration is zero, according to the prior art; FIG. 3 illustrates voltage waveforms applied to electrodes 1 and 2 and the corresponding electrostatic forces for a 25:75 mark:space ratio under conditions where the applied acceleration is positive, according to the prior art; Figure 4 shows the verification mass V refThe voltage waveforms applied to electrodes 1 and 2 and the corresponding electrostatic forces are illustrated for a 50:50 mark:space ratio under the condition that the applied acceleration is zero, based on / 2; FIG. 5 illustrates voltage waveforms applied to electrodes 1 and 2 and the corresponding electrostatic forces for a 50:50 mark:space ratio under conditions where the applied acceleration is zero, according to examples of the present disclosure; FIG. 6 illustrates voltage waveforms applied to electrodes 1 and 2 and the corresponding electrostatic forces for a 25:75 mark:space ratio under conditions where the applied acceleration is positive, according to examples of the present disclosure; FIG. 7 schematically illustrates an electronic control scheme for a closed-loop capacitive accelerometer according to examples of the present disclosure; FIG. 8 illustrates preamplifier voltage signals and sampling points for an open-loop accelerometer under conditions where the applied acceleration is positive, zero, and negative, according to the prior art; FIG. 9 illustrates preamplifier voltage signals and sampling points for a closed-loop accelerometer under conditions where the applied acceleration is positive, zero, and negative, according to the prior art; FIG. 10 illustrates preamplifier voltage signals and sampling points for an open-loop accelerometer under conditions where the applied acceleration is positive, zero, and negative, according to examples of the present disclosure; FIG. 11 schematically illustrates an alternative electronic control scheme for a closed-loop capacitive accelerometer according to additional examples of the present disclosure; FIG. 12 illustrates preamplifier voltage output signals and sampling points before and after the application of a compensation signal for an open-loop accelerometer under conditions where the applied acceleration is positive, according to examples of the present disclosure; FIG. 13 illustrates preamplifier voltage output signals and sampling points for a closed-loop accelerometer under conditions where the applied acceleration is positive, zero, and negative, according to examples of the present disclosure; and Figure 14 is a schematic diagram of a typical electrode arrangement in a capacitive accelerometer. Specific details for implementing the invention

[0048] FIG. 1 schematically illustrates an electronic control scheme known for a closed-loop capacitive accelerometer according to the prior art, exemplified by US7267006, the contents of which are taken by reference therefrom. A pulse width modulation (PWM) signal generator has a constant fixed reference voltage (V ref It receives and supplies complementary first and second driving voltages (V1 and V2) to electrode 1 and electrode 2. Electrodes 1 and 2 typically take the form of first and second sets of fixed capacitive electrode fingers engaged with movable capacitive electrode fingers of a verification mass, as is commonly known in the art.

[0049] A preamplifier is arranged to sample the output signal from the verification mass. As shown in FIG. 1, the preamplifier is configured so that its input from the verification mass becomes a "virtual ground" with a voltage of 0 V relative to "ground," which is achieved by a DC biasing element such as a resistor. The preamplifier then sets the verification mass DC bias voltage to the reference voltage (V ref While making it identical to ), periodic signals are picked up by a pre-amplifier in response to the movement of the verification mass. Then, these periodic pick-off signals are demodulated, passed through a loop filter, and fed back to a pulse width modulation (PWM) signal generator in closed-loop operation.

[0050] FIG. 2 shows the first and second driving signals at zero and maximum values ​​(V refIt illustrates a standard square waveform with varying amplitude between )(this is typically 30 V to provide the force required to achieve a dynamic range of 70 g). When the applied acceleration is zero, and the gaps (d) between the verification mass electrode and each of the two fixed electrodes are nominally equal, the waveforms consist of square waves with a mark:space ratio of 50:50. The net force (F) for each electrode is given as follows:

[0051]

[0052] Here, C is the gap capacitance and V is the voltage. The average voltage level for the 50:50 mark:space waveform is V, as shown by the dotted line. ref It is equal to / 2. Accordingly, the corresponding average force will similarly be half of the peak value, as also shown by the dotted line in Fig. 2. Since the fixed electrodes are located on opposite sides of the verification mass, the force acts in opposite directions, and consequently, the net force acting on the verification mass will be zero. These waveforms are critically damped, and accordingly, compared to the mechanical resonance frequency of the verification mass where no large movement occurs at these frequencies, the microwaves (e.g., f) mod It is appropriately modulated at ~ 100 kHz.

[0053] When acceleration is applied to the accelerometer, the signal generated by the displacement of the verification mass is fed back to a control loop that adjusts the mark:space ratio of the PWM signal. This drives the verification mass back to the null position by differently changing the force between the fixed electrodes and the verification mass. The net force is given as follows:

[0054]

[0055] Here, d1 and d2 represent the capacitor gaps of electrodes 1 and 2, respectively, and w1 and w2 are the pulse widths for the two waveforms applied to the fixed electrodes (i.e., the voltage is V ref(This is). Waveforms and net forces for typical positive accelerations that generate a 25:75 mark:space ratio are illustrated in FIG. 3. A reduced pulse width applied to electrode 1 reduces the average voltage and, consequently, the average force, while the average voltage and average force for electrode 2 increase. The average net force on the verification mass is given as the differential force between electrodes 1 and 2. Although the individual average forces generated by each driving signal are nonlinear, they work together to cancel out the nonlinearity and generate a net force that varies linearly with respect to the mark:space ratio.

[0056] In such conventional capacitive accelerometers, dielectric charging occurs due to the large average DC voltage between the fixed electrodes and the verification mass. Since these voltage levels also vary depending on the applied acceleration level, they will alter the charging characteristics. In the control method of Fig. 1, V ref When a voltage level of 30 V is applied, an average DC offset of 15 V occurs between each of the fixed electrodes and the verification mass, which generates large opposing forces on the verification mass even when 0 g is applied. The average voltage offset will vary depending on the applied g level, but typically, a large offset will always exist in any actual application.

[0057] However, the applicants have recognized that such dielectric charge can be substantially eliminated by eliminating the average voltage offset between the fixed electrodes and the verification mass. This involves the verification mass voltage level V ref This can be achieved by first offsetting by / 2. Accordingly, the voltage waveforms will change symmetrically in alignment with the verification mass voltage level, providing an average zero offset between the verification mass and the fixed electrodes. This eliminates the voltage gradient driving charge transfer and, consequently, the problematic scale factor and bias drift.

[0058] However, the applicant recognized that in the known control scheme of FIGS. 1 to 3, the force feedback required for closed-loop operation cannot be obtained by merely offsetting the verification mass voltage. FIG. 4 illustrates the effect of simply offsetting the verification mass voltage. As the average DC voltage is removed, V 2 As the changing force is rectified, it can be seen that positive and negative pulses generate the same forces of the same polarity. Therefore, since no change in the average force is induced even if the mark:space ratio is changed, force feedback cannot be applied.

[0059] In examples according to the present disclosure, the driving signal waveforms are modified so that the average force can be adjusted by applying pulse width modulation as shown in FIG. 5. The electrode 1 voltage waveform (V1) is V in the first half-cycle. ref / 2 and V ref Draw a step shape between them to provide the first 'mark' with a positive pulse (for the verification mass voltage), and V in the second half-cycle ref Draw a step shape between / 2 and zero to provide a second negative pulse (for the verification mass voltage). These pulses are V ref It is separated by a 'space' of voltage levels of / 2. The voltage for the verification mass is provided on the right side of the plots for V1 and V2. The total voltage variation of ±15 V shown by the verification mass is the same 30 V range as applied in the prior art control method, but the average voltage is now zero as indicated by the dotted line. When comparing the waveforms of the prior art (Fig. 2) with the waveforms of an example of the present disclosure (Fig. 5), for the same time scale, the frequency (f) of the waveform for the present disclosure mod ) will be half of the conventional technology. The temporal form of the resultant force shown in Fig. 5 is 2xf due to the rectification of positive and negative voltage cycles. mod It is in and is basically the same as 2.

[0060] FIG. 6 illustrates the effect of adjusting the mark:space ratio to 25:75, where the pulse widths of the positive and negative cycles are adjusted equally, allowing the discriminative power to be adjusted while maintaining the average voltage at zero. Although the time of the marks is shorter, as before, the electrode 1 voltage waveform (V1) is V in the first half-cycle. ref / 2 and V ref Draw a step shape between them to provide the first 'mark' with a positive pulse (for the verification mass voltage), and V in the second half-cycle ref A step shape is drawn between / 2 and zero to provide a second negative pulse (for the verification mass voltage). A mark:space ratio of 25:75 creates a differential force between electrodes 1 and 2, thereby generating a net electrostatic restoring force on the verification mass to balance the inertial force of the applied acceleration and keep the verification mass in the null position. The voltage with respect to the verification mass is provided on the right-hand side of the plots for V1 and V2. Again, the temporal form of the resultant force is the same as that shown in Fig. 3.

[0061] In the example shown in FIGS. 5 and 6, the average driving force F ∝ (V ref / 2) 2 Therefore, this control method reduces the driving force by a factor of x4. This limits the overall g-range for a given accelerometer unless a larger voltage range is applied. However, many high-precision applications do not require a large g-range. However, if a g-range is required, V ref It can be increased by increasing the value.

[0062] FIG. 7 illustrates a block diagram of representative means for implementing the disclosed method for closed-loop operation of a capacitive accelerometer, namely a force feedback control scheme. A pulse width modulation (PWM) signal generator generates voltages (V ref , V refIt is supplied with (V / 2 and 0 V) ​​and outputs the electrode voltage waveforms (V1 and V2) shown in FIGS. 5 and 6 to electrodes 1 and 2, respectively. The signal from the verification mass passes through V via a DC biasing element (which can be made, for example, of a resistor). ref It is applied to a preamplifier based on / 2, which offsets the verification mass reference voltage to the same level. This differs from the conventional technology where the verification mass is based on 0 V, as shown in FIG. 1. The preamplifier output is demodulated and applied to a loop filter that sets the dynamic response of the system, with the output used to control a PWM signal generator to integrate the signal and adjust the mark:space ratio. Feedback to the preamplifier, demodulator, loop filter, and PWM signal generator forms a closed-loop circuit (10).

[0063] There are significant differences between the examples of the present disclosure and the control scheme of the prior art described in US7267006 regarding the signal detected by the preamplifier and its subsequent demodulation. In the case of the prior scheme of FIG. 1, the AC signal detected by the preamplifier (open-loop accelerometer configuration) is schematically illustrated in FIG. 8. For example, when positive acceleration is applied, the electrode 1 signal will be greater than the electrode 2 signal due to differential gap change. FIG. 8 illustrates the resulting signals for applied positive, zero, and negative accelerations. The rising and falling edges of the drive waveform (V1) are used to trigger signal sampling occurring after a fixed delay to avoid any signal transients arising from the input waveform. Sampling points are indicated by crosses in FIG. 8. Corresponding points on the drive waveform (V1) are illustrated in FIG. 2 and FIG. 3. The delay is appropriately set to be approximately 5% of the pulse duration, which is a typical 100 kHz modulation frequency (f modIn the case of ), it is equivalent to a 0.25 microsecond delay. Limits of 5%:95% < Mark:Space < 95%:5% are set to prevent transitions from occurring during the sampling period. The acceleration signal is derived from the difference in levels between samples A and samples B as follows:

[0064]

[0065] In closed-loop operation, this AC signal is used to adjust the mark-to-space ratio to form a null at the input to the preamplifier. Accordingly, the waveforms shown in FIG. 8 will be modified so that the preamplifier output always remains at zero. However, the sampling points will vary according to the rising and falling edges of the square waveform, which now pulse-width modulates the variable mark-to-space ratio. The preamplifier output and corresponding sampling points for the closed-loop configuration are shown in FIG. 9. Corresponding points on the driving waveform (V1) are shown in FIG. 2 and FIG. 3, where FIG. 2 (50:50) represents zero acceleration and FIG. 3 (25:75) represents positive and negative accelerations.

[0066] Corresponding open-loop AC signals measured by a preamplifier for the examples of the present disclosure when positive, zero, and negative accelerations are applied are illustrated in FIG. 10. Even when the applied acceleration is zero, f mod It can be seen that a large AC signal exists. For this implementation example, if the displacement of the verification mass is induced by positive acceleration, the level of Sample A will provide a smaller positive value than for Sample B. For the next two samples, the level of Sample C will be a smaller negative value than for Sample D. The acceleration signal is derived by summing the samples as follows:

[0067]

[0068] In the case of negative acceleration, the polarity of the resulting acceleration signal will be reversed. Through this process, the acceleration signal can be extracted despite the presence of a large AC background signal. That is, the acceleration signal appears as a relatively small perturbation superimposed on the background (zero acceleration) signal. For open-loop accelerometers, this provides a direct measurement of acceleration, but in closed-loop operation, this signal is used to adjust the mark:space ratio so that the input acceleration signal is nulled.

[0069] f mod In this example, the large AC waveform shown in Fig. 10 is superimposed on a smaller acceleration-induced signal deviation. This large signal input to the preamplifier can be problematic because it limits the gain that can be applied to avoid saturation. This limitation can be overcome by summing an inverse phase compensation signal input to the preamplifier of the same amplitude. This can be implemented as schematically illustrated in Fig. 11. In this example, the capacitive accelerometer V ref / 2 and -V ref Square wave compensation signal (f) varying between / 2 modExcept for the fact that the (in) is additionally generated by a PWM signal generator, it is basically the same as already described in relation to FIG. 7. This ensures that the timing and amplitude of the compensation signal are accurately synchronized with the driving signal waveforms applied to electrodes 1 and 2. The compensation signal is applied to a fixed "compensation" capacitor C having a capacitance substantially equal to the gap capacitance of electrodes 1 and 2, and then the signal from capacitor C is applied to the input of the preamplifier. The compensation signal received at the input to the preamplifier then has substantially the same amplitude as the signal input from the verification mass electrode, but is opposite in phase. FIG. 12 illustrates the compensation effect for a representative case where the applied acceleration is positive acceleration. The uncompensated signal shows a peak deviation, which is only a small component attributable to the applied acceleration, versus a large peak. After the application of the compensation signal (dotted line), the deviation is significantly reduced. In the case of a perfectly matched compensation signal, the resulting output signal will contain only the components caused by the applied acceleration.

[0070] When operating in closed-loop mode and when a compensation signal is applied, the preamplifier output waveform shown in FIG. 10 for the open loop will be modified as shown in FIG. 13. This allows the gain of the preamplifier to be set significantly higher than was possible without the compensation signal, thereby significantly improving the measurement resolution and, consequently, the sensitivity and noise performance of the accelerometer.

[0071] The verification mass and fixed capacitive electrodes may have any suitable arrangement in the capacitive accelerometer generally disclosed herein. For example, the verification mass may be movable in a suspended or hinged structure. EP0338688 provides applicable examples of a movable verification mass electrode formed at the end of a silicon cantilever and a fixed electrode arranged to face the movable electrode. However, in some preferred examples, the verification mass is flat and includes movable electrode fingers that engage with fixed electrode fingers extending from the first and second fixed capacitive electrodes. Such engaging or comb-shaped electrode structures are known in the art, as disclosed, for example, in any one of US6761069, US6631643, or US7267006, the contents of which are incorporated by reference.

[0072] A typical electrode structure for a capacitive accelerometer (101) is schematically illustrated in FIG. 14, which is similar to that described in US7267006. In this example, a verification mass (102) is mounted on a substrate (not shown) fixed by flexible support legs (114) so ​​that it can move linearly in a plane along a sensing axis (indicated by a double arrow) in response to applied acceleration. The flexible support legs (114) extend from the body of the verification mass (102) and are fixed to anchor points (116) on the fixed substrate.

[0073] The first and second fixed capacitive electrodes (104, 106) are formed on a substrate fixed in the same plane. The verification mass (102) includes first and second sets of movable capacitive electrode fingers (108) extending from the verification mass (102) substantially perpendicular to the sensing axis and spaced apart along the sensing axis. Additionally, it can be seen that the first and second fixed capacitive electrodes (104, 106) each include first and second sets (110, 112) of fixed capacitive electrode fingers extending substantially perpendicular to the sensing axis and spaced apart along the sensing axis. A first set (110) of fixed capacitive electrodes is arranged to engage with a first set of capacitive electrode fingers (108a) that are movable in one direction along the sensing axis from the center line (m) between adjacent fixed capacitive electrode fingers (110), and a second set (112) of fixed capacitive electrodes is arranged to engage with a second set of capacitive electrode fingers (108b) that are movable in the opposite direction along the sensing axis from the center line (m) between adjacent fixed capacitive electrode fingers (112).

[0074] The verification mass (102) can move in a plane with respect to the fixed electrodes (104, 106) in one direction along the sensing axis in response to the applied acceleration. Since two sets of fixed electrode fingers (110, 112) are offset in opposite directions from the verification mass fingers (108a, 108b), movement in either direction can be measured. These offsets may be of the same magnitude. The difference in offset between the first set (110) of fixed electrode fingers and the second set (112) of fixed electrode fingers with respect to the movable fingers (108a, 108b) causes an attractive force when a driving signal (e.g., a voltage waveform) is applied to the first and second sets (110, 112) of fixed electrode fingers.

[0075] In open-loop operation, the movement of the verification mass (102) in response to the applied acceleration causes a change in the offset between the verification mass fingers (108a, 108b) and the fixed electrode fingers (110, 112). Since this change will cause a change in differential capacitance, it can be used to calculate the acceleration. In closed-loop operation, the engaged electrode fingers do not actually move relative to each other. When pulse width modulation (PWM) is applied to the first and second driving signals applied to the first and second fixed capacitive electrodes (104, 106), an electrostatic restoring force acts on the verification mass fingers (108a, 108b) so that under acceleration, the verification mass (102) does not move from the null position shown in FIG. 14, as the inertial force of the acceleration is balanced by the net electrostatic restoring force.

[0076] Those skilled in the art will understand that although the present disclosure has been illustrated by describing one or more specific examples, it is not limited to these embodiments; many changes and variations are possible within the scope of the appended claims.

Claims

Claim 1 A method for closed-loop operation of a capacitive accelerometer, wherein the capacitive accelerometer comprises: a verification mass movable along a sensing axis in response to an applied acceleration; and first and second fixed capacitive electrodes symmetrically arranged on either side of the verification mass along the sensing axis, having a gap defined between each of the first and second fixed capacitive electrodes and the verification mass when the applied acceleration is zero; and the method comprises the step of applying a first driving signal (V1) to the first fixed capacitive electrode and a second driving signal (V2) to the second fixed capacitive electrode, wherein the first and second driving signals are each zero and a maximum value (V ref A step of applying, wherein the periodic waveform has a changing amplitude between ); and a constant frequency (f) to detect the displacement of the verification mass, balance the inertial force of the applied acceleration, and provide a net electrostatic restoring force on the verification mass to maintain the verification mass in a null position. mod The method includes the step of applying pulse width modulation to the first and second driving signals having ) and a variable mark / space ratio; and next: a voltage offset (V) to the verification mass. ref A step of applying / 2); and wherein the first and second driving signals are such that any one of the first and second driving signals is V ref Or when it is at zero, the other driving signal is V ref A method characterized by the step of applying the pulse width modulation to have a waveform that changes to / 2. Claim 2 In claim 1, the first and second driving signals are V in the first half-cycle ref / 2 and V ref Draw a staircase shape in between, and V in the second accompaniment machine ref A method having a waveform that draws a staircase shape between 2 and zero. Claim 3 In claim 2, the first and second driving signals are a single square wave pulse in the first half-cycle and about V with respect to the single square wave pulse in the first half-cycle in the second half-cycle. ref A method having a waveform including a single square wave pulse that is reversed by / 2. Claim 4 In claim 1 or 2, the voltage offset V on the verification mass body ref A method comprising the step of applying / 2, wherein the intermediate electrical connection between the first and second fixed capacitive electrodes is based on the verification mass. Claim 5 The method of claim 1 or 2 further comprises the step of detecting the displacement of a verification mass by sampling an output signal from the verification mass; and the step of adding a compensation signal to the output signal, wherein the compensation signal is of a constant frequency (f mod A method having the same pulse width modulation as ), wherein the compensation signal is in opposite phase to the output signal. Claim 6 A method according to claim 5, further comprising the step of applying the compensation signal across a compensation capacitor having a capacitance substantially matched to the capacitance of the gap between each of the first and second fixed capacitive electrodes and the verification mass body when the applied acceleration is zero. Claim 7 A method according to claim 1 or 2, further comprising the step of outputting a signal indicating the applied acceleration. Claim 8 A method according to claim 1 or 2, wherein the capacitive accelerometer comprises a silicon MEMS structure and / or the verification mass is substantially planar. Claim 9 A method according to claim 1 or 2, wherein the verification mass is mounted on a substrate fixed by flexible support legs so as to be movable linearly in a plane along the sensing axis in response to applied acceleration, and the first and second fixed capacitive electrodes are formed on the fixed substrate in the same plane. Claim 10 A method according to claim 1 or 2, wherein the verification mass comprises first and second sets of movable capacitive electrode fingers extending from the verification mass substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first and second fixed capacitive electrodes each comprise first and second sets of fixed capacitive electrode fingers extending substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first set of fixed capacitive electrodes is arranged to engage with the first set of capacitive electrode fingers movable to a first offset in one direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers, and the second set of fixed capacitive electrodes is arranged to engage with the second set of capacitive electrode fingers movable to a second offset in the opposite direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers. Claim 11 As a capacitive accelerometer, a verification mass body movable along a sensing axis in response to applied acceleration; first and second fixed capacitive electrodes symmetrically arranged on one side of the verification mass body along the sensing axis, having a gap defined between each of the first and second fixed capacitive electrodes and the verification mass body when the applied acceleration is zero; and a pulse width modulation signal generator arranged to apply a first driving signal (V1) to the first fixed capacitive electrode and a second driving signal (V2) to the second fixed capacitive electrode, wherein the first and second driving signals are each zero and a maximum value (V ref A pulse width modulation signal generator having a periodic waveform whose amplitude varies between ); and a constant frequency (f) having a variable mark / space ratio to detect a signal generated by the displacement of the verification mass, balance the inertial force of the applied acceleration, and provide a net electrostatic restoring force on the verification mass to maintain the verification mass in a null position. mod ...includes a closed-loop circuit arranged to control a pulse width modulation signal generator for applying the first and second driving signals in ); next: a voltage offset (V) to the verification mass body ref / 2) is applied; and the first and second driving signals are any one of the first and second driving signals V ref Or when it is at zero, the other driving signal is V ref A capacitive accelerometer characterized by having a waveform that changes to / 2. Claim 12 In claim 11, the verification mass is a capacitive accelerometer based on an intermediate electrical connection between the first and second fixed capacitive electrodes. Claim 13 The invention of claim 11 or 12 further comprises a preamplifier arranged to sample an output signal from the verification mass body; wherein the pulse width modulation signal generator is arranged to input a compensation signal to the preamplifier for the preamplifier to add to the output signal, and the compensation signal is at a constant frequency (f mod A capacitive accelerometer having the same pulse width modulation as ), wherein the compensation signal is in opposite phase to the output signal. Claim 14 A capacitive accelerometer according to claim 13, further comprising a compensation capacitor connected between the pulse width modulation signal generator and the preamplifier, wherein the compensation capacitor has a capacitance substantially matched to the capacitance of the gap between each of the first and second fixed capacitive electrodes and the verification mass body when the applied acceleration is zero. Claim 15 The invention of claim 11 or 12 comprises a silicon MEMS structure and / or; the verification mass is mounted on a substrate fixed by flexible support legs so as to be movable linearly in a plane along the sensing axis in response to applied acceleration, and the first and second fixed capacitive electrodes are formed on the fixed substrate in the same plane and / or; the verification mass is substantially planar and / or; the verification mass comprises first and second sets of movable capacitive electrode fingers extending from the verification mass substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first and second fixed capacitive electrodes each comprise first and second sets of fixed capacitive electrode fingers extending substantially perpendicular to the sensing axis and spaced apart along the sensing axis; the first set of fixed capacitive electrodes is arranged to engage with the first set of capacitive electrode fingers movable by a first offset in one direction along the sensing axis from the median between adjacent fixed capacitive electrode fingers, and fixed A capacitive accelerometer, wherein the second set of capacitive electrodes is arranged to engage with the second set of capacitive electrode fingers that are movable in a second offset in the opposite direction along the sensing axis from the midline between adjacent fixed capacitive electrode fingers.

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