Display device
Patent Information
- Application Number
- KR1020220051083
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2022-04-25
- Publication Date
- 2026-09-16
- Estimated Expiration
- 2042-04-25
Smart Images

Figure 112022044491077-PAT00003_ABST
Abstract
Description
Technology Field
[0001] The present disclosure relates to a display device. Background Technology
[0002] Display devices are devices that display images, including Liquid Crystal Displays (LCDs) and Organic Light Emitting Diodes (OLEDs). These display devices are used in a wide variety of electronic devices, such as mobile phones, navigation systems, digital cameras, e-books, portable game consoles, and various terminals. Recently, there has been a trend toward the integration of the applications of these electronic devices; for example, cameras can be embedded within mobile phones.
[0003] At this time, an aperture may be formed in a portion of the display device of a mobile phone to embed a camera or the like within the mobile phone. At this time, some pixels may be removed to improve transmittance in the aperture area. As a result, the resolution in the aperture area is lowered, and a large amount of residual film and impurities are generated, increasing the defect rate of the device, and there is a limit to the improvement of transmittance. The problem to be solved
[0004] The embodiments are intended to provide a display device capable of preventing defects in the device while improving transmittance in the aperture region. means of solving the problem
[0005] A display device according to one embodiment includes a substrate having a main area and a sub-area that overlap each other, a plurality of light-emitting elements located on the main area and the sub-area of the substrate, a prism located between the main area and the sub-area, and a camera module located on one side of the prism.
[0006] The substrate further includes a hole region located within the main region and a sub-lighting region located within the sub-region, and a light-emitting element located on the sub-region can overlap with the hole region.
[0007] In the above sub-region, the light-emitting element may be located only within the sub-light-emitting region.
[0008] The light-emitting element may not be located in the hole region.
[0009] A display device according to one embodiment further includes a transistor connected to the light-emitting element, and the transistor and the light-emitting element may include a plurality of metal layers and a plurality of insulating layers located between the plurality of metal layers.
[0010] The plurality of metal layers and the plurality of insulating layers may not be located in the hole region.
[0011] The plurality of metal layers and the plurality of insulating layers may not be located in the sub-regions excluding the sub-luminous region.
[0012] The light-emitting element located in the main region and the light-emitting element located in the sub-region are formed simultaneously in the same process, and the transistor located in the main region and the transistor located in the sub-region can be formed simultaneously in the same process.
[0013] The density of light-emitting elements located in the main region and the density of light-emitting elements located in the sub-region may be the same.
[0014] The above prism includes a first prism and a second prism, and the first prism and the second prism each include a first surface, a second surface, and an inclined surface, and the inclined surface of the first prism and the inclined surface of the second prism may be arranged to face each other.
[0015] The first surface of the first prism is adjacent to a sub-region excluding the sub-luminous region, and the second surface of the first prism may be adjacent to the sub-luminous region.
[0016] The first surface of the second prism is adjacent to the main area of the substrate, and the second surface of the second prism may be adjacent to the camera module.
[0017] A display device according to one embodiment may further include a coating layer located between the first prism and the second prism.
[0018] The coating layer may include a first coating layer located on the inclined surface of the first prism, and a second coating layer located on the inclined surface of the second prism.
[0019] The above coating layer may include a reflective metallic material.
[0020] When the light-emitting element located in the sub-light-emitting region is in the off state and the camera module is in the on state, light incident on the hole region can pass through the prism and be incident on the camera module.
[0021] When the light-emitting element located in the sub-light-emitting region is in the ON state and the camera module is in the OFF state, the light emitted from the light-emitting element can sequentially pass through the prism and the hole region.
[0022] The above prism includes a first surface, a second surface, and an inclined surface, wherein the first surface of the prism is adjacent to a sub-region excluding the sub-lighting region, the second surface of the prism is adjacent to the sub-lighting region, and the inclined surface of the prism can face the main region and the camera module.
[0023] The above prism includes a first surface, a second surface, and an inclined surface, wherein the first surface of the prism is adjacent to the main area of the substrate, the second surface of the prism is adjacent to the camera module, and the inclined surface of the prism may face the sub-area.
[0024] The substrate further includes a hole region located within the main region and a sub-lighting region located within the sub-region, and the camera module overlaps with the hole region, and the sub-lighting region may be positioned adjacent to the lower surface of the prism. Effects of the invention
[0025] According to the embodiments, the transmittance in the aperture area of the display device can be improved, and the occurrence of defects in the device can be prevented. Brief explanation of the drawing
[0026] FIGS. 1 and FIGS. 2 are schematic plan views of a display device according to one embodiment. FIG. 3 is a schematic cross-sectional view of a display device according to one embodiment shown along line III-III of FIG. 2. FIG. 4 is a perspective view showing a part of a display device according to one embodiment. FIG. 5 is a cross-sectional view showing a portion of a display device according to one embodiment. FIG. 6 is a schematic cross-sectional view of a display device according to one embodiment. FIG. 7 is a perspective view showing a portion of a display device according to one embodiment. FIG. 8 is a schematic cross-sectional view of a display device according to one embodiment. FIG. 9 is a perspective view showing a part of a display device according to one embodiment. FIG. 10 is a schematic cross-sectional view of a display device according to one embodiment. FIG. 11 is a perspective view showing a portion of a display device according to one embodiment. FIG. 12 is a schematic cross-sectional view of a display device according to one embodiment. FIG. 13 is a perspective view showing a portion of a display device according to one embodiment. FIG. 14 is a schematic cross-sectional view of a display device according to one embodiment. Specific details for implementing the invention
[0027] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present invention. The present invention may be embodied in various different forms and is not limited to the embodiments described herein.
[0028] To clearly explain the present invention, parts unrelated to the explanation have been omitted, and the same reference numerals are used for identical or similar components throughout the specification.
[0029] Furthermore, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, and thus the present invention is not necessarily limited to what is illustrated. Thicknesses have been enlarged in the drawings to clearly represent various layers and regions. Additionally, for convenience of explanation, the thickness of some layers and regions has been exaggerated in the drawings.
[0030] Furthermore, when it is said that a part, such as a layer, membrane, region, or plate, is "on" or "on" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when it is said that a part is "directly above" another part, it means that there is no other part in between. Also, saying that a part is "on" or "on" a reference part means that it is located above or below the reference part, and does not necessarily mean that it is located "on" or "on" in the direction opposite to gravity.
[0031] Furthermore, throughout the specification, when a part is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.
[0032] Additionally, throughout the specification, "planar" means when the subject part is viewed from above, and "cross-sectional" means when the cross-section obtained by vertically cutting the subject part is viewed from the side.
[0033] Hereinafter, a display device according to one embodiment will be described with reference to FIGS. 1 to 5.
[0034] FIGS. 1 and FIGS. 2 are schematic plan views of a display device according to one embodiment. FIG. 1 shows a state before a portion of the substrate is bent, and FIG. 2 shows a state where a portion of the substrate is bent. FIG. 3 is a schematic cross-sectional view of a display device according to one embodiment shown along line III-III of FIG. 2. FIG. 4 is a perspective view showing a portion of the display device according to one embodiment, and FIG. 5 is a cross-sectional view showing a portion of the display device according to one embodiment.
[0035] First, as illustrated in FIGS. 1 to 4, a display device according to one embodiment includes a substrate (110) comprising a main area (MA) and a sub area (SA), a plurality of light-emitting elements (ED) located on the substrate (110), a prism (500) located between the main area (MA) and the sub area (SA) of the substrate (110), and a camera module (600) located on one side of the prism (500).
[0036] The substrate (110) may be divided into a main area (MA) and a sub-area (SA). The main area (MA) of the substrate (110) may be approximately rectangular in a planar shape. The substrate (110) may further include a hole area (HA) located within the main area (MA). For example, the hole area (HA) may be approximately circular in a planar shape. The sub-area (SA) of the substrate (110) may be positioned to be in contact with one edge of the main area (MA). In the state before the substrate (110) is bent, the sub-area (SA) may be formed in a shape protruding from one edge of the main area (MA). In the state where the substrate (110) is bent, the sub-area (SA) may be located on the rear side of the main area (MA). The sub-area (SA) may overlap with the main area (MA). The sub-area (SA) of the substrate (110) may be approximately rectangular in a planar shape. The substrate (110) may further include a sub-emissive region (SEA) located within a sub-region (SA). When the substrate (110) is bent, the sub-emissive region (SEA) may overlap with a hole region (HA). Light emitted from the sub-emissive region (SEA) may pass through the hole region (HA). The shape of the sub-emissive region (SEA) may correspond to the shape of the hole region (HA), and the size of the sub-emissive region (SEA) may correspond to the size of the hole region (HA). For example, the shape of the sub-emissive region (SEA) may be substantially the same as the shape of the hole region (HA). Additionally, the size of the sub-emissive region (SEA) may be substantially the same as the size of the hole region (HA).
[0037] The sub-region (SA) may be relatively smaller than the main region (MA). Therefore, the sub-region (SA) may be covered by the main region (MA). The main region (MA) and the sub-region (SA) refer to parts of a single substrate (110) and may be formed as a single unit. However, they are not limited thereto, and the main region (MA) and the sub-region (SA) may be separated from each other and may be connected by a separate member.
[0038] Multiple light-emitting elements (ED) may be positioned on the main region (MA) and sub region (SA) of the substrate (110), respectively. In the main region (MA), the light-emitting elements (ED) may be positioned mostly in the remaining portion excluding the hole region (HA). However, a driving unit for driving the light-emitting elements (ED) and a signal supply line for supplying a predetermined signal may be positioned at the edge of the main region (MA), and the light-emitting elements (ED) may not be positioned in that area. In the sub region (SA), the light-emitting elements (ED) may be positioned only in the sub-light-emitting region (SEA). That is, in the sub region (SA), the light-emitting elements (ED) may not be positioned in the area located outside the sub-light-emitting region (SEA). When the substrate (110) is bent, the main region (MA) and the sub region (SA) may overlap, and the sub-light-emitting region (SEA) may overlap with the hole region (HA). Therefore, light from the light-emitting element (ED) located in the sub-emission region (SEA) can pass through the hole region (HA) and be emitted to the outside.
[0039] At this time, the brightness of the light emitted from the light-emitting element (ED) located in the sub-light-emitting region (SEA) may differ from the brightness of the light emitted from the light-emitting element (ED) located in the main region (MA). The brightness of the light emitted from the light-emitting element (ED) located in the sub-light-emitting region (SEA) may decrease as it passes through the prism (500) and the Hall region (HA). Therefore, the brightness of the light emitted from the light-emitting element (ED) located in the sub-light-emitting region (SEA) may be relatively lower than the brightness of the light emitted from the light-emitting element (ED) located in the main region (MA). By taking this into account and adjusting the signal applied to the light-emitting element (ED) located in the sub-light-emitting region (SEA), the decrease in brightness can be prevented.
[0040] A plurality of light-emitting elements (ED) may be arranged in a predetermined shape on the main area (MA) and sub area (SA) of the substrate (110). For example, a plurality of light-emitting elements (ED) may be arranged along the row direction and column direction. However, this is merely one example, and the arrangement of the light-emitting elements (ED) may be varied. The light-emitting elements (ED) may emit light of, for example, red, green, blue, or white. A display device may display a predetermined image through the light emitted from the light-emitting elements (ED).
[0041] The density of light-emitting elements (ED) located in the main area (MA) may be similar to the density of light-emitting elements (ED) located in the sub-area (SA). In this case, the density of light-emitting elements (ED) refers to the size or number of light-emitting elements (ED) located per unit area. The density of light-emitting elements (ED) located in the main area (MA) may be substantially the same as the density of light-emitting elements (ED) located in the sub-area (SA). Therefore, the density of multiple light-emitting elements (ED) located on the substrate (110) may be uniform overall, and it may be possible to prevent the resolution from being lowered in some areas.
[0042] The prism (500) is located between the main region (MA) and the sub region (SA) of the substrate (110) and may be surrounded by the substrate (110). The prism (500) is a projection made by cutting a material such as glass at a precise angle and plane, and can disperse light incident on the prism (500). The prism (500) may include a first prism (510) and a second prism (520). For example, the first prism (510) and the second prism (520) may have a shape such as a triangular prism. In this case, the cross-sections of the first prism (510) and the second prism (520) may be formed into right triangles. However, this is merely one example, and the shape of the prism (500) may be varied.
[0043] The inclined surface of the first prism (510) and the inclined surface of the second prism (520) may be positioned to face each other. Two surfaces of the first prism (510) may be positioned adjacent to a sub-region (SA) of the substrate (110). At this time, the two surfaces may be perpendicular to each other. One of the two surfaces may be adjacent to a sub-emission area (SEA) of the sub-region (SA), and the other may be adjacent to the sub-region (SA) excluding the sub-emission area (SEA). One side of the second prism (520) may be positioned adjacent to a main area (MA) of the substrate (110). At this time, one side of the second prism (520) may be adjacent to a hole area (HA) located within the main area (MA) of the substrate (110). The other side of the second prism (520) may be adjacent to a camera module (600). At this time, one side and the other side of the second prism (520) can be perpendicular to each other.
[0044] The main region (MA) and sub region (SA) of the substrate (110), which face each other with a prism (500) in between, can be arranged side by side. Additionally, the surface of the first prism (510) adjacent to the sub-emission region (SEA) and the surface of the second prism (520) adjacent to the main region (MA) can be side by side. Light emitted from the light-emitting element (ED) located in the sub-emission region (SEA) can pass through the first prism (510) and the second prism (520) and pass through the hole region (HA). Additionally, light incident on the hole region (HA) can be reflected from the inclined surface of the second prism (520) and transmitted to the camera module (600).
[0045] A display device according to one embodiment may further include a coating layer (512, 522) located between a first prism (510) and a second prism (520). The coating layer (512, 522) may be made of a reflective metallic material such as chromium (Cr). The coating layer (512, 522) may include a first coating layer (512) and a second coating layer (522). The first coating layer (512) may be located on an inclined surface of the first prism (510), and the second coating layer (522) may be located on an inclined surface of the second prism (520). For example, a first coating layer (512) can be formed on a first prism (510), and a second coating layer (522) can be formed on a second prism (520). After positioning the first coating layer (512) and the second coating layer (522) so that they face each other, the first prism (510) and the second prism (520) can be bonded using an adhesive member or the like. Although it has been described above that two coating layers (512, 522) are located between the first prism (510) and the second prism (520), this is not limited thereto. A display device according to one embodiment may include only one of the two coating layers (512, 522). That is, only one of the first coating layer (512) and the second coating layer (522) may be located between the first prism (510) and the second prism (520).
[0046] The camera module (600) may be located below the prism (500). The camera module (600) is an optical device for taking photographs and can photograph an external subject through light incident through the hole area (HA) and reflected by the prism (500). Although it has been described that the camera module (600) is located below the prism (500), it is not limited thereto, and other electronic devices may be located therein instead. For example, a display device according to one embodiment may include various sensors capable of detecting heat or light instead of the camera module (600).
[0047] Next, as illustrated in FIG. 5, a display device according to one embodiment may include a polycrystalline transistor (LTPS TFT), an oxide transistor (Oxide TFT), etc. located on a substrate (110), and their cross-sectional structures will be described. However, such cross-sectional structures are merely examples, and the cross-sectional structures of the layers included in the display device according to one embodiment may be varied. FIG. 5 is divided into two regions, namely a first region (A1) and a second region (A2). At this time, the first region (A1) is the part where the light-emitting element (ED) is located, and refers to the part excluding the hole region (HA) from the main region (MA) and the sub-light-emitting region (SEA) of the sub-region (SA). The second region (A2) is the part where the light-emitting element (ED) is not located, and refers to the part excluding the hole region (HA) of the main region (MA) and the sub-light-emitting region (SEA) of the sub-region (SA).
[0048] The substrate (110) may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, triacetate cellulose, and cellulose acetate propionate. The substrate (110) may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, etc. The substrate (110) may be a single layer or a multilayer. The substrate (110) may have at least one base layer comprising a sequentially stacked polymer resin and at least one inorganic layer alternately stacked.
[0049] A first blocking member (121) may be positioned on the substrate (110). The first blocking member (121) may include a metal or metal alloy such as copper (Cu), molybdenum (Mo), aluminum (Al), or titanium (Ti), and may additionally include amorphous silicon. The first blocking member (121) may have a single-layer or multi-layer structure.
[0050] A buffer layer (111) may be positioned on the substrate (110) and the first blocking member (121). The buffer layer (111) may have a single-layer or multi-layer structure. The buffer layer (111) may include an inorganic insulating material or an organic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy). The buffer layer (111) may be omitted in some cases. Additionally, a barrier layer may be positioned between the substrate (110) and the buffer layer (111). The barrier layer may have a single-layer or multi-layer structure. The barrier layer may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0051] A polycrystalline semiconductor layer including a semiconductor (130) of a polycrystalline transistor (LTPS TFT) may be located on the buffer layer (111). The semiconductor (130) of the polycrystalline transistor (LTPS TFT) may overlap with the first blocking member (121). The semiconductor (130) of the polycrystalline transistor (LTPS TFT) may include a first region, a channel, and a second region. The first region and the second region may be located on both sides of the channel of the semiconductor (130) of the polycrystalline transistor (LTPS TFT), respectively. The semiconductor (130) of the polycrystalline transistor (LTPS TFT) may include a semiconductor material such as polycrystalline silicon.
[0052] A first gate insulating film (141) may be positioned on a polycrystalline semiconductor layer containing a semiconductor (130) of a polycrystalline transistor (LTPS TFT). The first gate insulating film (141) may have a single layer or a multilayer structure. The first gate insulating film (141) may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0053] A first gate conductive layer including a gate electrode (151) of a polycrystalline transistor (LTPS TFT) may be located on the first gate insulating film (141). The gate electrode (151) of the polycrystalline transistor (LTPS TFT) may overlap with the channel of the semiconductor (130). The first gate conductive layer may have a single layer or a multilayer structure. The first gate conductive layer may include a metallic material such as molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti).
[0054] After forming the first gate conductive layer, a doping process or plasma treatment can be performed. The portion of the polycrystalline semiconductor layer covered by the first gate conductive layer is not doped or plasma treated, while the portion of the polycrystalline semiconductor layer not covered by the first gate conductive layer is doped or plasma treated and can have the same characteristics as a conductor. The doping process of the polycrystalline semiconductor layer can be performed with a p-type dopant, and the polycrystalline transistor (LTPS TFT) including the polycrystalline semiconductor layer can have p-type transistor characteristics.
[0055] A second gate insulating film (142) may be positioned on a first gate conductive layer comprising a gate electrode (151) of a polycrystalline transistor (LTPS TFT). The second gate insulating film (142) may have a single layer or a multilayer structure. The second gate insulating film (142) may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0056] A second gate conductive layer including a retaining electrode (153) may be located on the second gate insulating film (142). The second gate conductive layer may have a single-layer or multi-layer structure. The second gate conductive layer may include a metallic material such as molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti). The retaining electrode (153) may overlap with the gate electrode (151) of a polycrystalline transistor (LTPS TFT) to form a retaining capacitor. A second blocking member (123) may be further located on the second gate insulating film (142), and the second blocking member (123) may overlap with the semiconductor (135) of an oxide transistor (Oxide TFT) to be described later.
[0057] A first interlayer insulating film (161) may be positioned on a second gate conductive layer comprising a retaining electrode (153) and a second blocking member (123). The first interlayer insulating film (161) may have a single layer or a multilayer structure. The first interlayer insulating film (161) may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0058] An oxide semiconductor layer including a semiconductor (135) of an oxide transistor (Oxide TFT) may be located on the first interlayer insulating film (161). The semiconductor (135) of the oxide transistor (Oxide TFT) may include a first region, a channel, and a second region. The first region and the second region may be located on both sides of the channel of the semiconductor (135) of the oxide transistor (Oxide TFT), respectively. The semiconductor (135) of the oxide transistor (Oxide TFT) may include an oxide semiconductor material.
[0059] The oxide semiconductor layer comprises a unary metal oxide such as indium oxide (In), tin oxide (Sn), or zinc oxide (Zn); a binary metal oxide such as In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, Sn-Mg oxide, In-Mg oxide, or In-Ga oxide; an In-Ga-Zn oxide, In-Al-Zn oxide, In-Sn-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, or In-Dy-Zn oxide. It may include at least one of ternary metal oxides such as In-Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, or In-Lu-Zn oxide, and quaternary metal oxides such as In-Sn-Ga-Zn oxide, In-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Zn oxide, In-Sn-Hf-Zn oxide, or In-Hf-Al-Zn oxide. For example, the oxide semiconductor layer may include IGZO (Indium-Gallium-Zinc Oxide) among the In-Ga-Zn oxides.
[0060] A third gate insulating film (143) may be positioned on an oxide semiconductor layer containing a semiconductor (135) of an oxide transistor (Oxide TFT). The third gate insulating film (143) may be positioned on the front surface of the oxide semiconductor layer and the first interlayer insulating film (161). Thus, the third gate insulating film (143) may cover the upper surface and the side surface of the semiconductor (135) of the oxide transistor (Oxide TFT). However, the present embodiment is not limited thereto, and the third gate insulating film (143) may not be positioned on the front surface of the oxide semiconductor layer and the first interlayer insulating film (161). For example, the third gate insulating film (143) may overlap with the channel of the oxide transistor (Oxide TFT) but not with the first region and the second region. The third gate insulating film (143) may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0061] A third gate conductive layer including a gate electrode (155) of an oxide transistor (Oxide TFT) may be located on the third gate insulating film (143). The gate electrode (155) of the oxide transistor (Oxide TFT) may overlap with the channel of the semiconductor (135). The third gate conductive layer may have a single layer or a multilayer structure. The third gate conductive layer may include a metallic material such as molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti).
[0062] After forming the third gate conductive layer, a doping process or plasma treatment can be performed. The portion of the oxide semiconductor layer covered by the third gate conductive layer is not doped or plasma treated, while the portion of the oxide semiconductor layer not covered by the third gate conductive layer is doped or plasma treated and can have the same characteristics as a conductor. The doping process of the oxide semiconductor layer can be performed with an n-type dopant, and the oxide transistor (Oxide TFT) containing the oxide semiconductor layer can have n-type transistor characteristics.
[0063] A second interlayer insulating film (162) may be positioned on a third gate conductive layer comprising a gate electrode (155) of an oxide transistor (Oxide TFT). The second interlayer insulating film (162) may have a single-layer or multilayer structure. The second interlayer insulating film (162) may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon nitrate (SiOxNy).
[0064] A first data conductive layer may be positioned on the second interlayer insulating film (162), comprising a source electrode (173) and a drain electrode (175) of a polycrystalline transistor (LTPS TFT), and a source electrode (177) and a drain electrode (179) of an oxide transistor (Oxide TFT). The first data conductive layer may have a single layer or a multilayer structure. The first data conductive layer may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), nickel (Ni), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), etc. The first data conductive layer may have a triple-layer structure comprising a bottom film containing a refractory metal such as molybdenum, chromium, tantalum, and titanium or an alloy thereof, an intermediate film containing an aluminum-based metal, a silver-based metal, or a copper-based metal having low resistivity, and a top film containing a refractory metal such as molybdenum, chromium, tantalum, and titanium.
[0065] The second interlayer insulating film (162), the third gate insulating film (143), the first interlayer insulating film (161), the second gate insulating film (142), and the first gate insulating film (141) may include an opening that overlaps with the source electrode (173) of the polycrystalline transistor (LTPS TFT) and the first region of the semiconductor (130). The source electrode (173) of the polycrystalline transistor (LTPS TFT) may be connected to the first region of the semiconductor (130) through the opening. Additionally, the second interlayer insulating film (162), the third gate insulating film (143), the first interlayer insulating film (161), the second gate insulating film (142), and the first gate insulating film (141) may include an opening that overlaps with the drain electrode (175) of the polycrystalline transistor (LTPS TFT) and the second region of the semiconductor (130). The drain electrode (175) of the polycrystalline transistor (LTPS TFT) can be connected to a second region of the semiconductor (130) through an opening. Accordingly, the aforementioned semiconductor (130), gate electrode (151), source electrode (173), and drain electrode (175) can constitute a polycrystalline transistor (LTPS TFT). According to an embodiment, the polycrystalline transistor (LTPS TFT) may include only the first region and the second region of the semiconductor (130) instead of the source electrode (173) and the drain electrode (175).
[0066] The second interlayer insulating film (162) and the third gate insulating film (143) may include an opening that overlaps with the source electrode (177) of the oxide transistor (Oxide TFT) and the first region of the semiconductor (135). The source electrode (177) of the oxide transistor (Oxide TFT) may be connected to the first region of the semiconductor (135) through the opening. Additionally, the second interlayer insulating film (162) and the third gate insulating film (143) may include an opening that overlaps with the drain electrode (179) of the oxide transistor (Oxide TFT) and the second region of the semiconductor (135). The drain electrode (179) of the oxide transistor (Oxide TFT) may be connected to the second region of the semiconductor (135) through the opening. Accordingly, the aforementioned semiconductor (135), gate electrode (155), source electrode (177), and drain electrode (179) may constitute an oxide transistor (Oxide TFT). According to the embodiment, the oxide transistor (Oxide TFT) may include only the first and second regions of the semiconductor (135) instead of the source electrode (177) and drain electrode (179).
[0067] A first protective film (181) may be positioned on a first data conductive layer comprising a source electrode (173) and a drain electrode (175) of a polycrystalline transistor (LTPS TFT) and a source electrode (177) and a drain electrode (179) of an oxide transistor (Oxide TFT). The first protective film (181) may include an organic insulating material such as a general-purpose polymer like polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer, a polyimide, an acrylic polymer, or a siloxane polymer.
[0068] A second data conductive layer including a connecting electrode (185) may be positioned on the first protective layer (181). The second data conductor may have a single layer or a multilayer structure. The second data conductor may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), nickel (Ni), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), etc.
[0069] The first protective layer (181) may include an opening that overlaps with the connecting electrode (185) and the drain electrode (175) of the polycrystalline transistor (LTPS TFT). The connecting electrode (185) may be connected to the drain electrode (175) of the polycrystalline transistor (LTPS TFT) through the opening.
[0070] A second protective layer (182) may be positioned on a second data conductive layer including a connecting electrode (185). A third protective layer (183) may be positioned on the second protective layer (182). The second protective layer (182) and the third protective layer (183) may include organic insulating materials such as general-purpose polymers like polymethylmethacrylate (PMMA) or polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, polyimide, acrylic polymers, and siloxane polymers. A separate conductive layer may or may not be positioned between the second protective layer (182) and the third protective layer (183). In some cases, the third protective layer (183) may be omitted.
[0071] A light-emitting element (ED) may be located on the third protective layer (183). The light-emitting element (ED) may be connected to a polycrystalline transistor (LTPS TFT). The light-emitting element (ED) may include a pixel electrode (191), a light-emitting layer (370), and a common electrode (270).
[0072] The pixel electrode (191) of the light-emitting element (ED) may be positioned on the third protective layer (183). The third protective layer (183) and the second protective layer (182) may include an opening that overlaps the pixel electrode (191) and the connecting electrode (185). The pixel electrode (191) of the light-emitting element (ED) may be connected to the connecting electrode (185) through the opening. Thus, the pixel electrode (191) of the light-emitting element (ED) may be connected to the drain electrode (175) of the polycrystalline transistor (LTPS TFT) through the connecting electrode (185).
[0073] A bank layer (350) may be positioned on the pixel electrode (191) of the light-emitting element (ED). The bank layer (350) is also called a pixel defining layer (PDL) and includes a pixel opening (351) that overlaps with at least a portion of the pixel electrode (191). At this time, the pixel opening (351) may overlap with the center of the pixel electrode (191) and may not overlap with the edge portion of the pixel electrode (191). Accordingly, the size of the pixel opening (351) may be smaller than the size of the pixel electrode (191). The bank layer (350) may be an organic insulating film comprising one or more materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin. According to an embodiment, the bank layer (350) may be formed as a black pixel defining layer (BPDL) comprising a black pigment.
[0074] The pixel opening (351) can define the formation location of the light-emitting layer (370) so that the light-emitting layer (370) can be positioned over the portion where the upper surface of the pixel electrode (191) is exposed. The light-emitting layer (370) may include a plurality of layers, some of which may be formed only within the pixel opening (351), and the remaining parts may be formed not only within the pixel opening (351) but also on the bank layer (350). That is, some layers of the light-emitting layer (370) may be located entirely over most of the area on the substrate (110).
[0075] The common electrode (270) may be positioned on the light-emitting layer (370). The common electrode (270) may be positioned over most of the area on the substrate (110). The common electrode (270) is also called a cathode electrode and may be formed as a transparent conductive layer including ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), and ITZO (Indium Tin Zinc Oxide). Additionally, the common electrode (270) may have translucent properties, in which case a microcavity may be formed together with the pixel electrode (191). According to the microcavity structure, light of a specific wavelength is emitted upward due to the spacing and characteristics between the two electrodes, and as a result, red, green, or blue colors may be displayed.
[0076] A light-emitting element (ED) emits light centered on the area where the pixel electrode (191), the light-emitting layer (370), and the common electrode (270) overlap. Each light-emitting element (ED) can display at least one of a first color, a second color, and a third color. For example, the light-emitting element (ED) can display red, green, blue, etc.
[0077] An encapsulation layer (400) may be positioned on the common electrode (270). The encapsulation layer (400) may include at least one inorganic film and at least one organic film. In this embodiment, the encapsulation layer (400) may include a first inorganic encapsulation layer (410), an organic encapsulation layer (420), and a second inorganic encapsulation layer (430). However, this is merely an example, and the number of inorganic and organic films constituting the encapsulation layer (400) may be varied. The encapsulation layer (400) is intended to protect the light-emitting element (ED) from moisture or oxygen that may enter from the outside, and one end of the first inorganic encapsulation layer (410) and the second inorganic encapsulation layer (430) may be formed to be in direct contact.
[0078] Insulating films such as a buffer layer (111), a first gate insulating film (141), a second gate insulating film (142), a first interlayer insulating film (161), a third gate insulating film (143), a second interlayer insulating film (162), a first protective film (181), a second protective film (182), and a third protective film (183) may be located in the first region (A1) and not in the second region (A2). Metal layers such as a polycrystalline semiconductor layer, a first gate conductive layer, a second gate conductive layer, an oxide semiconductor layer, a third gate conductive layer, a first data conductive layer, a second data conductive layer, and a light-emitting element (ED) may also be located in the first region (A1) and not in the second region (A2). However, some of these layers may be located in both the first region (A1) and the second region (A2). The encapsulation layer (430) may be located in both the first region (A1) and the second region (A2). In this case, for example, some of the encapsulation layer (430), such as the organic encapsulation layer (420), may be located in the first region (A1) and not in the second region (A2). That is, in the second region (A2), the first inorganic encapsulation layer (410) and the second inorganic encapsulation layer (420) may be located on the substrate (110).
[0079] Next, the operation process of a display device according to one embodiment is described as follows with reference to FIGS. 6 to 9.
[0080] FIG. 6 is a schematic cross-sectional view of a display device according to one embodiment, and FIG. 7 is a perspective view showing a part of the display device according to one embodiment. FIG. 6 and FIG. 7 show the display device according to one embodiment when operating in a reflection mode. FIG. 8 is a schematic cross-sectional view of a display device according to one embodiment, and FIG. 9 is a perspective view showing a part of the display device according to one embodiment. FIG. 8 and FIG. 9 show the display device according to one embodiment when operating in a transmission mode.
[0081] As illustrated in FIGS. 6 and 7, a display device according to one embodiment may include a substrate (110), a light-emitting element, a prism (500), and a camera module (600). At this time, if the light-emitting element located in the sub-region (SA) of the substrate (110) is turned off and the camera module (600) is turned on, the display device according to one embodiment may operate in a reflection mode. Light incident on the hole region (HA) of the substrate (110) may be incident on the second prism (520). Light incident on the second prism (520) may be reflected on the inclined surface of the second prism (520), and the light path may be changed. Light reflected on the inclined surface of the second prism (520) may pass through the lower surface of the second prism (520) and exit to the outside of the second prism (520), and may be incident on the camera module (600). Through this, the camera module (600) can photograph an external subject. Since the light-emitting element located in the sub-region (SA) is in an off state, an image may not be displayed in the hole region (HA).
[0082] As illustrated in FIGS. 8 and 9, a display device according to one embodiment may include a substrate (110), a light-emitting element, a prism (500), and a camera module (600). At this time, when the light-emitting element located in the sub-region (SA) of the substrate (110) is turned on and the camera module (600) is turned off, the display device according to one embodiment may operate in a transmission mode. Light emitted from the light-emitting element located in the sub-region (SA) may enter the first prism (510). Light entered into the first prism (510) may pass through the first prism (510) and enter the second prism (520). Light entered into the second prism (520) may pass through the second prism (520) and pass through the hole region (HA) of the substrate (110) to be emitted to the outside. Through this, an image may be displayed in the hole region (HA). At this time, since the camera module (600) is in an off state, shooting may not be performed.
[0083] In summary, when light is not emitted from the sub-region (SA) located behind the hole region (HA), light incident from the outside is reflected by the prism (500) and transmitted to the camera module (600) to enable shooting. When light is emitted from the sub-region (SA), light emitted from the light-emitting element passes through the prism (500) and the hole region (HA) to display an image. At this time, the reflectance and transmittance of light in the prism (500) can be determined by the material, thickness, etc. of the coating layer (512, 522). If the reflectance of light increases, the transmittance may decrease relatively. Conversely, if the reflectance of light decreases, the transmittance may increase relatively. For example, the reflectance and transmittance of light in the prism (500) can be adjusted between about 40% and about 60%. When the reflectance of light is about 40%, the transmittance of light may be about 60%. However, this is merely one example, and the reflectance and transmittance of light in the prism (500) can be appropriately selected by considering the performance of the camera, the image quality in the hole area (HA), etc.
[0084] When a light-emitting element is formed in a hole region (HA) and a camera module is positioned on the rear side of the hole region (HA), the amount of light passing through the hole region (HA) may be significantly reduced due to multiple layers of insulating films, metal layers, etc. located in the hole region (HA). Additionally, if some pixels are omitted to improve the transmittance in the hole region (HA), the resolution may be lowered. In a display device according to one embodiment, the transmittance of the hole region (HA) can be significantly improved by largely not forming insulating films or metal layers in the hole region (HA). Therefore, the amount of light incident on the camera module (600) can be increased, thereby improving shooting performance. Furthermore, by forming a light-emitting element in a sub-region (SA) of the substrate (110) located on the rear side of the hole region (HA), the transmittance of the hole region (HA) may not decrease even if light-emitting elements are formed at the same density as in the main region (MA). Therefore, the resolution in the hole region (HA) can be improved.
[0085] Light-emitting elements having the same or similar structure may be formed in the main region (MA) and the sub region (SA). As shown in FIG. 1, each insulating layer and metal layer can be formed on the substrate (110) while the substrate (110) is in a flat state, that is, the main region (MA) and the sub region (SA) are located on the same plane, and an encapsulation layer (400) can also be formed. That is, the light-emitting element located in the main region (MA) and the light-emitting element located in the sub region (SA) can be formed simultaneously in the same process. Similarly, the transistor located in the main region (MA) and the transistor located in the sub region (SA) can be formed simultaneously in the same process. Then, as shown in FIG. 2, the substrate (110) can be bent so that the sub region (SA) is located on the back side of the main region (MA). At this time, by making the sub-light-emitting region (SEA) overlap with the hole region (HA), light coming from the sub-light-emitting region (SEA) can be allowed to pass through the hole region (HA). A display device according to one embodiment may be composed of a bidirectional display device, a transparent display device, etc., and can be adjusted so that light emitted from a sub-luminous region (SEA) is directed toward a main-luminous region (MA).
[0086] Next, a display device according to one embodiment will be described with reference to FIGS. 10 and FIGS. 11 as follows.
[0087] Since the display device according to the embodiment illustrated in FIGS. 10 and 11 has a substantial number of parts identical to the display device according to the embodiment illustrated in FIGS. 1 to 5, the description of the identical parts is omitted. This embodiment differs from the preceding embodiment in that the prism is composed of a single prism, which will be explained further below.
[0088] FIG. 10 is a schematic cross-sectional view of a display device according to one embodiment, and FIG. 11 is a perspective view showing a part of the display device according to one embodiment.
[0089] As illustrated in FIGS. 10 and 11, a display device according to one embodiment includes a substrate (110) comprising a main area (MA) and a sub area (SA), a plurality of light-emitting elements located on the substrate (110), a prism (1510) located between the main area (MA) and the sub area (SA) of the substrate (110), and a camera module (600) located on one side of the prism (1510).
[0090] In the preceding embodiment, a structure including a pair of prisms is shown, and in this embodiment, a structure including a single prism (1510) is shown. That is, in this embodiment, the first prism from the preceding embodiment remains, and the second prism is omitted.
[0091] The prism (1510) may be surrounded by the substrate (110). Two faces of the prism (1510) may be positioned adjacent to a sub-region (SA) of the substrate (110). At this time, the two faces may be perpendicular to each other. One of the two faces may be adjacent to a sub-emission region (SEA) of the sub-region (SA), and the other may be adjacent to the sub-region (SA) excluding the sub-emission region (SEA). An inclined surface of the prism (1510) may face the main region (MA) of the substrate (110) and the camera module (600).
[0092] The main region (MA) and sub region (SA) of the substrate (110), which face each other with a prism (1510) in between, can be arranged side by side. When light is not emitted from the sub region (SA) located behind the hole region (HA), light incident from the outside is reflected by the prism (1510) and transmitted to the camera module (600) to take a picture. When light is emitted from the sub region (SA), light emitted from the light-emitting element passes through the prism (1510) and the hole region (HA) to display an image.
[0093] A display device according to one embodiment may further include a coating layer (1512) positioned on a prism (1510). The reflectance and transmittance of light in the prism (1510) may be determined by the material, thickness, etc. of the coating layer (1512).
[0094] Next, a display device according to one embodiment will be described with reference to FIGS. 12 and FIGS. 13 as follows.
[0095] Since the display device according to the embodiment illustrated in FIGS. 12 and 13 has a substantial number of parts identical to the display device according to the embodiment illustrated in FIGS. 1 to 5, the description of the identical parts is omitted. This embodiment differs from the preceding embodiment in that the prism is composed of a single prism, which will be explained further below.
[0096] FIG. 12 is a schematic cross-sectional view of a display device according to one embodiment, and FIG. 13 is a perspective view showing a part of the display device according to one embodiment.
[0097] As illustrated in FIGS. 12 and 13, a display device according to one embodiment includes a substrate (110) comprising a main area (MA) and a sub area (SA), a plurality of light-emitting elements located on the substrate (110), a prism (2520) located between the main area (MA) and the sub area (SA) of the substrate (110), and a camera module (600) located on one side of the prism (2520).
[0098] In the preceding embodiment, a structure including a pair of prisms is shown, and in this embodiment, a structure including a single prism (2520) is shown. That is, in this embodiment, the second prism from the preceding embodiment remains, and the first prism is omitted.
[0099] The prism (2520) may be surrounded by the substrate (110). One side of the prism (2520) may be positioned adjacent to the main area (MA) of the substrate (110). At this time, the one side of the prism (2520) may be adjacent to a hole area (HA) located within the main area (MA) of the substrate (110). The other side of the prism (2520) may be adjacent to the camera module (600). At this time, the one side and the other side of the prism (2520) may be perpendicular to each other. The inclined surface of the prism (2520) may face the sub-area (SA) of the substrate (110).
[0100] The main region (MA) and sub region (SA) of the substrate (110), which face each other with a prism (2520) in between, can be arranged side by side. When light is not emitted from the sub region (SA) located behind the hole region (HA), light incident from the outside is reflected by the prism (2520) and transmitted to the camera module (600) to take a picture. When light is emitted from the sub region (SA), light emitted from the light-emitting element passes through the prism (2520) and the hole region (HA) to display an image.
[0101] A display device according to one embodiment may further include a coating layer (2522) positioned on a prism (2520). The reflectance and transmittance of light in the prism (2520) may be determined by the material, thickness, etc. of the coating layer (2522).
[0102] Next, referring to FIG. 14, a display device according to one embodiment is described as follows.
[0103] Since the display device according to the embodiment illustrated in FIG. 14 has a substantial number of parts identical to the display device according to the embodiments illustrated in FIG. 1 to 5, the description of the identical parts is omitted. In this embodiment, the positions of the camera module and the sub-light-emitting region differ from those of the preceding embodiments and will be explained further below.
[0104] FIG. 14 is a schematic cross-sectional view of a display device according to one embodiment.
[0105] As illustrated in FIG. 14, a display device according to one embodiment includes a substrate (110) comprising a main area (MA) and a sub area (SA), a plurality of light-emitting elements located on the substrate (110), a prism (3500) located between the main area (MA) and the sub area (SA) of the substrate (110), and a camera module (3600) located on one side of the prism (3500).
[0106] In the previous embodiment, the sub-lighting region is located at the rear of the hole region and can overlap with each other, whereas in this embodiment, the sub-lighting region (SEA) does not overlap with the hole region (HA). In this embodiment, the positions of the camera module (3600) and the sub-lighting region (SEA) may be reversed compared to the previous embodiment.
[0107] In this embodiment, the sub-region (SA) is expanded compared to the previous embodiment and extends to the lower side of the prism (3500). The sub-luminous region (SEA) is positioned adjacent to the lower side of the prism (3500). The camera module (3600) is positioned at the rear of the hole region (HA). The camera module (3600) may overlap with the hole region (HA).
[0108] The prism (3500) may be surrounded by the substrate (110). The prism (3500) may include a first prism (3510) and a second prism (3520). The inclined surface of the first prism (3510) and the inclined surface of the second prism (3520) may be positioned to face each other. Two surfaces of the first prism (3510) may be positioned adjacent to a sub-region (SA) of the substrate (110). At this time, the two surfaces may be perpendicular to each other. Both surfaces may be adjacent to the sub-region (SA), excluding the sub-emission area (SEA). Either of the two surfaces may be adjacent to the camera module (3600). One side of the second prism (3520) may be positioned adjacent to the main area (MA) of the substrate (110). At this time, one side of the second prism (3520) may be adjacent to a hole area (HA) located within the main area (MA) of the substrate (110). The other side of the second prism (3520) may be adjacent to a sub-emissive area (SEA) located within the sub-area (SA). At this time, one side and the other side of the second prism (520) may be perpendicular to each other.
[0109] The main region (MA) and sub region (SA) of the substrate (110), which face each other with a prism (3500) in between, can be arranged side by side. When the light-emitting element located in the sub-light-emitting region (SEA) is not emitting light, light incident from the outside passes through the prism (3500) and is transmitted to the camera module (3600) to take a picture. When light is emitted from the light-emitting element located in the sub-light-emitting region (SEA), this light passes through the prism (3500) and the hole region (HA) to display an image.
[0110] Although embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention. Explanation of the symbols
[0111] 110: Substrate 500: Prism 510: First Prism 512: First coating layer 520: Second Prism 522: Second coating layer 600: Camera module
Claims
Claim 1 delete Claim 2 A display device comprising a substrate including a main region and a sub-region that overlap each other, a plurality of light-emitting elements located on the main region and the sub-region of the substrate, a prism located between the main region and the sub-region, and a camera module located on one side of the prism, wherein the substrate further includes a hole region located within the main region and a sub-light-emitting region located within the sub-region, and the light-emitting element located on the sub-region overlaps with the hole region. Claim 3 In paragraph 2, the light-emitting element in the sub-region is a display device located only within the sub-light-emitting region. Claim 4 In paragraph 2, the light-emitting element is a display device that is not located in the hole region. Claim 5 A display device in paragraph 2 further comprising a transistor connected to the light-emitting element, wherein the transistor and the light-emitting element comprise a plurality of metal layers and a plurality of insulating layers located between the plurality of metal layers. Claim 6 In paragraph 5, a display device in which the plurality of metal layers and the plurality of insulating layers are not located in the hole region. Claim 7 A display device in which, in paragraph 5, the plurality of metal layers and the plurality of insulating layers are not located in the sub-region excluding the sub-luminous region. Claim 8 A display device according to claim 5, wherein the light-emitting element located in the main region and the light-emitting element located in the sub region are formed simultaneously in the same process, and the transistor located in the main region and the transistor located in the sub region are formed simultaneously in the same process. Claim 9 In paragraph 5, a display device in which the density of light-emitting elements located in the main region and the density of light-emitting elements located in the sub region are the same. Claim 10 In paragraph 2, the prism comprises a first prism and a second prism, wherein the first prism and the second prism each comprise a first surface, a second surface, and an inclined surface, and the inclined surface of the first prism and the inclined surface of the second prism are arranged to face each other. Claim 11 In claim 10, the first surface of the first prism is adjacent to a sub-region excluding the sub-luminous region, and the second surface of the first prism is adjacent to the sub-luminous region. Claim 12 In claim 10, the first surface of the second prism is adjacent to the main area of the substrate, and the second surface of the second prism is adjacent to the camera module. Claim 13 A display device according to claim 10, further comprising a coating layer located between the first prism and the second prism. Claim 14 In claim 13, the display device comprises a coating layer including a first coating layer located on the inclined surface of the first prism and a second coating layer located on the inclined surface of the second prism. Claim 15 In paragraph 13, the coating layer comprises a reflective metallic material and is a display device. Claim 16 A display device according to claim 2, wherein when the light-emitting element located in the sub-light-emitting region is in an off state and the camera module is in an on state, light incident on the hole region passes through the prism and is incident on the camera module. Claim 17 A display device according to claim 2, wherein when the light-emitting element located in the sub-light-emitting region is in the ON state and the camera module is in the OFF state, the light emitted from the light-emitting element sequentially passes through the prism and the hole region. Claim 18 In paragraph 2, the prism comprises a first surface, a second surface, and an inclined surface, wherein the first surface of the prism is adjacent to a sub-region excluding the sub-luminous region, the second surface of the prism is adjacent to the sub-luminous region, and the inclined surface of the prism is a display device facing the main region and the camera module. Claim 19 In paragraph 2, the prism comprises a first surface, a second surface, and an inclined surface, wherein the first surface of the prism is adjacent to the main area of the substrate, the second surface of the prism is adjacent to the camera module, and the inclined surface of the prism faces the sub-area. Claim 20 A display device comprising a substrate including a main region and a sub-region that overlap each other, a plurality of light-emitting elements located on the main region and the sub-region of the substrate, a prism located between the main region and the sub-region, and a camera module located on one side of the prism, wherein the substrate further comprises a hole region located within the main region and a sub-light-emitting region located within the sub-region, the camera module overlaps with the hole region, and the sub-light-emitting region is located adjacent to the lower side of the prism.
Citation Information
Patent Citations
Light emitting device and electronic apparatus
JP2006350181A
Display device
US20210296420A1
