RF power compensation to reduce deposition or etch rate changes in response to substrate bulk resistivity variations

Abstract

A substrate processing system includes a plasma generator configured to supply (radio frequency) RF power to an electrode placed within a processing chamber. A sensor is configured to sense parameters of the RF power supplied to the electrode. A controller causes the sensor to sense parameters at least one of the time before plasma processing of the substrate and after a predetermined period has passed since plasma processing of the substrate began; and is configured to compensate for variations in the rate of the plasma process caused by variations in the bulk resistivity of the substrate placed on the substrate support by adjusting the parameters of the RF power for the substrate during plasma processing of the substrate based on the parameters sensed for the substrate.

Description

Technology Field

[0001] Cross-reference regarding related applications

[0002] This application is a national phase entry application of International Application No. PCT / US2019 / 045648 filed on August 8, 2019. This application claims the benefit of U.S. Provisional Application No. 62 / 765,244 filed on August 17, 2018. The full disclosure of the referenced applications is incorporated herein by reference.

[0003] Technology field

[0004] The present disclosure relates to substrate processing systems, more specifically to RF power compensation for reducing variations in deposition rate or etching rate in response to variations in substrate bulk resistivity. Background Technology

[0005] The description of the background technology provided in this specification is generally intended to provide context for the present disclosure. To the extent described in this background technology section, the work of the inventors named herein, as well as aspects of the technology that may not otherwise be recognized as prior art at the time of filing, are not explicitly or implicitly recognized as prior art for the present disclosure.

[0006] Substrate processing systems may be used to perform etching, deposition, cleaning, and / or other processing of substrates, such as semiconductor wafers. During processing, the substrate is placed on a substrate support, such as a pedestal or electrostatic chuck (ESC), within the processing chamber of the substrate processing system. A process gas mixture is introduced into the processing chamber to process the substrate. Plasma may be struck to enhance chemical reactions within the processing chamber. RF bias may be supplied to the substrate support to control ion energy.

[0007] A substrate processing system includes a plasma generator configured to supply RF power (radio frequency) to an electrode placed within a processing chamber. A sensor is configured to sense parameters of the RF power supplied to the electrode. A controller causes the sensor to sense parameters at least once before plasma processing of the substrate and after a predetermined period has passed since plasma processing of the substrate began; and is configured to compensate for variations in the rate of the plasma process caused by variations in the bulk resistivity of the substrate placed on the substrate support by adjusting the parameters of the RF power for the substrate during plasma processing of the substrate based on the parameters sensed for the substrate.

[0008] In other features, the parameter is selected from a group consisting of an RF voltage, an RF current, and an RF phase angle at a first frequency. The parameter includes an RF voltage at the first frequency. The first frequency is 2 MHz or less. The first frequency is in the range of 300 kHz to 500 kHz. The plasma generator includes a first RF source that supplies at least a portion of RF power at the first frequency; and a matching network comprising an input connected to the first RF source and an output connected to an electrode.

[0009] In other features, the plasma generator includes a second RF source that supplies at least a portion of RF power at a second frequency. The second RF source is connected to the input of a matching network, and the second frequency is different from the first frequency. A sensor is connected between the matching network and the electrode.

[0010] In other features, plasma processing involves the deposition of a film on a substrate, and the rate includes a deposition rate. Plasma processing involves the etching of a film on a substrate, and the rate includes an etching rate. Plasma processing includes bevel deposition in a bevel etcher.

[0011] A method for operating a substrate processing system comprising: supplying (radio frequency) RF power to an electrode disposed within a processing chamber; sensing parameters of the RF power supplied to the electrode; sensing parameters at least once between before plasma processing of the substrate and after a predetermined period has passed since plasma processing of the substrate began; and compensating for the rate of plasma processing caused by fluctuations in the bulk resistivity of the substrate disposed on a substrate support by adjusting parameters during plasma processing of the substrate based on the parameters sensed for the substrate.

[0012] In other features, the parameter is selected from a group consisting of RF phase angles of RF voltage, RF current, and RF power. The parameter includes an RF voltage of a first frequency. The RF voltage has a frequency of 2 MHz or less. The RF voltage has a frequency in the range of 300 kHz to 500 kHz.

[0013] In other features, the method comprises the steps of: supplying at least a portion of RF power using a first RF source operating at a first frequency; supplying at least a portion of RF power using a second RF source operating at a second frequency higher than the first frequency; and using a matching network to match the impedances of the first RF source and the second RF source to an electrode.

[0014] In other features, the method includes the step of sensing parameters between a matching network and an electrode. Plasma processing includes the deposition of a film on a substrate, and the rate includes a deposition rate. Plasma processing includes the etching of a film on a substrate, and the rate includes an etching rate.

[0015] A substrate processing system includes a plasma generator configured to supply (radio frequency) RF power to an electrode disposed within a processing chamber. A first RF source supplies at least a portion of the RF power at a first frequency. A second RF source supplies at least a portion of the RF power at a second frequency greater than the first frequency. A matching network includes an input connected to the first RF source and the second RF source, and an output connected to the electrode. A sensor is configured to sense parameters of the RF power at the first frequency. A controller causes the sensor to sense parameters at at least one of the time before plasma processing of the substrate and after a predetermined period has passed since plasma processing of the substrate began; and is configured to compensate for variations in one of the deposition rate and etching rate of the plasma process caused by variations in the bulk resistivity of the substrate disposed on the substrate support by adjusting the parameters of the RF power for the substrate during plasma processing of the substrate based on the parameters sensed for the substrate.

[0016] Additional applicable areas of the present disclosure will become apparent from the detailed description, claims, and drawings. The detailed description and specific examples are intended merely for illustrative purposes and are not intended to limit the scope of the present disclosure. Brief explanation of the drawing

[0017] The present disclosure will be more fully understood from the detailed description and the accompanying drawings. FIG. 1 is a cross-sectional view of an example of a part of a substrate processing system according to the present disclosure. Figure 2 is a graph illustrating an example of the deposition rate as a function of HF voltage. Figure 3 is a graph illustrating an example of the deposition rate as a function of LF voltage. Figure 4 is a graph illustrating an example of the deposition rate as a function of LF power. Figure 5 is a graph illustrating forward LF power and LF voltage as a function of time. Figure 6 is a graph illustrating an example of the deposition rate as a function of the LF voltage during the oxidation step. Figure 7 is a graph illustrating examples of HF forward power, LF forward power, and LF voltage during the oxidation step, and LF power compensation during the deposition step. FIG. 8 is a functional block diagram of an example of a control system for controlling RF power compensation according to the present disclosure. FIG. 9 is a flowchart illustrating an example of a method for controlling RF power compensation according to the present disclosure. In drawings, reference numbers may be reused to identify similar and / or identical elements. Specific details for implementing the invention

[0018] Substrate processing systems are configured to process a large number of substrates using a common process. To reduce defects, the process must be performed in the same way for each substrate. For example, the deposition rate and / or etching rate must be the same for all substrates processed by the recipe during a given step. However, substrates supplied to the substrate processing system may have different characteristics that could negatively affect process uniformity. For example, substrates delivered to the substrate processing system may have variations in bulk resistivity.

[0019] Current tools for bevel deposition experience deposition rate variations greater than ±17% because the substrate bulk resistivity varies in the range of 1 to 500 Ω·cm. Similar etching rate variations are expected due to differences in substrate bulk resistivity. Some manufacturers attempt to mitigate deposition rate variations by selecting and controlling the substrate bulk resistivity of supplied substrates, which increases costs.

[0020] The present disclosure relates to systems and methods for dynamic RF power compensation in plasma-based substrate processing systems to mitigate deposition rate variations or etching rate variations caused by variations in substrate bulk resistivity. The disclosed systems and methods can perform RF power compensation for each individual substrate. In some examples, the systems and methods use an RF voltage sensor to detect the RF voltage associated with the substrate bulk resistivity, but other parameters such as current, phase angle, etc. may be used. A controller compensates the RF power based on the measured parameters to mitigate deposition rate variations with substrate bulk resistivity variations.

[0021] For example, the RF voltage is detected during the non-deposition step, and the detected RF voltage is subsequently used to compensate for RF power during the deposition step. Alternatively, the RF voltage is detected at the start of the deposition step, and the detected RF voltage is subsequently used to compensate for RF power for the remainder of the deposition step.

[0022] In other examples, the RF voltage is detected during the non-etching step, and the detected RF voltage is subsequently used to compensate for RF power during the etching step. In some examples, the RF voltage is detected at the start of the etching step, and the detected RF voltage is subsequently used to compensate for RF power during the remainder of the etching step.

[0023] The following description relates to the compensation of RF power supplied to a substrate processing system during bevel deposition to compensate for variations in the bulk resistivity of the substrate, but the principles described herein may also be used for etching in a bevel etcher. These principles may also be applied to deposition or etching in other types of plasma processing chambers and / or processes (e.g., CVD (plasma-enhanced chemical vapor deposition) or PEALD (plasma enhanced atomic layer deposition)).

[0024] Now, referring to FIG. 1, a substrate processing system (100) for cleaning the bevel edge of a substrate (118) and / or depositing a thin film on the bevel edge of a substrate (118) is shown. The substrate processing system (100) includes a chamber wall (102) having a gate (142), through which the substrate (118) is loaded / unloaded. An upper electrode assembly (104) is connected to a support (108). The substrate processing system (100) includes a lower electrode assembly (106). An actuator (not shown) is attached to the support (108) to move the upper electrode assembly (104) up and down (in the direction of the two-way arrow) to adjust the gap between the upper electrode assembly (104) and the substrate (118).

[0025] A metal bellows (148) forms a vacuum seal between the chamber wall (102) and the support (108) while allowing the support (108) to move perpendicularly to the chamber wall (102). The support (108) has a central gas feed (passage) (112) and an edge gas feed (passage) (120). One or both of the gas feeds (112, 120) can deliver a plasma gas mixture to clean the bevel edge and / or deposit a thin film thereon.

[0026] During operation, plasma is formed around the bevel edge of the substrate (118) and is generally ring-shaped. To prevent the plasma from reaching the center portion of the substrate (118), the volume between the upper dielectric plate (116) on the upper electrode assembly (104) and the substrate (118) is small, and the process gas is supplied from a central feed (e.g., through a stepped hole (114)). Subsequently, the gas passes through the gap between the upper electrode assembly (104) and the substrate (118) in the radial direction of the substrate.

[0027] In some examples, the purge gas is injected through the center gas feed (112), while the process gas is injected through the edge gas feed (120). The plasma / process gas is drawn from the chamber volume (151) to the bottom volume (140) through a plurality of holes (outlets) (141). In some examples, a vacuum pump (143) may be used to exhaust the bottom volume (140) during a cleaning or deposition operation.

[0028] The upper electrode assembly (104) comprises an upper dielectric plate (116) and an upper metal component (110) which is fixed to a support (108) by a suitable fastening mechanism and grounded through the support (108). The upper metal component (110) has one or more edge gas passages or through holes (122a, 122b) and an edge gas plenum (124a). The edge gas passages or through holes (122a, 122b) are coupled to an edge gas feed (120) for fluid communication during operation. The upper dielectric plate (116) is attached to the upper metal component (110).

[0029] The lower electrode assembly (106) includes a powered electrode (126) having an upper portion (126a) and a lower portion (126b). A pin operating unit (132) and lift pins (130) move the substrate (118) up and down. The lower dielectric ring (138) includes an upper portion (138a) and a lower portion (138b). In some examples, the chuck includes an electrostatic chuck or a vacuum chuck. Hereinafter, the term powered electrode refers to one or both of the upper and lower portions (126a, 126b). Similarly, the term lower dielectric ring (138) refers to one or both of the upper portion and the lower portion (138a, 138b). The powered electrode (126) is coupled to one radio frequency (RF) power source (170) or two radio frequency (RF) power sources (170 and 171) to receive RF power during operation.

[0030] Lift pins (130) are moved vertically within cylindrical holes or paths (131) and are moved between upper and lower positions by a pin actuation unit (132) located on a powered electrode (126). The pin actuation unit (132) includes a housing around each lift pin to maintain a vacuum-sealed atmosphere around the pins. The pin actuation unit (132) includes any suitable lift pin mechanism, such as a robot (133) (e.g., a horizontal arm extending into each housing and having segments attached to each pin) and an arm actuating device (not shown) having a pin guide assembly (133a).

[0031] A substrate (118) is mounted on a lower electrode or on a lower configurable PEZ (plasma-exclusion-zone) ring (160). The term PEZ refers to a radial distance from the center of the substrate to the outer edge of the plasma-exclusion zone for cleaning the bevel edge or for deposition on the bevel edge. In one embodiment, the upper surface of the powered electrode (126), the lower surface of the substrate (118), and the inner periphery of the lower configurable PEZ ring (160) may form an enclosed vacuum zone recess (vacuum zone) (119) that communicates with a fluid through a vacuum source, such as a vacuum pump (136). Cylindrical holes or paths for the lift pins (130) are also shared as gas passages, through which the vacuum pump (136) evacuates the vacuum zone (119) during operation. The powered electrode (126) includes a plenum (134) to reduce transient pressure fluctuations within the vacuum region (119). In cases where multiple lift pins are used, the plenum (134) provides a uniform suction rate for the cylindrical holes.

[0032] During operation, substrate bowing can be reduced by using the pressure difference between the top surface and the bottom surface of the substrate (118). The pressure within the vacuum region (119) is maintained under vacuum during operation by a vacuum pump (136) coupled to a plenum (134). By adjusting the gap between the upper dielectric plate (116) and the top surface of the substrate (118), the gas pressure within the gap can be varied without changing the overall flow rate of the process gas(s). Thus, by controlling the gas pressure within the gap, the pressure difference between the top surface and the bottom surface of the substrate (118) can be varied, and accordingly, the bending force applied to the substrate (118) can be controlled.

[0033] In some examples, the lower portion (138b) of the lower dielectric ring has a step (152) formed on the inner periphery of the upper surface to mate with a recess on the lower edge of the powered electrode (126). In some examples, the lower portion (138b) has a step (150) formed on the outer periphery to mate with a stepped surface on the upper portion (138a) of the lower dielectric ring, referred to as the focus ring. The steps (150, 152) align the lower dielectric ring (138) with the powered electrode (126). The step portion (150) also forms a tortuous gap along its surface to eliminate a direct line of sight between the powered electrode (126) and the chamber wall (102), thereby reducing the possibility of secondary plasma striking between the powered electrode (126) and the chamber wall (102).

[0034] The controller (190) controls the operation of the substrate processing system (100). The controller communicates with the gas delivery system (192) to deliver gases to the substrate processing system (100) at appropriate times during the process. The controller (190) communicates with an RF sensor (not shown herein) that senses RF voltage or RF voltage, current, and phase angle. The RF sensor is installed between the RF matching network (not shown herein) and the processing chamber. The controller (190) communicates with and controls the vacuum pumps (136 and 143) to control the pressure of the substrate processing system. The controller (190) communicates with and controls the robot (133). The controller (190) communicates with and controls two RF power sources (170 and 171).

[0035] Now, referring to FIGS. 2 through 4, the substrate bulk resistivity will typically vary for a group of substrates to be processed within a processing chamber using a common recipe. As described above, variations in substrate bulk resistivity have a negative effect on the deposition rate and / or etching rate. In FIG. 2, the deposition rate is shown as a function of HF voltage as the substrate bulk resistivity varies within a predetermined resistivity range from 1 to 500 Ω·cm. As used herein, HF refers to RF frequencies from 2 MHz to 120 MHz. For example, HF may refer to 13.56 MHz. As can be seen from FIG. 2, there is no apparent relationship between the plasma HF voltage and the deposition rate, and the HF voltage has a small variation from 166 V to 173 V, which implies that the HF power delivered to the plasma is not significantly affected by different wafer bulk resistivity. Therefore, HF voltage cannot be used as an indicator of wafer bulk resistivity for HF power compensation to reduce deposition rate variation with wafer bulk resistivity. Fluctuations in HF power delivered into the plasma are not the primary cause of deposition rate variation.

[0036] In FIG. 3, the deposition rate is shown as a function of the LF voltage in the deposition step as the substrate bulk resistivity varies within a predetermined resistivity range. As used herein, LF refers to lower RF frequencies of less than 2 MHz. For example, LF may be in the range of 300 to 500 kHz (e.g., 400 kHz). As can be understood, there is a very good linear relationship between the plasma LF voltage and the deposition rate, as shown in FIG. 3. The LF voltage sampled at 2 seconds of the deposition step shows a large variation from 365 V to 420 V, indicating that the LF power delivered to the plasma is affected by different wafer bulk resistivitys. As the wafer bulk resistivity increases, more LF power loss occurs on the wafer, and less net power is delivered to the plasma. Therefore, the deposition rate decreases with higher wafer bulk resistivitys. As shown in Figure 4, there is also an excellent linear relationship between the plasma LF power and the deposition rate. Therefore, the LF voltage can be used as a primary indicator of wafer bulk resistivity for LF power compensation to reduce variations in the deposition rate due to wafer bulk resistivity. Variations in the LF power delivered to the plasma are a major cause of variations in the deposition rate.

[0037] For example, when the deposition step begins, the LF voltage is detected using a sensor located between the matching network and the processing chamber at a predetermined time (e.g., at 2 seconds of the deposition step) after the plasma is struck. Subsequently, the deposition rate D / R is:

[0038] D / R = a*V_LF+b

[0039] In this example, as shown in Fig. 3, a = -52.761 and b = 33402. To obtain a D / R of 13,000 Å / min, the LF power compensation is

[0040] ΔP = (D / R-13000) / k and,

[0041] Here, as shown in Fig. 4, k = 22.392 in this example.

[0042] The LF power will be compensated to or changed to a new compensated power immediately after the LF voltage sample is taken until the end of the deposition step, based on the following:

[0043] P_new = P_original - ΔP

[0044] In this example, P_original = 300 W.

[0045] Combining the previous equations for LF power compensation,

[0046] P_new = P_original - (a*V_LF+b-13000) / k,

[0047] In this example, a = -52.761, b = 33402, k = 22.392.

[0048] As can be understood, the constant parameters a, b, and k are determined for the process and system, respectively, by the substrate execution data. That is, the equation parameters a, b, and k are configurable for different processes / recipes and / or processing chambers.

[0049] Referring now to FIG. 5, a graph illustrating forward RF power and LF voltage as a function of time (in LF) is shown. In some examples, voltage sampling is performed by the V or VI probe at a predetermined time, such as 2 seconds after striking the plasma. Subsequently, the compensated LF power is applied for the remainder of the deposition step after the LF voltage sampling time (e.g., from 2 seconds to 2.5 seconds or 3.0 seconds until the end of the deposition step). However, LF voltage sampling may be performed during the non-deposition step. The sampled LF voltage is used to compensate for the LF power throughout the entire deposition step.

[0050] As described above, LF voltage measurement may be taken when a dual RF (HF+LF) plasma is present and a substrate is placed inside a processing chamber. For example, a preceding plasma processing step may be used to measure the LF voltage, and the measured LF voltage may be used to compensate for the LF power during a subsequent plasma deposition processing step.

[0051] In FIGS. 6 and 7, one example illustrates the measurement of LF voltage during a first step (710) (e.g., an oxidation or non-deposition step) and the compensation of LF power during a subsequent deposition step (720) based on the measured LF voltage. In this example, the substrate is placed in a processing chamber and the plasma is struck in the processing chamber during two steps. In some examples, the plasma is extinguished between the two steps. In other examples, the plasma is maintained during the two steps and the plasma process parameters are changed between the steps. In some examples, the plasma processing steps are sequential without step intervention. In other examples, one or more intervening substrate processing steps (plasma or non-plasma processing steps) may be performed between the plasma processing steps.

[0052] Referring to FIG. 6, an exemplary graph illustrates the deposition rate as a function of the LF voltage measured during the oxidation (non-deposition) step. The LF voltage measured during the oxidation step is used to compensate for the LF forward power during the deposition step following the oxidation step. As can be understood, the LF power compensation parameters a = -107, b = 26301, k = 22.392 obtained from FIG. 6 and FIG. 4 for LF power compensation (using the equation (P_new = P_original-(a*V_LF+b-13000) / k)) are different from those obtained from FIG. 3 and FIG. 4 in the above example. In FIG. 7, the HF forward power, LF forward power, and LF voltage are shown during the oxidation step (710) and the deposition step (720). The LF voltage 118 V measured in the oxidation step (710) is used to determine a new compensated LF power of 274 W during the deposition step (720) following the oxidation step. In this RF power compensation method, the variation in deposition rate for a wafer bulk resistivity range of 1 to 500 Ω·cm is significantly reduced from + / - 17% to + / - 3%.

[0053] Now, referring to FIG. 8, a control system (800) for controlling / compensating RF power according to the present disclosure is shown. The control system (800) may be used with the processing chamber shown in FIG. 1 or with other plasma processing chambers used for deposition and / or etching. The control system (800) includes a controller (810) that provides power control signals to an HF (high-frequency) generator (820) and an LF (low frequency) generator (824). The HF generator (820) generates HF RF power that is output to a dual frequency impedance matching network (830). The LF generator (824) generates LF RF power that is output to the dual frequency impedance matching network (830). In some examples, an RF voltage sensor or VI probe (832) for sensing RF voltage is placed between the dual frequency impedance matching network (830) and the processing chamber (840), but RF voltage can be sensed at other locations around the plasma processing chamber.

[0054] The processing chamber (840) includes a first electrode (842) and a second electrode (844). A gas delivery system (192) (not shown in this drawing) supplies a gas mixture to the processing chamber (840). In some examples, the gas delivery system (192) includes one or more gas sources connected to the processing chamber (840) by one or more valves, mass flow controllers and / or manifolds.

[0055] The outputs of the HF generator (820) and the LF generator (824) are connected to either the first electrode (842) or the second electrode (844) via a dual frequency matching network (830). The other of the first electrode (842) or the second electrode (844) is connected to a reference potential such as ground. Plasma is generated when the plasma gas mixture between the first electrode (842) and the second electrode (844) is excited by RF power. As can be understood, the gas mixture may include one or more deposition precursors for deposition processes or etching gases for etching processes.

[0056] The impedance matching network (830) attempts to match the impedances of the HF generator (820) and the LF generator (824) with the effective impedances of the electrodes, plasma, and processing chamber. When matched, maximum power transfer occurs without reflection. The controller (810) adjusts the power control signal supplied to the LF generator (824) based on the LF voltage measured when measured by the voltage probe identified in 850 or the voltage and current (VI) probe, which includes 832 when an RF sensor is installed between the matching network (830) and the processing chamber (840).

[0057] Now, referring to FIG. 9, a method (900) for controlling / compensating RF power during deposition or etching is illustrated. In 920, a substrate is placed on a substrate support (or the substrate already exists from a previous processing step). In 924, process gases are supplied to a processing chamber, and the plasma is struck by supplying power using an LF generator and an HF generator. When deposition is performed, the process gases include one or more precursors. When etching is performed, the process gases include one or more etching gases.

[0058] After waiting for a predetermined period in 926, parameters such as LF voltage are measured in 930. LF power is calculated while the substrate is placed inside the processing chamber and plasma is present. In 934, LF power compensation is determined as described above based on the sensed parameters (e.g., LF voltage in this example). In 938, LF power is adjusted based on the LF power compensation calculated in 934.

[0059] At 942, the method determines whether deposition or etching is complete. If 942 is true, the method extinguishes the plasma at 946 and stops the flow of process gases. The disclosed RF power compensation method utilizes a measured RF voltage (e.g., LF voltage). However, the same RF power compensation method may also utilize other RF parameters, such as RF current from an RF current sensor or VI probe, phase angle from VI probe, or other parameters. In addition, the wafer bulk resistivity range described above is 1 to 500 Ω·cm, but the RF power compensation method is not limited to this wafer bulk resistivity range.

[0060] The foregoing description is by nature merely illustrative and is not intended to limit the present disclosure, its application, or its use. The broad teachings of the present disclosure may be embodied in various forms. Accordingly, while the present disclosure includes specific examples, the true scope of the present disclosure should not be limited, as it will become apparent upon study of the drawings, the specification, and the claims below. It should be understood that one or more steps within the method may be performed in a different order (or simultaneously) without altering the principles of the present disclosure. Furthermore, although each of the embodiments has been described above as having specific features, any one or more of these features described for any embodiment of the present disclosure may be embodied in features of any other embodiment and / or may be combined even if the combination is not explicitly described. That is, the described embodiments are not mutually exclusive, and substitutions of one or more embodiments for one another are within the scope of the present disclosure.

[0061] Spatial and functional relationships between elements (e.g., between modules, circuit elements, semiconductor layers, etc.) are described using various terms including “connected,” “engaged,” “coupled,” “adjacent,” “next to,” “on top of,” “above,” “below,” and “disposed.” When a relationship between a first element and a second element is described in the above disclosure, unless explicitly described as “direct,” this relationship may be a direct relationship in which no other intermediary element exists between the first element and the second element, but may also be an indirect relationship in which one or more intermediary elements exist (spatially or functionally) between the first element and the second element. As used in this specification, at least one of the phrases A, B and C should be interpreted to mean logic (A OR B OR C) using a non-exclusive logical OR, and should not be interpreted to mean "at least one A, at least one B, and at least one C."

[0062] In some embodiments, the controller is part of a system that may be part of the examples described above. Such systems may include semiconductor processing equipment comprising processing tools or tools, chambers or chambers, a platform or platforms for processing, and / or specific processing components (wafer substrate support, gas flow system, etc.). These systems may be integrated with electronic devices to control their operation before, during, and after the processing of a semiconductor wafer or substrate. The electronic device may be referred to as a "controller" that may control various components or sub-parts of the system or systems. The controller may be programmed to control any of the processes disclosed herein, depending on the processing requirements and / or type of the system, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and motion settings, and wafer transfer into and out of load locks connected to or interfacing with tools and other transfer tools and / or a specific system.

[0063] Generally speaking, a controller may be defined as an electronic device having various integrated circuits, logic, memory, and / or software that receives instructions, issues instructions, controls operations, enables cleaning operations, enables endpoint measurements, etc. Integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs (Application Specific Integrated Circuits), and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions transmitted to the controller or system in the form of various individual settings (or program files) that define operation parameters for executing a specific process on or for a semiconductor wafer. In some embodiments, the operation parameters may be part of a recipe defined by process engineers to achieve one or more processing steps during the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0064] In some implementation examples, the controller may be integrated with the system, coupled to the system, otherwise networked to the system, or coupled to or part of a computer that may be a combination thereof. For example, the controller may be all or part of a factory (fab) host computer system capable of enabling remote access to wafer processing, or it may be located within the "cloud." The computer may enable remote access to the system to monitor the current progress of manufacturing operations, examine the history of past manufacturing operations, examine trends or performance measurements from multiple manufacturing operations, change parameters of the current processing, set processing steps following the current processing, or start a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system via a local network or a network that may include the Internet. The remote computer may include a user interface that enables the input or programming of parameters and / or settings to be subsequently transmitted from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that parameters may be specific to the type of process to be performed and the type of tool configured to be interfaced or controlled by the controller. Accordingly, as described above, the controller may be distributed, for example, by including one or more individual controllers that are networked together and operate toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber communicating with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) that are coupled to control the process on the chamber.

[0065] Exemplary systems may include, without limitation, a plasma etching chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etching chamber or module, a PVD (Physical Vapor Deposition) chamber or module, a CVD (Chemical Vapor Deposition) chamber or module, an ALD chamber or module, an ALE chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be used or associated in the manufacture and / or fabrication of semiconductor wafers.

[0066] As described above, depending on the process steps or steps to be performed by the tool, the controller may communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout the factory, a main computer, another controller, or tools used in material transfer for moving containers of wafers from tool locations and / or load ports within the semiconductor manufacturing plant and to tool locations and / or load ports.

Claims

Claim 1 A substrate processing system comprising: a generator configured to supply RF power (radio frequency) to an electrode disposed within a processing chamber; a sensor configured to sense a parameter of the RF power supplied to the electrode; and a controller configured to cause the sensor to sense the parameter at least once between before processing the substrate and after a predetermined period after the processing of the substrate has started; and to compensate for variations in the rate of the etching or deposition process caused by variations in the bulk resistivity of the substrate disposed on a substrate support by adjusting the RF power to the substrate during the etching or deposition process of the substrate based on the parameter sensed for the substrate. Claim 2 A substrate processing system according to claim 1, wherein the parameter is selected from the group consisting of RF voltage, RF current, and RF phase angle at a first frequency. Claim 3 A substrate processing system according to claim 1, wherein the step of adjusting the RF power includes adjusting at least one of the RF voltage, RF current, and RF phase angle of the RF power. Claim 4 A substrate processing system according to claim 1, wherein the parameter includes an RF voltage of a first frequency. Claim 5 A substrate processing system according to claim 4, wherein the first frequency is 2 MHz or less. Claim 6 A substrate processing system according to claim 4, wherein the first frequency is in the range of 300 kHz to 500 kHz. Claim 7 A substrate processing system according to claim 4, wherein the generator comprises: a first RF source that supplies at least a portion of the RF power at the first frequency; and a matching network comprising an input connected to the first RF source and an output connected to the electrode. Claim 8 In claim 7, the generator comprises a second RF source that supplies at least a portion of the RF power at a second frequency, the second RF source is connected to the input of the matching network, and the second frequency is different from the first frequency, a substrate processing system. Claim 9 A substrate processing system according to claim 8, wherein the second frequency is in the range of 2 MHz to 120 MHz. Claim 10 A substrate processing system according to claim 8, wherein the second frequency is 13.56 MHz. Claim 11 In claim 7, the sensor is a substrate processing system connected between the matching network and the electrode. Claim 12 A substrate processing system according to claim 1, wherein the processing of the substrate comprises one of: deposition, wherein the deposition of a film on the substrate comprises the deposition, wherein the rate comprises a deposition rate; and etching, wherein the etching of a film on the substrate comprises the etching rate. Claim 13 A substrate processing system according to claim 1, wherein the processing of the substrate includes bevel deposition in a bevel etcher (bevel etcher). Claim 14 A method for operating a substrate processing system, comprising: supplying (radio frequency) RF power to an electrode disposed within a processing chamber; sensing a parameter of the RF power supplied to the electrode; sensing the parameter at least once between before processing the substrate and after a predetermined period has passed since the processing of the substrate began; and compensating for the rate of the etching or deposition process caused by fluctuations in the bulk resistivity of the substrate disposed on a substrate support by adjusting the RF power during the etching or deposition process of the substrate based on the parameter sensed for the substrate. Claim 15 A method for operating a substrate processing system according to claim 14, wherein the parameter is selected from the group consisting of RF voltage, RF current, and RF phase angle of the RF power. Claim 16 A method for operating a substrate processing system, wherein the parameter comprises an RF voltage of a first frequency in claim 14. Claim 17 A method for operating a substrate processing system, wherein the RF voltage has a frequency of 2 MHz or less, in accordance with claim 16. Claim 18 A method for operating a substrate processing system, wherein the RF voltage has a frequency in the range of 300 kHz to 500 kHz in claim 16. Claim 19 A method for operating a substrate processing system according to claim 14, further comprising: supplying at least a portion of the RF power using a first RF source operating at a first frequency; supplying at least a portion of the RF power using a second RF source operating at a second frequency higher than the first frequency; and using a matching network to match the impedances of the first RF source and the second RF source to the electrode. Claim 20 A method for operating a substrate processing system according to claim 19, wherein the second frequency is in the range of 2 MHz to 120 MHz. Claim 21 A method for operating a substrate processing system according to claim 19, wherein the second frequency is 13.56 MHz. Claim 22 A method for operating a substrate processing system according to claim 19, further comprising the step of sensing the parameter between the matching network and the electrode. Claim 23 A method of operating a substrate processing system according to claim 14, wherein the processing of the substrate includes the deposition of a film on the substrate, and the rate includes a deposition rate. Claim 24 A method of operating a substrate processing system according to claim 14, wherein the processing of the substrate includes etching of a film on the substrate, and the rate includes an etching rate. Claim 25 A substrate processing system comprising: a generator configured to supply (radio frequency) RF power to an electrode disposed within a processing chamber, the generator comprising: a first RF source supplying at least a portion of the RF power at a first frequency; a second RF source supplying at least a portion of the RF power at a second frequency greater than the first frequency; and a matching network comprising an input connected to the first RF source and the second RF source and an output connected to the electrode; a sensor configured to sense a parameter of the RF power at the first frequency; and a controller configured to cause the sensor to sense the parameter at least once between before processing the substrate and after a predetermined period after the processing of the substrate has started; and to compensate for variations in one of the deposition rate and etching rate of an etching or deposition process caused by variations in the bulk resistivity of the substrate disposed on a substrate support by adjusting the RF power for the substrate during the processing of the substrate based on the parameter sensed for the substrate.

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