Display panel and display apparatus having the same

Abstract

The display panel includes a light-emitting element, a driving switching element, a bias switching element, and a bias control switching element. The driving switching element applies a driving current to the light-emitting element. The bias switching element is connected to the first electrode of the driving switching element and applies a bias voltage to the first electrode of the driving switching element. The bias control switching element is connected to the first electrode of the bias switching element and applies a bias voltage to the first electrode of the bias switching element.

Description

Technology Field

[0001] The present invention relates to a display panel and a display device including the same, wherein a bias control switching element is used to perform a bias operation in a self-scan section without performing a bias operation of a driving switching element in an address scan section, thereby reducing the difference between the brightness of the address scan section and the brightness of the self-scan section. Background Technology

[0002] Generally, a display device includes a display panel and a display panel driver. The display panel includes a plurality of gate lines, a plurality of data lines, a plurality of emission lines, and a plurality of pixels. The display panel driver includes a gate driver that provides a gate signal to the plurality of gate lines, a data driver that provides a data voltage to the data lines, an emission driver that provides an emission signal to the emission lines, and a driving control unit that controls the gate driver, the data driver, and the emission driver.

[0003] When the above display panel is driven at a low frequency, the driving sequence of the above display panel may include an address scan section and a self scan section. A difference may occur between the brightness of the above display panel in the address scan section and the brightness of the above display panel in the self scan section, and flicker may occur due to the difference in brightness. The problem to be solved

[0004] The objective of the present invention is to provide a display panel that reduces the difference between the brightness of the address scan section and the brightness of the self scan section by using a bias control switching element to perform the bias operation of the driving switching element in the self scan section without performing the bias operation in the address scan section.

[0005] The object of the present invention is to provide a display device including the above-mentioned display panel. means of solving the problem

[0006] A display panel according to one embodiment for realizing the purpose of the present invention described above includes a light-emitting element, a driving switching element, a bias switching element, and a bias control switching element. The driving switching element applies a driving current to the light-emitting element. The bias switching element is connected to a first electrode of the driving switching element and applies a bias voltage to the first electrode of the driving switching element. The bias control switching element is connected to a first electrode of the bias switching element and applies the bias voltage to the first electrode of the bias switching element.

[0007] In one embodiment of the present invention, the display panel may further include a light-emitting element initialization switching element connected to a first electrode of the light-emitting element and applying a light-emitting element initialization voltage to the first electrode of the light-emitting element.

[0008] In one embodiment of the present invention, the display panel may further include a data application switching element connected to the first electrode of the driving switching element and applying a data voltage to the first electrode of the driving switching element.

[0009] In one embodiment of the present invention, the display panel may further include a data initialization switching element connected to the control electrode of the driving switching element and applying an initialization voltage to the control electrode of the driving switching element.

[0010] In one embodiment of the present invention, the data initialization switching element may include a first data initialization transistor comprising a control electrode to which a data initialization gate signal is applied, a first electrode connected to a first intermediate node, and a second electrode connected to the control electrode of the driving switching element, and a second data initialization transistor comprising a control electrode to which the data initialization gate signal is applied, a first electrode to which the initialization voltage is applied, and a second electrode connected to the first intermediate node.

[0011] In one embodiment of the present invention, the display panel may further include a compensation switching element connected to the control electrode of the driving switching element and the second electrode of the driving switching element.

[0012] In one embodiment of the present invention, the compensation switching element may include a first compensation transistor comprising a control electrode to which a compensation gate signal is applied, a first electrode connected to the control electrode of the driving switching element, and a second electrode connected to a second intermediate node, and a second compensation transistor comprising a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the second electrode of the driving switching element.

[0013] In one embodiment of the present invention, the display panel may further include a first emission switching element comprising a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the first electrode of the driving switching element, and a second emission switching element comprising a control electrode to which an emission signal is applied, a first electrode connected to the second electrode of the driving switching element, and a second electrode connected to the first electrode of the light-emitting element.

[0014] In one embodiment of the present invention, the display panel may further include a first electrode to which a first power supply voltage is applied and a first storage capacitor connected to the control electrode of the driving switching element.

[0015] In one embodiment of the present invention, the display panel may further include a first electrode to which a first power supply voltage is applied and a second storage capacitor connected to the first electrode of the driving switching element.

[0016] In one embodiment of the present invention, the pixel of the display panel may include the light-emitting element, the driving switching element, and the bias switching element. The bias control switching element may be commonly connected to all pixels of the display panel.

[0017] In one embodiment of the present invention, the pixel of the display panel may include the light-emitting element, the driving switching element, and the bias switching element. The bias control switching element may be commonly connected to the pixels within the pixel row of the display panel.

[0018] In one embodiment of the present invention, the pixel of the display panel may include the light-emitting element, the driving switching element, the bias switching element, and the bias control switching element.

[0019] In one embodiment of the present invention, the display panel may further include a data initialization switching element connected to a control electrode of the driving switching element to apply an initialization voltage to the control electrode of the driving switching element, and a light-emitting element initialization switching element connected to a first electrode of the light-emitting element to apply the initialization voltage to the first electrode of the light-emitting element.

[0020] In one embodiment of the present invention, the driving switching element may include a control electrode, the first electrode, and the second electrode. The driving sequence of the display panel may include an address scan section in which a data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element. In the address scan section, the control signal applied to the control electrode of the bias control switching element may have an inactive level. In the self scan section, the control signal applied to the control electrode of the bias control switching element may have an active level.

[0021] In one embodiment of the present invention, the display panel may further include a data application switching element, a first compensation transistor, a second compensation transistor, a first data initialization transistor, a second data initialization transistor, a first emission switching element, a second emission switching element, and a light-emitting element initialization switching element. The driving switching element may include a control electrode connected to a first node, the first electrode connected to a second node, and a second electrode connected to a third node. The data application switching element may include a control electrode to which a data write gate signal is applied, a first electrode to which a data voltage is applied, and a second electrode connected to the second node. The first compensation transistor may include a control electrode to which a compensation gate signal is applied, a first electrode connected to the first node, and a second electrode connected to the second intermediate node. The second compensation transistor may include a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the third node. The first data initialization transistor may include a control electrode to which a data initialization gate signal is applied, a first electrode connected to a first intermediate node, and a second electrode connected to the first node. The second data initialization transistor may include a control electrode to which the data initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the first intermediate node. The first emission switching element may include a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the second node. The second emission switching element may include a control electrode to which the emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the first electrode of the light-emitting element.The light-emitting element initialization switching element may include a control electrode to which a bias gate signal is applied, a first electrode to which a light-emitting element initialization voltage is applied, and a second electrode connected to the first electrode of the light-emitting element. The bias switching element may include a control electrode to which the bias gate signal is applied, a first electrode connected to a fourth node, and a second electrode connected to the second node. The bias control switching element may include a control electrode to which a bias control gate signal is applied, a first electrode to which a bias voltage is applied, and a second electrode connected to the fourth node.

[0022] In one embodiment of the present invention, the driving sequence of the display panel may include an address scan section in which a data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element. Within the address scan section, the data initialization gate signal may have an activation pulse, the data writing gate signal may have an activation pulse, the compensation gate signal may have an activation pulse, the bias gate signal may have an activation pulse, and the bias control gate signal may maintain an inactive level.

[0023] In one embodiment of the present invention, within the self-scan section, the data initialization gate signal maintains an inactive level, the data write gate signal maintains an inactive level, the compensation gate signal maintains an inactive level, the bias gate signal has an activation pulse, and the bias control gate signal can maintain an active level.

[0024] A display device according to one embodiment for realizing the purpose of the present invention described above includes a display panel, a gate driving unit, a data driving unit, and an emission driving unit. The display panel includes a light-emitting element, a driving switching element that applies a driving current to the light-emitting element, a bias switching element connected to a first electrode of the driving switching element and applying a bias voltage to the first electrode of the driving switching element, and a bias control switching element connected to the first electrode of the bias switching element and applying the bias voltage to the first electrode of the bias switching element.

[0025] In one embodiment of the present invention, the driving switching element may include a control electrode, the first electrode, and the second electrode. The driving sequence of the display panel may include an address scan section in which the data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element. In the address scan section, the control signal applied to the control electrode of the bias control switching element may have an inactive level. In the self scan section, the control signal applied to the control electrode of the bias control switching element may have an active level.

[0026] A display panel according to an embodiment for realizing the objective of the present invention described above comprises: a first transistor including a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor including a control electrode to which a data write gate signal is applied, a first electrode to which a data voltage is applied, and a second electrode connected to the second node; a third-1 transistor including a control electrode to which a compensation gate signal is applied, a first electrode connected to the first node, and a second electrode connected to a second intermediate node; a third-2 transistor including a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the third node; a fourth-1 transistor including a control electrode to which a data initialization gate signal is applied, a first electrode connected to a first intermediate node, and a second electrode connected to the first node; a fourth-2 transistor including a control electrode to which the data initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the first intermediate node; and a control to which an emission signal is applied. A fifth transistor comprising an electrode, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the second node; a sixth transistor comprising a control electrode to which an emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the first electrode of a light-emitting element; a seventh transistor comprising a control electrode to which a bias gate signal is applied, a first electrode to which a light-emitting element initialization voltage is applied, and a second electrode connected to the first electrode of the light-emitting element; an eighth transistor comprising a control electrode to which the bias gate signal is applied, a first electrode connected to the fourth node, and a second electrode connected to the second node; a control electrode to which a bias control gate signal is applied;It includes a ninth transistor comprising a first electrode to which a bias voltage is applied and a second electrode connected to the fourth node, and a light-emitting element comprising a first electrode connected to the second electrode of the sixth transistor and a second electrode to which a second power supply voltage is applied.

[0027] In one embodiment of the present invention, the display panel may further include a first electrode to which the first power supply voltage is applied and a first storage capacitor connected to the first node.

[0028] In one embodiment of the present invention, the driving sequence of the display panel may include an address scan section in which the data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element. In the self scan section, the control signal applied to the control electrode of the bias control switching element may have an active level.

[0029] In one embodiment of the present invention, within the self-scan section, the data initialization gate signal maintains an inactive level, the data write gate signal maintains an inactive level, the compensation gate signal maintains an inactive level, the bias gate signal has an activation pulse, and the bias control gate signal can maintain an active level. Effects of the invention

[0030] According to such a display panel and a display device including the same, the display panel may include a bias control switching element connected in series with the bias switching element. The bias control switching element may be turned off during the address scan interval to prevent the bias operation of the driving switching element from being performed, and may be turned on during the self scan interval to perform the bias operation of the driving switching element. Accordingly, the difference between the brightness of the display panel during the address scan interval and the brightness of the display panel during the self scan interval can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel during the address scan interval and the brightness of the display panel during the self scan interval can be prevented, thereby improving the display quality of the display panel. Brief explanation of the drawing

[0031] FIG. 1 is a block diagram showing a display device according to one embodiment of the present invention. Figure 2 is a circuit diagram showing the display panel of Figure 1. Figure 3 is a conceptual diagram showing the driving sequence according to the driving frequency of the display panel of Figure 1. FIG. 4 is a timing diagram showing an example of input signals applied to the display panel of a comparison example during the address scan interval. FIG. 5 is a timing diagram showing an example of input signals applied to the display panel of a comparative example during the self-scan section. Figure 6 is a timing diagram showing an example of the brightness of the display panel of the comparative example in the address scan section and the brightness of the display panel of the comparative example in the self scan section. FIG. 7 is a timing diagram showing an example of input signals applied to the display panel of FIG. 1 during the address scan interval. FIG. 8 is a timing diagram showing an example of input signals applied to the display panel of FIG. 1 during the self-scan section. Figure 9 is a timing diagram showing an example of the brightness of the display panel of Figure 1 in the address scan section and the brightness of the display panel of Figure 1 in the self scan section. Figure 10 is a conceptual diagram showing the connection relationship between the bias control switching element and the pixel of Figure 2. FIG. 11 is a conceptual diagram showing the connection relationship between a bias control switching element and a pixel of a display panel according to one embodiment of the present invention. FIG. 12 is a circuit diagram showing a pixel of a display panel according to one embodiment of the present invention. FIG. 13 is a circuit diagram showing a display panel according to one embodiment of the present invention. FIG. 14 is a circuit diagram showing a display panel according to one embodiment of the present invention. FIG. 15 is a circuit diagram showing a display panel according to one embodiment of the present invention. Specific details for implementing the invention

[0032] Hereinafter, the present invention will be described in more detail with reference to the attached drawings.

[0033] FIG. 1 is a block diagram showing a display device according to one embodiment of the present invention.

[0034] Referring to FIG. 1, the display device includes a display panel (100) and a display panel driver. The display panel driver includes a drive control unit (200), a gate driver (300), a gamma reference voltage generator (400), a data driver (500), and an emission driver (600).

[0035] The above display panel (100) includes a display portion for displaying an image and a peripheral portion arranged adjacent to the display portion.

[0036] The display panel (100) comprises a plurality of gate lines (GWL, GIL, GCL, GBL), a plurality of data lines (DL), a plurality of emission lines (EML), and a plurality of pixels electrically connected to each of the gate lines (GWL, GIL, GCL, GBL), the data lines (DL), and the emission lines (EML). The gate lines (GWL, GIL, GCL, GBL) extend in a first direction (D1), the data lines (DL) extend in a second direction (D2) that intersects the first direction (D1), and the emission lines (EML) extend in the first direction (D1).

[0037] The drive control unit (200) receives input image data (IMG) and an input control signal (CONT) from an external device. For example, the input image data (IMG) may include red image data, green image data, and blue image data. The input image data (IMG) may include white image data. The input image data (IMG) may include magenta image data, yellow image data, and cyan image data. The input control signal (CONT) may include a master clock signal and a data enable signal. The input control signal (CONT) may further include a vertical synchronization signal and a horizontal synchronization signal.

[0038] The above driving control unit (200) generates a first control signal (CONT1), a second control signal (CONT2), a third control signal (CONT3), a fourth control signal (CONT4), and a data signal (DATA) based on the input image data (IMG) and the input control signal (CONT).

[0039] The above drive control unit (200) generates the first control signal (CONT1) to control the operation of the gate drive unit (300) based on the input control signal (CONT) and outputs it to the gate drive unit (300). The first control signal (CONT1) may include a vertical start signal and a gate clock signal.

[0040] The above drive control unit (200) generates the second control signal (CONT2) to control the operation of the data drive unit (500) based on the input control signal (CONT) and outputs it to the data drive unit (500). The second control signal (CONT2) may include a horizontal start signal and a load signal.

[0041] The above drive control unit (200) generates a data signal (DATA) based on the input image data (IMG). The above drive control unit (200) outputs the data signal (DATA) to the data drive unit (500).

[0042] The above driving control unit (200) generates the third control signal (CONT3) to control the operation of the gamma reference voltage generation unit (400) based on the input control signal (CONT) and outputs it to the gamma reference voltage generation unit (400).

[0043] The above drive control unit (200) generates the fourth control signal (CONT4) to control the operation of the emission drive unit (600) based on the input control signal (CONT) and outputs it to the emission drive unit (600).

[0044] The gate driving unit (300) generates gate signals for driving the gate lines (GWL, GIL, GCL, GBL) in response to the first control signal (CONT1) received from the driving control unit (200). The gate driving unit (300) can output the gate signals to the gate lines (GWL, GIL, GCL, GBL). The gate signals may include a data initialization gate signal, a compensation gate signal, a data write gate signal, and a bias gate signal.

[0045] In one embodiment of the present invention, the gate driving unit (300) may be integrated into the periphery of the display panel (100). In one embodiment of the present invention, the gate driving unit (300) may be mounted on the periphery of the display panel (100).

[0046] The gamma reference voltage generation unit (400) generates a gamma reference voltage (VGREF) in response to the third control signal (CONT3) received from the driving control unit (200). The gamma reference voltage generation unit (400) provides the gamma reference voltage (VGREF) to the data driving unit (500). The gamma reference voltage (VGREF) has a value corresponding to each data signal (DATA).

[0047] For example, the gamma reference voltage generation unit (400) may be placed within the drive control unit (200) or within the data drive unit (500).

[0048] The data driving unit (500) receives the second control signal (CONT2) and the data signal (DATA) from the driving control unit (200), and receives the gamma reference voltage (VGREF) from the gamma reference voltage generation unit (400). The data driving unit (500) converts the data signal (DATA) into an analog data voltage using the gamma reference voltage (VGREF). The data driving unit (500) outputs the data voltage to the data line (DL).

[0049] In one embodiment of the present invention, the data driving unit (500) may be integrated into the peripheral portion of the display panel (100). In one embodiment of the present invention, the data driving unit (500) may be mounted on the peripheral portion of the display panel (100).

[0050] The emission driving unit (600) generates emission signals to drive the emission lines (EML) in response to the fourth control signal (CONT4) received from the driving control unit (200). The emission driving unit (600) can output the emission signals to the emission lines (EML).

[0051] In one embodiment of the present invention, the emission driving unit (600) may be integrated into the periphery of the display panel (100). In one embodiment of the present invention, the emission driving unit (600) may be mounted on the periphery of the display panel (100).

[0052] In FIG. 1, for convenience of explanation, the gate driving unit (300) is shown as being positioned on the first side of the display panel (100) and the emission driving unit (600) is shown as being positioned on the second side of the display panel (100), but the present invention is not limited thereto. For example, both the gate driving unit (300) and the emission driving unit (600) may be positioned on the first side of the display panel (100). For example, the gate driving unit (300) and the emission driving unit (600) may be formed integrally.

[0053] Figure 2 is a circuit diagram showing the display panel (100) of Figure 1.

[0054] Referring to FIGS. 1 and 2, the display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and a bias control switching element (T9). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to a first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching element (T9) may be connected to a first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0055] For example, the light-emitting element (EE) may be an organic light-emitting diode. The display panel driver may be a driving circuit that drives the organic light-emitting diode. Alternatively, the light-emitting element (EE) may be an inorganic light-emitting diode. The display panel driver may be a driving circuit that drives the inorganic light-emitting diode.

[0056] The bias control switching element (T9) can determine whether to perform a bias operation of the driving switching element (T1). When the bias control switching element (T9) is turned off, the bias operation of the driving switching element (T1) is not performed. On the other hand, when the bias control switching element (T9) is turned on, the bias operation of the driving switching element (T1) is performed.

[0057] The above display panel (100) may further include a light-emitting element initialization switching element (T7) connected to the first electrode of the light-emitting element (EE) and applying a light-emitting element initialization voltage (AINT) to the first electrode of the light-emitting element (EE).

[0058] The above display panel (100) may further include a data application switching element (T2) connected to the first electrode (N2) of the driving switching element (T1) to apply the data voltage (VDATA) to the first electrode (N2) of the driving switching element (T1).

[0059] The above display panel (100) may further include a data initialization switching element (T4-1, T4-2) connected to the control electrode (N1) of the driving switching element (T1) and applying an initialization voltage (VINT) to the control electrode (N1) of the driving switching element (T1).

[0060] In this embodiment, the data initialization switching element may include two transistors (T4-1, T4-2) connected in series. For example, the data initialization switching element may include a first data initialization transistor (T4-1) comprising a control electrode to which a data initialization gate signal (GI) is applied, a first electrode connected to a first intermediate node (N6), and a second electrode connected to the control electrode (N1) of the driving switching element (T1), and a second data initialization transistor (T4-2) comprising a control electrode to which the data initialization gate signal (GI) is applied, a first electrode to which the initialization voltage (VINT) is applied, and a second electrode connected to the first intermediate node (N6).

[0061] When the above data initialization switching element is configured with two transistors (T4-1, T4-2) connected in series, the level of the data voltage (VDATA) applied to the control electrode (N1) of the driving switching element (T1) and stored in the storage capacitor (CST) can be prevented from decreasing due to current leakage.

[0062] The above display panel (100) may further include compensation switching elements (T3-1, T3-2) connected to the control electrode (N1) of the driving switching element (T1) and the second electrode (N3) of the driving switching element (T1).

[0063] In this embodiment, the compensation switching element may include two transistors (T3-1, T3-2) connected in series. For example, the compensation switching element may include a first compensation transistor (T3-1) comprising a control electrode to which a compensation gate signal (GC) is applied, a first electrode connected to the control electrode (N1) of the driving switching element (T1), and a second electrode connected to a second intermediate node (N5), and a second compensation transistor (T3-2) comprising a control electrode to which the compensation gate signal (GC) is applied, a first electrode connected to the second intermediate node (N5), and a second electrode connected to the second electrode (N3) of the driving switching element (T1).

[0064] When the above compensation switching element is configured with two transistors (T3-1, T3-2) connected in series, the level of the data voltage (VDATA) applied to the control electrode (N1) of the driving switching element (T1) and stored in the storage capacitor (CST) can be prevented from decreasing due to current leakage.

[0065] The display panel (100) may further include a first emission switching element (T5) comprising a control electrode to which the emission signal (EM) is applied, a first electrode to which a first power supply voltage (ELVDD) is applied, and a second electrode connected to the first electrode (N2) of the driving switching element (T1), and a second emission switching element (T6) comprising a control electrode to which the emission signal (EM) is applied, a first electrode connected to the second electrode (N3) of the driving switching element (T1), and a second electrode connected to the first electrode of the light-emitting element (EE).

[0066] The display panel (100) may further include a first storage capacitor (CST) connected to a first electrode to which the first power supply voltage (ELVDD) is applied and to the control electrode (N1) of the driving switching element (T1). The first storage capacitor (CST) can maintain the level of the data voltage (VDATA) applied to the control electrode (N1) of the driving switching element (T1).

[0067] In this embodiment, the display panel (100) may further include a first electrode to which the first power supply voltage (ELVDD) is applied and a second storage capacitor (CSE) connected to the first electrode (N2) of the driving switching element (T1). The second storage capacitor (CSE) can stabilize the first electrode (N2) of the driving switching element (T1).

[0068] A second power supply voltage (ELVSS) may be applied to the second electrode of the light-emitting element (EE). For example, the first power supply voltage (ELVDD) may be a high power supply voltage, and the second power supply voltage (ELVSS) may be a low power supply voltage.

[0069] To explain the connection relationship of the switching elements of the display panel (100) in more detail, the driving switching element (T1) may include a control electrode connected to a first node (N1), the first electrode connected to a second node (N2), and a second electrode connected to a third node (N3). For example, the driving switching element (T1) may be a P-type transistor. For example, the driving switching element (T1) may be an LTPS (low temperature polysilicon) thin-film transistor.

[0070] The data application switching element (T2) may include a control electrode to which the data write gate signal (GW) is applied, a first electrode to which the data voltage (VDATA) is applied, and a second electrode connected to the second node (N2). For example, the data application switching element (T2) may be a P-type transistor. For example, the data application switching element (T2) may be an LTPS (low temperature polysilicon) thin-film transistor.

[0071] For example, the first compensation transistor (T3-1) and the second compensation transistor (T3-2) may be P-type transistors. For example, the first compensation transistor (T3-1) and the second compensation transistor (T3-2) may be LTPS (low temperature polysilicon) thin-film transistors.

[0072] For example, the first data initialization transistor (T4-1) and the second data initialization transistor (T4-2) may be P-type transistors. For example, the first data initialization transistor (T4-1) and the second data initialization transistor (T4-2) may be LTPS (low temperature polysilicon) thin-film transistors.

[0073] For example, the first emission switching element (T5) and the second emission switching element (T6) may be P-type transistors. For example, the first emission switching element (T5) and the second emission switching element (T6) may be LTPS (low temperature polysilicon) thin-film transistors.

[0074] The light-emitting element initialization switching element (T7) may include a control electrode to which the bias gate signal (GB) is applied, a first electrode to which the light-emitting element initialization voltage (AINT) is applied, and a second electrode connected to the first electrode of the light-emitting element (EE). For example, the light-emitting element initialization switching element (T7) may be a P-type transistor. For example, the light-emitting element initialization switching element (T7) may be an LTPS (low temperature polysilicon) thin-film transistor.

[0075] The bias switching element (T8) may include a control electrode to which the bias gate signal (GB) is applied, a first electrode connected to a fourth node (N4), and a second electrode connected to a second node (N2). For example, the bias switching element (T8) may be a P-type transistor. For example, the bias switching element (T8) may be an LTPS (low temperature polysilicon) thin-film transistor.

[0076] The bias control switching element (T9) may include a control electrode to which a bias control gate signal (OG) is applied, a first electrode to which the bias voltage (VBIAS) is applied, and a second electrode connected to the fourth node (N4). For example, the bias control switching element (T9) may be a P-type transistor. For example, the bias control switching element (T9) may be a low temperature polysilicon (LTPS) thin-film transistor.

[0077] The driving switching element (T1) can be named the first transistor, the data application switching element (T2) can be named the second transistor, the first compensation transistor (T3-1) can be named the third-1 transistor, the second compensation transistor (T3-2) can be named the third-2 transistor, the first data initialization transistor (T4-1) can be named the fourth-1 transistor, the second data initialization transistor (T4-2) can be named the fourth-2 transistor, the first emission switching element (T5) can be named the fifth transistor, the second emission switching element (T6) can be named the sixth transistor, the light-emitting element initialization switching element (T7) can be named the seventh transistor, the bias switching element (T8) can be named the eighth transistor, and the bias control switching element (T9) can be named the ninth transistor.

[0078] FIG. 3 is a conceptual diagram showing a driving sequence according to the driving frequency of the display panel (100) of FIG. 1.

[0079] Referring to FIGS. 1 to 3, the display panel (100) can be driven at a low frequency. The display panel (100) can be driven at a variable frequency. For example, when the display panel (100) displays a video, the display panel (100) can be driven at a relatively high frequency, and when the display panel (100) displays a still image, the display panel (100) can be driven at a relatively low frequency. For example, if there is a high probability of flicker occurring in the image displayed on the display panel (100), the display panel (100) can be driven at a relatively high frequency, and if there is a low probability of flicker occurring in the image displayed on the display panel (100), the display panel (100) can be driven at a relatively low frequency.

[0080] In FIG. 3, the maximum driving frequency of the display panel (100) is exemplified as 120Hz. However, the present invention is not limited thereto.

[0081] The driving sequence of the above-described display panel (100) may include an address scan section (AS) in which the data voltage (VDATA) is applied to the first electrode of the driving switching element (T1) and the light-emitting element (EE) emits light, and a self scan section (SS) in which the light-emitting element (EE) emits light without applying the data voltage (VDATA) to the first electrode of the driving switching element (T1). In the address scan section (AS), the data application switching element (T2) may be turned on so that the data voltage (VDATA) is applied to the first electrode of the driving switching element (T1), and in the self scan section (SS), the data application switching element (T2) may be turned off so that the data voltage (VDATA) is not applied to the first electrode of the driving switching element (T1).

[0082] For example, when the display panel (100) is driven at 120Hz, the first section (P1) to the eighth section (P8) may be address scan sections (AS).

[0083] For example, when the display panel (100) is driven at 60Hz, the ratio of the address scan section (AS) to the self scan section (SS) may be 1:1. For example, when the display panel (100) is driven at 60Hz, the first section (P1), the third section (P3), the fifth section (P5), and the seventh section (P7) may be the address scan section (AS), and the second section (P2), the fourth section (P4), the sixth section (P6), and the eighth section (P8) may be the self scan section (SS).

[0084] For example, when the display panel (100) is driven at 30Hz, the ratio of the address scan section (AS) to the self scan section (SS) may be 1:3. For example, when the display panel (100) is driven at 30Hz, the first section (P1) and the fifth section (P5) are the address scan section (AS), and the second section (P2), the third section (P3), the fourth section (P4), the sixth section (P6), the seventh section (P7), and the eighth section (P8) are the self scan section (SS).

[0085] For example, when the display panel (100) is driven at 15Hz, the ratio of the address scan section (AS) to the self scan section (SS) may be 1:7. For example, when the display panel (100) is driven at 15Hz, the first section (P1) is the address scan section (AS), and the second section (P2), the third section (P3), the fourth section (P4), the fifth section (P5), the sixth section (P6), the seventh section (P7), and the eighth section (P8) may be the self scan section (SS).

[0086] FIG. 4 is a timing diagram showing an example of input signals (EM, GI, GW, GC, GB) applied to the display panel of the comparative example during the address scan interval (AS). FIG. 5 is a timing diagram showing an example of input signals (EM, GI, GW, GC, GB) applied to the display panel of the comparative example during the self scan interval (SS). FIG. 6 is a timing diagram showing an example of the brightness of the display panel of the comparative example during the address scan interval (AS) and the brightness of the display panel of the comparative example during the self scan interval (SS).

[0087] Comparative examples of FIGS. 4 to 6 illustrate a case in which the display panel includes a structure similar to FIG. 2, but does not include the bias control switching element (T9), and the bias voltage (VBIAS) is directly applied to the first electrode of the bias switching element (T8).

[0088] Referring to FIGS. 1 to 6, within the address scan interval (AS) of FIG. 4, the data initialization gate signal (GI) may have an activation pulse, the data write gate signal (GW) may have an activation pulse, the compensation gate signal (GC) may have an activation pulse, and the bias gate signal (GB) may have an activation pulse. Here, the activation pulse may be a low-level pulse.

[0089] When the data initialization gate signal (GI) has an activation pulse, the data initialization switching elements (T4-1, T4-2) are turned on, and the initialization voltage (VINT) can be applied to the control electrode (N1) of the driving switching element (T1).

[0090] When the data writing gate signal (GW) and the compensation gate signal (GC) have an activation pulse, the data application switching element (T2) and the compensation switching elements (T3-1, T3-2) are turned on, and the data voltage (VDATA) compensated for the threshold voltage of the driving switching element (T1) can be written to the control electrode (N1) of the driving switching element (T1).

[0091] When the bias gate signal (GB) has an activation pulse, the light-emitting element initialization switching element (T7) is turned on, and the light-emitting element initialization voltage (AINT) can be applied to the first electrode of the light-emitting element (EE). Additionally, when the bias gate signal (GB) has an activation pulse, the bias switching element (T8) is turned on, and the bias voltage (VBIAS) can be applied to the first electrode (N2) of the driving switching element (T1).

[0092] In the self-scan section (SS) of FIG. 5, the data initialization gate signal (GI) maintains an inactive level without an activation pulse, the data write gate signal (GW) maintains an inactive level without an activation pulse, the compensation gate signal (GC) maintains an inactive level without an activation pulse, and only the bias gate signal (GB) may have an activation pulse. Here, the inactive level may be a high level, and the activation pulse may be a low level pulse.

[0093] In the self-scan section (SS) above, the data initialization operation by the data initialization switching element (T4-1, T4-2) and the data writing operation by the data application switching element (T2) and the compensation switching element (T3-1, T3-2) may not be performed. On the other hand, the light-emitting element initialization operation by the light-emitting element initialization switching element (T7) and the bias operation by the bias switching element (T8) may be performed.

[0094] In the address scan section (AS) of FIG. 4, both the data initialization operation by the data initialization switching element (T4-1, T4-2) and the bias operation by the bias switching element (T8) are performed, but in the self scan section (SS) of FIG. 5, only the bias operation by the bias switching element (T8) is performed without the data initialization operation by the data initialization switching element (T4-1, T4-2). As a result, a difference occurs in the operation of the driving switching element (T1) in the address scan section (AS) and the scan section (SS), and as shown in FIG. 6, a difference may occur between the brightness of the display panel (100) in the address scan section (AS) and the brightness of the display panel (100) in the self scan section (SS).

[0095] As shown in part A of FIG. 6, the brightness of the display panel (100) increases relatively slowly during the address scan section (AS), whereas as shown in part B of FIG. 6, the brightness of the display panel (100) can increase relatively quickly during the self scan section (SS).

[0096] FIG. 7 is a timing diagram showing an example of input signals (EM, GI, GW, GC, GB, OG) applied to the display panel (100) of FIG. 1 during the address scan interval (AS). FIG. 8 is a timing diagram showing an example of input signals (EM, GI, GW, GC, GB, OG) applied to the display panel (100) of FIG. 1 during the self scan interval (SS). FIG. 9 is a timing diagram showing an example of the brightness of the display panel (100) of FIG. 1 during the address scan interval (AS) and the brightness of the display panel (100) of FIG. 1 during the self scan interval (SS).

[0097] The embodiments of FIGS. 7 to 9 illustrate a case where the display panel (100) includes the structure of FIG. 2. That is, compared to the comparative examples of FIGS. 4 to 6, the display panel (100) further includes the bias control switching element (T9) connected to the first electrode (N4) of the bias switching element (T8).

[0098] Referring to FIGS. 1 to 9, the control signal (OG) applied to the control electrode of the bias control switching element (T9) during the address scan interval (AS) may have an inactive level. On the other hand, the control signal (OG) applied to the control electrode of the bias control switching element (T9) during the self scan interval (SS) may have an active level.

[0099] Specifically, within the address scan interval (AS) of FIG. 7, the data initialization gate signal (GI) may have an activation pulse, the data write gate signal (GW) may have an activation pulse, the compensation gate signal (GC) may have an activation pulse, and the bias gate signal (GB) may have an activation pulse. Additionally, the bias control gate signal (OG) may maintain an inactive level. Here, the inactive level may be a high level, and the activation pulse may be a low level pulse.

[0100] In the self-scan section (SS) of FIG. 8, the data initialization gate signal (GI) maintains an inactive level without an activation pulse, the data write gate signal (GW) maintains an inactive level without an activation pulse, the compensation gate signal (GC) maintains an inactive level without an activation pulse, and only the bias gate signal (GB) may have an activation pulse. The bias control gate signal (OG) may maintain an active level. Here, the inactive level is a high level, the active level is a low level, and the activation pulse may be a low level pulse.

[0101] In this embodiment, the bias control switching element (T9) connected in series with the bias switching element (T8) is turned off during the address scan section (AS) so as not to perform the bias operation of the driving switching element (T1), and is turned on during the self scan section (SS) so as to perform the bias operation of the driving switching element (T1).

[0102] In this embodiment, in the address scan interval (AS) of FIG. 7, a data initialization operation is performed by the data initialization switching element (T4-1, T4-2), and the bias operation by the bias switching element (T9) is controlled so that it is not performed by the bias switching element (T8).

[0103] In this embodiment, in the self-scan section (SS) of FIG. 8, the data initialization operation by the data initialization switching element (T4-1, T4-2) is not performed, whereas the bias operation by the bias switching element (T8) is controlled by the bias control switching element (T9).

[0104] The state of the driving switching element (T1) according to the bias operation in the self-scan section (SS) can be controlled to be similar to the state of the driving switching element (T1) according to the data initialization operation in the address scan section (AS).

[0105] Accordingly, by the bias operation in the self-scan section (SS) and the data initialization operation in the address scan section (AS), the difference between the brightness of the display panel (100) in the address scan section (AS) and the brightness of the display panel (100) in the self-scan section (SS) can be eliminated as shown in FIG. 9.

[0106] In FIG. 9, the waveform of the brightness of the display panel (100) in the address scan section (AS) can be formed to be almost identical to the waveform of the brightness of the display panel (100) in the self scan section (SS).

[0107] FIG. 10 is a conceptual diagram showing the connection relationship between the bias control switching element (T9) and the pixel (PX) of FIG. 2.

[0108] Referring to FIGS. 1 to 10, in this embodiment, a pixel (PX) of the display panel (100) may include the light-emitting element (EE), the driving switching element (T1), and the bias switching element (T8). On the other hand, the bias control switching element (T9) may be placed outside the pixel (PX). The bias control switching element (T9) may be placed outside the display portion (AA) of the display panel (100).

[0109] In this embodiment, the bias control switching element (T9) may be commonly connected to all pixels (PX) of the display panel (100). For example, in this embodiment, the display panel (100) may include one bias control switching element (T9).

[0110] According to the embodiment described above, the display panel (100) may include a bias control switching element (T9) connected in series with the bias switching element (T8). The bias control switching element (T9) can be turned off during the address scan section (AS) to prevent the bias operation of the driving switching element (T1), and turned on during the self scan section (SS) to perform the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be prevented, thereby improving the display quality of the display panel (100).

[0111] FIG. 11 is a conceptual diagram showing the connection relationship between a bias control switching element (T91, T92, T93, …) and a pixel (PX) of a display panel (100) according to one embodiment of the present invention.

[0112] Since the display device according to the present embodiment is substantially the same as the display device of FIGS. 1 to 3 and FIGS. 7 to 10, except for the number of bias control switching elements and the connection relationship between the bias control switching elements (T91, T92, T93, …) and the pixel (PX), the same reference numbers are used for identical or similar components, and redundant descriptions are omitted.

[0113] Referring to FIGS. 1 to 3, FIGS. 7 to 9 and FIG. 11, the display device includes a display panel (100) and a display panel driving unit. The display panel driving unit includes a driving control unit (200), a gate driving unit (300), a gamma reference voltage generating unit (400), a data driving unit (500), and an emission driving unit (600).

[0114] The above display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and bias control switching elements (T91, T92, T93, …). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to the first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching elements (T91, T92, T93, …) may be connected to the first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0115] In this embodiment, the pixel (PX) of the display panel (100) may include the light-emitting element (EE), the driving switching element (T1), and the bias switching element (T8). On the other hand, the bias control switching elements (T91, T92, T93, …) may be placed outside the pixel (PX). The bias control switching elements (T91, T92, T93, …) may be placed outside the display portion (AA) of the display panel (100).

[0116] In this embodiment, the bias control switching elements (T91, T92, T93, …) may be commonly connected to pixels within a pixel row of the display panel (100). For example, in this embodiment, the display panel (100) may include the bias control switching elements (T91, T92, T93, …) corresponding to the number of pixel rows.

[0117] As shown in FIG. 11, for example, a first bias control switching element (T91) positioned adjacent to a first pixel row can be commonly connected to pixels within the first pixel row. For example, a second bias control switching element (T92) positioned adjacent to a second pixel row can be commonly connected to pixels within the second pixel row. For example, a third bias control switching element (T93) positioned adjacent to a third pixel row can be commonly connected to pixels within the third pixel row.

[0118] According to the embodiment described above, the display panel (100) may include bias control switching elements (T91, T92, T93, …) connected in series with the bias switching element (T8). The bias control switching elements (T91, T92, T93, …) may be turned off during the address scan interval (AS) to prevent the bias operation of the driving switching element (T1), and may be turned on during the self scan interval (SS) to prevent the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan interval (AS) and the brightness of the display panel (100) during the self scan interval (SS) can be reduced. As a result, the display quality of the display panel (100) can be improved by preventing flicker caused by the difference between the brightness of the display panel (100) in the address scan section (AS) and the brightness of the display panel (100) in the self scan section (SS).

[0119] FIG. 12 is a circuit diagram showing a pixel (PX) of a display panel (100) according to one embodiment of the present invention.

[0120] Since the display device according to the present embodiment is substantially the same as the display device of FIGS. 1 to 3 and FIGS. 7 to 10, except for the number of bias control switching elements and the connection relationship between the bias control switching element (T9) and the pixel (PX), the same reference numbers are used for identical or similar components, and redundant descriptions are omitted.

[0121] Referring to FIGS. 1 to 3, FIGS. 7 to 9 and FIG. 12, the display device includes a display panel (100) and a display panel driving unit. The display panel driving unit includes a driving control unit (200), a gate driving unit (300), a gamma reference voltage generating unit (400), a data driving unit (500), and an emission driving unit (600).

[0122] The above display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and a bias control switching element (T9). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to the first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching element (T9) may be connected to the first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0123] In this embodiment, the pixel (PX) of the display panel (100) may include the light-emitting element (EE), the driving switching element (T1), the bias switching element (T8), and the bias control switching element (T9). That is, the bias control switching element (T9) may be placed within each pixel (PX) of the display panel (100).

[0124] For example, in this embodiment, the display panel (100) may include bias control switching elements (T9) corresponding to the number of pixels.

[0125] According to the embodiment described above, the display panel (100) may include a bias control switching element (T9) connected in series with the bias switching element (T8). The bias control switching element (T9) can be turned off during the address scan section (AS) to prevent the bias operation of the driving switching element (T1), and turned on during the self scan section (SS) to perform the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be prevented, thereby improving the display quality of the display panel (100).

[0126] FIG. 13 is a circuit diagram showing a display panel (100) according to one embodiment of the present invention.

[0127] Since the display device according to the present embodiment is substantially the same as the display device of FIGS. 1 to 3 and FIGS. 7 to 10, except that the display panel does not include a second storage capacitor (CSE), the same reference numbers are used for identical or similar components, and redundant descriptions are omitted.

[0128] Referring to FIGS. 1, FIGS. 3, FIGS. 7 to 10 and FIG. 13, the display device includes a display panel (100) and a display panel driving unit. The display panel driving unit includes a driving control unit (200), a gate driving unit (300), a gamma reference voltage generating unit (400), a data driving unit (500), and an emission driving unit (600).

[0129] The above display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and a bias control switching element (T9). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to the first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching element (T9) may be connected to the first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0130] In this embodiment, the pixel (PX) of the display panel (100) may not include the second storage capacitor (CSE), unlike in FIG. 2.

[0131] According to the embodiment described above, the display panel (100) may include a bias control switching element (T9) connected in series with the bias switching element (T8). The bias control switching element (T9) can be turned off during the address scan section (AS) to prevent the bias operation of the driving switching element (T1), and turned on during the self scan section (SS) to perform the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be prevented, thereby improving the display quality of the display panel (100).

[0132] FIG. 14 is a circuit diagram showing a display panel (100) according to one embodiment of the present invention.

[0133] Since the display device according to the present embodiment is substantially the same as the display device of FIGS. 1 to 3 and FIGS. 7 to 10, except for the voltage applied to the first electrode of the light-emitting element initialization switching element, the same reference numbers are used for identical or similar components, and redundant descriptions are omitted.

[0134] Referring to FIGS. 1, FIGS. 3, FIGS. 7 to 10 and FIGS. 14, the display device includes a display panel (100) and a display panel driving unit. The display panel driving unit includes a driving control unit (200), a gate driving unit (300), a gamma reference voltage generating unit (400), a data driving unit (500), and an emission driving unit (600).

[0135] The above display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and a bias control switching element (T9). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to the first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching element (T9) may be connected to the first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0136] The above display panel (100) may further include a data initialization switching element (T4-1, T4-2) connected to the control electrode (N1) of the driving switching element (T1) to apply an initialization voltage (VINT) to the control electrode (N1) of the driving switching element (T1), and a light-emitting element initialization switching element (T7) connected to the first electrode of the light-emitting element (EE) to apply the initialization voltage (VINT) to the first electrode of the light-emitting element (T1).

[0137] That is, in this embodiment, the data initialization voltage (VINT) applied to the data initialization switching element (T4-1, T4-2) may be the same as the light-emitting element initialization voltage (VINT) applied to the light-emitting element initialization switching element (T7).

[0138] According to the embodiment described above, the display panel (100) may include a bias control switching element (T9) connected in series with the bias switching element (T8). The bias control switching element (T9) can be turned off during the address scan section (AS) to prevent the bias operation of the driving switching element (T1), and turned on during the self scan section (SS) to perform the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be prevented, thereby improving the display quality of the display panel (100).

[0139] FIG. 15 is a circuit diagram showing a display panel (100) according to one embodiment of the present invention.

[0140] Since the display device according to the present embodiment is substantially the same as the display device of FIGS. 1 to 3 and FIGS. 7 to 10, except that the compensation switching element is formed as one transistor and the data initialization switching element is formed as one transistor, the same reference numbers are used for identical or similar components, and redundant descriptions are omitted.

[0141] Referring to FIGS. 1, FIGS. 3, FIGS. 7 to 10 and FIGS. 15, the display device includes a display panel (100) and a display panel driver. The display panel driver includes a drive control unit (200), a gate driver (300), a gamma reference voltage generator (400), a data driver (500), and an emission driver (600).

[0142] The above display panel (100) may include a light-emitting element (EE), a driving switching element (T1), a bias switching element (T8), and a bias control switching element (T9). The driving switching element (T1) may apply a driving current to the light-emitting element (EE). The bias switching element (T8) may be connected to the first electrode (N2) of the driving switching element (T1) to apply a bias voltage (VBIAS) to the first electrode (N2) of the driving switching element (T1). The bias control switching element (T9) may be connected to the first electrode (N4) of the bias switching element (T8) to apply the bias voltage (VBIAS) to the first electrode (N4) of the bias switching element (T8).

[0143] The above display panel (100) may further include a data initialization switching element (T4) connected to the control electrode (N1) of the driving switching element (T1) and applying an initialization voltage (VINT) to the control electrode (N1) of the driving switching element (T1).

[0144] Unlike FIG. 2, in this embodiment, the data initialization switching element (T4) may include one transistor. For example, the data initialization switching element (T4) may include a control electrode to which the data initialization gate signal (GI) is applied, a first electrode to which the initialization voltage (VINT) is applied, and a second electrode connected to the control electrode (N1) of the driving switching element (T1).

[0145] The above display panel (100) may further include a compensation switching element (T3) connected to the control electrode (N1) of the driving switching element (T1) and the second electrode (N3) of the driving switching element (T1).

[0146] Unlike FIG. 2, in this embodiment, the compensation switching element (T3) may include one transistor. For example, the compensation switching element (T3) may include a control electrode to which the compensation gate signal (GC) is applied, a first electrode connected to the control electrode (N1) of the driving switching element (T1), and a second electrode connected to the second electrode (N3) of the driving switching element (T1).

[0147] According to the embodiment described above, the display panel (100) may include a bias control switching element (T9) connected in series with the bias switching element (T8). The bias control switching element (T9) can be turned off during the address scan section (AS) to prevent the bias operation of the driving switching element (T1), and turned on during the self scan section (SS) to perform the bias operation of the driving switching element (T1). Accordingly, the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be reduced. As a result, the occurrence of flicker due to the difference between the brightness of the display panel (100) during the address scan section (AS) and the brightness of the display panel (100) during the self scan section (SS) can be prevented, thereby improving the display quality of the display panel (100). Industrial applicability

[0148] According to the display device of the present invention described above, the display quality of the display panel can be improved.

[0149] Although the invention has been described with reference to the above embodiments, a person skilled in the art will understand that various modifications and changes can be made to the invention without departing from the spirit and scope of the invention as described in the following claims. Explanation of the symbols

[0150] 100: Display panel 200: Drive control unit 300: Gate driver 400: Gamma reference voltage generator 500: Data driver 600: Emission driver

Claims

Claim 1 A display panel comprising: a light-emitting element; a driving switching element that applies a driving current to the light-emitting element; a bias switching element connected to a first electrode of the driving switching element and applying a bias voltage to the first electrode of the driving switching element; and a bias control switching element connected to a first electrode of the bias switching element and applying the bias voltage to the first electrode of the bias switching element, wherein the bias switching element includes a control electrode to which a bias gate signal is applied, and the bias control switching element includes a control electrode to which a bias control gate signal different from the bias gate signal is applied. Claim 2 A display panel according to claim 1, further comprising a light-emitting element initialization switching element connected to a first electrode of the light-emitting element and applying a light-emitting element initialization voltage to the first electrode of the light-emitting element. Claim 3 A display panel according to claim 1, further comprising a data application switching element connected to the first electrode of the driving switching element and applying a data voltage to the first electrode of the driving switching element. Claim 4 A display panel according to claim 1, further comprising a data initialization switching element connected to the control electrode of the driving switching element and applying an initialization voltage to the control electrode of the driving switching element. Claim 5 A display panel according to claim 4, wherein the data initialization switching element comprises: a first data initialization transistor including a control electrode to which a data initialization gate signal is applied, a first electrode connected to a first intermediate node, and a second electrode connected to the control electrode of the driving switching element; and a second data initialization transistor including a control electrode to which the data initialization gate signal is applied, a first electrode to which the initialization voltage is applied, and a second electrode connected to the first intermediate node. Claim 6 A display panel according to claim 1, further comprising a compensation switching element connected to the control electrode of the driving switching element and the second electrode of the driving switching element. Claim 7 A display panel according to claim 6, wherein the compensation switching element comprises: a first compensation transistor including a control electrode to which a compensation gate signal is applied, a first electrode connected to the control electrode of the driving switching element, and a second electrode connected to a second intermediate node; and a second compensation transistor including a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the second electrode of the driving switching element. Claim 8 A display panel according to claim 1, further comprising: a first emission switching element including a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the first electrode of the driving switching element; and a second emission switching element including a control electrode to which an emission signal is applied, a first electrode connected to the second electrode of the driving switching element, and a second electrode connected to the first electrode of the light-emitting element. Claim 9 A display panel according to claim 1, further comprising a first electrode to which a first power supply voltage is applied and a first storage capacitor connected to the control electrode of the driving switching element. Claim 10 A display panel according to claim 1, further comprising a first electrode to which a first power supply voltage is applied and a second storage capacitor connected to the first electrode of the driving switching element. Claim 11 A display panel according to claim 1, wherein the pixels of the display panel include the light-emitting element, the driving switching element, and the bias switching element, and the bias control switching element is commonly connected to all pixels of the display panel. Claim 12 A display panel according to claim 1, wherein the pixels of the display panel include the light-emitting element, the driving switching element, and the bias switching element, and the bias control switching element is commonly connected to the pixels within the pixel row of the display panel. Claim 13 A display panel according to claim 1, wherein the pixels of the display panel include the light-emitting element, the driving switching element, the bias switching element, and the bias control switching element. Claim 14 A display panel according to claim 1, further comprising: a data initialization switching element connected to a control electrode of the driving switching element and applying an initialization voltage to the control electrode of the driving switching element; and a light-emitting element initialization switching element connected to a first electrode of the light-emitting element and applying the initialization voltage to the first electrode of the light-emitting element. Claim 15 A display panel according to claim 1, wherein the driving switching element comprises a control electrode, the first electrode, and the second electrode, and the driving sequence of the display panel comprises an address scan section in which a data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element, wherein the control signal applied to the control electrode of the bias control switching element in the address scan section has an inactive level, and the control signal applied to the control electrode of the bias control switching element in the self scan section has an active level. Claim 16 In claim 1, the device further comprises a data application switching element, a first compensation transistor, a second compensation transistor, a first data initialization transistor, a second data initialization transistor, a first emission switching element, a second emission switching element, and a light-emitting element initialization switching element; the driving switching element comprises a control electrode connected to a first node, the first electrode connected to a second node, and a second electrode connected to a third node; the data application switching element comprises a control electrode to which a data write gate signal is applied, a first electrode to which a data voltage is applied, and a second electrode connected to the second node; the first compensation transistor comprises a control electrode to which a compensation gate signal is applied, a first electrode connected to the first node, and a second electrode connected to a second intermediate node; the second compensation transistor comprises a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the third node; and the first data initialization transistor comprises a control electrode to which a data initialization gate signal is applied, a first electrode connected to the first intermediate node, and the first It includes a second electrode connected to a node, wherein the second data initialization transistor includes a control electrode to which the data initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the first intermediate node, and the first emission switching element includes a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and a second electrode connected to the second node, wherein the second emission switching element includes a control electrode to which the emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the first electrode of the light-emitting element, and the light-emitting element initialization switching element includes a control electrode to which the bias gate signal is applied,A display panel characterized by comprising a first electrode to which a light-emitting element initialization voltage is applied and a second electrode connected to the first electrode of the light-emitting element, wherein the bias switching element further comprises a first electrode connected to a fourth node and a second electrode connected to the second node, and the bias control switching element further comprises a first electrode to which a bias voltage is applied and a second electrode connected to the fourth node. Claim 17 In claim 16, the driving sequence of the display panel comprises an address scan section in which a data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element, wherein within the address scan section, the data initialization gate signal has an activation pulse, the data writing gate signal has an activation pulse, the compensation gate signal has an activation pulse, the bias gate signal has an activation pulse, and the bias control gate signal maintains an inactive level. Claim 18 A display panel according to claim 17, characterized in that within the self-scan section, the data initialization gate signal maintains an inactive level, the data write gate signal maintains an inactive level, the compensation gate signal maintains an inactive level, the bias gate signal has an activation pulse, and the bias control gate signal maintains an active level. Claim 19 A display device comprising: a display panel; a gate driver that provides a gate signal to the display panel; a data driver that provides a data voltage to the display panel; and an emission driver that provides an emission signal to the display panel, wherein the display panel comprises: a light-emitting element; a driving switching element that applies a driving current to the light-emitting element; a bias switching element connected to a first electrode of the driving switching element and applying a bias voltage to the first electrode of the driving switching element; and a bias control switching element connected to a first electrode of the bias switching element and applying the bias voltage to the first electrode of the bias switching element, wherein the bias switching element comprises a control electrode to which a bias gate signal is applied, and the bias control switching element comprises a control electrode to which a bias control gate signal different from the bias gate signal is applied. Claim 20 A display device according to claim 19, wherein the driving switching element comprises a control electrode, the first electrode, and the second electrode, and the driving sequence of the display panel comprises an address scan section in which the data voltage is applied to the first electrode of the driving switching element and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the driving switching element, wherein the control signal applied to the control electrode of the bias control switching element in the address scan section has an inactive level, and the control signal applied to the control electrode of the bias control switching element in the self scan section has an active level. Claim 21 A first transistor comprising a control electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor comprising a control electrode to which a data write gate signal is applied, a first electrode to which a data voltage is applied, and a second electrode connected to the second node; a third-1 transistor comprising a control electrode to which a compensation gate signal is applied, a first electrode connected to the first node, and a second electrode connected to a second intermediate node; a third-2 transistor comprising a control electrode to which the compensation gate signal is applied, a first electrode connected to the second intermediate node, and a second electrode connected to the third node; a fourth-1 transistor comprising a control electrode to which a data initialization gate signal is applied, a first electrode connected to a first intermediate node, and a second electrode connected to the first node; a fourth-2 transistor comprising a control electrode to which the data initialization gate signal is applied, a first electrode to which an initialization voltage is applied, and a second electrode connected to the first intermediate node; a control electrode to which an emission signal is applied, a first electrode to which a first power supply voltage is applied, and the A fifth transistor comprising a second electrode connected to a second node; a sixth transistor comprising a control electrode to which the emission signal is applied, a first electrode connected to the third node, and a second electrode connected to the first electrode of a light-emitting element; a seventh transistor comprising a control electrode to which a bias gate signal is applied, a first electrode to which a light-emitting element initialization voltage is applied, and a second electrode connected to the first electrode of the light-emitting element; an eighth transistor comprising a control electrode to which the bias gate signal is applied, a first electrode connected to the fourth node, and a second electrode connected to the second node; a ninth transistor comprising a control electrode to which a bias control gate signal is applied, a first electrode to which a bias voltage is applied, and a second electrode connected to the fourth node;A display panel comprising the light-emitting element, the first electrode connected to the second electrode of the sixth transistor and the second electrode to which a second power supply voltage is applied. Claim 22 A display panel according to claim 21, further comprising a first electrode to which the first power supply voltage is applied and a first storage capacitor connected to the first node. Claim 23 In claim 21, the driving sequence of the display panel comprises an address scan section in which the data voltage is applied to the first electrode of the first transistor and the light-emitting element emits light, and a self scan section in which the light-emitting element emits light without applying the data voltage to the first electrode of the first transistor, wherein the control signal applied to the control electrode of the ninth transistor in the self scan section has an active level. Claim 24 A display panel according to claim 23, characterized in that within the self-scan section, the data initialization gate signal maintains an inactive level, the data write gate signal maintains an inactive level, the compensation gate signal maintains an inactive level, the bias gate signal has an activation pulse, and the bias control gate signal maintains an active level.

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