2-dimensional Semiconductor Structure Comprising Perfluorinated Self-assembled Monolayer, Method for Preparing Same and Field-Effect Transistor Comprising Same

Abstract

The present invention relates to a two-dimensional semiconductor structure having a transition metal chalcogenide layer formed on a perfluorinated self-assembled monolayer, a method for manufacturing the same, and a field-effect transistor including the same. According to the present invention, the van der Waals distance between the transition metal chalcogenide and the substrate increases due to the low surface energy of the perfluorinated self-assembled monolayer. Accordingly, the degradation of the two-dimensional semiconductor properties caused by various electrical defects present in the substrate in the structure is prevented, thereby improving physical properties such as luminescence characteristics and field-effect mobility. Therefore, by using the present invention, a semi-autonomous structure can be realized without complex processes, and the physical, optical, and electrical properties of the transition metal chalcogenide can be improved.

Description

Technology Field

[0001] The present invention relates to a two-dimensional semiconductor structure comprising a perfluorinated self-assembled monolayer, a method for manufacturing the same, and a field-effect transistor comprising the same. More specifically, the invention relates to a two-dimensional semiconductor structure in which physical properties are improved by increasing the van der Waals distance through the formation of a transition metal chalcogenide layer on a perfluorinated self-assembled monolayer, a method for manufacturing the same, and a field-effect transistor comprising the same. Background Technology

[0002] Two-dimensional transition metal chalcogenides possess excellent physical, optical, and electrical properties due to their weak interlayer van der Waals interactions. However, because the layer thickness of two-dimensional transition metal chalcogenides is very thin, there has been a problem in that they are easily affected by interfacial conditions such as air, electric charge, and the substrate. In particular, controlling the interfacial properties between the transition metal chalcogenide layer and the substrate has a significant impact on improving the optical and electrical properties of the semiconductor.

[0003] Various studies have been conducted to improve the semiconductor properties of such two-dimensional transition metal chalcogenides. For example, Korean Patent Publication No. 10-2023-0143146 describes a semiconductor material comprising a substrate, a transition metal chalcogenide thin film, and metal nanoparticles that modify the surface of the thin film, stating that defect sites on the surface of the transition metal chalcogenide are modified and semiconductor properties are improved. However, this method utilizes a method of modifying defects on the semiconductor surface, which has the limitation that it does not affect the degradation of semiconductor properties caused by substrate defects.

[0004] In addition, Korean Patent Publication No. 10-2023-0138354 relates to a two-dimensional nanomaterial laminated structure having a bubble-free interface and a method for manufacturing the same. It discloses a method for manufacturing a van der Waals laminated structure with reduced influence of the interlayer interface by attaching a first planar body to a silicon oxide layer, applying a water droplet, and then introducing a polymer substrate to form a bubble-free interface. However, the above technology had the disadvantage that a complex process was required to control interface characteristics, and there were problems of oxidation and contamination due to the heating process and the use of polymers.

[0005] Accordingly, there is a need for the development of a technology that can suppress the degradation of semiconductor properties caused by substrate defects by increasing the van der Waals distance between the substrate and the two-dimensional semiconductor through a simple process. The problem to be solved

[0006] The objective of the present invention is to provide a two-dimensional semiconductor structure in which the degradation of semiconductor properties due to defects is prevented as the van der Waals distance increases.

[0007] Another objective of the present invention is to provide a method for manufacturing the two-dimensional semiconductor structure.

[0008] Another objective of the present invention is to provide a field-effect transistor comprising a two-dimensional semiconductor structure. means of solving the problem

[0009] To achieve the above objective, the present invention provides a two-dimensional semiconductor structure comprising a substrate, a perfluorinated self-assembled monolayer formed on the substrate, and a transition metal dichalcogenide (TMDC) layer formed on the perfluorinated self-assembled monolayer.

[0010] In the present invention, the substrate may be one or more selected from the group consisting of SiO2, silicon, germanium, silicon-germanium, strained silicon, strained germanium, strained silicon-germanium, and silicon on insulator.

[0011] In the present invention, the perfluorinated compound may be a perfluoro polyether (PFPE) or an organic silane compound containing perfluoro polyether.

[0012] In the present invention, the thickness of the perfluorinated self-assembled monolayer may be 0.5 to 50 nm.

[0013] In the present invention, the transition metal chalcogenide is represented by the chemical formula MX2, wherein M is a transition metal element and X is a chalcogen element.

[0014] In the present invention, the transition metal chalcogenide may be one or more selected from the group consisting of MoS2, MoSe2, WS2, and WSe2.

[0015] In the present invention, the thickness of the transition metal chalcogenide layer may be 0.5 to 10 nm.

[0016] In the present invention, the van der Waals distance of the perfluorinated self-assembled monolayer and the transition metal chalcogenide layer may be 2 to 8 nm.

[0018] The present invention also provides a method for manufacturing the two-dimensional semiconductor structure.

[0019] In the present invention, the manufacturing method may include the step of forming a perfluorinated self-assembled monolayer by coating a perfluorinated compound on a substrate, and the step of forming a two-dimensional semiconductor structure by transferring a transition metal chalcogenide onto the perfluorinated self-assembled monolayer.

[0020] In the present invention, the perfluorinated self-assembled monolayer can be formed through the steps of: stirring a coating solution containing an organic silane compound containing a perfluorinated functional group to cause hydrolysis and condensation reactions; and coating the reaction-completed coating solution onto a substrate and then heat-treating it.

[0021] In the present invention, the concentration of the perfluorinated compound in the coating solution may be 0.01 to 1 weight% based on the total weight of the solution.

[0022] In the present invention, the coating solution may further include an acid compound.

[0023] In the present invention, the concentration of the acid compound in the coating solution may be 0.01 to 1 weight% based on the total weight of the solution.

[0024] In the present invention, the transfer step of the transition metal chalcogenide may include the step of transferring a transition metal chalcogenide-polymer monolayer onto a perfluorinated self-assembled monolayer, and the step of removing the polymer from the transition metal chalcogenide-polymer monolayer.

[0026] The present invention also provides a field-effect transistor comprising the two-dimensional semiconductor structure.

[0027] In the present invention, the field-effect transistor may include a substrate, a lower electrode formed on the substrate, a perfluorinated self-assembled monolayer formed on the substrate on which the lower electrode is formed, a transition metal chalcogenide layer formed on the lower electrode and the perfluorinated self-assembled monolayer, and an upper electrode formed on the transition metal chalcogenide layer. Effects of the invention

[0028] According to the present invention, the van der Waals distance between the transition metal chalcogenide and the substrate increases due to the low surface energy of the perfluorinated self-assembled monolayer. Accordingly, the degradation of the two-dimensional semiconductor properties caused by various electrical defects present in the substrate in the structure is prevented, thereby improving physical properties such as luminescence characteristics and field-effect mobility. Therefore, by using the present invention, a semi-autonomous structure can be realized without complex processes, and the physical, optical, and electrical properties of the transition metal chalcogenide can be improved. Brief explanation of the drawing

[0029] FIG. 1 schematically illustrates a method for manufacturing a two-dimensional semiconductor structure according to one embodiment of the present invention. FIG. 2 schematically shows a cross-sectional view of a device fabricated using a two-dimensional semiconductor structure according to one embodiment of the present invention. FIG. 3 schematically shows a plan view of a device fabricated using a two-dimensional semiconductor structure according to one embodiment of the present invention. FIGS. 4a to 4d show the AFM analysis results of two-dimensional semiconductor structures fabricated using MoS2(a), MoSe2(b), WS2(c) and WSe2(d) according to one embodiment of the present invention. FIGS. 5a to 5d show the emission spectra and mapping images of devices fabricated using MoS2(a), MoSe2(b), WS2(c) and WSe2(d) according to one embodiment of the present invention. FIGS. 6a to 6d show the Raman spectra and mapping images of devices fabricated using MoS2(a), MoSe2(b), WS2(c) and WSe2(d) according to one embodiment of the present invention. FIGS. 7a to 7d show the transfer curves of devices fabricated using MoS2(a), MoSe2(b), WS2(c) and WSe2(d) according to one embodiment of the present invention. FIGS. 8a to 8d show the output curves of devices fabricated using MoS2(a), MoSe2(b), WS2(c) and WSe2(d) according to one embodiment of the present invention. Specific details for implementing the invention

[0030] Specific embodiments of the present invention will be described in more detail below. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by a skilled expert in the art to which the present invention pertains. In general, the nomenclature used herein is well known and commonly used in the art.

[0032] The present invention relates to a two-dimensional semiconductor structure in which a transition metal chalcogenide layer is formed on a perfluorinated self-assembled monolayer, and a method for manufacturing the same.

[0033] In the structure according to the present invention, the van der Waals (vdW) distance between the transition metal chalcogenide and the substrate is extended due to the low surface energy of the perfluorinated self-assembled monolayer. The van der Waals distance increased by the perfluorinated self-assembled monolayer prevents the degradation of the two-dimensional semiconductor properties caused by various electrical defects present in the substrate, thereby improving physical properties such as luminescence characteristics and field effect mobility.

[0034] Therefore, by using the present invention, a semi-self-supporting structure can be realized without complex processes and the physical, optical, and electrical properties of transition metal chalcogenides (TMDCs) can be improved, and it can be applied to various electronic and optical fields such as field effect transistors (FETs), complementary metal-oxide-semiconductors (CMOS), logic devices, semiconductor memory, solar cells, and sensors.

[0035] In the present invention, the two-dimensional semiconductor structure may comprise a substrate, a perfluorinated self-assembled monolayer formed on the substrate, and a transition metal dichalcogenide (TMDC) layer formed on the perfluorinated self-assembled monolayer.

[0036] The two-dimensional semiconductor structure of the present invention can be manufactured through the steps of: coating a perfluorinated compound (PFC) on a substrate to form a perfluorinated self-assembled monolayer; and transferring a transition metal chalcogenide layer onto the perfluorinated self-assembled monolayer to form a semi-autonomous structure.

[0037] In the present invention, the substrate may be one or more selected from the group consisting of SiO2, silicon, germanium, silicon-germanium, strained silicon, strained germanium, strained silicon-germanium, and silicon on insulator.

[0038] The above perfluorinated compound refers to an organic fluorine compound lacking CH bonds, specifically a compound in which all hydrogen atoms of the hydrocarbon backbone are substituted with fluorine atoms.

[0039] In the present invention, the perfluorinated self-assembled monolayer is a monolayer in which a perfluorinated compound is well aligned on the surface of a substrate, for example, a self-assembled monolayer in which perfluorinated compound molecules are tightly bonded to each other and aligned in one direction can be formed on the surface of the substrate through hydrolysis and condensation reactions of the perfluorinated compound.

[0040] In the present invention, the perfluorinated compound may be a perfluoro polyether (PFPE) or an organic silane compound containing perfluoro polyether.

[0041] In one embodiment of the present invention, the perfluorinated self-assembled monolayer may be formed by the steps of: stirring a coating solution containing an organic silane compound containing a perfluorinated functional group to hydrolyze and condense the coating solution; and coating the reaction-completed coating solution onto a substrate and then heat-treating it.

[0042] In the present invention, the concentration of the perfluorinated compound in the coating solution may be 0.01 to 1 weight%, preferably 0.02 to 0.5 weight%, and more preferably 0.05 to 0.2 weight% based on the total weight of the solution. In addition, one or more solvents such as deionized water, ethanol, isopropyl alcohol, N-methylpyrrolidone, dimethylformamide, toluene, tetrahydrofuran, hexane, and diethyl ether may be used as the solvent of the coating solution.

[0043] In the present invention, the coating solution may further comprise an acid compound. The acid compound may be used as a catalyst for a dehydration condensation reaction in a solution for self-assembly formation.

[0044] The above acid compound may include an inorganic acid or an organic acid, and specifically, the acid compound included in the coating solution may include one or more carboxylic acid compounds such as acetic acid, hydrochloric acid, nitric acid, sulfuric acid, etc.

[0045] The concentration of the acid compound in the above coating solution may be 0.01 to 1 weight%, preferably 0.02 to 0.5 weight%, and more preferably 0.05 to 0.2 weight% based on the total weight of the solution.

[0046] The above coating process can be performed using coating methods such as spin coating, spray coating, dip coating, and doctor blade.

[0047] In the present invention, a perfluorinated self-assembled monolayer can be formed by coating the perfluorinated compound and then heat-treating at a high temperature. Specifically, the heat treatment can be performed at 100 to 200°C, preferably at 120 to 180°C.

[0048] In the present invention, the thickness of the perfluorinated self-assembled monolayer may be 0.5 to 50 nm, preferably 1 to 10 nm, and may have a thin thickness of, for example, 1 to 5 nm.

[0049] In the present invention, a semi-autonomous structure can be realized by introducing a perfluorinated self-assembled monolayer with low surface energy between a two-dimensional semiconductor, a transition metal chalcogenide, and a substrate, thereby increasing the van der Waals distance between the two-dimensional semiconductor and the substrate. Accordingly, the physical properties of the two-dimensional semiconductor can be improved by preventing the degradation of its characteristics due to defects.

[0050] In the present invention, the transition metal chalcogenide is a material in which a transition metal element (an element in which an electron exists in a d-orbital) and a chalcogen element are combined, and the transition metal chalcogenide monolayer has a two-dimensional structure in which a transition metal monolayer is introduced between chalcogen element bilayers and has the characteristic of having a very thin layer thickness.

[0051] In the present invention, the transition metal chalcogenide can be represented by the chemical formula MX2 (where M is a transition metal element and X is a chalcogen element). Specifically, in the chemical formula MX2, M may be tungsten (W) or molybdenum (Mo), and X may be sulfur (S), selenium (Se), or tellurium (Te).

[0052] For example, the transition metal chalcogenide may be one or more selected from the group consisting of MoS2, MoSe2, WS2, and WSe2. In this regard, in an embodiment of the present invention, it was confirmed that when a perfluorinated self-assembled monolayer was introduced between the MoS2, MoSe2, WS2, or WSe2 and a substrate, the van der Waals distance between the transition metal chalcogenide and the substrate increased. Among them, the van der Waals distance increase effect was more excellent in the case of MoS2 and WSe2, and in particular, WSe2 showed the most excellent effect.

[0053] In the present invention, the thickness of the transition metal chalcogenide layer may be 0.5 to 10 nm, preferably 1 to 5 nm, for example 1 to 3 nm.

[0054] In the present invention, the van der Waals distance between the perfluorinated self-assembled monolayer and the transition metal chalcogenide layer may be 2 to 8 nm, for example, 3 to 5 nm. In this regard, in one embodiment of the present invention, when a transition metal chalcogenide layer is formed on a substrate, the van der Waals distance is 1.5 nm or less, whereas when a perfluorinated self-assembled monolayer is formed according to the present invention, the van der Waals distance between the self-assembled monolayer and the transition metal chalcogenide layer increases to 3 nm or more, and it was confirmed that the influence of substrate defects decreases as the distance between the substrate and the transition metal chalcogenide increases.

[0055] In the present invention, the transition metal chalcogenide can be formed by coating a transition metal precursor solution on a substrate, placing chalcogen powder thereon, and performing chemical vapor deposition (CVD).

[0056] In the present invention, the transition metal precursor may be a precursor having the chemical formula A2MB4, wherein A is an alkali metal element, M is a transition metal element, and B is oxygen.

[0057] In the present invention, the concentration of the transition metal precursor solution may be 0.001 to 0.1 M, preferably 0.005 to 0.05 M, more preferably 0.01 to 0.02 M, and one or more solvents such as deionized water, ethanol, isopropyl alcohol, N-methylpyrrolidone, dimethylformamide, toluene, tetrahydrofuran, hexane, diethyl ether, etc. may be used.

[0058] The chalcogen powder is sulfur (S), selenium (Se), or tellurium (Te) powder, and a transition metal chalcogenide layer can be formed by placing the transition metal precursor coating and the chalcogen powder at different locations in a chemical vapor deposition system and then heating.

[0059] In the present invention, a dry transfer method or a wet transfer method may be used to transfer a transition metal chalcogenide layer onto the perfluorinated self-assembled monolayer.

[0060] In one embodiment of the present invention, the step of transferring the transition metal chalcogenide layer may be manufactured through a wet transfer method that includes transferring a transition metal chalcogenide-polymer monolayer onto a perfluorinated self-assembled monolayer and removing the polymer of the transition metal chalcogenide-polymer monolayer.

[0061] In the above embodiment, the transition metal chalcogenide-polymer monolayer can be obtained by coating a polymer onto a substrate on which a transition metal chalcogenide layer is formed, and then etching the substrate.

[0062] Through this wet transfer method, only a transition metal chalcogenide monolayer can be transferred onto a perfluorinated self-assembled monolayer using a transition metal chalcogenide layer formed on a substrate.

[0063] Through this manufacturing process, a two-dimensional semiconductor structure can be formed comprising a substrate, a perfluorinated self-assembled monolayer formed on the substrate, and a transition metal chalcogenide layer formed on the perfluorinated self-assembled monolayer.

[0064] According to the present invention, since the physical, optical, and electrical properties of transition metal chalcogenides are improved, such a structure can be usefully applied in various electronic and optical fields, such as field effect transistors (FETs), complementary metal-oxide-semiconductors (CMOS), logic devices, semiconductor memories, solar cells, and sensors.

[0066] Accordingly, the present invention can also provide a two-dimensional semiconductor field-effect transistor comprising the two-dimensional semiconductor structure.

[0067] A field-effect transistor (FET) is a transistor that controls the current at the source and drain electrodes by utilizing the principle that applying voltage to the gate electrode creates a gate through which electrons or holes flow due to the electric field in the channel.

[0068] In the present invention, when a transition metal chalcogenide is introduced as a two-dimensional semiconductor into the field-effect transistor, the physical properties of the field-effect transistor can be improved by increasing the van der Waals distance through the formation of a perfluorinated self-assembled monolayer between the substrate and the two-dimensional semiconductor. Specifically, in the case of a field-effect transistor to which the present invention is applied, the Subthreshold Swing (SS) value is reduced, and the doping effect and lattice strain of the two-dimensional semiconductor can be minimized.

[0069] A field-effect transistor according to the present invention may include a substrate, a lower electrode formed on the substrate, a perfluorinated self-assembled monolayer formed on the substrate on which the lower electrode is formed, a transition metal chalcogenide layer formed on the lower electrode and the perfluorinated self-assembled monolayer, and an upper electrode formed on the transition metal chalcogenide layer.

[0070] In one embodiment of the present invention, the field-effect transistor can be fabricated through the steps of: forming a lower electrode on a substrate; forming a perfluorinated self-assembled monolayer on the substrate on which the lower electrode is formed; forming a transition metal chalcogenide layer on the lower electrode and the perfluorinated self-assembled monolayer; and forming an upper electrode on the transition metal chalcogenide layer.

[0071] In the present invention, the substrate of the field-effect transistor may be one or more selected from the group consisting of SiO2, silicon, germanium, silicon-germanium, strained silicon, strained germanium, strained silicon-germanium, and silicon on insulator.

[0072] In the present invention, the lower electrode may be formed from a conductive material, for example, a metal, a conductive oxide, or a conductive polymer. Specifically, as the conductive layer for forming the electrode, metals such as Au, Ag, Pt, Cu, and Al; conductive oxides such as ITO (indium tin oxide), FTO (fluorine-doped tin oxide), IZO (indium zinc oxide), AZO (aluminum-doped zinc oxide), and GZO (gallium zinc oxide); or conductive polymers such as polyaniline (PANI), polythiophene, and polypyrrole may be used.

[0073] The above lower electrode can be formed through processes such as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), plasma-enhanced atomic layer deposition (PEALD), coating, and printing.

[0074] In addition, for forming the lower electrodes, an etching process in which a conductive layer is deposited, a photolithography process is performed, followed by etching and removing the photoresist to form a pattern, or a lift-off process in which a conductive layer is deposited after the photolithography process and the photoresist is removed to form a pattern, may be used. Through patterning using the etching or lift-off process, lower electrodes spaced apart from each other can be formed.

[0075] After that, a perfluorinated self-assembled monolayer and a transition metal chalcogenide layer are formed on the substrate on which the lower electrode is formed, and the method of forming each layer is the same as described in the method of manufacturing a two-dimensional semiconductor structure.

[0076] In the present invention, an upper electrode is formed on the transition metal chalcogenide layer. A channel is formed in the semiconductor layer according to the voltage applied to the upper electrode, and the current of the lower electrode is controlled.

[0077] In the present invention, one or more materials selected from the group consisting of TiN, TiAlN, TaN, Co, WN, NbN, W, Mo, and Pt may be used as the material of the upper electrode.

[0078] In the present invention, the upper electrode can be formed through sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), plasma-enhanced atomic layer deposition (PEALD), etc.

[0079] The present invention can improve the electrical characteristics of a transistor by increasing the van der Waals distance between the substrate and the two-dimensional semiconductor through the introduction of a perfluorinated self-assembled monolayer between the two-dimensional semiconductor and the substrate in a field-effect transistor.

[0081] Examples

[0083] The present invention will be explained in more detail through the following examples. However, these examples represent some experimental methods and compositions to illustrate the invention, and the scope of the invention is not limited to these examples.

[0085] Manufacturing Example: Fabrication of a 2D semiconductor structure

[0087] Transition metal chalcogenide monolayer formation

[0089] A single layer (1L TMDC) of each of four types of transition metal chalcogenide compounds (MoS2, MoSe2, WS2, WSe2) was formed using chemical vapor deposition (CVD).

[0090] Sodium tungstate / molybdate (Na2WO4 / Na2MoO4, ACS reagent, Sigma Aldrich) and sulfur (S) or selenium (Se) powder (>99.5%, Sigma Aldrich) were used as transition metal and chalcogen precursors, respectively.

[0091] A transition metal precursor was dissolved in deionized water (DI) at a concentration of 0.0125 M, and the liquid precursor was coated onto a SiO2 / Si substrate using a spin coater at 3,000 rpm for 30 seconds. The SiO2 / Si substrate coated with the precursor and the chalcogen powder were placed at different locations in a two-zone CVD system and heated to 780°C and 210°C, respectively, for 6 minutes, and then maintained at these temperatures for 24 minutes under an atmospheric pressure atmosphere with a nitrogen flow of 550 sccm and a hydrogen flow of 4 sccm. Afterward, the system was rapidly cooled to room temperature.

[0093] Formation of Perfluorinated Self-Assembly Monolayers and Fabrication of 2D Semiconductor Structure Samples

[0095] For the coating of PFPE, an organic silane coating solution (Fluorolink S10) containing PFPE was prepared. 0.1 wt% of S10, 0.4 wt% of deionized water (DI), 0.1 wt% of acetic acid, and 99.4 wt% of isopropyl alcohol (IPA) were mixed, and the mixed solution was continuously stirred for 24 hours to complete the hydrolysis and condensation reactions.

[0096] A SiO2 / Si substrate (SiO2 300 nm) was washed with acetone, DI, and IPA while sonicating for 10 minutes, and the mixed solution was spin-coated at 3000 rpm for 30 seconds, and then the substrate was heat-treated at 150°C for 15 minutes to form a perfluorinated self-assembled monolayer, a PFPE SAM layer.

[0097] To compare physical properties according to PFPE coating, a sample of a two-dimensional semiconductor structure having a half-coated PFPE structure was fabricated according to the wet transfer method of Fig. 1.

[0098] Specifically, a substrate partially coated with a perfluorinated self-assembled monolayer was prepared, and separately, a polymer (PMMA) was coated on a TMDC monolayer formed on the substrate, and then the substrate was etched to separate the polymer-TMDC monolayer.

[0099] A two-dimensional semiconductor structure having a structure in which a TMDC is formed on a substrate partially coated with a perfluorinated self-assembled monolayer (TMDC-perfluorinated self-assembled monolayer structure) was fabricated by transferring a polymer-TMDC monolayer onto a substrate partially coated with a perfluorinated self-assembled monolayer and removing the polymer.

[0101] Fabrication of a device including a two-dimensional semiconductor structure

[0103] In order to fabricate a device with the above-mentioned two-dimensional semiconductor structure, a PFPE coating was formed on a substrate on which electrodes were formed, and a transition metal chalcogen layer was transferred to fabricate the device.

[0104] 300 nm thick SiO2 and p-doped silicon wafers were used as the dielectric and gate electrodes. The silicon wafers were washed with acetone, DI, and IPA, respectively, while sonicating for 10 minutes.

[0105] For bottom electrode deposition, photolithography was performed using AZ-GXR-601 PR (14cp) as a photoresist. Gold and titanium were deposited under high vacuum conditions using a thermal evaporation system, and a specific area of ​​PFPE was covered using photolithography.

[0106] Subsequently, the CVD-grown MoS2 was transferred onto the fabricated bottom electrode using a hand-made dry transfer system.

[0107] A cross-sectional view and a plan view of a device manufactured according to an embodiment of the present invention are shown in FIGS. 2 and 3, respectively.

[0109] Experimental Example 1: Measurement of van der Waals distance of a two-dimensional semiconductor structure

[0111] For the structure of the example of preparation, atomic force microscopy (AFM) images were analyzed to measure the distance between the SiO2 substrate and the two-dimensional semiconductor due to the PFPE SAM coating.

[0112] Figures 4a to 4d show a comparison of AFM analysis results on SiO2 layers and PFPE SAM for four different transition metal chalcogenide monolayers: MoS2(a), MoSe2(b), WS2(c), and WSe2(d), respectively.

[0113] Referring to the AFM images, it was confirmed that the four types of 2D semiconductors exhibited a vdW space of 1 to 2 nm on SiO2, whereas on the PFPE SAM, the vdW space was increased to 3 to 4 nm.

[0115] Experimental Example 2: Analysis of Emission Specifics of a Two-Dimensional Semiconductor Structure

[0117] For the structures of the manufacturing example, the emission light (PL) spectra and mapping images of two-dimensional semiconductor monolayers MoS2(a), MoSe2(b), WS2(c) and WSe2(d) on SiO2 and PFPE SAM are shown in FIGS. 5a to 5d.

[0118] Referring to the analysis results of the emission spectrum and mapping images above, the emission intensity of the semiconductor on the PFPE SAM was improved by 4 to 8 times compared to the semiconductor emission intensity on SiO2. However, the position of the emission peak and the ratio of excitons and trions did not change, which confirmed that only the photoemission characteristics were improved without the doping effect of electrons or holes.

[0119] From the above results, it was found that the van der Waals distance between the PFPE SAM and the semiconductor is larger than the van der Waals distance between the substrate and the semiconductor, and accordingly, Coulomb interaction is greatly suppressed, which reduces the influence of surface defects on the semiconductor and improves light emission characteristics.

[0121] Experimental Example 3: Analysis of Raman scattering characteristics of a two-dimensional semiconductor structure

[0123] A, a representative Raman scattering mode of 2D semiconductors 1g and E 1 2g Figures 6a to 6d show the Raman spectra and mapping images of two-dimensional semiconductor single-layer MoS2(a), MoSe2(b), WS2(c) and WSe2(d) on SiO2 and PFPE SAM, respectively, which are characteristics that change sensitively with doping and crystal lattice distortion.

[0124] Analysis of the Raman scattering characteristics on SiO2 and PFPE SAM confirmed that there was no significant shift in the Raman scattering peaks and that the results were negligible. Accordingly, it was found that there was no significant difference in the doping effect caused by electrons / holes or the degree of crystal lattice distortion on both SiO2 and PFPE SAM.

[0126] Experimental Example 4: Analysis of Electrical Characteristics of a Two-Dimensional Semiconductor Structure

[0128] For the structures of the manufacturing example, the electrical characteristics of the two-dimensional semiconductor single layer on SiO2 and PFPE SAM were analyzed, and the electrical characteristic results for each semiconductor MoS2, MoSe2, WS2, and WSe2 were compared.

[0129] Figures 7a to 7d show the transfer curves of MoS2(a), MoSe2(b), WS2(c), and WSe2(d), and Figures 8a to 8d show the output curves of MoS2(a), MoSe2(b), WS2(c), and WSe2(d). In addition, the field-effect mobility and subthreshold swing (SS) values ​​of the devices using each semiconductor are shown in Table 1 below.

[0131] 2D semiconductor MoS2 MoSe2 WS2 WSe2 SiO2 PFPE SiO2 PFPE SiO2 PFPE SiO2 PFPE Field effect mobility (cm 2 / Vs) 0.042 0.082 0.123 0.251 0.089 0.185 0.140 0.301 SS (mV / dec.) 550 390 2,790 1,720 6,100 3,190 3,690 1,560

[0133] Referring to the experimental results, when a two-dimensional semiconductor is formed on the PFPE SAM, the drain-source current ( I DS It was confirmed that the electric field-effect mobility was improved by an average of twofold as ) increased, and the Subthreshold Swing (SS) value decreased, resulting in a weakened Coulomb interaction of the interface trap.

[0134] In particular, MoS2, WS2, and MoSe2 are n-type semiconductors and WSe2 is a p-type semiconductor, and although the semiconductor types are different, all of them showed improved electrical characteristics. This indicates that the improvement in electrical characteristics by PFPE SAM is not due to doping, but rather by reducing defects as the van der Waals distance increases.

[0136] Although some embodiments of the present invention have been described above, the present invention is not limited to the embodiments described above but may be implemented with modifications and variations within the scope of the gist of the invention, and such modified and varied forms should also be understood as belonging to the technical spirit of the present invention.

Claims

Claim 1 A two-dimensional semiconductor structure comprising a substrate, a perfluorinated self-assembled monolayer formed on the substrate, and a transition metal dichalcogenide (TMDC) layer formed on the perfluorinated self-assembled monolayer, wherein the transition metal dichalcogenide is one or more selected from the group consisting of MoSe2, WS2, and WSe2, and the perfluorinated compound forming the perfluorinated self-assembled monolayer is a perfluoro polyether (PFPE) or an organic silane compound comprising a perfluoro polyether. Claim 2 A two-dimensional semiconductor structure according to claim 1, wherein the substrate is one or more selected from the group consisting of SiO2, silicon, germanium, silicon-germanium, strained silicon, strained germanium, strained silicon-germanium, and silicon on insulator. Claim 3 delete Claim 4 A two-dimensional semiconductor structure according to claim 1, wherein the thickness of the perfluorinated self-assembled monolayer is 0.5 to 50 nm. Claim 5 delete Claim 6 delete Claim 7 A two-dimensional semiconductor structure according to claim 1, wherein the thickness of the transition metal chalcogenide layer is 0.5 to 10 nm. Claim 8 A two-dimensional semiconductor structure according to claim 1, wherein the van der Waals distance of the perfluorinated self-assembled monolayer and the transition metal chalcogenide layer is 2 to 8 nm. Claim 9 A method for manufacturing a two-dimensional semiconductor structure comprising the steps of: forming a perfluorinated self-assembled monolayer by coating a perfluorinated compound on a substrate; and forming a two-dimensional semiconductor structure by transferring a transition metal chalcogenide onto the perfluorinated self-assembled monolayer, wherein the step of transferring the transition metal chalcogenide comprises the steps of: transferring a transition metal chalcogenide-polymer monolayer onto the perfluorinated self-assembled monolayer; and removing the polymer from the transition metal chalcogenide-polymer monolayer. Claim 10 A method for manufacturing a two-dimensional semiconductor structure according to claim 9, wherein the perfluorinated self-assembled monolayer is formed by the steps of: stirring a coating solution containing an organic silane compound containing a perfluorinated functional group to cause hydrolysis and condensation reactions; and coating the reaction-completed coating solution onto a substrate and then heat-treating it. Claim 11 A method for manufacturing a two-dimensional semiconductor structure according to claim 10, wherein the concentration of a perfluorinated compound in the coating solution is 0.01 to 1 weight% based on the total weight of the solution. Claim 12 A method for manufacturing a two-dimensional semiconductor structure according to claim 10, wherein the coating solution further comprises an acid compound. Claim 13 A method for manufacturing a two-dimensional semiconductor structure according to claim 12, wherein the concentration of an acid compound in the coating solution is 0.01 to 1 weight% based on the total weight of the solution. Claim 14 delete Claim 15 A field-effect transistor comprising a substrate, a lower electrode formed on the substrate, a perfluorinated self-assembled monolayer formed on the substrate on which the lower electrode is formed, a transition metal chalcogenide layer formed on the lower electrode and the perfluorinated self-assembled monolayer, and an upper electrode formed on the transition metal chalcogenide layer, wherein the transition metal chalcogenide is one or more selected from the group consisting of MoSe2, WS2, and WSe2, and the perfluorinated compound forming the perfluorinated self-assembled monolayer is a perfluoro polyether (PFPE) or an organic silane compound comprising a perfluoro polyether.

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