Image sensor using transfer gate signal having three voltage levels, and operation method thereof

Abstract

An image sensor according to one embodiment of the present disclosure includes a pixel comprising a photodiode, a transfer transistor, and a reset transistor, and a row driver for controlling the pixel. A method of operating the image sensor comprises the steps of: accumulating a first charge in the photodiode; applying a first transfer gate signal having a first voltage level to the transfer transistor; performing a first reset of a floating diffusion node connected to the reset transistor and the transfer transistor by means of the reset transistor; changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level during the first reset; changing the changed second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, wherein the first charge accumulated in the photodiode diffuses to the floating diffusion node through the transfer transistor, and changing the third voltage level of the first transfer gate signal to the second voltage level.

Description

Technology Field

[0001] The present disclosure relates to an image sensor, and more specifically, to an image sensor using a transmission gate signal having three voltage levels, and a method of operating the same. Background Technology

[0002] An image sensor detects light reflected from an external object and generates an electrical signal containing image data. Typically, an image sensor includes multiple pixels. Each pixel includes a photodiode and a floating diffusion node. A transmission gate signal controls the movement of charge accumulated in the photodiode to the floating diffusion node.

[0003] Recently, image sensor pixels are being miniaturized to increase the resolution of image data. As pixels become smaller, their capacitance decreases, making them more sensitive to unintended changes in charge. Changes in charge can degrade image data quality. For example, unintended charging or discharging of charge can occur at the pixel's floating diffusion node due to external noise, temperature changes, leakage current, white spots caused by manufacturing defects, or dark current. If charge is charged or discharged at the floating diffusion node in a manner unrelated to the control of the transmission gate signal, the image data quality may degrade. The problem to be solved

[0004] According to one embodiment of the present disclosure, an image sensor using a transmission gate signal having three voltage levels and a method of operating the same are provided. means of solving the problem

[0005] According to one embodiment of the present disclosure, an image sensor comprises a pixel including a photodiode, a transfer transistor, and a reset transistor, and a row driver for controlling the pixel. A method of operating the image sensor comprises the steps of: accumulating a first charge in the photodiode; applying a first transfer gate signal having a first voltage level to the transfer transistor; performing a first reset of a floating diffusion node connected to the reset transistor and the transfer transistor by the reset transistor; changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level during the first reset; changing the changed second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, wherein the accumulated first charge of the photodiode diffuses to the floating diffusion node through the transfer transistor; and changing the third voltage level of the first transfer gate signal to the second voltage level.

[0006] According to one embodiment of the present disclosure, an image sensor comprises a pixel including a photodiode, a transfer transistor, and a reset transistor, and a row driver for controlling the pixel. A method of operating the image sensor comprises the steps of: accumulating a first charge in the photodiode; applying a first transfer gate signal having a first voltage level to the transfer transistor; performing a first reset of a floating diffusion node connected to the reset transistor and the transfer transistor by the reset transistor; after performing the first reset, changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level; changing the changed second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, wherein the first charge accumulated in the photodiode diffuses to the floating diffusion node through the transfer transistor, and changing the third voltage level of the first transfer gate signal to the second voltage level.

[0007] According to one embodiment of the present disclosure, an image sensor comprises a pixel array including a plurality of pixels, a first transmission gate signal having a first voltage level, a second voltage level higher than the first voltage level, or a third voltage level higher than the second voltage level, and a row driver configured to generate a reset gate signal. Among the plurality of pixels, the first pixel comprises a first photodiode configured to detect light and accumulate charge, a first transmission transistor connected between the first photodiode and a floating diffusion node and operating in response to the first transmission gate signal, and a reset transistor connected between a power node and the floating diffusion node and operating in response to the reset gate signal. The above low driver is configured to apply a first transmission gate signal having a first voltage level to a first transmission transistor while the first photodiode accumulates the charge, change the first voltage level of the first transmission gate signal to a second voltage level after the first photodiode accumulates the charge, and change the second voltage level of the first transmission gate signal to a third voltage level in order to diffuse the accumulated charge of the first photodiode to the floating diffusion node. Effects of the invention

[0008] According to one embodiment of the present disclosure, an image sensor using a transmission gate signal having three voltage levels and a method of operating the same are provided.

[0009] In addition, an image sensor that generates high-quality image data by suppressing side effects caused by defects while the photodiode accumulates charge and suppressing side effects caused by leakage during the readout period, and a method of operating the same are provided. Brief explanation of the drawing

[0010] FIG. 1 is a block diagram of an electronic device according to an embodiment of the present disclosure. FIG. 2 is a block diagram illustrating the image sensor of FIG. 1 in accordance with an embodiment of the present disclosure. FIG. 3 is a drawing that embodies the pixel array of FIG. 2 according to some embodiments of the present disclosure. FIG. 4 is a circuit diagram illustrating the pixel of FIG. 2 in accordance with some embodiments of the present disclosure. FIG. 5 is a cross-sectional view illustrating a transfer transistor according to some embodiments of the present disclosure. Figure 6 is a timing diagram illustrating the signals of a typical image sensor. FIG. 7 is a timing diagram illustrating signals of an image sensor according to some embodiments of the present disclosure. FIG. 8 is a timing diagram illustrating the signals of an image sensor according to some embodiments of the present disclosure. FIG. 9 is a timing diagram illustrating the signals of an image sensor according to some embodiments of the present disclosure. FIGS. 10a and FIGS. 10b are timing diagrams illustrating signals of an image sensor according to some embodiments of the present disclosure. FIG. 11 is a circuit diagram illustrating the pixel of FIG. 2 in accordance with some embodiments of the present disclosure. FIG. 12 is a drawing that embodies the pixel of FIG. 11 according to some embodiments of the present disclosure. FIG. 13 is a flowchart illustrating a method of operation of an image sensor according to some embodiments of the present disclosure. FIG. 14 is a flowchart illustrating a method of operation of an image sensor according to some embodiments of the present disclosure. FIG. 15 is a block diagram of an electronic device including a multi-camera module according to some embodiments of the present disclosure. FIG. 16 is a block diagram illustrating the camera module of FIG. 15 in accordance with some embodiments of the present disclosure. Specific details for implementing the invention

[0011] In the following, embodiments of the present disclosure will be described clearly and in detail so that a person skilled in the art can easily practice the embodiments of the present disclosure.

[0012] Components described by reference to terms such as part, unit, module, and layer used in the detailed description, and functional blocks illustrated in the drawings, may be implemented in the form of software, hardware, or a combination thereof. For example, software may be machine code, firmware, embedded code, and application software. For example, hardware may include electrical circuits, electronic circuits, processors, computers, integrated circuits, integrated circuit cores, pressure sensors, inertial sensors, MEMS (microelectromechanical systems), passive components, or a combination thereof.

[0013] FIG. 1 is a block diagram of an electronic device according to an embodiment of the present disclosure. Referring to FIG. 1, an electronic device (10) is shown. The electronic device (10) may be a device that detects light reflected from an external object and processes image data. For example, the electronic device (10) may be implemented as one of various types of electronic devices such as a smartphone, a tablet PC (personal computer), a laptop PC, a wearable device, etc.

[0014] The image sensor (100) may include an image sensor (100) and an image processor (11). The image sensor (100) may operate under the control of the image processor (11). For example, the image sensor (100) may detect light reflected from an external object, convert the detected light into an electrical signal, and provide the electrical signal to the image processor (11) as image data. The image processor (11) may receive image data from the image sensor (100) and process the image data.

[0015] The image sensor (100) may include a row driver (110) and a pixel array (120). The row driver (110) may generate a select signal (SEL), a reset gate signal (RG), and a transmit gate signal (TG). The select signal (SEL) may be a signal for selecting some of the pixels of the pixel array (120). The reset gate signal (RG) may be a signal for controlling the reset transistor of a pixel of the pixel array (120). The transmit gate signal (TG) may be a signal for controlling the transmit transistor of a pixel of the pixel array (120). A more detailed description of the pixels of the pixel array (120) controlled by the row driver (110) will be given later with reference to FIG. 4.

[0016] According to some embodiments of the present disclosure, a row driver (110) may generate a transmission gate signal (TG) having three voltage levels. For example, the transmission gate signal (TG) may have a first voltage level, a second voltage level, or a third voltage level. The second voltage level may be higher than the first voltage level. The third voltage level may be higher than the second voltage level.

[0017] A transmission gate signal (TG) of the first voltage level can suppress side effects caused by defects (e.g., defects in the insulating film) while the pixel detects light and accumulates charge. A transmission gate signal (TG) of the second voltage level can suppress side effects caused by leakage (e.g., unintended leakage current) during the readout interval. A transmission gate signal (TG) of the third voltage level can form a channel between the photodiode and the floating diffusion node. A more detailed description of the transmission gate signal (TG) will be given later with reference to FIGS. 7, 8, 9, 10a, and 10b.

[0018] The pixel array (120) may include a plurality of pixels. For example, the pixel array (120) may include a plurality of pixels arranged in the row direction and the column direction. The pixel array (120) may operate based on a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) from the row driver (110). The pixel array (120) may output image data to the image processor (11).

[0019] The image processor (11) can communicate with the image sensor (100). The image processor (11) can control the operation of the image sensor (100). For example, the image processor (11) can control the row driver (110) to generate a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG). The image processor (11) can receive image data generated by the pixel array (120). The image processor (11) can correct the image data (for example, correct the image data of a defective pixel based on the image data of an adjacent pixel), store the image data in a storage device, or output the image data to a display device.

[0020] In some embodiments, the image processor (11) can control the row driver (110) to adjust the waveform of the transmission gate signal (TG). For example, the image processor (11) can control the point in time when the transmission gate signal (TG) changes from a first voltage level to a second voltage level or when the transmission gate signal (TG) changes from a second voltage level to a first voltage level. For example, the image processor (11) can adjust the second voltage level of the transmission gate signal (TG) (i.e., increase or decrease the second voltage level). For example, the image processor (11) can adjust the length of the time interval during which the transmission gate signal (TG) is maintained at a third voltage level.

[0021] FIG. 2 is a block diagram illustrating the image sensor of FIG. 1 in accordance with an embodiment of the present disclosure. Referring to FIG. 1 and FIG. 2, the image sensor (100) may include a row driver (110), a pixel array (120), a timing controller (130), an analog-to-digital converter (140), and an output buffer (150).

[0022] The row driver (110) can output a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) to the pixel array (120). The select signal (SEL) can select pixels of a corresponding row among the pixels of the pixel array (120). The reset gate signal (RG) and the transmission gate signal (TG) can control the reset transistor and the transmission transistor of the corresponding pixel.

[0023] A pixel array (120) may include a plurality of pixels (PIX). The pixels (PIX) may be arranged in a row direction and a column direction. For the sake of understanding of the present disclosure, in FIG. 2, the pixel array (120) is shown to include four pixels (PIX) in the row direction and four pixels (PIX) in the column direction, but the scope of the present disclosure is not limited thereto, and the number of pixels (PIX) included in the pixel array (120) may increase or decrease in the row direction and the column direction.

[0024] Each of the plurality of pixels (PIX) of the pixel array (120) can operate based on a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) received from the row driver (110). Each of the plurality of pixels (PIX) can detect light reflected from an external object and output an output signal (OT), which is an electrical signal containing image data, to an analog-to-digital converter (140).

[0025] The timing controller (130) can communicate with the image processor (11). The timing controller (130) can control the row driver (110), the analog-to-digital converter (140), and the output buffer (150) under the control of the image processor (11). The timing controller (130) can generate a clock signal and control the input timing and output timing of the row driver (110), the analog-to-digital converter (140), and the output buffer (150). In some embodiments, the timing controller (130) can control the operation of the row driver (110) generating a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) under the control of the image processor (11).

[0026] The analog-to-digital converter (140) can receive an output signal (OT) from the pixel array (120). The analog-to-digital converter (140) can perform an analog-to-digital conversion operation based on the output signal (OT). The analog-to-digital converter (140) can output the converted output signal to an output buffer (150). For example, the output signal (OT) generated from the pixel array (120) may be an analog signal, and the analog-to-digital converter (140) can convert the output signal (OT) into a digital signal and output the converted output signal to an output buffer (150).

[0027] The output buffer (150) can receive the output signal converted from the analog-to-digital converter (140). The output buffer (150) can store the converted output signal. The output buffer (150) can output the stored output signal to the image processor (11) based on the control of the timing controller (130).

[0028] FIG. 3 is a drawing that embodies the pixel array of FIG. 2 according to some embodiments of the present disclosure. Referring to FIG. 2 and FIG. 3, the pixel array (120) may include a plurality of pixel groups (PIXGR).

[0029] Hereinafter, for convenience of explanation, a first direction (D1), a second direction (D2), and a third direction (D3) are mentioned. The first direction (D1) may be the direction in which pixels are arranged. The second direction (D2) may be a direction perpendicular to the first direction (D1). The third direction (D3) may be a direction perpendicular to the plane defined by the first and second directions (D1, D2). For example, the first direction (D1) and the second direction (D2) may be the row direction and the column direction of the pixel array (120), respectively. The third direction (D3) may be a direction perpendicular to the semiconductor substrate on which pixels (PIX) of the pixel array (120) are formed.

[0030] A plurality of pixel groups (PIXGR) of a pixel array (120) may be arranged in a first direction (D1) and a second direction (D2). Each of the plurality of pixel groups (PIXGR) may include four pixels (PIX11, PIX12, PIX21, PIX22). The pixels (PIX11, PIX12, PIX21, PIX22) may be arranged in a first direction (D1) and a second direction (D2).

[0031] For example, in a pixel group (PIXGR), a pixel (PIX12) may be adjacent to a pixel (PIX11) in a first direction (D1). A pixel (PIX21) may be adjacent to a pixel (PIX11) in the opposite direction of a second direction (D2). A pixel (PIX22) may be adjacent to a pixel (PIX21) in a first direction (D1).

[0032] According to some embodiments of the present disclosure, color filters may be placed on pixels (PIX11, PIX12, PIX21, PIX22) of a pixel group (PIXGR). For example, as illustrated in FIG. 3, a blue filter may be placed on pixel (PIX11). A green filter may be placed on pixel (PIX12). A green filter may be placed on pixel (PIX21). A red filter may be placed on pixel (PIX22). Accordingly, pixel (PIX11) may generate an electrical signal corresponding to an amount of blue light, pixels (PIX12, PIX21) may generate electrical signals corresponding to an amount of green light, and pixel (PIX22) may generate an electrical signal corresponding to an amount of red light.

[0033] According to some embodiments of the present disclosure, each of the pixels (PIX11, PIX12, PIX21, PIX22) of a pixel group (PIXGR) may include subpixels of the same color type. For example, a pixel (PIX11) may include four subpixels (B11, B12, B21, B22) arranged in a first direction (D1) and a second direction (D2). The color type of the subpixels (B11, B12, B21, B22) may be blue. Similarly, each of the pixels (PIX12, PIX21) may include subpixels (G11, G12, G21, G22) of a color type of green, and a pixel (PIX22) may include subpixels (R11, R12, R21, R22) of a color type of red.

[0034] In some embodiments, subpixels included in a single pixel may be implemented in a four-shared structure that shares circuits other than photodiodes and transfer transistors. A more detailed description thereof will be given later with reference to FIGS. 11 and 12.

[0035] FIG. 4 is a circuit diagram illustrating the pixel of FIG. 2 in accordance with some embodiments of the present disclosure. Referring to FIG. 2 and FIG. 4, the pixel (PIX) may be connected to a row driver (110) and an analog-to-digital converter (140). The pixel (PIX) may receive a select signal (SEL), a reset gate signal (RG), and a transmit gate signal (TG) from the row driver (110). The pixel (PIX) may operate based on a power supply voltage (Vdd) and a ground voltage (GND). The pixel (PIX) may detect light and generate an output signal (OT) containing image data.

[0036] For example, a pixel (PIX) can receive a select signal (SEL) from a low driver (110) via a select line (SL). Similarly, a pixel (PIX) can receive a transmission gate signal (TG) from a low driver (110) via a transmission line (not shown) and a reset gate signal (RG) from a low driver (110) via a reset line (not shown). Additionally, the pixel (PIX) can output an output signal (OT) to an analog-to-digital converter (140) via an output line (OL).

[0037] A pixel (PIX) may include a photodiode (PD), a transfer transistor (MT), a capacitor (Cfd), a reset transistor (MR), a source follower transistor (MSF), and a select transistor (MSL).

[0038] A photodiode (PD) can detect light reflected from an external object and accumulate charge. The photodiode (PD) can provide the accumulated charge to a floating diffusion node (FD) through a transfer transistor (MT). For example, the photodiode (PD) can detect light and accumulate charge during an integration phase. The photodiode (PD) can provide the accumulated charge to a floating diffusion node (FD) through a transfer transistor (MT) during a readout phase.

[0039] The transfer transistor (MT) can be connected between the output terminal of the photodiode (PD) and the floating diffusion node (FD). The transfer transistor (MT) can operate based on the transfer gate signal (TG).

[0040] According to some embodiments of the present disclosure, a transmission gate signal (TG) may have a first voltage level, a second voltage level, or a third voltage level. The first voltage level may be lower than the ground voltage (GND). The second voltage level may be higher than the first voltage level. The third voltage level may be higher than the second voltage level. The third voltage level may be higher than the threshold voltage of the transmission transistor (MT).

[0041] The transfer transistor (MT) can detect light and accumulate charge during the integration period based on the transfer gate signal (TG) of the first voltage level. At this time, as the transfer transistor (MT) is biased to a voltage level lower than the ground voltage (GND), side effects caused by defects in the insulating film can be suppressed.

[0042] The transfer transistor (MT) can block the connection of the photodiode (PD) and the floating diffusion node (FD) during part of the readout period based on the transfer gate signal (TG) of the second voltage level. At this time, as the transfer transistor (MT) is biased to a second voltage level higher than the first voltage level, side effects caused by unintended leakage can be suppressed.

[0043] The transfer transistor (MT) can form a channel between the photodiode (PD) and the floating diffusion node (FD) during part of the readout period based on the transfer gate signal (TG) of the third voltage level. For example, the charge accumulated in the photodiode (PD) during the integration period can be diffused to the floating diffusion node (FD) while the transfer gate signal (TG) of the third voltage level is applied to the transfer transistor (MT).

[0044] A more detailed explanation of the side effects of the transfer transistor (MT) will be provided later, together with Fig. 5.

[0045] A capacitor (Cfd) can be connected between a floating diffusion node (FD) and a ground node having a ground voltage (GND). The capacitor (Cfd) can accumulate charge received from a photodiode (PD) and determine the voltage level of the floating diffusion node (FD).

[0046] A reset transistor (MR) can be connected between a power node having a power supply voltage (Vdd) and a floating diffusion node (FD). The reset transistor (MR) can perform a reset of the floating diffusion node (FD) based on a reset gate signal (RG).

[0047] For example, when a low voltage level reset gate signal (RG) is applied, the reset transistor (MR) can be blocked. When the reset transistor (MR) is blocked, the floating diffusion node (FD) can be floating. When a high voltage level reset gate signal (RG) is applied, the reset transistor (MR) can reset the voltage level of the floating diffusion node (FD) by enabling the connection between the power node and the floating diffusion node (FD).

[0048] A source follower transistor (MSF) can be connected between a power node having a power supply voltage (Vdd) and a select transistor (MSL). The source follower transistor (MSF) can operate in response to the voltage level of a floating diffusion node (FD). For example, if the voltage level of the floating diffusion node (FD) exceeds the threshold voltage level of the source follower transistor (MSF), the source follower transistor (MSF) can enable the connection between the power node and the select transistor (MSL).

[0049] A select transistor (MSL) can be connected between a source follower transistor (MSF) and an output line (OL). The gate of the select transistor (MSL) can be connected to a select line (SL). Based on a select signal (SEL) received through the select line (SL), the select transistor (MSL) can provide an electrical signal received from the source follower transistor (MSF) to the output line (OL) as an output signal (OT).

[0050] For example, when a low voltage level select signal (SEL) is applied, the select transistor (MSL) can disconnect the source follower transistor (MSF) and the output line (OL). When a high voltage level select signal (SEL) is applied, the select transistor (MSL) can enable the connection between the source follower transistor (MSF) and the output line (OL), thereby outputting an output signal (OT) through the output line (OL).

[0051] FIG. 5 is a cross-sectional view illustrating a transfer transistor according to some embodiments of the present disclosure. Referring to FIG. 5, a cross-sectional view of a transfer transistor is shown. The transfer transistor may correspond to the transfer transistor (MT) of FIG. 4. The transfer transistor is connected between a photodiode (PD) and a floating diffusion node (FD) and may be controlled by a transfer gate signal (TG).

[0052] A semiconductor substrate (201) may be formed parallel to a plane defined by a first direction (D1) and a second direction (D2). A semiconductor well region (202) may be formed on the semiconductor substrate (201). The semiconductor well region (202) may be a P-type region. A photodiode (PD), a transfer transistor, and a floating diffusion node (FD) may be formed on the semiconductor well region (202).

[0053] The photodiode (PD) can be formed with a surface P-type semiconductor region (212) and a lower N-type semiconductor region. Here, the P-type semiconductor region (212) may be a P-type high-concentration impurity region. The floating diffusion node (FD) may be an N-type impurity region.

[0054] A transfer transistor may be formed by comprising a photodiode (PD), a transfer gate electrode that receives a transfer gate signal (TG), and a floating diffusion node (FD). The transfer gate electrode may be formed on a gate insulating film (240). Although not shown in FIG. 5, the floating diffusion node (FD) may be electrically connected to the source electrode of the reset transistor (MR) of FIG. 4 and the gate electrode of the source follower transistor (MSF) through wiring.

[0055] An isolation region (231) may be formed at one end of the photodiode (PD). For example, the isolation region (231) may be formed adjacent to the photodiode (PD) in the first direction (D1) and opposite to the third direction (D3). For example, the isolation region (231) may include a P-type high-concentration impurity region. The isolation region (231) may electrically isolate the photodiode (PD) from other circuit elements (e.g., transistors of other pixels). Similarly, an isolation region (232) may be formed at one end of the floating diffusion node (FD). The isolation region (232) may electrically isolate the floating diffusion node (FD) from other circuit elements.

[0056] In some embodiments of the present disclosure, a defect may occur at the bottom of the transmission gate electrode. By reducing the turn-off voltage level of the transmission gate signal (TG), adverse effects caused by the defect can be suppressed. The turn-off voltage level may refer to a voltage level that blocks channel formation of the transmission transistor.

[0057] More specifically, a defect may occur at the top of the gate insulating film (240) and the facing semiconductor well region (202). The defect may be an unintended process defect that occurs during the actual fabrication of the semiconductor device. While the transfer transistor is blocked by the transfer gate signal (TG) at the turn-off voltage level, the defect may help the charge of the photodiode (PD) to diffuse to the floating diffusion node (FD). The diffusion of charge due to the defect may cause degradation of image data quality, such as white spots and dark current.

[0058] To resolve this image quality degradation, the turn-off voltage level of the transmission gate signal (TG) can be reduced. For example, if the turn-off voltage level of the transmission gate signal (TG) is set to a negative voltage lower than the ground voltage, the channel of the transmission transistor is strongly blocked, so side effects caused by defects can be suppressed.

[0059] However, as the turn-off voltage level of the transmission gate signal (TG) decreases, the electric field between the transmission gate electrode and the semiconductor well region (202) may be strongly formed. Accordingly, side effects caused by leakage, such as GIDL (Gate Induced Drain Leakage), may occur in the floating diffusion node (FD). If the charge of the floating diffusion node (FD) is discharged due to such leakage, the image data quality may be degraded.

[0060] As described above, in order to suppress side effects caused by defects while accumulating charge in the photodiode (PD), it is necessary to reduce the turn-off voltage level of the transmission gate signal (TG). However, during the readout phase for processing the accumulated charge of the photodiode (PD), in order to suppress side effects caused by leakage, it is necessary to increase the turn-off voltage level of the transmission gate signal (TG).

[0061] FIG. 6 is a timing diagram illustrating the signals of a typical image sensor. Referring to FIG. 6, the waveforms of the select signal (SEL), reset gate signal (RG), and transmit gate signal (TG) used in a typical image sensor are shown. A typical transmit gate signal (TG) can have two voltage levels. The horizontal axis represents the time axis. The vertical axis represents the logic state of the signal.

[0062] An image sensor may include pixels. A pixel may include a photodiode, a transfer transistor, a reset transistor, a source follower transistor, and a select transistor. A select signal (SEL) may control the select transistor. A reset gate signal (RG) may control the reset transistor. A transfer gate signal (TG) may control the transfer transistor.

[0063] The time interval between the first time point (T1) and the second time point (T2) is referred to as the integration interval. The integration interval may refer to the interval during which the photodiode accumulates charge.

[0064] During the integration period, the select signal (SEL) may be maintained at the turn-off voltage level. The reset gate signal (RG) may be changed from the turn-off voltage level to the turn-on voltage level. The transmit gate signal (TG) may be maintained at the turn-off voltage level.

[0065] The time interval between the second time point (T2) and the third time point (T3) is referred to as the readout interval. The readout interval may be a time interval following the integration interval. The readout interval may be a period for processing the charge accumulated during the integration interval in the photodiode of the corresponding pixel. For example, during the readout interval, the image sensor may diffuse the accumulated charge of the photodiode to a floating diffusion node and generate a corresponding output signal based on the voltage level of the floating diffusion node.

[0066] The readout interval may include time points (Tr1, Tt1, Tt2, Tr2). During the readout interval, the select signal (SEL) may be maintained at a turn-on voltage level, but the scope of the present disclosure is not necessarily limited thereto.

[0067] At time point (Tr1), the reset gate signal (RG) can be changed from a turn-on voltage level to a turn-off voltage level. That is, at time point (Tr1), the reset transistor can complete the reset of the floating diffusion node, and the floating diffusion node can be floating.

[0068] At time point (Tt1), the transmission gate signal (TG) can be changed from a turn-off voltage level to a turn-on voltage level. At time point (Tt2), the transmission gate signal (TG) can be changed from a turn-on voltage level to a turn-off voltage level. That is, the transmission transistor can form a channel during the time interval between time point (Tt1) and time point (Tt2).

[0069] At time point (Tr2), the reset gate signal (RG) can be changed from a turn-off voltage level to a turn-on voltage level. That is, at time point (Tr2), the reset transistor can reset the floating diffusion node.

[0070] As described above, the transmission gate signal (TG) may have a turn-on voltage level during the time interval between time point (Tt1) and time point (Tt2), and may have a turn-off voltage level during the other time intervals. As described in FIG. 5, if the turn-off voltage level of the transmission gate signal (TG) is lowered, side effects due to leakage may occur, and if the turn-off voltage level of the transmission gate signal (TG) is higher, side effects due to defects may occur.

[0071] To improve the image quality of the image data, a technique may be required to divide the turn-off voltage level into two types according to the time interval. In other words, an image sensor using a transmission gate signal (TG) having three voltage levels may be required.

[0072] FIG. 7 is a timing diagram illustrating signals of an image sensor according to some embodiments of the present disclosure. The image sensor may include a pixel (PIX) of FIG. 4. Referring to FIG. 4 and FIG. 7, waveforms of a select signal (SEL), a reset gate signal (RG), and a transmit gate signal (TG) used in an image sensor according to some embodiments of the present disclosure are illustrated. The transmit gate signal (TG) may have three voltage levels. The horizontal axis represents the time axis. The vertical axis represents the logic state of the signal.

[0073] The image sensor may include a pixel (PIX). The pixel (PIX) may include a photodiode (PD), a transfer transistor (MT), a reset transistor (MR), a source follower transistor (MSF), and a select transistor (MSL). A select signal (SEL) may control the select transistor (MSL). A reset gate signal (RG) may control the reset transistor (MR). A transfer gate signal (TG) may control the transfer transistor (MT).

[0074] According to some embodiments of the present disclosure, an image sensor may use a transmission gate signal (TG) having three voltage levels. More specifically, the transmission gate signal (TG) may have a first voltage level, a second voltage level, or a third voltage level. For example, the first voltage level may be a negative voltage lower than the ground voltage. The first voltage level may block the channel of the transmission transistor (MT). The second voltage level may be higher than the first voltage level and may block the channel of the transmission transistor (MT). The third voltage level may be higher than the second voltage level and may form the channel of the transmission transistor (MT). That is, unlike the transmission gate signal (TG) of FIG. 6, the transmission gate signal (TG) of FIG. 7 may further include a second voltage level which is an intermediate voltage level.

[0075] The time interval between the first time point (T1) and the second time point (T2) is referred to as the integration interval. The integration interval may refer to the interval during which the photodiode (PD) accumulates charge.

[0076] During the integration period, the select signal (SEL) can be maintained at a turn-off voltage level. The reset gate signal (RG) can be changed from a turn-off voltage level to a turn-on voltage level. The transfer gate signal (TG) can be maintained at a first voltage level. While accumulating charge in the photodiode (PD), the gate of the transfer transistor (MT) is biased to a negative voltage, so side effects caused by defects can be suppressed.

[0077] The time interval between the second time point (T2) and the third time point (T3) is referred to as the readout interval. The readout interval may be a period in which a pixel generates an output signal based on the charge accumulated in the photodiode. The readout interval may include a first time interval, a second time interval, and a third time interval. The first time interval may be a time interval between time point (Tr1) and time point (Tt1). The second time interval may be a time interval between time point (Tt1) and time point (Tt2). The third time interval may be a time interval between time point (Tt2) and time point (Tr2). During the readout interval, the select signal (SEL) may be maintained at a turn-on voltage level.

[0078] At time point (Tr1), the reset gate signal (RG) can be changed from a turn-on voltage level to a turn-off voltage level. That is, at time point (Tr1), the reset transistor can complete the reset of the floating diffusion node, and the floating diffusion node can be floated. The transmission gate signal (TG) can be changed from a first voltage level to a second voltage level. That is, the voltage level applied to the gate of the transmission transistor (MT) can be increased.

[0079] During the first time interval, the select signal (SEL) can be maintained at a turn-on voltage level. The reset gate signal (RG) can be maintained at a turn-off voltage level. The transmission gate signal (TG) can be maintained at a second voltage level. At this time, the transmission transistor (MT) is biased to a second voltage level higher than the first voltage level, so side effects caused by leakage to the floating diffusion node (FD) can be suppressed.

[0080] At time point (Tt1), the transmission gate signal (TG) can be changed from a second voltage level to a third voltage level. Based on the transmission gate signal (TG) at the third voltage level, the transmission transistor (MT) can form a channel connecting the photodiode (PD) and the floating diffusion node (FD).

[0081] During the second time interval, the select signal (SEL) can be maintained at the turn-on voltage level. The reset gate signal (RG) can be maintained at the turn-off voltage level. The transfer gate signal (TG) can be maintained at the third voltage level. Since the transfer transistor (MT) is turned on, the charge accumulated in the photodiode (PD) can be diffused through the transfer transistor (MT) to the floating diffusion node (FD).

[0082] In some embodiments, as the length of the second time interval increases, the transfer (or transfer) of charge from the photodiode (PD) to the floating diffusion node (FD) may become smoother. An image processor controlling the image sensor may increase the length of the second time interval if it determines that the external environment is dark (i.e., less charge accumulates in the photodiode (PD)). An image processor controlling the image sensor may decrease the length of the second time interval if it determines that the external environment is bright (i.e., more charge accumulates in the photodiode (PD)).

[0083] At time point (Tt2), the transmission gate signal (TG) can be changed from a third voltage level to a second voltage level. At this time, the transmission transistor (MT) can block the channel between the photodiode (PD) and the floating diffusion node (FD).

[0084] During the third time interval, the select signal (SEL) may be maintained at a turn-on voltage level. The reset gate signal (RG) may be maintained at a turn-off voltage level. The transfer gate signal (TG) may be maintained at a second voltage level. Similar to the first time interval, the transfer transistor (MT) is biased to a second voltage level higher than the first voltage level, so that side effects caused by leakage to the floating diffusion node (FD) can be suppressed.

[0085] At time point (Tr2), the reset gate signal (RG) can be changed from a turn-off voltage level to a turn-on voltage level. The transfer gate signal (TG) can be changed from a second voltage level to a first voltage level. That is, at time point (Tr2), the reset transistor (MR) can reset the floating diffusion node (FD). For subsequent image data processing, the gate of the transfer transistor (MT) is biased to a negative voltage, and side effects caused by defects can be suppressed.

[0086] As described above, according to embodiments of the present disclosure, an image sensor is provided that uses a transmission gate signal (TG) having a first voltage level, a second voltage level, or a third voltage level. By biasing the transmission transistor (MT) to the first voltage level during the integration period, the image sensor can suppress side effects caused by defects. By biasing the transmission transistor (MT) to the second voltage level before and after turning on the transmission transistor (MT) during the readout period, the image sensor can suppress side effects caused by leakage.

[0087] FIG. 8 is a timing diagram illustrating signals of an image sensor according to some embodiments of the present disclosure. The image sensor may include a pixel (PIX) of FIG. 4. Referring to FIG. 4 and FIG. 8, waveforms of a reset gate signal (RG) and a transmission gate signal (TG) used in an image sensor according to some embodiments of the present disclosure are illustrated. The transmission gate signal (TG) may have a first voltage level (VL1), a second voltage level (VL2), or a third voltage level (VL3). The horizontal axis represents the time axis. The vertical axis represents the logic state or voltage level of the signal.

[0088] According to some embodiments of the present disclosure, unlike what is shown in the graph of FIG. 7, the time at which the voltage level of the transmission gate signal (TG) changes may be different from the time at which the voltage level of the reset gate signal (RG) changes.

[0089] For example, at time point (Tm1), the transmission gate signal (TG) may change from a first voltage level (VL1) to a second voltage level (VL2). At time point (Tr1), the reset gate signal (RG) may change from a turn-on voltage level to a turn-off voltage level. At time point (Tr2), the reset gate signal (RG) may change from a turn-off voltage level to a turn-on voltage level. At time point (Tm2), the transmission gate signal (TG) may change from a second voltage level (VL2) to a first voltage level (VL1). At this time, time point (Tm1) may be earlier than time point (Tr1). Time point (Tm2) may be later than time point (Tr2).

[0090] During the reset by the reset gate signal (RG), the bias voltage of the transfer transistor (MT) increases, so the voltage level of the floating diffusion node (FD) can be maintained stably. More specifically, regardless of whether the voltage level of the transfer gate signal (TG) changes from the first voltage level (VL1) to the second voltage level (VL2), the floating diffusion node (FD) after the reset can have a voltage level corresponding to the power supply voltage (Vdd).

[0091] In some embodiments, the length of the time interval between time point (Tm1) and time point (Tr1) may be equal to the length of the time interval between time point (Tr2) and time point (Tm2). For example, the time interval from the time point when the turn-off voltage level of the transfer transistor (MT) is changed to the time point when the first reset is completed may be equal to the time interval from the time point when the second reset is started to the time point when the turn-off voltage level of the transfer transistor (MT) is changed.

[0092] As described above, according to some embodiments of the present disclosure, an image sensor may be provided in which the turn-off voltage level of the transmission gate signal (TG) increases during the reset of the floating diffusion node (FD) by the reset transistor (MR).

[0093] FIG. 9 is a timing diagram illustrating signals of an image sensor according to some embodiments of the present disclosure. The image sensor may include a pixel (PIX) of FIG. 4. Referring to FIG. 4 and FIG. 9, waveforms of a reset gate signal (RG) and a transmission gate signal (TG) used in an image sensor according to some embodiments of the present disclosure are illustrated. The transmission gate signal (TG) may have a first voltage level (VL1), a second voltage level (VL2), or a third voltage level (VL3). The horizontal axis represents the time axis. The vertical axis represents the logic state or voltage level of the signal.

[0094] According to some embodiments of the present disclosure, unlike what is shown in the graph of FIG. 7, the time at which the voltage level of the transmission gate signal (TG) changes may be different from the time at which the voltage level of the reset gate signal (RG) changes.

[0095] For example, at time point (Tr1), the reset gate signal (RG) can be changed from a turn-on voltage level to a turn-off voltage level. At time point (Tm1), the transmission gate signal (TG) can be changed from a first voltage level (VL1) to a second voltage level (VL2). At time point (Tm2), the transmission gate signal (TG) can be changed from a second voltage level (VL2) to a first voltage level (VL1). At time point (Tr2), the reset gate signal (RG) can be changed from a turn-off voltage level to a turn-on voltage level. In this case, time point (Tm1) may be later than time point (Tr1). Time point (Tm2) may be earlier than time point (Tr2).

[0096] After a reset is performed by the reset gate signal (RG), the bias voltage of the transfer transistor (MT) increases, thereby increasing the voltage difference between the photodiode (PD) and the floating diffusion node (FD), and allowing for smoother charge transfer. More specifically, after a reset is performed by the reset gate signal (RG), the floating diffusion node (FD) can be floated. When the transfer gate signal (TG) changes from a first voltage level (VL1) to a second voltage level (VL2), the voltage level of the floating diffusion node (FD) can be lowered. Since the voltage difference between the photodiode (PD) and the floating diffusion node (FD) increases, the transfer of charge from the photodiode (PD) to the floating diffusion node (FD) can be smoothed while the channel of the transfer transistor (MT) is formed (i.e., during the time interval between time point (Tt1) and time point (Tt2).

[0097] In some embodiments, the length of the time interval between time point (Tr1) and time point (Tm1) may be equal to the length of the time interval between time point (Tm2) and time point (Tr2). For example, the time interval from the time point when the first reset is completed until the time point when the turn-off voltage level of the transfer transistor (MT) is changed may be equal to the time interval from the time point when the turn-off voltage level of the transfer transistor (MT) is changed until the time point when the second reset begins.

[0098] As described above, according to some embodiments of the present disclosure, an image sensor may be provided in which the turn-off voltage level of the transmission gate signal (TG) increases after the reset of the floating diffusion node (FD) by the reset transistor (MR) is performed.

[0099] FIGS. 10a and FIGS. 10b are timing diagrams illustrating signals of an image sensor according to some embodiments of the present disclosure. FIG. 10a illustrates the waveform of a reset gate signal (RG) and the waveform of a transmission gate signal (TG) in which a second voltage level, which is an intermediate voltage level, is regulated. The reset gate signal (RG) and the transmission gate signal (TG) can be used in an image sensor including a pixel (PIX) of FIG. 4.

[0100] Referring to FIGS. 4 and FIGS. 10a, waveforms of a reset gate signal (RG) and a transmission gate signal (TG) used in an image sensor according to some embodiments of the present disclosure are illustrated. The transmission gate signal (TG) may have a first voltage level (VL1), a second voltage level (VL2), or a third voltage level (VL3). The second voltage level (VL2) may be increased or decreased. The horizontal axis represents the time axis. The vertical axis represents the logic state or voltage level of the signal.

[0101] According to some embodiments of the present disclosure, unlike as illustrated in FIGS. 7, 8, and 9, the second voltage level (VL2) may be changed. For example, an image processor may adjust the second voltage level (VL2) generated by the low driver of the image sensor. The second voltage level (VL2) may be adjusted to a range higher than the first voltage level (VL1) and lower than the third voltage level (VL3).

[0102] When the second voltage level (VL2) is lowered, side effects caused by defects such as white spots and dark currents can be suppressed. As the second voltage level (VL2) becomes lower, side effects caused by leakage, such as GIDL, may occur. On the other hand, when the second voltage level (VL2) is raised, side effects caused by leakage can be suppressed. As the second voltage level (VL2) becomes higher, side effects caused by defects may occur.

[0103] The image processor can increase or decrease the second voltage level (VL2) of the transmission gate signal (TG) generated by the low driver of the image sensor by taking into account the image data generated in the previous cycle, external brightness, temperature of the image sensor, application settings, user settings, etc.

[0104] FIG. 10b illustrates the waveforms of a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) to which a second voltage level, which is an intermediate voltage level, is regulated. The select signal (SEL), the reset gate signal (RG), and the transmission gate signal (TG) can be used in an image sensor including the pixel (PIX) of FIG. 4.

[0105] Referring to FIGS. 4 and FIG. 10b, waveforms of a select signal (SEL), a reset gate signal (RG), and a transmission gate signal (TG) used in an image sensor according to some embodiments of the present disclosure are illustrated. The transmission gate signal (TG) may have a first voltage level (VL1), a low second voltage level (VL2a), a high second voltage level (VL2b), or a third voltage level (VL3). The horizontal axis represents the time axis. The vertical axis represents the logic state or voltage level of the signal.

[0106] The time interval between the first time point (T1) and the second time point (T2) is referred to as the first integration interval. The first integration interval may refer to the first time interval during which the photodiode (PD) accumulates charge.

[0107] The time interval between the second time point (T2) and the third time point (T3) is referred to as the first readout interval. The first readout interval may refer to the interval in which the pixel (PIX) processes the charge accumulated in the photodiode (PD) during the first integration interval. In the time interval between time point (Tr1) and time point (Tt1), the transmission gate signal (TG) may be maintained at a low second voltage level (VL2a). In the time interval between time point (Tt1) and time point (Tt2), the transmission gate signal (TG) may be maintained at a third voltage level (VL3). In the time interval between time point (Tt2) and time point (Tr2), the transmission gate signal (TG) may be maintained at a low second voltage level (VL2a).

[0108] The time interval between the third time point (T3) and the fourth time point (T4) is referred to as the setting interval. In the setting interval, the image processor (11) of FIG. 1 can adjust the intermediate voltage level of the transmission gate signal (TG) of the low driver (110). For example, the image processor (11) can change the intermediate voltage level of the transmission gate signal (TG) of the low driver (110) from a low second voltage level (VL2a) to a high second voltage level (VL2b). When the setting change of the transmission gate signal (TG) is completed in the setting interval, the transmission gate signal (TG) may have a first voltage level (VL1), a high second voltage level (VL2b), or a third voltage level (VL3) until another setting change occurs.

[0109] The time interval between the fourth time point (T4) and the fifth time point (T5) is referred to as the second integration interval. The second integration interval may refer to the second time interval during which the photodiode (PD) accumulates charge.

[0110] The time interval between the fifth time point (T5) and the sixth time point (T6) is referred to as the second readout interval. The second readout interval may refer to the interval in which the pixel (PIX) processes the charge accumulated in the photodiode (PD) during the second integration interval. In the time interval between time point (Tr3) and time point (Tt3), the transmission gate signal (TG) may be maintained at a high second voltage level (VL2b). In the time interval between time point (Tt3) and time point (Tt4), the transmission gate signal (TG) may be maintained at a third voltage level (VL3). In the time interval between time point (Tt4) and time point (Tr4), the transmission gate signal (TG) may be maintained at a high second voltage level (VL2b).

[0111] As described above, with reference to FIGS. 10a and 10b, an example of changing a second voltage level, which is an intermediate voltage level of a transmission gate signal (TG), has been described. For the benefit of understanding the present disclosure, a timing diagram showing the change of the intermediate voltage level from a low second voltage level (VL2a) to a high second voltage level (VL2b) is shown in FIG. 10b, but the scope of the present disclosure is not limited thereto. Unlike what is shown in FIG. 10b, the intermediate voltage level of the transmission gate signal (TG) may be changed from a high second voltage level (VL2b) to a low second voltage level (VL2a) under the control of an image processor, and various intermediate voltage levels may be used in addition to the voltage levels (VL2a, VL2b).

[0112] FIG. 11 is a circuit diagram illustrating a pixel of FIG. 2 in accordance with some embodiments of the present disclosure. The pixel (PIXf) of FIG. 11 may correspond to a pixel (PIX) of a pixel array (120) of FIG. 2. The first to fourth transmission gate signals (TG1, TG2, TG3, TG4) of FIG. 11 may correspond to a transmission gate signal (TG) of FIG. 2.

[0113] Referring to FIGS. 2 and FIGS. 11, a pixel (PIXf) may be connected to a row driver (110) and an analog-to-digital converter (140). The pixel (PIXf) may receive a select signal (SEL), a reset gate signal (RG), and first to fourth transmission gate signals (TG1, TG2, TG3, TG4) from the row driver (110). The pixel (PIXf) may operate based on a power supply voltage (Vdd) and a ground voltage (GND). The pixel (PIXf) may detect light and generate an output signal (OT) containing image data.

[0114] According to some embodiments of the present disclosure, a pixel (PIXf) may be implemented in a four-shared structure in which first to fourth photodiodes (PD1, PD2, PD3, PD4) share a floating diffusion node (FD).

[0115] A pixel (PIXf) may include first to fourth photodiodes (PD1, PD2, PD3, PD4), first to fourth transfer transistors (MT1, MT2, MT3, MT4), a floating diffusion node (FD), a capacitor (Cfd), a reset transistor (MR), a source follower transistor (MSF), and a select transistor (MSL). The pixel (PIXf) may be connected to a select line (SL) and an output line (OL).

[0116] The characteristics of the capacitor (Cfd), reset transistor (MR), source follower transistor (MSF), select transistor (MSL), select line (SL), and output line (OL) are similar to those described in FIG. 4, so a detailed description thereof is omitted.

[0117] The first photodiode (PD1) can detect light reflected from an external object and accumulate charge. The first photodiode (PD1) can provide the accumulated charge to the floating diffusion node (FD) through the first transfer transistor (MT1). The first transfer transistor (MT1) can be controlled by the first transfer gate signal (TG1).

[0118] In some embodiments, the first transmission gate signal (TG1) may have a first voltage level, a second voltage level, or a third voltage level. The second voltage level may be higher than the first voltage level. The third voltage level may be higher than the second voltage level. More specifically, during the integration period in which the first photodiode (PD1) accumulates charge, the first transmission gate signal (TG1) may have a first voltage level. During the readout period in which the accumulated charge of the first photodiode (PD1) is processed, the first transmission gate signal (TG1) may use the second voltage level as a turn-off voltage level and the third voltage level as a turn-on voltage level.

[0119] Similarly, the second photodiode (PD2) can detect light and accumulate charge. The accumulated charge of the second photodiode (PD2) can be supplied to the floating diffusion node (FD) through the second transfer transistor (MT2). ​​The second transfer transistor (MT2) can be controlled by the second transfer gate signal (TG2). The second transfer gate signal (TG2) can have three voltage levels.

[0120] The third photodiode (PD3) can detect light and accumulate charge. The accumulated charge of the third photodiode (PD3) can be supplied to the floating diffusion node (FD) through the third transfer transistor (MT3). The third transfer transistor (MT3) can be controlled by the third transfer gate signal (TG3). The third transfer gate signal (TG3) can have three voltage levels.

[0121] The fourth photodiode (PD4) can detect light and accumulate charge. The accumulated charge of the fourth photodiode (PD4) can be supplied to the floating diffusion node (FD) through the fourth transfer transistor (MT4). The fourth transfer transistor (MT4) can be controlled by the fourth transfer gate signal (TG4). The fourth transfer gate signal (TG4) can have three voltage levels.

[0122] FIG. 12 is a drawing that embodies the pixel of FIG. 11 according to some embodiments of the present disclosure. Referring to FIG. 11 and FIG. 12, the pixel (PIXf) may be implemented in a four-shared structure. The pixel (PIXf) may include a pixel region (PRG) and a transistor region (TRG).

[0123] A pixel region (PRG) may include first to fourth photodiodes (PD1, PD2, PD3, PD4), first to fourth transfer transistors (MT1, MT2, MT3, MT4), and a floating diffusion node (FD). The first to fourth photodiodes (PD1, PD2, PD3, PD4) may share the floating diffusion node (FD). Each of the first to fourth transfer transistors (MT1, MT2, MT3, MT4) may control the connection between the first to fourth photodiodes (PD1, PD2, PD3, PD4) and the floating diffusion node (FD). The first to fourth photodiodes (PD1, PD2, PD3, PD4) may be referred to as the first to fourth subpixels of a pixel (PIXf) (see FIG. 3).

[0124] In some embodiments, the second photodiode (PD2) may be adjacent to the first photodiode (PD1) in the first direction (D1). The third photodiode (PD3) may be adjacent to the first photodiode (PD1) in the opposite direction of the second direction (D2). The fourth photodiode (PD4) may be adjacent to the third photodiode (PD3) in the first direction (D1).

[0125] The transistor region (TRG) may include a reset transistor (MR), a source follower transistor (MSF), and a select transistor (MSL).

[0126] The reset transistor (MR) is connected to a power node with a power supply voltage (Vdd) and a floating diffusion node (FD), and can operate in response to a reset gate signal (RG). The source follower transistor (MSF) is connected to a power node with a power supply voltage (Vdd) and a select transistor (MSL), and can operate in response to the voltage level of the floating diffusion node (FD). The select transistor (MSL) is connected to the source follower transistor (MSF) and an output line (OL), and can operate in response to a select signal (SEL). For example, the floating diffusion node (FD) can be connected via wiring to the source node of the reset transistor (MR) and the gate node of the source follower transistor (MSF).

[0127] FIG. 13 is a flowchart illustrating a method of operation of an image sensor according to some embodiments of the present disclosure. Referring to FIG. 13, a method of operation of an image sensor including a pixel and a row driver is described. The image sensor may correspond to the image sensor (100) of FIG. 1 and FIG. 2. The image sensor may include a pixel (PIX) of FIG. 4 or a pixel (PIXf) of FIG. 11. A pixel of the image sensor may include a photodiode, a transfer transistor, and a reset transistor. A row driver of the image sensor may control the pixel.

[0128] In step S110, the image sensor can accumulate charge in the photodiode. For example, the photodiode of the image sensor can detect light reflected from an external object and accumulate charge. The time interval during which the photodiode of the image sensor accumulates charge may also be referred to as an integration interval.

[0129] In step S120, the image sensor may apply a transmission gate signal having a first voltage level to the transmission transistor. In some embodiments, the first voltage level may be one of the turn-off voltage levels of the transmission transistor and may be lower than the voltage level of the ground voltage.

[0130] In step S130, the image sensor can perform a reset of the floating diffusion node connected to the reset transistor and the transfer transistor by means of the reset transistor. For example, a reset gate signal having a turn-on voltage level can be applied to the reset transistor, and the reset transistor can form a channel between the power node having a power voltage and the floating diffusion node.

[0131] In step S140, the image sensor can change the first voltage level of the transmission gate signal to a second voltage level during the reset. The second voltage level may be higher than the first voltage level. For example, the second voltage level may be one of the turn-off voltage levels of the transmission transistor.

[0132] In some embodiments, when the first voltage level of the transmission gate signal is changed to a second voltage level, the leakage current of the floating diffusion node of the pixel of the image sensor can be reduced.

[0133] In step S150, the image sensor can change the second voltage level of the transmission gate signal to a third voltage level. The third voltage level may be higher than the second voltage level. For example, the third voltage level may be the turn-on voltage level of the transmission transistor. When the third voltage level is applied to the transmission transistor, the transmission transistor can form a channel connecting the photodiode and the floating diffusion node. While the transmission gate signal is maintained at the third voltage level, the charge accumulated in the photodiode in step S110 can be diffused through the transmission transistor to the floating diffusion node.

[0134] In step S160, the image sensor can change the third voltage level of the transmission gate signal to the second voltage level. When the transmission gate signal is changed to the second voltage level, the channel of the transmission transistor can be blocked.

[0135] In some embodiments, the method of operating the image sensor may perform an additional reset after step S160. For convenience of explanation, the reset of step S130 is referred to as the first reset, and the additional reset is referred to as the second reset. The method of operating the image sensor may further include the step of performing a second reset of the floating diffusion node by a reset transistor after step S160, and the step of changing the second voltage level of the transmission gate signal to the first voltage level during the second reset. The first time interval between the time when the first voltage level of the transmission gate signal is changed to the second voltage level and the time when the first reset of step S130 is completed may be the same as the second time interval between the time when the second reset starts and the time when the second voltage level of the transmission gate signal is changed to the first voltage level (e.g., see FIG. 8).

[0136] In some embodiments, the method of operating the image sensor may further include the step of changing a setting for controlling a pixel by a row driver. For example, the image sensor may communicate with an image processor. The image processor may adjust the waveform of a transmission gate signal generated by the row driver of the image sensor.

[0137] In some embodiments, the step of changing the setting for controlling the pixel may include the step of changing the intermediate voltage level of the transmission gate signal. For example, the step of changing the setting for controlling the pixel may include the step of controlling the row driver to generate a different transmission gate signal having a first voltage level, a third voltage level, or a fourth voltage level after changing the setting. The fourth voltage level may be an intermediate voltage level. More specifically, the fourth voltage level may be greater than the first voltage level and less than the third voltage level, and different from the second voltage level.

[0138] In some embodiments, the method of operating the image sensor may include the step of processing image data according to the changed setting after changing the setting. For convenience of explanation, the reset of step S130 is referred to as the first reset, and an additional reset after step S160 and before the setting change is referred to as the second reset. The transmission gate signal of step S120 is referred to as the first transmission gate signal, and another transmission gate signal after the setting change is referred to as the second transmission gate signal. After the setting is changed, the row driver may generate a second transmission gate signal having a first voltage level, a third voltage level, or a fourth voltage level. The fourth voltage level may be an intermediate voltage level and may be different from the second voltage level of step S140.

[0139] In this case, the method of operation of the image sensor may further include the steps of: accumulating charge in a photodiode after changing the setting; applying a second transmission gate signal having a first voltage level to a transmission transistor after changing the setting; performing a third reset of a floating diffusion node by a reset transistor; changing the first voltage level of the second transmission gate signal to a fourth voltage level during the third reset; changing the changed fourth voltage level of the second transmission gate signal to a third voltage level, wherein the charge accumulated in the photodiode is diffused to the floating diffusion node through the transmission transistor, and changing the third voltage level of the second transmission gate signal to a fourth voltage level.

[0140] In another example, the method of operating the image sensor may further include the step of performing a fourth reset of the floating diffusion node by a reset transistor after the third voltage level of the second transmission gate signal is changed to a fourth voltage level, and the step of changing the fourth voltage level of the second transmission gate signal to a first voltage level during the fourth reset.

[0141] In some embodiments, the step of changing the setting for controlling the pixel may include the step of changing the interval of the turn-on voltage level of the transmission gate signal. For example, the step of changing the setting for controlling the pixel may further include the step of determining the time interval during which the second transmission gate signal is maintained at a third voltage level after changing the setting. The third voltage level may be the turn-on voltage level of the transmission transistor. As the time interval during which the transmission gate signal is maintained at the third voltage level increases, the transfer of charge from the photodiode to the floating diffusion node may become smoother.

[0142] FIG. 14 is a flowchart illustrating a method of operation of an image sensor according to some embodiments of the present disclosure. Referring to FIG. 14, a method of operation of an image sensor including a pixel and a row driver is described. The image sensor may correspond to the image sensor (100) of FIG. 1 and FIG. 2. The image sensor may include a pixel (PIX) of FIG. 4 or a pixel (PIXf) of FIG. 11. A pixel of the image sensor may include a photodiode, a transfer transistor, and a reset transistor. A row driver of the image sensor may control the pixel.

[0143] Steps S210, S220, S230, S250, and S260 of FIG. 14 are similar to steps S110, S120, S130, S150, and S160 of FIG. 13, so a detailed description thereof is omitted.

[0144] In step S240, the image sensor can change the first voltage level of the transmission gate signal to a second voltage level after performing the reset of step S230. The second voltage level may be higher than the first voltage level.

[0145] In some embodiments, the method of operating the image sensor may perform an additional reset after step S260. For convenience of explanation, the reset in step S230 is referred to as the first reset, and the additional reset is referred to as the second reset. The method of operating the image sensor may further include, after step S260, a step of changing the second voltage level of the transmission gate signal to the first voltage level, and a step of performing a second reset of the floating diffusion node by a reset transistor after the second voltage level of the transmission gate signal is changed to the first voltage level. The first time interval between the time when the first reset in step S230 is completed and the time when the first voltage level of the transmission gate signal is changed to the second voltage level may be the same as the second time interval between the time when the second voltage level of the transmission gate signal is changed to the first voltage level and the time when the second reset is started (e.g., see FIG. 9).

[0146] In some embodiments, the method of operating the image sensor may further include the step of changing a setting for controlling a pixel by a row driver. For example, the image sensor may communicate with an image processor. The image processor may adjust the waveform of a transmission gate signal generated by the row driver of the image sensor.

[0147] In some embodiments, the step of changing the setting for controlling the pixel may include the step of changing the intermediate voltage level of the transmission gate signal. For example, the step of changing the setting for controlling the pixel may include the step of controlling the row driver to generate a different transmission gate signal having a first voltage level, a third voltage level, or a fourth voltage level after changing the setting. The fourth voltage level may be an intermediate voltage level. More specifically, the fourth voltage level may be greater than the first voltage level and less than the third voltage level, and different from the second voltage level.

[0148] In some embodiments, the method of operating the image sensor may include the step of processing image data according to the changed setting after changing the setting. For convenience of explanation, the reset of step S230 is referred to as the first reset, and an additional reset after step S260 and before the setting change is referred to as the second reset. The transmission gate signal of step S220 is referred to as the first transmission gate signal, and another transmission gate signal after the setting change is referred to as the second transmission gate signal. After the setting is changed, the row driver may generate a second transmission gate signal having a first voltage level, a third voltage level, or a fourth voltage level. The fourth voltage level may be an intermediate voltage level and may be different from the second voltage level of step S240.

[0149] In this case, the method of operation of the image sensor may further include the steps of: accumulating charge in a photodiode after changing the setting; applying a second transmission gate signal having a first voltage level to a transmission transistor after changing the setting; performing a third reset of a floating diffusion node by a reset transistor; changing the first voltage level of the second transmission gate signal to a fourth voltage level after performing the third reset; and changing the changed fourth voltage level of the second transmission gate signal to a third voltage level, wherein the charge accumulated in the photodiode is diffused to the floating diffusion node through the transmission transistor, and changing the third voltage level of the second transmission gate signal to a fourth voltage level.

[0150] In another example, the method of operating the image sensor may further include the step of changing the fourth voltage level of the second transmission gate signal to a first voltage level after the third voltage level of the second transmission gate signal is changed to a fourth voltage level, and the step of performing a fourth reset of the floating diffusion node by a reset transistor after the fourth voltage level of the second transmission gate signal is changed to a first voltage level.

[0151] FIG. 15 is a block diagram of an electronic device including a multi-camera module according to some embodiments of the present disclosure. FIG. 16 is a block diagram embodying the camera module of FIG. 15 according to some embodiments of the present disclosure.

[0152] Referring to FIG. 15, the electronic device (1000) may include a camera module group (1100), an application processor (1200), a PMIC (1300), and storage (1400).

[0153] The camera module group (1100) may include a plurality of camera modules (1100a, 1100b, 1100c). Although an embodiment in which three camera modules (1100a, 1100b, 1100c) are arranged is illustrated in the drawings, the embodiments are not limited thereto. In some embodiments, the camera module group (1100) may be modified to include only two camera modules. Also, in some embodiments, the camera module group (1100) may be modified to include n camera modules (n is a natural number greater than or equal to 4).

[0154] Each of the plurality of camera modules (1100a, 1100b, 1100c) may include an image sensor according to an embodiment of the present disclosure. For example, each of the plurality of camera modules (1100a, 1100b, 1100c) may include the image sensor (100) of FIGS. 1 and FIGS. 2. The image sensor may include a pixel (PIX) of FIG. 4 or a pixel (PIXf) of FIG. 11. A pixel of the image sensor may include a photodiode, a transfer transistor, and a reset transistor. A row driver of the image sensor may control the pixel. The image sensor may perform the operation method of FIGS. 13 and FIGS. 14.

[0155] Hereinafter, with reference to FIG. 16, the detailed configuration of the camera module (1100b) will be described in more detail, but the following description may be applied equally to other camera modules (1100a, 1100b) according to the embodiment.

[0156] Referring to FIG. 16, the camera module (1100b) may include a prism (1105), an optical path folding element (hereinafter, an actuator (1130)), an image sensing device (1140), and a storage (1150).

[0157] The prism (1105) can modify the path of light (L) incident from the outside by including a reflective surface (1107) of a light-reflecting material.

[0158] In some embodiments, the prism (1105) can change the path of light (L) incident in the X-direction to the Y-direction perpendicular to the X-direction. Additionally, the prism (1105) can change the path of light (L) incident in the X-direction to the Y-direction perpendicular to the X-direction by rotating the reflective surface (1107) of the light-reflecting material in the A-direction around the central axis (1106) or by rotating the central axis (1106) in the B-direction. At this time, the OPFE (1110) can also move in the Z-direction perpendicular to the X-direction and the Y-direction.

[0159] In some embodiments, as illustrated in FIG. 16, the maximum rotation angle in the A-direction of the prism (1105) may be less than 15 degrees in the plus (+) A-direction and greater than 15 degrees in the minus (-) A-direction, but the embodiments are not limited thereto.

[0160] In some embodiments, the prism (1105) can move in the plus (+) or minus (-) B-direction by about 20 degrees, or between 10 and 20 degrees, or between 15 and 20 degrees, where the angle of movement can be moved by the same angle in the plus (+) or minus (-) B-direction, or by a nearly similar angle within a range of about 1 degree.

[0161] In some embodiments, the prism (1105) can move the reflective surface (1107) of the light-reflecting material in a Z-direction parallel to the extension direction of the central axis (1106).

[0162] OPFE (1110) may include, for example, groups of m (where m is a natural number) optical lenses. The m lenses can be moved in the Y-direction to change the optical zoom ratio of the camera module (1100b). For example, when the basic optical zoom ratio of the camera module (1100b) is Z, moving the m optical lenses included in the OPFE (1110) may change the optical zoom ratio of the camera module (1100b) to 3Z or 5Z or an optical zoom ratio of 5Z or more.

[0163] The actuator (1130) can move the OPFE (1110) or the optical lens (hereinafter referred to as the optical lens) to a specific position. For example, the actuator (1130) can adjust the position of the optical lens so that the image sensor (1142) is positioned at the focal length of the optical lens for accurate sensing.

[0164] The image sensing device (1140) may include an image sensor (1142), control logic (1144), and memory (1146). The image sensor (1142) can sense an image of a sensing target using light (L) provided through an optical lens. The control logic (1144) can control the overall operation of the camera module (1100b). For example, the control logic (1144) can control the operation of the camera module (1100b) according to a control signal provided through a control signal line (CSLb).

[0165] The memory (1146) can store information necessary for the operation of the camera module (1100b), such as calibration data (1147). The calibration data (1147) may include information necessary for the camera module (1100b) to generate image data using light (L) provided from the outside. The calibration data (1147) may include, for example, information regarding the degree of rotation described above, information regarding the focal length, information regarding the optical axis, etc. If the camera module (1100b) is implemented in the form of a multi-state camera in which the focal length changes according to the position of the optical lens, the calibration data (1147) may include focal length values ​​for each position (or state) of the optical lens and information related to auto-focusing.

[0166] Storage (1150) can store image data sensed through the image sensor (1142). Storage (1150) may be placed outside the image sensing device (1140) and may be implemented in a stacked form with the sensor chip constituting the image sensing device (1140). In some embodiments, storage (1150) may be implemented as an EEPROM (Electrically Erasable Programmable Read-Only Memory), but embodiments are not limited thereto.

[0167] Referring to FIG. 15 and FIG. 16 together, in some embodiments, each of a plurality of camera modules (1100a, 1100b, 1100c) may include an actuator (1130). Accordingly, each of the plurality of camera modules (1100a, 1100b, 1100c) may include identical or different calibration data (1147) according to the operation of the actuator (1130) included therein.

[0168] In some embodiments, one of the plurality of camera modules (1100a, 1100b, 1100c) camera module (e.g., 1100b) is a camera module in the form of a folded lens including the previously described prism (1105) and OPFE (1110), and the remaining camera modules (e.g., 1100a, 1100b) may be camera modules in the form of a vertical camera module that do not include the prism (1105) and OPFE (1110), but the embodiments are not limited thereto.

[0169] In some embodiments, one of the plurality of camera modules (1100a, 1100b, 1100c) (e.g., 1100c) may be a vertical depth camera that extracts depth information using, for example, IR (Infrared Ray). In this case, the application processor (1200) may generate a 3D depth image by merging image data provided from this depth camera with image data provided from another camera module (e.g., 1100a or 1100b).

[0170] In some embodiments, at least two of the plurality of camera modules (1100a, 1100b, 1100c) may have different field of view angles. In this case, for example, the optical lenses of at least two of the plurality of camera modules (1100a, 1100b, 1100c) may be different from each other, but the present disclosure is not limited thereto.

[0171] Additionally, in some embodiments, the viewing angles of each of the plurality of camera modules (1100a, 1100b, 1100c) may differ from each other. In this case, the optical lenses included in each of the plurality of camera modules (1100a, 1100b, 1100c) may also differ from each other, but are not limited thereto.

[0172] In some embodiments, each of the plurality of camera modules (1100a, 1100b, 1100c) may be physically separated from one another. That is, instead of the plurality of camera modules (1100a, 1100b, 1100c) dividing and using the sensing area of ​​a single image sensor (1142), an independent image sensor (1142) may be placed inside each of the plurality of camera modules (1100a, 1100b, 1100c).

[0173] Referring again to FIG. 15, the application processor (1200) may include an image processing device (1210), a memory controller (1220), and an internal memory (1230). The application processor (1200) may be implemented separately from a plurality of camera modules (1100a, 1100b, 1100c). For example, the application processor (1200) and the plurality of camera modules (1100a, 1100b, 1100c) may be implemented separately from each other as separate semiconductor chips.

[0174] The image processing device (1210) may include a plurality of sub-image processors (1212a, 1212b, 1212c), an image generator (1214), and a camera module controller (1216).

[0175] The image processing device (1210) may include a plurality of sub-image processors (1212a, 1212b, 1212c) corresponding to the number of camera modules (1100a, 1100b, 1100c).

[0176] Image data generated from each camera module (1100a, 1100b, 1100c) can be provided to corresponding sub-image processors (1212a, 1212b, 1212c) via separate image signal lines (ISLa, ISLb, ISLc). For example, image data generated from camera module (1100a) can be provided to sub-image processor (1212a) via image signal line (ISLa), image data generated from camera module (1100b) can be provided to sub-image processor (1212b) via image signal line (ISLb), and image data generated from camera module (1100c) can be provided to sub-image processor (1212c) via image signal line (ISLc). Such image data transmission can be performed, for example, using a Camera Serial Interface (CSI) based on MIPI (Mobile Industry Processor Interface), but the embodiments are not limited thereto.

[0177] Meanwhile, in some embodiments, a single sub-image processor may be arranged to correspond to a plurality of camera modules. For example, the sub-image processor (1212a) and the sub-image processor (1212c) may not be implemented separately as illustrated, but rather integrated into a single sub-image processor, and image data provided from the camera module (1100a) and the camera module (1100c) may be selected through a selection element (e.g., a multiplexer) and then provided to the integrated sub-image processor.

[0178] Image data provided to each sub-image processor (1212a, 1212b, 1212c) may be provided to an image generator (1214). The image generator (1214) may generate an output image using image data provided from each sub-image processor (1212a, 1212b, 1212c) according to image generating information or a mode signal.

[0179] More specifically, the image generator (1214) can generate an output image by merging at least some of the image data generated from camera modules (1100a, 1100b, 1100c) having different viewing angles according to image generation information or a mode signal. Additionally, the image generator (1214) can generate an output image by selecting any one of the image data generated from camera modules (1100a, 1100b, 1100c) having different viewing angles according to image generation information or a mode signal.

[0180] In some embodiments, the image generation information may include a zoom signal (or zoom factor). Additionally, in some embodiments, the mode signal may be, for example, a signal based on a mode selected by a user.

[0181] When the image generation information is a zoom signal (zoom factor) and each camera module (1100a, 1100b, 1100c) has a different viewing angle (angle of view), the image generator (1214) can perform different operations depending on the type of zoom signal. For example, if the zoom signal is a first signal, the image data output from the camera module (1100a) and the image data output from the camera module (1100c) can be merged, and then an output image can be generated using the merged image signal and the image data output from the camera module (1100b) that was not used for merging. If the zoom signal is a second signal different from the first signal, the image generator (1214) can generate an output image by selecting one of the image data output from each camera module (1100a, 1100b, 1100c) without performing such image data merging. However, the embodiments are not limited thereto, and the method of processing image data can be modified as needed.

[0182] In some embodiments, the image generator (1214) receives multiple image data with different exposure times from at least one of a plurality of sub-image processors (1212a, 1212b, 1212c) and performs HDR (high dynamic range) processing on the multiple image data to generate merged image data with increased dynamic range.

[0183] The camera module controller (1216) can provide control signals to each camera module (1100a, 1100b, 1100c). The control signals generated from the camera module controller (1216) can be provided to the corresponding camera modules (1100a, 1100b, 1100c) through separate control signal lines (CSLa, CSLb, CSLc).

[0184] One of the plurality of camera modules (1100a, 1100b, 1100c) may be designated as a master camera (e.g., 1100b) according to image generation information or a mode signal including a zoom signal, and the remaining camera modules (e.g., 1100a, 1100c) may be designated as slave cameras. This information may be included in a control signal and provided to the corresponding camera modules (1100a, 1100b, 1100c) through separate control signal lines (CSLa, CSLb, CSLc).

[0185] The camera module operating as a master and slave may be changed according to the zoom factor or operation mode signal. For example, if the field of view of the camera module (1100a) is wider than the field of view of the camera module (1100b) and the zoom factor indicates a low zoom magnification, the camera module (1100b) may operate as a master and the camera module (1100a) may operate as a slave. Conversely, if the zoom factor indicates a high zoom magnification, the camera module (1100a) may operate as a master and the camera module (1100b) may operate as a slave.

[0186] In some embodiments, the control signal provided from the camera module controller (1216) to each camera module (1100a, 1100b, 1100c) may include a sync enable signal. For example, if the camera module (1100b) is a master camera and the camera modules (1100a, 1100c) are slave cameras, the camera module controller (1216) may transmit a sync enable signal to the camera module (1100b). The camera module (1100b) that receives this sync enable signal may generate a sync signal based on the received sync enable signal and provide the generated sync signal to the camera modules (1100a, 1100c) through a sync signal line (SSL). The camera module (1100b) and camera modules (1100a, 1100c) can be synchronized with this sync signal to transmit image data to the application processor (1200).

[0187] In some embodiments, a control signal provided from a camera module controller (1216) to a plurality of camera modules (1100a, 1100b, 1100c) may include mode information according to a mode signal. Based on this mode information, the plurality of camera modules (1100a, 1100b, 1100c) may operate in a first operation mode and a second operation mode with respect to the sensing speed.

[0188] A plurality of camera modules (1100a, 1100b, 1100c) can, in a first operating mode, generate an image signal at a first speed (e.g., generate an image signal at a first frame rate) and encode it at a second speed higher than the first speed (e.g., encode an image signal at a second frame rate higher than the first frame rate), and transmit the encoded image signal to an application processor (1200). At this time, the second speed may be 30 times or less of the first speed.

[0189] The application processor (1200) stores the received image signal, that is, the encoded image signal, in a memory (1230) provided internally or in storage (1400) outside the application processor (1200), and subsequently reads the encoded image signal from the memory (1230) or storage (1400) to decode it, and can display image data generated based on the decoded image signal. For example, a corresponding sub-processor among a plurality of sub-processors (1212a, 1212b, 1212c) of the image processing device (1210) can perform decoding and can also perform image processing on the decoded image signal.

[0190] A plurality of camera modules (1100a, 1100b, 1100c) can generate an image signal at a third speed lower than a first speed in a second operation mode (e.g., generate an image signal at a third frame rate lower than a first frame rate) and transmit the image signal to an application processor (1200). The image signal provided to the application processor (1200) may be an unencoded signal. The application processor (1200) may perform image processing on the received image signal or store the image signal in memory (1230) or storage (1400).

[0191] The PMIC (1300) can supply power, such as power voltage, to each of the plurality of camera modules (1100a, 1100b, 1100c). For example, the PMIC (1300) can supply first power to the camera module (1100a) through a power signal line (PSLa), supply second power to the camera module (1100b) through a power signal line (PSLb), and supply third power to the camera module (1100c) through a power signal line (PSLc), under the control of the application processor (1200).

[0192] The PMIC (1300) can generate power corresponding to each of the plurality of camera modules (1100a, 1100b, 1100c) and adjust the power level in response to a power control signal (PCON) from the application processor (1200). The power control signal (PCON) may include power adjustment signals for each operating mode of the plurality of camera modules (1100a, 1100b, 1100c). For example, the operating mode may include a low power mode, and in this case, the power control signal (PCON) may include information about the camera module operating in the low power mode and the power level being set. The power levels provided to each of the plurality of camera modules (1100a, 1100b, 1100c) may be the same or different from each other. Additionally, the power level may be changed dynamically.

[0193] The above description describes specific embodiments for implementing the present invention. The present invention will include not only the embodiments described above, but also embodiments that can be simply modified or easily modified. Furthermore, the present invention will include technologies that can be easily modified and implemented using the embodiments. Accordingly, the scope of the present invention should not be limited to the embodiments described above, but should be defined by the claims set forth below as well as equivalents to the claims of this invention.

Claims

Claim 1 A method of operating an image sensor comprising a pixel including a photodiode, a transfer transistor, and a reset transistor, and a row driver controlling the pixel, the method comprising: accumulating a first charge in the photodiode; applying a first transfer gate signal having a first voltage level to the transfer transistor; performing a first reset of a floating diffusion node connected to the reset transistor and the transfer transistor by the reset transistor; changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level during the first reset; changing the changed second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, wherein the accumulated first charge of the photodiode diffuses to the floating diffusion node through the transfer transistor; and changing the third voltage level of the first transfer gate signal to the second voltage level. Claim 2 A method according to claim 1, further comprising: a step of performing a second reset of the floating diffusion node by the reset transistor after the third voltage level of the first transmission gate signal is changed to the second voltage level; and a step of changing the second voltage level of the first transmission gate signal to the first voltage level during the second reset. Claim 3 In claim 2, the first time interval between the point in time when the first voltage level of the first transmission gate signal is changed to the second voltage level and the point in time when the first reset is completed is the same as the second time interval between the point in time when the second reset is started and the point in time when the second voltage level of the first transmission gate signal is changed to the first voltage level. Claim 4 A method according to claim 1 in which the leakage current of the floating diffusion node is reduced by changing the first voltage level of the first transmission gate signal to the second voltage level. Claim 5 In claim 1, the method wherein the first voltage level is lower than the voltage level of the ground voltage. Claim 6 A method according to claim 1, further comprising the step of changing a setting for controlling the pixel by the row driver. Claim 7 In claim 6, the step of changing the setting for controlling the pixel by the low driver comprises: after changing the setting, controlling the low driver to generate a second transmission gate signal having the first voltage level, the third voltage level, or the fourth voltage level, and the fourth voltage level is greater than the first voltage level, smaller than the third voltage level, and different from the second voltage level. Claim 8 A method according to claim 7, further comprising: a step of accumulating a second charge in the photodiode after changing the setting; a step of applying a second transmission gate signal having the first voltage level to the transmission transistor after changing the setting; a step of performing a third reset of the floating diffusion node by the reset transistor; a step of changing the first voltage level of the second transmission gate signal to the fourth voltage level during the third reset; a step of changing the changed fourth voltage level of the second transmission gate signal to the third voltage level, wherein the accumulated second charge of the photodiode diffuses to the floating diffusion node through the transmission transistor; and a step of changing the third voltage level of the second transmission gate signal to the fourth voltage level. Claim 9 A method according to claim 8, further comprising the step of performing a fourth reset of the floating diffusion node by the reset transistor after the third voltage level of the second transmission gate signal is changed to the fourth voltage level; and the step of changing the fourth voltage level of the second transmission gate signal to the first voltage level during the fourth reset. Claim 10 In claim 7, the step of changing the setting for controlling the pixel by the low driver further includes the step of determining a time interval in which the second transmission gate signal is maintained at the third voltage level after changing the setting. Claim 11 A method of operation of an image sensor comprising a pixel including a photodiode, a transfer transistor, and a reset transistor, and a row driver controlling the pixel, comprising: a step of accumulating a first charge in the photodiode; a step of applying a first transfer gate signal having a first voltage level to the transfer transistor; a step of performing a first reset of a floating diffusion node connected to the reset transistor and the transfer transistor by the reset transistor; a step of, after performing the first reset, changing the first voltage level of the first transfer gate signal to a second voltage level higher than the first voltage level; a step of changing the changed second voltage level of the first transfer gate signal to a third voltage level higher than the second voltage level, wherein the accumulated first charge of the photodiode diffuses to the floating diffusion node through the transfer transistor; and a step of changing the third voltage level of the first transfer gate signal to the second voltage level. Claim 12 A method according to claim 11, further comprising: a step of changing the second voltage level of the first transmission gate signal to the first voltage level after the third voltage level of the first transmission gate signal is changed to the second voltage level; and a step of performing a second reset of the floating diffusion node by the reset transistor after the second voltage level of the first transmission gate signal is changed to the first voltage level. Claim 13 In claim 12, the first time interval between the time when the first reset is completed and the time when the first voltage level of the first transmission gate signal is changed to the second voltage level is the same as the second time interval between the time when the second voltage level of the first transmission gate signal is changed to the first voltage level and the time when the second reset is started. Claim 14 In claim 11, the method further comprises the step of changing the setting for controlling the pixel by the low driver, and the step of changing the setting for controlling the pixel by the low driver comprises: after changing the setting, controlling the low driver to generate a second transmission gate signal having the first voltage level, the third voltage level, or the fourth voltage level, and the fourth voltage level is greater than the first voltage level, smaller than the third voltage level, and different from the second voltage level. Claim 15 A method according to claim 14, further comprising: a step of accumulating a second charge in the photodiode after changing the setting; a step of applying a second transmission gate signal having the first voltage level to the transmission transistor after changing the setting; a step of performing a third reset of the floating diffusion node by the reset transistor; a step of changing the first voltage level of the second transmission gate signal to the fourth voltage level after performing the third reset; a step of changing the changed fourth voltage level of the second transmission gate signal to the third voltage level, wherein the accumulated second charge of the photodiode diffuses to the floating diffusion node through the transmission transistor; and a step of changing the third voltage level of the second transmission gate signal to the fourth voltage level. Claim 16 A method according to claim 15, further comprising: a step of changing the fourth voltage level of the second transmission gate signal to the first voltage level after the third voltage level of the second transmission gate signal is changed to the fourth voltage level; and a step of performing a fourth reset of the floating diffusion node by the reset transistor after the fourth voltage level of the second transmission gate signal is changed to the first voltage level. Claim 17 A pixel array comprising a plurality of pixels; and a row driver configured to generate a first transmission gate signal having a first voltage level, a second voltage level higher than the first voltage level, or a third voltage level higher than the second voltage level, and a reset gate signal, wherein the first pixel among the plurality of pixels comprises: a first photodiode configured to detect light and accumulate charge; and a first transmission transistor connected between the first photodiode and a floating diffusion node and operating in response to the first transmission gate signal; An image sensor configured to include a reset transistor connected between a power node and the floating diffusion node and operating in response to the reset gate signal, wherein the low driver: applies a first transmission gate signal having the first voltage level to the first transmission transistor while the first photodiode accumulates the charge, and after the first photodiode accumulates the charge, changes the first voltage level of the first transmission gate signal to the second voltage level, and changes the second voltage level of the first transmission gate signal to the third voltage level to diffuse the accumulated charge of the first photodiode to the floating diffusion node. Claim 18 In claim 17, the plurality of pixels includes the first pixel, the second pixel, the third pixel, and the fourth pixel forming a pixel group, wherein the second pixel is adjacent to the first pixel in a first direction, the third pixel is adjacent to the first pixel in a second direction perpendicular to the first direction, and the fourth pixel is adjacent to the second pixel in the first direction, and the low driver is further configured to generate a second transmission gate signal, a third transmission gate signal, and a fourth transmission gate signal, each having the first voltage level, the second voltage level, or the third voltage level, and the first pixel comprises a second photodiode, a second transmission transistor connected between the second photodiode and the floating diffusion node and operating in response to the second transmission gate signal, a third photodiode, a third transmission transistor connected between the third photodiode and the floating diffusion node and operating in response to the third transmission gate signal, a fourth photodiode, and the fourth transmission connected between the fourth photodiode and the floating diffusion node and the fourth transmission An image sensor further comprising a fourth transfer transistor that operates in response to a gate signal. Claim 19 In claim 17, the low driver is further configured to change the first voltage level of the first transmission gate signal to the second voltage level while the reset transistor performs a reset of the floating diffusion node. Claim 20 In claim 17, the low driver is further configured to change the first voltage level of the first transmission gate signal to the second voltage level after the reset transistor performs a reset of the floating diffusion node.

Images