An image sensor and an electronic devise including the same

Abstract

An electronic device and an image sensor are disclosed. The electronic device may include an image sensor that generates image data; and an image processor that processes the image data. The image sensor includes: a pixel array comprising pixels that are repeatedly arranged along a row direction and a column direction, wherein each of the pixels in a first row of the pixel array may include subpixels that are each connected to any one of first to third transmission metal lines. In response to signals applied to each of the first to third transmission metal lines, at least some of the charges accumulated in the subpixels of the pixels in the first row of the pixels may be diffused into corresponding floating diffusion regions.

Description

Technology Field

[0001] The present disclosure relates to an image sensor and an electronic device including the same, and more specifically, to an image sensor that supports autofocus and an electronic device including the same. Background Technology

[0002] Image sensors are being incorporated into various types of electronic devices. For example, an electronic device containing an image sensor can be implemented as one of various types of electronic devices such as a smartphone, a tablet PC, a laptop PC, or a wearable device.

[0003] An image sensor acquires image information about an external object by converting light reflected from the external object into an electrical signal. An electronic device including an image sensor can display an image on a display panel using the acquired image information.

[0004] Autofocus (AF) can be performed to improve image quality for external objects. To perform autofocus more quickly, an image sensor that supports phase detection autofocus (PDAF) can be used. The problem to be solved

[0005] The object of the present disclosure is to provide an image sensor capable of improving the autofocus performance of an image sensor that supports phase difference detection autofocus, and an electronic device including the same. means of solving the problem

[0006] An electronic device according to one embodiment of the present disclosure comprises an image sensor that generates image data; and an image processor that processes the image data, wherein the image sensor comprises: a pixel array comprising pixels that are repeatedly arranged along a row direction and a column direction, and each of the pixels in a first row of the pixel array comprises subpixels that are each connected to any one of first to third transmission metal lines, and in response to signals applied to each of the first to third transmission metal lines, at least some of the charges accumulated in the subpixels of the pixels in the first row of the pixels may be diffused into corresponding floating diffusion regions.

[0007] An image sensor according to one embodiment of the present disclosure includes a pixel array, wherein the pixel array includes a first pixel group including pixels for generating image data, and a first row of the first pixel group may include: a first pixel including a pair of subpixels each receiving either a first transmission gate signal and a second transmission gate signal; and a second pixel including a pair of subpixels each receiving either a second transmission gate signal and a third transmission gate signal.

[0008] An image sensor according to another embodiment of the present disclosure comprises a pixel array, wherein the pixel array comprises a first pixel group comprising first to fourth unit pixel groups, and the first pixel group may comprise: a first pixel comprising a subpixel pair each receiving either a first transmission gate signal and a second transmission gate signal; and a second pixel comprising a subpixel pair each receiving either the first transmission gate signal and the second transmission gate signal and any one of a third transmission gate signal. Effects of the invention

[0009] Some rows of a pixel array of an image sensor according to one embodiment of the present disclosure may include three transmission metal lines. Pixels may be electrically connected to any two of the three transmission metal lines, and pixel voltages for performing phase difference calculations from the pixels may be detected in response to signals applied to the three transmission metal lines. Accordingly, the time and power consumed in processing autofocus may be reduced. Brief explanation of the drawing

[0010] FIG. 1 is a block diagram of an electronic device according to one embodiment of the present disclosure. Figure 2 illustrates a part of the pixel array of Figure 1. Figure 3 illustrates the pixel groups of Figure 2 in more detail. Figure 4 is a circuit diagram of the pixel of Figure 2. FIG. 5 illustrates a method of operating the image sensor of FIG. 1 according to an embodiment of the present disclosure. FIGS. 6a through 6c illustrate, respectively, groups of pixels repeatedly arranged in a pixel array in more detail according to some embodiments of the present disclosure. FIGS. 7A and FIGS. 7B illustrate, respectively, groups of pixels repeatedly arranged in a pixel array in more detail according to some embodiments of the present disclosure. FIGS. 8A and FIGS. 8B illustrate, respectively, groups of pixels repeatedly arranged in a pixel array in more detail according to some embodiments of the present disclosure. Figure 9 is a block diagram of an electronic device including a multi-camera module. FIG. 10 is a block diagram illustrating the camera module of FIG. 9 in more detail. Specific details for implementing the invention

[0011] In the following, embodiments of the present disclosure will be described clearly and in detail so that a person skilled in the art can easily practice the present disclosure.

[0012] Hereinafter, some embodiments of the present disclosure will be described in more detail with reference to the attached drawings. In order to facilitate an overall understanding of the present disclosure, similar reference numerals are used for similar components in the drawings, and redundant descriptions of similar components are omitted.

[0013] FIG. 1 is a block diagram of an electronic device (1000) according to one embodiment of the present disclosure. Referring to FIG. 1, the electronic device (1000) may include an image sensor (100) and an image processor (10). The image sensor (100) may operate according to a control command provided by the image processor (10). The image sensor (100) may convert light transmitted from an object into an electrical signal and transmit the converted electrical signal to the image processor (10) as image data.

[0014] The image sensor (100) may include a pixel array (110), a row driver (120), a correlated dual sampler (CDS; 130), an analog-to-digital converter (ADC; 140), an output buffer (150), and a timing controller (160). The pixel array (110) may include a plurality of pixels (PIX) arranged repeatedly in the row direction and column direction. Each of the pixels (PIX) may include a photoelectric element (e.g., a photodiode) that receives light and generates an electric charge based on the incident light.

[0015] In some embodiments, at least some of the plurality of pixels (PIX) may include two or more photodiodes. The image sensor (100) may provide autofocus based on the phase difference of electrical signals generated from each of the two or more photodiodes included in at least some of the plurality of pixels (PIX). That is, the image sensor (100) may provide phase detection autofocus.

[0016] Each of the plurality of pixels (PIX) may further include a circuit for generating an electrical signal from the charge generated by the photodiode(s). The circuit included in each of the plurality of pixels (PIX) and its operation will be described in detail later.

[0017] The pixel array (110) can be controlled by sensor driving signals, such as a select signal (SEL), a reset signal (RG), and a transmission gate signal (TG), transmitted from a row driver (120). Multiple electrical signals detected by each pixel in response to the sensor driving signals can be transmitted to the CDS (130) as output signals (OUT). The arrangement of pixels (PIX) within the pixel array (110) will be described in detail later.

[0018] The row driver (120) can select any one row of the pixel array (110) based on the control of the timing controller (160). To select one or more rows among a plurality of rows, the row driver (120) generates a selection signal (SEL). The row driver (120) sequentially enables a reset signal (RG) and a transmission gate signal (TG) for the pixels corresponding to the selected row. Accordingly, output signals (OUT) associated with the illuminance generated from the pixels of the selected row can be sequentially transmitted to the CDS (130).

[0019] CDS (130) can be connected via column lines with pixels included in a row selected by a selection signal (SEL). CDS (130) can detect pixel voltages generated by each pixel by performing correlated double sampling. For example, CDS (130) can sample and hold pixel voltages generated by each pixel. CDS (130) can double-sample the levels of pixel voltages output from pixels and a specific noise level, and output a voltage level corresponding to the difference. Accordingly, CDS (130) can detect a reset voltage corresponding to when a reset signal (RG) is enabled and a pixel voltage corresponding to the charge accumulated in the photodiodes of the pixels (PIX).

[0020] The ADC (140) can convert the reset voltage and pixel voltage detected by the CDS (130) into digital signals. For example, the ADC (140) can convert the pixel voltage detected by the CDS (130) into a pixel signal. The pixel signals converted by the ADC (140) can be transmitted to the output buffer (150).

[0021] The output buffer (150) can store digital signals converted by the ADC (140). The output buffer (150) can transmit the stored digital signals as image data to the image processor (10) under the control of the timing controller (160).

[0022] The timing controller (160) can control the pixel array (110), the row driver (120), the CDS (130), the ADC (140), and the output buffer (150). The timing controller (160) can generate control signals, such as clocks and timing control signals, required for the operation of the pixel array (110), the row driver (120), the CDS (130), the ADC (140), and the output buffer (150). In response to a request received from the image processor (10), the timing controller (160) can generate control signals and transmit them to other components of the image sensor (100).

[0023] The image processor (10) can process image data received from the output buffer (150). For example, the image processor (10) can calculate the phase difference between two pixels from the image data. The image processor (10) can perform autofocus processing based on the calculated phase difference. The image processor (10) can correct the image data of a pixel where the pixel voltage is not detected based on image data for adjacent pixels of the pixel where the pixel voltage is not detected. The image data processed by the image processor (10) can be stored in a storage device or output to a display device.

[0024] FIG. 2 illustrates a portion of the pixel array (110) of FIG. 1. Referring to FIG. 1 and FIG. 2, the pixel array (110) of FIG. 1 may include a first pixel group (PIXGR1) that is repeatedly arranged in a row direction (e.g., along the X-axis) and a column direction (e.g., along the Y-axis).

[0025] A first pixel group (PIXGR1) may include pixels (PIX1, PIX2, PIX3, PIX4). Color filters may be placed on the pixels (PIX1, PIX2, PIX3, PIX4). In the illustrated embodiment, a first unit color filter array including four color filters may be placed on top of the first pixel group (PIXGR1). The first unit color filter array may include blue (B), green (G), red (R), and green (G) color filters arranged sequentially in a clockwise direction starting from the top left. The first unit color filter array may be repeatedly arranged along the X-axis and Y-axis.

[0026] Pixels (PIX1, PIX2, PIX3, PIX4) may correspond to color filters of a first unit color filter array. In the illustrated embodiment, pixel (PIX1) may correspond to a blue (B) color filter, pixels (PIX2) and (PIX3) may correspond to a green (G) color filter, and pixel (PIX4) may correspond to a red (R) color filter. Accordingly, pixel (PIX1) may output information corresponding to the amount of blue (B) light in the form of current or voltage, pixels (PIX2, PIX3) may output information corresponding to the amount of green (G) light in the form of current or voltage, and pixel (PIX4) may output information corresponding to the amount of red (R) light in the form of current or voltage.

[0027] FIG. 3 illustrates the first pixel group (PIXGR1) of FIG. 2 in more detail. Referring to FIG. 1 through 3, the pixels (PIX1, PIX2, PIX3, PIX4) of the first pixel group (PIXGR1) may each include pairs of subpixels. For example, pixel (PIX1) may include subpixels (PIX1L, PIX1R), pixel (PIX2) may include subpixels (PIX2L, PIX2R), pixel (PIX3) may include subpixels (PIX3L, PIX3R), and pixel (PIX4) may include subpixels (PIX4L, PIX4R). Each of the subpixels (PIX1L, PIX1R, PIX2L, PIX2R, PIX3L, PIX3R, PIX4L, PIX4R) may include one photoelectric conversion element.

[0028] Two subpixels included in a single pixel can receive different transmission gate signals. In the illustrated embodiment, a subpixel (PIX1L) included in pixel (PIX1) can receive a transmission gate signal (TGL), and a subpixel (PIX1R) can receive a transmission gate signal (TGR). As the transmission gate signal (TGL) is enabled, the pixel voltage corresponding to the subpixel (PIX1L) can be detected by the CDS (1300), and subsequently, as the transmission gate signal (TGR) is enabled, the pixel voltage corresponding to the subpixel (PIX1R) can be detected by the CDS (1300).

[0029] As transmission gate signals (TGL, TGR) are sequentially enabled, pixel voltages corresponding to subpixels receiving the transmission gate signal (TGL) and pixel voltages corresponding to subpixels receiving the transmission gate signal (TGR) can be sequentially detected. The detected pixel voltages are sequentially converted into pixel signals and can be transmitted to an image processor (10).

[0030] The image processor (10) can perform a phase difference operation based on phase information of pixel signals corresponding to a transmission gate signal (TGL) and phase information of pixel signals corresponding to a transmission gate signal (TGR). Based on the result of the operation performed, the image processor (10) can calculate the distance between the image sensor (100) and the object. The image processor (10) can generate a control signal for adjusting the distance between the image sensor (100) and the object based on the calculated distance. For example, the image processor (10) can generate a control signal for moving the position of the lens (not shown) of the image sensor (100). Accordingly, the distance between the image sensor (100) and the object can be adjusted.

[0031] FIG. 4 is a circuit diagram of the pixel (PIX1) of FIG. 2. Referring to FIG. 1 through 4, the pixel (PIX1) may include photodiodes (PD1L, PD1R), transfer transistors (T1L, T1R), floating diffusion regions (FD1; or floating diffusion node), a reset transistor (R1), a source follower transistor (SF1), and a select transistor (SE1).

[0032] The photodiodes (PD1L, PD1R) can each generate and accumulate electrons (charges) corresponding to light incident on the image sensor (100). In some embodiments, the photodiodes (PD1L, PD1R) can each be implemented as any one of various photoelectric conversion devices, such as a phototransistor, a photogate, a pinned photodiode, or a combination thereof. In the illustrated embodiment, the photodiode (PD1L) can correspond to a subpixel (PIX1L), and the photodiode (PD1R) can correspond to a subpixel (PIX1R).

[0033] One end of each of the transfer transistors (T1L, T1R) can be connected to photodiodes (PD1L, PD1R), and the other end of the transfer transistors (T1L, T1R) can be commonly connected to a floating diffusion region (FD1). In response to transfer gate signals (TGL, TGR), the transfer transistors (T1L, T1R) can each transfer electrons accumulated by the photodiodes (PD1L, PD1R) to the floating diffusion region (FD1). The transfer gate signals (TGL, TGR) can be included in the transfer gate signal (TG) of FIG. 1.

[0034] The floating diffusion region (FD1) can accumulate and store electrons provided by the transfer transistors (T1L, T1R). The capacitance of the floating diffusion region (FD1) can be 'CFD1'. Depending on the capacitance (CFD1) and the amount (charge) of electrons provided by the transfer transistors (T1L, T1R), the voltage level of the floating diffusion region (FD1) can be determined.

[0035] In the illustrated embodiment, the floating diffusion region (FD1) is illustrated as being shared by two photodiodes (PD1L, PD1R). However, for convenience of explanation, more than two photodiodes may share a single floating diffusion region (FD1).

[0036] The reset transistor (R1) can reset the floating diffusion region (FD1). For example, the reset transistor (R1) can electrically connect the floating diffusion region (FD1) and the power supply voltage (VDD) based on a reset signal (RG1). By driving the voltage level of the floating diffusion region (FD1) to the power supply voltage (VDD) in response to the reset signal (RG), the reset transistor (R1) can remove or release electrons stored in the floating diffusion region (FD1). The reset signal (RG1) may be included in the reset signal (RG) of FIG. 1.

[0037] The source follower transistor (SF1) can be connected between the power supply voltage (VDD) and the select transistor (SE1). The gate terminal of the source follower transistor (SF1) can be connected to the floating diffusion region (FD1). The source follower transistor (SF1) can output an output signal to the select transistor (SE1) based on the voltage level of the floating diffusion region (FD1). The source follower transistor (SF1) can be a source follower buffer amplifier.

[0038] A select transistor (SE1) can be connected between a source follower transistor (SF1) and an output line. The select transistor (SE1) can transmit an output signal (OUT1) through a column line (CL1) based on a select signal (SEL1). The select signal (SEL1) may be included in the select signal (SEL) of FIG. 1. The output signal (OUT1) may be included in the output signal (OUT) of FIG. 1. Although the transistors described above are all shown as NMOS, they can also be implemented as PMOS or a combination of NMOS and PMOS.

[0039] In the illustrated embodiment, to provide an autofocus function, it may be required to detect pixel voltages from each of a plurality of photodiodes connected to a single floating region. For example, to obtain the pixel voltage corresponding to a subpixel (PIX1L) and the pixel voltage corresponding to a subpixel (PIX1R) individually, a reset signal (RG1) may first be enabled, and the floating diffusion region (FD1) may be reset. Subsequently, a transmission gate signal (TGL) may be enabled, and the charge stored in the photodiode (PD1L) may be accumulated in the floating diffusion region (FD1). Next, a selection signal (SEL1) may be enabled, and the pixel voltage corresponding to the photodiode (PD1L) may be output as an output signal (OUT1) through the column line (CL1). Then, the reset signal (RG1) is enabled again so that the floating diffusion region (FD1) is reset, and the pixel voltage corresponding to the photodiode (PD1R) can be output as an output signal (OUT1) through the column line (CL1) in a manner similar to that described for the photodiode (PD1L). Therefore, since pixel voltages must be detected multiple times from each of the multiple pixels (PIX), the time and power consumption required for autofocus processing and readout may increase.

[0040] In some embodiments according to the present disclosure, unlike the method described above, when the floating diffusion region is reset once, pixel voltages corresponding to a plurality of photodiodes connected to the floating diffusion region may each be detected. For example, after the floating diffusion region (FD1) is reset, a first pixel voltage corresponding to the charge accumulated in the photodiode (PD1L) may be detected first, and then a second pixel voltage corresponding to the sum of the charge accumulated in the photodiode (PD1L) and the charge accumulated in the photodiode (PD1R) may be detected. Using the first pixel voltage and the second pixel voltage, the image processor (10) may perform a phase difference operation. In this case, a third pixel voltage corresponding to the charge accumulated in the photodiode (PD1R) may be calculated first from the first pixel voltage and the second pixel voltage, and then a phase difference operation may be performed based on the first pixel voltage and the third pixel voltage.

[0041] FIG. 5 illustrates a method of operation of the image sensor (100) of FIG. 1 according to one embodiment of the present disclosure. FIG. 6a through 6c illustrate pixel groups (PIXGR1A, PIXGR2A, PIXGR1B, PIXGR2B, PIXGR1C, PIXGR2C) that are repeatedly arranged in a pixel array (110) in more detail according to some embodiments of the present disclosure. With reference to FIG. 1 through 5, embodiments illustrated in FIG. 6a through 6c will be described in detail below.

[0042] Similar to the first pixel group (PIXGR1) of FIG. 2, a first unit color filter array may be positioned above each of the pixel groups (PIXGR1A, PIXGR2A, PIXGR1B, PIXGR2B, PIXGR1C, PIXGR2C), comprising color filters of green (G), red (R), green (G), and blue (B) arranged sequentially in a clockwise direction from the top left. The pixel array (110) of FIG. 1 may include pixel groups (PIXGR1A, PIXGR2A / PIXGR1B, PIXGR2B / PIXGR1C, PIXGR2C) that are repeatedly arranged in the row and column directions.

[0043] Unlike the embodiments illustrated in FIGS. 3 and 4, in the embodiments illustrated in FIGS. 6a through 6c, at least some of the rows of the pixel array (110) may be connected to three transmission metal lines associated with transmission gate signals (TGL, TGR, TGAL, TGAR). For example, subpixels (PIX1L, PIX1R, PIX2L, PIX2R, PIX5L, PIX5R, PIX6L, PIX6R) placed in the first row may be connected to any one of the three transmission metal lines corresponding to the transmission gate signals (TGL, TGR, TGAL), respectively. The subpixels (PIX3L, PIX3R, PIX4L, PIX4R, PIX7L, PIX7R, PIX8L, PIX8R) placed in the second row can be connected to any one of three transmission metal lines corresponding to transmission gate signals (TGL, TGR, TGAR), respectively.

[0044] In the embodiment illustrated in FIG. 6a, pixel group (PIXGR1A) and pixel group (PIXGR2A) may be arranged adjacent to each other. Pixel group (PIXGR2A) may be arranged on the side of pixel group (PIXGR1A) in a first direction (e.g., the X-axis direction). Pixel group (PIXGR1A) and pixel group (PIXGR2A) may each include four pixels, and each of the four pixels may include two subpixels. For example, pixel group (PIXGR1A) may include pixels (PIX1A, PIX2A, PIX3A, PIX4A), and pixel group (PIXGR1B) may include pixels (PIX5A, PIX6A, PIX7A, PIX8A). Each of the pixels (PIX1A, PIX2A, PIX3A, PIX4A, PIX5A, PIX6A, PIX7A, PIX8A) may include two subpixels (for example, pixel (PIX1A) may include subpixels (PIX1LA, PIX1RA)).

[0045] Two subpixels included in a single pixel may share a single diffusion floating region. The diffusion floating region may be connected to a column line through a selection block. The selection block may include elements such as the reset transistor (R1), source follower transistor (SF1), or selection transistor (SE1) of FIG. 4. For example, subpixels (PIX1LA) and subpixels (PIX1RA) included in pixel (PIX1A) may share a single diffusion floating region (FD1). The diffusion floating region (FD1) may be connected to a column line (CL1) through a selection block (SL1). In response to the operation of the selection block (SL1) and the selection block (SL3), a pixel voltage corresponding to the charges stored in a photodiode of any one of the pixels sharing the column line (CL1) (e.g., pixels (PIX1A, PIX3A)) may be emitted as an output signal (OUT1).

[0046] Floating diffusion regions (FD2, FD3, FD4, FD5, FD6, FD7, FD8) can be implemented and operated similarly to the floating diffusion region (FD1). Select blocks (SL2, SL3, SL4, SL5, SL6, SL7, SL8) can be implemented and operated similarly to the select block (SL1). Column lines (CL2, CL3, CL4) can be implemented and operated similarly to the column line (CL1). Output signals (OUT2, OUT3, OUT4) can be output similarly to the output signal (OUT1).

[0047] Among the subpixels (PIX1LA, PIX1RA, PIX2LA, PIX2RA, PIX5LA, PIX5RA, PIX6LA, PIX6RA) arranged in the first row, the subpixels (PIX1LA, PIX5LA, PIX6LA) may each include transmission transistors (T1LA, T5LA, T6LA) that receive a transmission gate signal (TGL). The subpixels (PIX1RA, PIX2RA, PIX5RA, PIX6RA) may each include transmission transistors (T1RA, T2RA, T5RA, T6RA) that receive a transmission gate signal (TGR). The subpixel (PIX2LA) may include a transmission transistor (T2LA) that receives a transmission gate signal (TGAL) different from the transmission gate signals (TGR, TGL).

[0048] Among the subpixels (PIX3LA, PIX3RA, PIX4LA, PIX4RA, PIX7LA, PIX7RA, PIX8LA, PIX8RA) placed in the second row, the subpixels (PIX3LA, PIX4LA, PIX7LA, PIX8LA) may each include transmission transistors (T3LA, T4LA, T7LA, T8LA) that receive a transmission gate signal (TGL). The subpixels (PIX3RA, PIX4RA, PIX8RA) may each include transmission transistors (T3RA, T4RA, T8RA) that receive a transmission gate signal (TGR). The subpixel (PIX7RA) may include a transmission transistor (T7RA) that receives a transmission gate signal (TGAR) different from the transmission gate signals (TGR, TGL).

[0049] In some embodiments of the present disclosure, when a readout operation is performed, some transmission gate signal(s) (e.g., transmission gate signal (TGL) and transmission gate signal (TGAL / TGAR)) may be enabled first, and the remaining transmission gate signal(s) (e.g., transmission gate signal (TGR) and transmission gate signal (TGAR)) may be enabled.

[0050] In some other embodiments of the present disclosure, when a readout operation is performed, only some transmission gate signals (e.g., transmission gate signals (TGR, TGL)) are simultaneously enabled, so that a detection operation for each row of the pixel array (110) can be performed only once. The image processor (10) can perform autofocus processing by performing a phase difference operation based on some of the detected pixel voltages, and perform image processing based on the remaining pixel voltages.

[0051] Referring to FIG. 5, the image sensor (100) may perform steps S100, S200, S310 to S330, and S410 to S430. In step S100, the image sensor (100) may receive a capture request (or command) from the image processor (10). For example, the image processor (10) may request the image sensor (100) to generate image data in response to a request from a user, etc.

[0052] In step S200, the image sensor (100) can determine an autofocus mode. Based on a request received from the image processor (10), the image sensor (100) can operate in either a first mode or a second mode. Based on the determined mode, the image sensor (100) can perform either a first readout operation or a second readout operation for each frame generated by the pixel array (110).

[0053] When the autofocus mode is determined to be the first mode, the image sensor (100) can perform steps S310 to S330. In step S310, the image sensor (100) can select a row. For example, in response to control signals generated by the timing controller (160), the row driver (120) of the image sensor (100) can select a row to read out among the rows of the pixel array (110).

[0054] In step S320, the image sensor (100) may perform a first readout operation for a selected row. In the first readout operation, the image sensor (100) may first enable a reset signal (RG) to reset the floating diffusion regions included in the selected row. Subsequently, the reset signal (RG) may be disabled, and only the transmission gate signal (TGL) and the transmission gate signal (TGAL or TGAR) may be enabled first. Accordingly, pixel voltages from the corresponding subpixels may be detected. Then, the transmission gate signal (TGL) and the transmission gate signal (TGAL or TGAR) may be disabled, and the transmission gate signals (TGR, TGAR) (or, in some embodiments, only the transmission gate signal (TGR)) may be enabled, and accordingly, the corresponding pixel voltages may be detected.

[0055] For example, in the embodiment illustrated in FIG. 6a, when a first row is selected by the image sensor (100) and a first readout operation is performed for the selected first row, all floating diffusion regions (FD1, FD2, FD5, FD6) of the first row are reset, and transmission gate signals (TGL, TGAL) can be enabled first. Accordingly, pixel voltages corresponding to subpixels (PIX1LA, PIX2LA, PIX5LA, PIX6LA) from the first row can be detected. Subsequently, as the transmission gate signal (TGR) is enabled, pixel voltages corresponding to subpixels (PIX1RA, PIX2RA, PIX5RA, PIX6RA) from the first row can be detected. The image processor (10) can perform autofocus processing based on the pixel voltages detected from the first row.

[0056] In step S330, the image sensor (100) can determine whether the row selected in step S310 is the last row of the pixel array (110). For example, the image sensor (100) can determine whether the first readout operation has been performed for all rows of the pixel array (110). If the row selected in step S310 is not the last row of the pixel array (110), the image sensor (100) can perform step S310 again to select another row and perform the first readout operation for the newly selected row.

[0057] For example, in the embodiment illustrated in FIG. 6a, after a first readout operation is performed for a first row, in step S330, the image sensor (100) can again perform step S310 to select a second row. When the first readout operation is performed for a second row by the image sensor (100), the floating diffusion regions (FD3, FD4, FD7, FD8) of the second row are reset, and the transmission gate signal (TGL) can be enabled first. Accordingly, pixel voltages corresponding to subpixels (PIX3LA, PIX4LA, PIX7LA, PIX8LA) from the second row can be detected. Subsequently, the transmission gate signals (TGR, TGAL) can be enabled, and accordingly, pixel voltages corresponding to subpixels (PIX3RA, PIX4RA, PIX7RA, PIX8RA) can be detected. The image processor (10) may perform autofocus processing based on the pixel voltages detected from the second row.

[0058] When the autofocus mode is determined to be the second mode, the image sensor (100) can perform steps S410 through S430. In step S410, the image sensor (100) can select a row. For example, the image sensor (100) can perform step S410 similarly to step S310.

[0059] In step S420, the image sensor (100) can perform a second readout operation for a selected row. In the second readout operation, the image sensor (100) can first enable a reset signal (RG) to reset the floating diffusion regions of the selected row. Afterward, the image sensor (100) can enable transmission gate signals (TGL, TGR) to detect the corresponding pixel voltages.

[0060] For example, in the embodiment illustrated in FIG. 6a, when a second readout operation for the first row is performed by the image sensor (100), all floating regions (FD1, FD2, FD5, FD6) of the first row are reset, and only the transmission gate signals (TGL, TGR) can be simultaneously enabled. In this case, for a pixel in which two subpixels included in one pixel, such as pixel (PIX1A), each receive the transmission gate signals (TGL, TGR), a sum pixel voltage corresponding to the sum of the charges accumulated in the photodiodes included in the two subpixels can be detected at once. For example, from the first row, the sum pixel voltage of the subpixels (PIX1A, PIX2A), the sum pixel voltage of the subpixels (PIX5RA, PIX5LA), the sum pixel voltages corresponding to the subpixels (PIX6LA, PIX6RA), and the pixel voltage corresponding to the subpixel (PIX2RA) can be detected.

[0061] In step S430, the image sensor (100) can determine whether the row selected in step S410 is the last row of the pixel array (110). For example, the image sensor (100) can determine whether the first readout operation has been performed for all rows of the pixel array (110). If the row selected in step S410 is not the last row of the pixel array (110), the image sensor (100) can perform step S410 again to select another row and perform the second readout operation for the newly selected row.

[0062] For example, in the embodiment illustrated in FIG. 6a, after a second readout operation is performed for the first row, in step S430, the image sensor (100) can again perform step S410 to select the second row. When the second readout operation for the second row is performed by the image sensor (100), the floating diffusion regions (FD3, FD4, FD7, FD8) of the second row are reset, and only the transmission gate signals (TGL, TGR) can be simultaneously enabled. Accordingly, the sum pixel voltage of the subpixels (PIX3A, PIX3A), the sum pixel voltage of the subpixels (PIX4RA, PIX4LA), the sum pixel voltages corresponding to the subpixels (PIX8LA, PIX8RA), and the pixel voltage corresponding to the subpixel (PIX7LA) can be detected from the second row.

[0063] The image processor (10) can perform autofocus processing based on at least some of the detected pixel voltages corresponding to the transmission gate signals (TGL, TGR), and can perform image processing based on the remaining pixel voltages. For example, among the detected pixel voltages, the image processor (10) can perform autofocus processing based on the pixel voltages corresponding to the subpixels (PIX2RA, PIX7LA), and process image data based on the sum pixel voltages of the remaining subpixels (PIX1LA, PIX1RA, PIX3LA, PIX3RA, PIX4LA, PIX4RA, PIX5LA, PIX5RA, PIX6LA, PIX6RA, PIX8LA, PIX8RA). For example, the image processor (10) can correct the image data corresponding to the subpixels (PIX2LA, PIX2RA, PIX7LA, PIX7RA).

[0064] In some embodiments, the image sensor (100) may further include a binning circuit (not shown). The image sensor (100) may output image data corresponding to a pixel based on voltages obtained from each subpixel included in a pixel. The image sensor (100) may generate a binning signal corresponding to a pixel group (PIXGR1A) by performing binning on pixel voltages corresponding to pixels (PIX1A, PIX2A, PIX3A, PIX4A). The generated binning signal may be converted into a digital signal and provided to an image processor (10).

[0065] With reference to FIGS. 1, FIGS. 4, FIGS. 6a, and FIGS. 6b, the difference between the embodiment illustrated in FIG. 6a and the embodiment illustrated in FIG. 6b will be explained. Pixel groups (PIXGR1B) and pixel groups (PIXGR2B) may be arranged adjacent to each other. In a manner similar to pixel groups (PIXGR1A) and pixel groups (PIXGR2A), pixel groups (PIXGR1B) and pixel groups (PIXGR2B) may each include four pixels, and each of the four pixels may include two subpixels.

[0066] Among the subpixels (PIX1LB, PIX1RB, PIX2LB, PIX2RB, PIX5LB, PIX5RB, PIX6LB, PIX6RB) arranged in the first row, the subpixels (PIX1LB, PIX5RB, PIX6RB) may each include transmission transistors (T1LB, T5RB, T6RB) that receive a transmission gate signal (TGL). The subpixels (PIX1RB, PIX2RB, PIX5LB, PIX6LB) may each include transmission transistors (T1RB, T2RB, T5LB, T6LB) that receive a transmission gate signal (TGR). The subpixel (PIX2LB) may include a transmission transistor (T2LB) that receives a transmission gate signal (TGAL) different from the transmission gate signals (TGR, TGL).

[0067] Among the subpixels (PIX3LB, PIX3RB, PIX4LB, PIX4RB, PIX7LB, PIX7RB, PIX8LB, PIX8RB) placed in the second row, the subpixels (PIX3LB, PIX4LB, PIX8RB) may each include transmission transistors (T3LB, T4LB, T8RB) that receive a transmission gate signal (TGL). The subpixels (PIX3RB, PIX4RB, PIX7LB, PIX8LB) may each include transmission transistors (T3RB, T4RB, T7LB, T8LB) that receive a transmission gate signal (TGR). The subpixel (PIX7RB) may include a transmission transistor (T7RB) that receives a transmission gate signal (TGAR) different from the transmission gate signals (TGR, TGL).

[0068] In some embodiments, when autofocusing, the time taken to process a pixel signal corresponding to one of two subpixels within a single pixel may be longer than the time taken to process a pixel signal corresponding to the other subpixel. For example, among the two subpixels (PIX1LB, PIX1RB) within a pixel (PIX1B), the time taken to process a pixel signal corresponding to the right subpixel (PIX1RB) may be longer than the time taken to process a pixel signal corresponding to the left subpixel (PIX1LB).

[0069] In some embodiments according to the present disclosure, at least one pixel voltage of the photodiodes may be detected in response to another transmission gate signal (e.g., transmission gate signal (TGAL / TGAR)) other than the transmission gate signals (TGL, TGR). In these embodiments, after a first detection operation corresponding to enabling the first transmission gate signals among the transmission gate signals is performed, some pixel signals with a longer signal processing time may be provided to the image processor (10). While a second detection operation corresponding to enabling the remaining transmission gate signals among the transmission gate signals is performed, the image processor (10) may process the pixel signals input in response to the first detection operation. As a result, the total time required to perform autofocus processing may be reduced.

[0070] For example, when a first readout operation is performed for a first row, all floating regions (FD1, FD2, FD5, FD6) of the first row are reset, and the transmission gate signals (TGL, TGAL) can be enabled first. Accordingly, pixel voltages corresponding to subpixels (PIX1LB, PIX2LB, PIX5RB, PIX6RB) from the first row can be detected. Before the remaining transmission gate signal (TGR) is enabled, the image processor (10) can start processing image data corresponding to the already detected pixel voltages. At this time, the time taken to process the pixel signals corresponding to the subpixels (PIX5RB, PIX6RB, PIX7RB, PIX8RB) for autofocus may be longer than the time taken to process the pixel signals corresponding to the subpixels (PIX5RB, PIX6RB, PIX7RB, PIX8RB). Afterwards, the transmission gate signal (TGR) can be enabled. Accordingly, pixel voltages corresponding to subpixels (PIX1RB, PIX2RB, PIX5LB, PIX6LB) can be detected from the first row.

[0071] Unlike the embodiment illustrated in FIG. 6a, in the embodiment illustrated in FIG. 6b, when a first readout operation is performed for the second row, the transmission gate signal (TGAR) can be enabled simultaneously with the transmission gate signal (TGL). In this embodiment, the transmission gate signal (TGAR) may be named as the transmission gate signal (TGAL), as shown. Accordingly, when a first readout operation is performed for the second row, the floating diffusion regions (FD3, FD4, FD7, FD8) of the second row are reset, and the transmission gate signals (TGL, TGAR) can be enabled first. Accordingly, pixel voltages corresponding to subpixels (PIX3LB, PIX4LB, PIX7RB, PIX8RB) can be detected from the second row. Pixel voltages that take longer to be processed by the image processor (10) (i.e., subpixels (PIX), after which the transmission gate signal (TGR) can be enabled. Accordingly, pixel voltages corresponding to subpixels (PIX3RB, PIX4RB, PIX7LB, PIX8LB) from the second row can be detected. The image processor (10) can perform autofocus processing by processing image data based on the detected pixel voltages.

[0072] When a second readout operation is performed for the first row, all floating regions (FD1, FD2, FD5, FD6) of the first row are reset, and only the transmission gate signals (TGL, TGR) can be enabled. Subsequently, when a second readout operation is performed for the second row, all floating regions (FD3, FD4, FD7, FD8) of the second row are reset, and only the transmission gate signals (TGL, TGR) can be enabled simultaneously. Among the sum voltages corresponding to the detected subpixels (PIX1LB, PIX1RB, PIX3LB, PIX3RB, PIX4LB, PIX4RB, PIX5LB, PIX5RB, PIX6LB, PIX6RB, PIX8LB, PIX8RB) and the pixel voltages corresponding to the subpixels (PIX2RB, PIX7LB), the image processor (10) performs autofocus processing based on the pixel voltages corresponding to the subpixels (PIX2RB, PIX7B), and can process image data based on the pixel voltages corresponding to the remaining subpixels (PIX1LB, PIX1RB, PIX3LB, PIX3RB, PIX4LB, PIX4RB, PIX5LB, PIX5RB, PIX6LB, PIX6RB, PIX8LB, PIX8RB).

[0073] With reference to FIGS. 1, FIGS. 4, FIGS. 6a, and FIG. 5c, the difference between the embodiment illustrated in FIG. 6a and the embodiment illustrated in FIG. 6c will be explained. In the embodiment illustrated in FIG. 6c, pixel group (PIXGR1C) and pixel group (PIXGR2C) may be arranged adjacent to each other. In a manner similar to pixel group (PIXGR1A) and pixel group (PIXGR2A), pixel group (PIXGR1C) and pixel group (PIXGR2C) may each contain four pixels, and each of the four pixels may contain two subpixels. Unlike the embodiment illustrated in FIG. 6a, in the embodiment illustrated in FIG. 6c, some subpixels may not contain photoelectric conversion elements and may instead be connected to a local ground voltage.

[0074] For example, pixels (PIX1C, PIX3C, PIX4C) included in pixel group (PIXGR1C) can be implemented and operate similarly to pixels (PIX1A, PIX3A, PIX4A) included in pixel group (PIXGR1A). However, the subpixel (PIX2LC) of pixel (PIX2C) may not include a photodiode, unlike the subpixel (PIX2LA) of pixel (PIX2A). Instead, the transfer transistor (T2LC) of the subpixel (PIX2LC) may be connected to ground voltage. In some embodiments, unlike the illustrated embodiment, the subpixel (PIX2LC) may not include the transfer transistor (T2LC), and instead a ground node may be placed.

[0075] The pixels (PIX5C, PIX6C, PIX8C) included in the pixel group (PIXGR2C) can be implemented and operate similarly to the pixels (PIX5A, PIX6A, PIX8A) included in the pixel group (PIXGR2A). However, the subpixel (PIX7RC) of pixel (PIX7C) may not include a photodiode, unlike the subpixel (PIX7RA) of pixel (PIX7A). The subpixel (PIX7RC) can operate and be implemented in a similar manner to the subpixel (PIX2LC).

[0076] FIGS. 7a and 7b illustrate, respectively, pixel groups (PIXGRTA, PIXGRTB) that are repeatedly arranged in a pixel array (110) in more detail according to some embodiments of the present disclosure. Unlike the embodiments illustrated in FIGS. 6a through 6c, the pixel group (PIXGRTA) of FIG. 7a and the pixel group (PIXGRTB) of FIG. 7b may include four unit pixel groups, and each unit pixel group may again include four pixels. And, each pixel may include two subpixels. For example, the pixel group (PIXGRTA) may include four unit pixel groups (PIXUT1A, PIXUT2A, PIXUT3A, PIXUT4A). The unit pixel group (PIXUT1A) may include four pixels (PIXT11A, PIXT12A, PIXT13A, PIX14A). A pixel (PIXT11A) may include two subpixels (PT11LA, PT11RA).

[0077] In some embodiments, similar to the first pixel group (PIXGR1) of FIG. 2, a first unit color filter array may be positioned above each of the unit pixel groups (PIXUT1A, PIXUT2A, PIXUT3A, PIXUT4A) and may include color filters of green (G), red (R), green (G), and blue (B) arranged sequentially in a clockwise direction from the top left.

[0078] In the embodiment illustrated in FIG. 7a, each of the pixels (PIXT11A, PIXT12A, PIXT13A, PIXT14A, PIXT21A, PIXT22A, PIXT24A, PIXT31A, PIXT33A, PIXT34A, PIXT41A, PIXT42A, PIXT43A, PIXT44A) may include a subpixel that receives a transmission gate signal (TGL) and a subpixel that receives a transmission gate signal (TGR). However, pixel (PIXT23A) may include a subpixel that receives a transmission gate signal (TGAR), and pixel (PIXT32A) may include a subpixel that receives a transmission gate signal (TGAL). More specifically, a subpixel (PT23LA) of pixel (PIXT23A) may include a transfer transistor that receives a transfer gate signal (TGL), and a subpixel (PT23RA) of pixel (PIXT23A) may include a transfer transistor that receives a transfer gate signal (TGAR). A subpixel (PT32LA) of pixel (PIXT32A) may include a transfer transistor that receives a transfer gate signal (TGAL), and a subpixel (PT32RA) of pixel (PIXT32A) may include a transfer transistor that receives a transfer gate signal (TGR).

[0079] In the embodiment illustrated in FIG. 7a, when a first readout operation is performed for each row of a pixel group (PIXGRTA), first all floating regions of each row are reset, and then transmission gate signals (TGL, TGAL) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAL) is applied, only the transmission gate signal (TGL)) may be enabled. Subsequently, transmission gate signals (TGR, TGAR) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAR) is applied, only the transmission gate signal (TGR)) may be enabled. The image processor (10) can process image data based on pixel voltages detected in the pixel group (PIXGRTA).

[0080] When a second readout operation is performed for each row of a pixel group (PIXGRTA), first all floating regions of each row are reset, and then only the transmission gate signals (TGL, TGR) can be enabled. Among the pixel voltages detected in the pixel group (PIXGRTA), the image processor (10) can perform autofocus processing based on the pixel voltages corresponding to the subpixels (PT23LA, PT32RA), and process image data based on the sum voltages of the remaining subpixels. For example, the image processor (10) can correct the image data corresponding to the subpixels (PT23LA, PT23RA, PT32LA, PT32RA).

[0081] In some embodiments, similar to the embodiment illustrated in FIG. 6a, the image sensor (100) may further include a binning circuit. The image sensor (100) can output image data corresponding to one pixel (e.g., pixel (PIXT11A)) by performing binning on voltages obtained from each of the subpixels (e.g., subpixels (PT11LA, PT11RA)) included in one pixel (e.g., pixel (PIXT11A)). The image sensor (100) can output image data corresponding to one unit pixel group (e.g., unit pixel group (PIXT1A)) by performing binning on voltages obtained from each of the four pixels (e.g., pixels (PIXT11A, PIXT12A, PIXT13A, PIXT14A)) included in one unit pixel group (e.g., unit pixel group (PIXUT1A)) (or voltages obtained from each of their subpixels).

[0082] With reference to FIGS. 1, FIG. 7a, and FIG. 7b, the difference between the embodiment illustrated in FIG. 7a and the embodiment illustrated in FIG. 7b will be explained. In the embodiment illustrated in FIG. 7b, each of the pixels (PIXT11B, PIXT12B, PIXT13B, PIX14B, PIXT21B, PIXT22B, PIXT31B, PIXT32B, PIXT33B, PIXT34B, PIXT41B, PIXT42B, PIXT43B, PIXT44B) may include a subpixel receiving a transmission gate signal (TGL) and a subpixel receiving a transmission gate signal (TGR). However, pixels (PIXT23B) and pixels (PIXT24B) may include a subpixel receiving a transmission gate signal (TGAL). More specifically, a subpixel (PT23LB) of pixel (PIXT23B) may include a transfer transistor that receives a transfer gate signal (TGAL), and a subpixel (PT23RB) of pixel (PIXT23B) may include a transfer transistor that receives a transfer gate signal (TGR). A subpixel (PT24LB) of pixel (PIXT24B) may include a transfer transistor that receives a transfer gate signal (TGR), and a subpixel (PT24RB) of pixel (PIXT24B) may include a transfer transistor that receives a transfer gate signal (TGAL).

[0083] In the embodiment illustrated in FIG. 7b, when a first readout operation is performed for each row of a pixel group (PIXGRTB), all floating regions of each row are first reset, and then transmission gate signals (TGL, TGAL) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAL) is applied, only the transmission gate signal (TGL)) can be enabled. Subsequently, the transmission gate signal (TGR) can be enabled. Accordingly, pixel signals that require a relatively longer time for signal processing can be transmitted to the image processor (10) first. For example, in a unit pixel group (PIXUT1B), pixel signals corresponding to subpixels (PT12RB, PT14RB) that require a longer time for signal processing can be transmitted to the image processor (10) before pixel signals corresponding to subpixels (PT12LB, PT14LB). As a result, the total time required for autofocus processing can be reduced. The image processor (10) can process image data based on detected pixel voltages.

[0084] When a second readout operation is performed for each row of a pixel group (PIXGRTB), all floating regions of each row are first reset, and only the transmission gate signals (TGL, TGR) can be enabled. Among the pixel voltages detected from the pixel group (PIXGRTB), the image processor (10) can perform autofocus processing based on the pixel voltages corresponding to the subpixels (PT23RB, PT24LB) and process image data based on the sum pixel voltages of the remaining subpixels. For example, the image processor (10) can correct image data corresponding to the subpixels (PT23LB, PT23RB, PT24LB, PT24RB). In the illustrated embodiment, since the subpixels (PT23RB, PT24LB) are placed in the same row, the time required to detect pixel voltages for autofocus processing can be shortened.

[0085] FIGS. 8A and 8B illustrate, respectively, pixel groups (PIXGRHA, PIXGRHB) that are repeatedly arranged in a pixel array (110), more specifically according to some embodiments of the present disclosure. Similar to the pixel group (PIXGRTA) of FIG. 7A and the pixel group (PIXGRTB) of FIG. 7B, the pixel group (PIXGRHA) of FIG. 8A and the pixel group (PIXGRHB) of FIG. 8B may include four unit pixel groups, and each unit pixel group may again include four pixels. And, each pixel may include two subpixels. Unlike the embodiments illustrated in FIG. 7A and 7B, in the embodiment illustrated in FIG. 8A, some pixels may include two subpixels isolated by a diagonal boundary rather than a column direction (i.e., Y-axis direction). For example, a pixel (PIXH21A) of a unit pixel group (PIXUH2A) may include a pair of subpixels separated by a first diagonal boundary. A pixel (PIXH31A) of a unit pixel group (PIXUH3A) may include a pair of subpixels separated by a second diagonal boundary.

[0086] In some embodiments, similar to the first pixel group (PIXGR1) of FIG. 2, a first unit color filter array may be positioned above each of the unit pixel groups (PIXUH1A, PIXUH2A, PIXUH3A, PIXUH4A) and may include color filters of green (G), red (R), green (G), and blue (B) arranged sequentially in a clockwise direction from the top left.

[0087] In the embodiment illustrated in FIG. 8a, each of the pixels (PIXH12A, PIXH13A, PIXH21A, PIXH22A, PIXH23A, PIXH24A, PIXH31A, PIXH32A, PIXH33A, PIXH34A, PIXH41A, PIXH42A, PIXH43A, PIXH44A) may include a subpixel that receives a transmission gate signal (TGL) and a subpixel that receives a transmission gate signal (TGR). However, pixel (PIXH11A) may include a subpixel that receives a transmission gate signal (TGAL), and pixel (PIXH14A) may include a subpixel that receives a transmission gate signal (TGAR). More specifically, a subpixel (PH11LA) of pixel (PIXH11A) may include a transfer transistor that receives a transfer gate signal (TGR), and a subpixel (PH11RA) of pixel (PIXH11A) may include a transfer transistor that receives a transfer gate signal (TGAR). A subpixel (PH14LA) of pixel (PIXH14A) may include a transfer transistor that receives a transfer gate signal (TGL), and a subpixel (PH14RA) of pixel (PIXH14A) may include a transfer transistor that receives a transfer gate signal (TGAR).

[0088] In the embodiment illustrated in FIG. 8a, when a first readout operation is performed for each row of a pixel group (PIXGRHA), first all floating regions of each row are reset, and then transmission gate signals (TGL, TGAL) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAL) is applied, only the transmission gate signal (TGL)) can be enabled. Subsequently, transmission gate signals (TGR, TGAR) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAR) is applied, only the transmission gate signal (TGR)) are enabled, and the image processor (10) can process image data based on the detected pixel voltages.

[0089] When a second readout operation is performed for each row of the pixel group (PIXGRHA), first all floating regions of each row are reset, and then only the transmission gate signals (TGL, TGR) can be enabled. Among the pixel voltages detected from the pixel group (PIXGRHA), the image processor (10) can perform autofocus processing based on the pixel voltages corresponding to the subpixels (PH11RA, PH14LA), and process image data based on the sum pixel voltages of the remaining subpixels. For example, the image processor (10) can correct the image data corresponding to the subpixels (PH11LA, PH11RA, PH14LA, PH14RA).

[0090] In some embodiments, similar to the embodiment illustrated in FIG. 7a, the image sensor (100) may further include a binning circuit. The image sensor (100) may generate a binning signal corresponding to one pixel by performing binning on two pixel voltages obtained from subpixels included in one pixel. The image sensor (100) may generate a binning signal corresponding to one unit pixel group by performing binning on eight pixel voltages obtained from subpixels included in one unit pixel group.

[0091] With reference to FIGS. 1, FIG. 8a, and FIG. 8b, the difference between the embodiment illustrated in FIG. 8a and the embodiment illustrated in FIG. 8b will be explained. In the embodiment illustrated in FIG. 8b, each of the pixels (PIXH13B, PIXH14B, PIXH21B, PIXH22B, PIXH23B, PIXH24B, PIXH31B, PIX32B, PIXH33B, PIXH34B, PIXH41B, PIXH42B, PIXH43B, PIXH44B) may include a subpixel receiving a transmission gate signal (TGL) and a subpixel receiving a transmission gate signal (TGR). However, pixels (PIXH11B) and pixels (PIXH12B) may include subpixels receiving a transmission gate signal (TGAL). More specifically, a subpixel (PH11LA) of pixel (PIXH11B) may include a transfer transistor that receives a transfer gate signal (TGAL), and a subpixel (PH11RB) of pixel (PIXH11B) may include a transfer transistor that receives a transfer gate signal (TGR). A subpixel (PH12LB) of pixel (PIXH12B) may include a transfer transistor that receives a transfer gate signal (TGR), and a subpixel (PH12RB) of pixel (PIXH12B) may include a transfer transistor that receives a transfer gate signal (TGAL).

[0092] In the embodiment illustrated in FIG. 8b, when a first readout operation is performed for each row of a pixel group (PIXGRHB), all floating regions of each row are first reset, and then transmission gate signals (TGL, TGAL) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAL) is applied, only the transmission gate signal (TGL)) can be enabled. Subsequently, transmission gate signals (TGR, TGAR) (or, in some rows not connected to a transmission metal line to which the transmission gate signal (TGAR) is applied, only the transmission gate signal (TGR)) can be enabled. Accordingly, pixel signals that take relatively longer time to process can be transmitted first to the image processor (10). For example, in a unit pixel group (PIXUH1B), pixel signals corresponding to subpixels (PH12RB, PH14RB) that require a longer time for signal processing can be transmitted to the image processor (10) before pixel signals corresponding to subpixels (PH12LB, PH14LB). Thus, the total time required for autofocus processing can be reduced. The image processor (10) can process image data based on the detected pixel voltages.

[0093] When a second readout operation is performed for each row of the pixel group (PIXGRHB), all floating regions of each row are reset, and only the transmission gate signals (TGL, TGR) can be enabled. Among the pixel voltages detected from the pixel group (PIXGRHB), the image processor (10) can perform autofocus processing based on the pixel voltages corresponding to the subpixels (PH11RB, PH12LB), and process image data based on the sum pixel voltages of the remaining subpixels. For example, the image processor (10) can correct the image data corresponding to the subpixels (PH11LB, PH11RB, PH12LB, PH12RB).

[0094] FIG. 9 is a block diagram of an electronic device including a multi-camera module. Referring to FIG. 9, the electronic device (2000) may include a camera module group (2100), an application processor (2200), a PMIC (2300), and an external memory (2400).

[0095] The camera module group (2100) may include a plurality of camera modules (2100a, 2100b, 2100c). Although the drawing shows an embodiment in which three camera modules (2100a, 2100b, 2100c) are arranged, the embodiments are not limited thereto. In some embodiments, the camera module group (2100) may be modified to include only two camera modules. Also, in some embodiments, the camera module group (2100) may be modified to include n camera modules (where n is a natural number greater than or equal to 4).

[0096] FIG. 10 is a block diagram illustrating the camera module of FIG. 9 in more detail. Hereinafter, with reference to FIG. 10, the detailed configuration of the camera module (2100b) will be described in more detail, but the following description may be applied equally to other camera modules (2100a, 2100b) according to the embodiment.

[0097] Referring to FIG. 10, the camera module (2100b) may include a prism (2105), an optical path folding element (OPFE, hereinafter 'OPFE') (2110), an actuator (2130), an image sensing device (2140), and a storage unit (2150).

[0098] The prism (2105) can modify the path of light (L) incident from the outside by including a reflective surface (2107) of a light-reflecting material.

[0099] In some embodiments, the prism (2105) can change the path of light (L) incident in a first direction (X) to a second direction (Y) perpendicular to the first direction (X). Additionally, the prism (2105) can change the path of light (L) incident in the first direction (X) to a second direction (Y) perpendicular to the first direction (X) by rotating the reflective surface (2107) of the light-reflecting material in direction A around the central axis (2106) or by rotating the central axis (2106) in direction B. At this time, the OPFE (2110) can also move to a third direction (Z) perpendicular to the first direction (X) and the second direction (Y).

[0100] In some embodiments, as illustrated, the maximum rotation angle of the prism (2105) in the A direction may be 15 degrees or less in the plus (+) A direction and greater than 15 degrees in the minus (-) A direction, but the embodiments are not limited thereto.

[0101] In some embodiments, the prism (2105) can move in the plus (+) or minus (-) B direction by about 20 degrees, or between 10 and 20 degrees, or between 15 and 20 degrees, where the angle of movement can be moved by the same angle in the plus (+) or minus (-) B direction, or by a nearly similar angle within a range of about 1 degree.

[0102] In some embodiments, the prism (2105) can move the reflective surface (2106) of the light-reflecting material in a third direction (e.g., Z direction) parallel to the extension direction of the central axis (2106).

[0103] OPFE (2110) may include, for example, groups of m (where m is a natural number) optical lenses. The m lenses can be moved in a second direction (Y) to change the optical zoom ratio of the camera module (2100b). For example, when the basic optical zoom ratio of the camera module (2100b) is Z, moving the m optical lenses included in the OPFE (2110) may change the optical zoom ratio of the camera module (2100b) to an optical zoom ratio of 3Z or 5Z or more.

[0104] The actuator (2130) can move the OPFE (2110) or the optical lens (hereinafter referred to as the optical lens) to a specific position. For example, the actuator (2130) can adjust the position of the optical lens so that the image sensor (2142) is positioned at the focal length of the optical lens for accurate sensing.

[0105] The image sensing device (2140) may include an image sensor (2142), control logic (2144), and memory (2146). The image sensor (2142) may sense an image of a sensing target using light (L) provided through an optical lens. In some embodiments, the image sensor (2142) may be implemented in a manner similar to the image sensor (100) of FIG. 1 and may operate in a similar manner. For example, the image sensor (2142) may include a pixel group that is substantially identical or similar to any one of the pixel groups shown in FIG. 6a through 6c, FIG. 7a, FIG. 7b, FIG. 8a, and FIG. 8b. The control logic (2144) may control the overall operation of the camera module (2100b). For example, the control logic (2144) may control the operation of the camera module (2100b) according to a control signal provided through a control signal line (CSLb).

[0106] The memory (2146) can store information necessary for the operation of the camera module (2100b), such as calibration data (2147). The calibration data (2147) may include information necessary for the camera module (2100b) to generate image data using light (L) provided from the outside. The calibration data (2147) may include, for example, information regarding the degree of rotation described above, information regarding the focal length, information regarding the optical axis, etc. If the camera module (2100b) is implemented in the form of a multi-state camera in which the focal length changes according to the position of the optical lens, the calibration data (2147) may include focal length values ​​for each position (or state) of the optical lens and information related to auto-focusing.

[0107] The storage unit (2150) can store image data sensed through the image sensor (2142). The storage unit (2150) may be placed outside the image sensing device (2140) and may be implemented in a stacked form with the sensor chip constituting the image sensing device (2140). In some embodiments, the storage unit (2150) may be implemented as an EEPROM (Electrically Erasable Programmable Read-Only Memory), but the embodiments are not limited thereto.

[0108] Referring to FIG. 9 and FIG. 10 together, in some embodiments, each of the plurality of camera modules (2100a, 2100b, 2100c) may include an actuator (2130). Accordingly, each of the plurality of camera modules (2100a, 2100b, 2100c) may include identical or different calibration data (2147) according to the operation of the actuator (2130) included therein.

[0109] In some embodiments, one of the plurality of camera modules (2100a, 2100b, 2100c) camera module (e.g., 2100b) is a camera module in the form of a folded lens including the previously described prism (2105) and OPFE (2110), and the remaining camera modules (e.g., 2100a, 2100b) may be camera modules in the form of a vertical camera module that do not include the prism (2105) and OPFE (2110), but the embodiments are not limited thereto.

[0110] In some embodiments, one of the plurality of camera modules (2100a, 2100b, 2100c) (e.g., 2100c) may be a vertical depth camera that extracts depth information using, for example, IR (Infrared Ray). In this case, the application processor (2200) may generate a 3D depth image by merging image data provided from this depth camera with image data provided from another camera module (e.g., 2100a or 2100b).

[0111] In some embodiments, at least two of the plurality of camera modules (2100a, 2100b, 2100c) may have different field of view angles. In this case, for example, the optical lenses of at least two of the plurality of camera modules (2100a, 2100b, 2100c) may be different from each other, but are not limited thereto.

[0112] Additionally, in some embodiments, the field of view of each of the plurality of camera modules (2100a, 2100b, 2100c) may be different from each other. In this case, the optical lenses included in each of the plurality of camera modules (2100a, 2100b, 2100c) may also be different from each other, but are not limited thereto.

[0113] In some embodiments, each of the plurality of camera modules (2100a, 2100b, 2100c) may be physically separated from one another. That is, instead of the plurality of camera modules (2100a, 2100b, 2100c) dividing and using the sensing area of ​​a single image sensor (2142), an independent image sensor (2142) may be placed inside each of the plurality of camera modules (2100a, 2100b, 2100c).

[0114] Referring again to FIG. 9, the application processor (2200) may include an image processing device (2210), a memory controller (2220), and an internal memory (2230). The application processor (2200) may be implemented separately from a plurality of camera modules (2100a, 2100b, 2100c). For example, the application processor (2200) and the plurality of camera modules (2100a, 2100b, 2100c) may be implemented separately from each other as separate semiconductor chips.

[0115] The image processing device (2210) may include a plurality of sub-image processors (2212a, 2212b, 2212c), an image generator (2214), and a camera module controller (2216).

[0116] The image processing device (2210) may include a plurality of sub-image processors (2212a, 2212b, 2212c) corresponding to the number of camera modules (2100a, 2100b, 2100c).

[0117] Image data generated from each camera module (2100a, 2100b, 2100c) can be provided to corresponding sub-image processors (2212a, 2212b, 2212c) via separate image signal lines (ISLa, ISLb, ISLc). For example, image data generated from camera module (2100a) can be provided to sub-image processor (2212a) via image signal line (ISLa), image data generated from camera module (2100b) can be provided to sub-image processor (2212b) via image signal line (ISLb), and image data generated from camera module (2100c) can be provided to sub-image processor (2212c) via image signal line (ISLc). Such image data transmission can be performed, for example, using a Camera Serial Interface (CSI) based on MIPI (Mobile Industry Processor Interface), but the embodiments are not limited thereto.

[0118] Meanwhile, in some embodiments, a single sub-image processor may be arranged to correspond to a plurality of camera modules. For example, the sub-image processor (2212a) and the sub-image processor (2212c) are not implemented separately as illustrated, but are integrated into a single sub-image processor, and image data provided from the camera module (2100a) and the camera module (2100c) may be selected through a selection element (e.g., a multiplexer) and then provided to the integrated sub-image processor.

[0119] Image data provided to each sub-image processor (2212a, 2212b, 2212c) may be provided to an image generator (2214). The image generator (2214) may generate an output image using image data provided from each sub-image processor (2212a, 2212b, 2212c) according to image generating information or a mode signal.

[0120] Specifically, the image generator (2214) can generate an output image by merging at least some of the image data generated from camera modules (2100a, 2100b, 2100c) having different viewing angles according to image generation information or a mode signal. Additionally, the image generator (2214) can generate an output image by selecting any one of the image data generated from camera modules (2100a, 2100b, 2100c) having different viewing angles according to image generation information or a mode signal.

[0121] In some embodiments, the image generation information may include a zoom signal (or zoom factor). Additionally, in some embodiments, the mode signal may be a signal based, for example, on a mode selected by a user.

[0122] When the image generation information is a zoom signal (zoom factor) and each camera module (2100a, 2100b, 2100c) has a different viewing angle (angle of view), the image generator (2214) can perform different operations depending on the type of zoom signal. For example, if the zoom signal is a first signal, the image data output from the camera module (2100a) and the image data output from the camera module (2100c) can be merged, and then an output image can be generated using the merged image signal and the image data output from the camera module (2100b) that was not used for merging. If the zoom signal is a second signal different from the first signal, the image generator (2214) can generate an output image by selecting one of the image data output from each camera module (2100a, 2100b, 2100c) without performing such image data merging. However, the embodiments are not limited thereto, and the method of processing image data can be modified as needed.

[0123] In some embodiments, the image generator (2214) receives multiple image data with different exposure times from at least one of a plurality of sub-image processors (2212a, 2212b, 2212c) and performs HDR (high dynamic range) processing on the multiple image data to generate merged image data with increased dynamic range.

[0124] The camera module controller (2216) can provide control signals to each camera module (2100a, 2100b, 2100c). The control signals generated from the camera module controller (2216) can be provided to the corresponding camera modules (2100a, 2100b, 2100c) through separate control signal lines (CSLa, CSLb, CSLc).

[0125] One of the plurality of camera modules (2100a, 2100b, 2100c) may be designated as a master camera (e.g., 2100b) according to image generation information including a zoom signal or a mode signal, and the remaining camera modules (e.g., 2100a, 2100c) may be designated as slave cameras. This information may be included in a control signal and provided to the corresponding camera modules (2100a, 2100b, 2100c) through separate control signal lines (CSLa, CSLb, CSLc).

[0126] The camera module operating as a master and slave may be changed according to the zoom factor or operation mode signal. For example, if the field of view of the camera module (2100a) is wider than the field of view of the camera module (2100b) and the zoom factor indicates a low zoom magnification, the camera module (2100b) may operate as a master and the camera module (2100a) may operate as a slave. Conversely, if the zoom factor indicates a high zoom magnification, the camera module (2100a) may operate as a master and the camera module (2100b) may operate as a slave.

[0127] In some embodiments, the control signal provided from the camera module controller (2216) to each camera module (2100a, 2100b, 2100c) may include a sync enable signal. For example, if the camera module (2100b) is a master camera and the camera modules (2100a, 2100c) are slave cameras, the camera module controller (2216) may transmit a sync enable signal to the camera module (2100b). The camera module (2100b) that receives this sync enable signal may generate a sync signal based on the received sync enable signal and provide the generated sync signal to the camera modules (2100a, 2100c) through a sync signal line (SSL). The camera module (2100b) and camera modules (2100a, 2100c) can be synchronized with this sync signal to transmit image data to the application processor (2200).

[0128] In some embodiments, a control signal provided from a camera module controller (2216) to a plurality of camera modules (2100a, 2100b, 2100c) may include mode information according to a mode signal. Based on this mode information, the plurality of camera modules (2100a, 2100b, 2100c) may operate in a first operation mode and a second operation mode with respect to the sensing speed.

[0129] A plurality of camera modules (2100a, 2100b, 2100c) can, in a first operating mode, generate an image signal at a first speed (e.g., generate an image signal at a first frame rate) and encode it at a second speed higher than the first speed (e.g., encode an image signal at a second frame rate higher than the first frame rate), and transmit the encoded image signal to an application processor (2200). At this time, the second speed may be 30 times or less of the first speed.

[0130] The application processor (2200) stores the received image signal, that is, the encoded image signal, in a memory (2230) provided internally or in a storage (2400) outside the application processor (2200), and subsequently reads the encoded image signal from the memory (2230) or the storage (2400) to decode it, and can display image data generated based on the decoded image signal. For example, a corresponding sub-processor among a plurality of sub-processors (2212a, 2212b, 2212c) of the image processing device (2210) can perform decoding, and can also perform image processing on the decoded image signal.

[0131] A plurality of camera modules (2100a, 2100b, 2100c) can generate an image signal at a third speed lower than a first speed in a second operation mode (e.g., generate an image signal at a third frame rate lower than a first frame rate) and transmit the image signal to an application processor (2200). The image signal provided to the application processor (2200) may be an unencoded signal. The application processor (2200) may perform image processing on the received image signal or store the image signal in memory (2230) or storage (2400).

[0132] The PMIC (2300) can supply power, such as power voltage, to each of the plurality of camera modules (2100a, 2100b, 2100c). For example, the PMIC (2300) can supply first power to the camera module (2100a) through a power signal line (PSLa), supply second power to the camera module (2100b) through a power signal line (PSLb), and supply third power to the camera module (2100c) through a power signal line (PSLc), under the control of the application processor (2200).

[0133] The PMIC (2300) can generate power corresponding to each of the plurality of camera modules (2100a, 2100b, 2100c) and adjust the power level in response to a power control signal (PCON) from the application processor (2200). The power control signal (PCON) may include power adjustment signals for each operating mode of the plurality of camera modules (2100a, 2100b, 2100c). For example, the operating mode may include a low power mode, and in this case, the power control signal (PCON) may include information about the camera module operating in the low power mode and the power level being set. The power levels provided to each of the plurality of camera modules (2100a, 2100b, 2100c) may be the same or different from each other. Additionally, the power level may be changed dynamically.

[0134] The above descriptions are specific embodiments for carrying out the present disclosure. The present disclosure will include not only the embodiments described above, but also embodiments that are simply modified or can be easily modified. Furthermore, the present disclosure will include technologies that can be easily modified and implemented using the embodiments. Accordingly, the scope of the present disclosure should not be limited to the embodiments described above, but should be defined by the claims set forth below as well as equivalents to the claims of the present invention. Explanation of the symbols

[0135] 1000, 2000: Electronic device 100: Image sensor 10: Image processor

Claims

Claim 1 Image sensor that generates image data; The image sensor comprises an image processor for processing the image data, wherein the image sensor comprises: a pixel array comprising pixels repeatedly arranged along a row direction and a column direction, wherein each of the pixels in a first row of the pixel array comprises subpixels each connected to any one of a first transmission metal line, a second transmission metal line, and a third transmission metal line, and in response to signals applied to the first transmission metal line, the second transmission metal line, and the third transmission metal line, at least a portion of the charges accumulated in the subpixels of the pixels in the first row among the pixels are diffused into corresponding floating diffusion regions, and the pixels in the first row comprise a first pixel, a second pixel, and a third pixel arranged sequentially in the row direction, wherein the first pixel comprises a first subpixel connected to the second transmission metal line and a second subpixel connected to the third transmission metal line, and the second pixel comprises a third subpixel connected to the first transmission metal line or the second transmission metal line An electronic device comprising a fourth subpixel and a fifth subpixel and a sixth subpixel, wherein the third pixel is connected to the first transmission metal line or the second transmission metal. Claim 2 An electronic device according to claim 1, wherein each of the pixels in the second row of the pixel array comprises subpixels connected to any one of a fourth transmission metal line, a fifth transmission metal line, and a sixth transmission metal line, and the second pixel among the pixels in the second row comprises a first subpixel connected to the fourth transmission metal line and a second subpixel connected to the sixth transmission metal line, wherein the first subpixel of the first pixel and the first subpixel of the second pixel are located in different columns. Claim 3 An electronic device according to claim 2, wherein the image processor performs autofocus processing based on either a first mode or a second mode, wherein in the first mode, the image processor performs autofocus processing based on pixel voltages output from the first row of the pixel array, and in the second mode, the image processor performs autofocus processing based on some of the pixel voltages output from the first row of the pixel array and some of the pixel voltages output from the second row. Claim 4 In claim 2, the image sensor is an electronic device that: resets floating diffusion regions of the pixels of the first row; enables a signal applied to the first transmission metal line and a signal applied to the second transmission metal line; outputs first image data from the pixel array; resets floating diffusion regions of the pixels of the second row; enables a signal applied to the fourth transmission metal line and a signal applied to the fifth transmission metal line; and outputs second image data from the pixel array. Claim 5 An electronic device according to claim 4, wherein the image processor performs autofocus processing based on data corresponding to the first subpixel of the first pixel in the first image data and data corresponding to the second subpixel of the second pixel in the second image data. Claim 6 delete Claim 7 An electronic device according to claim 1, wherein the image sensor: resets floating diffusion regions of the first to third pixels; generates first image data in response to enabling a signal applied to the first transmission metal line and a signal applied to the third transmission metal line; and generates second image data in response to enabling a signal applied to the second transmission metal line. Claim 8 In claim 7, the image processor is: an electronic device that performs autofocus processing based on the first image data and the second image data. Claim 9 An image sensor comprising a pixel array, wherein the pixel array comprises a first pixel group comprising pixels for generating image data, and a first row of the first pixel group comprises: a first pixel comprising a subpixel pair each receiving either a first transmission gate signal and a second transmission gate signal; and a second pixel comprising a subpixel pair each receiving either a second transmission gate signal and a third transmission gate signal, and the pixel array further comprises a second pixel group, wherein a first row of the second pixel group comprises: a fourth pixel comprising a subpixel pair each receiving either the first transmission gate signal and the second transmission gate signal; and a sixth pixel comprising a subpixel pair each receiving either the first transmission gate signal and the second transmission gate signal, and the first pixel, the second pixel, the fourth pixel, and the sixth pixel are sequentially arranged in a row direction. Claim 10 An image sensor according to claim 9, wherein the second row of the first pixel group comprises a third pixel comprising a subpixel pair receiving either a fourth transmission gate signal and a fifth transmission gate signal, and the second row of the second pixel group comprises a fifth pixel comprising a subpixel pair receiving either a fourth transmission gate signal and a sixth transmission gate signal. Claim 11 In claim 10, the image sensor comprises: resetting floating diffusion regions of the pixels in the first row of the first pixel group and floating diffusion regions of the pixels in the first row of the second pixel group; enabling the first transmission gate signal and the second transmission gate signal; resetting the floating diffusion regions of the pixels in the second row of the first pixel group and floating diffusion regions of the pixels in the second row of the second pixel group; enabling the fourth transmission gate signal and the fifth transmission gate signal; and providing autofocus based on a pixel voltage corresponding to a subpixel receiving the second transmission gate signal among the subpixel pairs of the second pixel and a pixel voltage corresponding to a subpixel receiving the fourth transmission gate signal among the subpixel pairs of the fifth pixel. Claim 12 In claim 10, the image sensor in which the transmission transistor of the subpixel receiving the second transmission gate signal among the subpixel pair of the second pixel of the first pixel group and the transmission transistor of the subpixel receiving the fourth transmission gate signal among the subpixel pair of the fourth pixel of the second pixel group are directly connected to a ground node. Claim 13 An image sensor according to claim 9, wherein the second row of the first pixel group comprises a third pixel comprising a subpixel pair receiving either a fourth transmission gate signal and a fifth transmission gate signal, and the pixel array further comprises a second pixel group, wherein the first row of the second pixel group comprises a fourth pixel comprising a subpixel pair receiving either a first transmission gate signal and a second transmission gate signal, and the second row of the second pixel group comprises a fifth pixel comprising a subpixel pair receiving either a fifth transmission gate signal and a sixth transmission gate signal. Claim 14 An image sensor comprising a pixel array, wherein the pixel array comprises a first pixel group comprising first to fourth unit pixel groups, the first pixel group comprising: a first pixel comprising a subpixel pair each receiving either a first transmission gate signal and a second transmission gate signal; a second pixel comprising a subpixel pair each receiving either the first transmission gate signal and a second transmission gate signal and any one of a third transmission gate signal; a fifth pixel comprising a subpixel pair each receiving either the first transmission gate signal and the second transmission gate signal; and a sixth pixel comprising a subpixel pair each receiving either the first transmission gate signal and the second transmission gate signal, wherein the fifth pixel, the sixth pixel, the second pixel, and the first pixel are sequentially arranged along a row direction. Claim 15 An image sensor according to claim 14, wherein the first unit pixel group comprises the first pixel and the second pixel, and the second unit pixel group comprises: a third pixel comprising a subpixel pair each receiving either a fourth transmission gate signal and a fifth transmission gate signal; and a fourth pixel comprising a subpixel pair each receiving either a fifth transmission gate signal and a sixth transmission gate signal. Claim 16 In claim 15, the image sensor comprises: selecting a first row of the first unit pixel group; enabling the first transmission gate signal and the second transmission gate signal; detecting first pixel voltages from the pixel array; selecting a first row of the second unit pixel group; enabling the fourth transmission gate signal and the fifth transmission gate signal; detecting second pixel voltages from the pixel array; and providing autofocus based on the first pixel voltages and the second pixel voltages. Claim 17 An image sensor according to claim 15, wherein the first row of the first pixel group comprises the first pixel and the second pixel, and each of the pixels in the second row of the first pixel group comprises a subpixel pair that receives either the fourth transmission gate signal and the fifth transmission gate signal. Claim 18 In claim 15, the first unit pixel group includes the first pixel, and the second unit pixel group further includes the second pixel and a third pixel including a subpixel pair that receives either the second transmission gate signal or the third transmission gate signal, wherein the subpixel pair of the second pixel receives the second transmission gate signal and the third transmission gate signal, respectively, an image sensor. Claim 19 An image sensor according to claim 18, wherein the pixels of the first unit pixel group each comprise a pair of subpixels separated by a first diagonal boundary, and the pixels of the third unit pixel group each comprise a pair of subpixels separated by a second diagonal boundary. Claim 20 An image sensor according to claim 15, wherein the subpixel pair of the second pixel each receives the second transmission gate signal and the third transmission gate signal, and the first row of the first unit pixel group includes the first pixel and the second pixel, and the second row of the first unit pixel group further includes a third pixel including a subpixel pair each receiving either the fourth transmission gate signal and the fifth transmission gate signal, and a fourth pixel including a subpixel pair each receiving either the fourth transmission gate signal and the sixth transmission gate signal.

Images