Apparatus and method for circuit simulation reflecting PVT and local variations

Abstract

A circuit simulation method reflecting PVT and random variation at the device level according to the present invention comprises: a step of applying a netlist and a Process Design Kit (PDK) to a predetermined Graph Neural Network (GNN) model to output a circuit characteristic vector in which the circuit topology and device information are expressed as context; a step of applying the output circuit characteristic vector, Process-Voltage-Temperature (PVT) cases, and an initial circuit design parameter set to each of the learned ensemble models to output predicted values ​​of circuit operation characteristics according to each PVT case; and a step of outputting an uncertainty index related to the deviation between the ensemble models regarding the predicted values ​​of circuit operation characteristics for each ensemble model. The method may include the step of determining a first set of circuit design parameters and a first set of PVT case candidates to be explored for the first set of circuit design parameters by applying the average value of each circuit characteristic prediction value, the uncertainty indicator, the PDK, and the target specification to a predetermined optimization policy-based artificial neural network policy model.

Description

Technology Field

[0001] The present invention relates to a circuit simulation method and apparatus that reflects PVT and random variation at the element level. Background Technology

[0002] In semiconductor analog circuit design, design optimization that considers Process-Voltage-Temperature (PVT) variations and Local Variations (random variations at the device level or local variations of devices and processes) is essential. Research on optimization considering PVT variations using deep learning is still actively underway. However, analyzing PVT itself requires significant computational time, and model-free methods have been primarily used to date. Furthermore, while optimization methods utilizing Monte Carlo simulations that account for Local Variations are commonly used in most existing design stages, attempts to implement this using neural network-based simulators have not yet been made. In particular, no PVT-aware neural network simulator has yet been released, and while the consideration of Local Variations is based on Monte Carlo simulation, learning-based attempts are still lacking.

[0003] Currently, in industrial settings, optimization for PVT variation and local variation is performed separately, and there is a lack of methodologies to handle the two in an integrated manner.

[0004] As such, there is virtually no integrated methodology in the industry that simultaneously considers PVT and local variations. This is because existing industrial design flows are conservative, employing a method where the design is optimized at every PVT corner and 3σ analysis is performed additionally. Furthermore, if local variations are also handled using Monte Carlo, the number of simulation runs increases exponentially, leading to limitations even with GPU parallelization.

[0005] In the following, to overcome these problems and limitations, we propose a circuit simulator method and device that can effectively predict the worst case while simultaneously considering PVT and local variations by applying a topology-aware neural network. Prior art literature

[0006] Korean Registered Patent No. 10-2561849 The problem to be solved

[0007] The technical problem to be solved by the present invention is to provide a circuit simulation method that reflects PVT and random variation at the device level.

[0008] The technical problem to be solved by the present invention is to provide a circuit simulation device that reflects PVT and random variation at the device level.

[0009] Another technical objective of the present invention is to provide a computer-readable recording medium that records a program for executing a circuit simulation method reflecting PVT and random variation at the element level on a computer.

[0010] The technical problems to be solved by the present invention are not limited to the above technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art to which the present invention belongs from the description below. means of solving the problem

[0011] A circuit simulation method reflecting PVT and random variation at the device level according to the present invention for achieving the above technical objectives comprises: a step of applying a netlist and a Process Design Kit (PDK) to a predetermined Graph Neural Network (GNN) model to output a circuit characteristic vector in which the circuit topology and device information are expressed as context; a step of applying the output circuit characteristic vector, Process-Voltage-Temperature (PVT) cases, and an initial circuit design parameter set to each of the learned ensemble models to output predicted values ​​of circuit operation characteristics according to each PVT case; and a step of outputting an uncertainty index related to the deviation between the ensemble models regarding the predicted values ​​of circuit operation characteristics for each ensemble model. The method may include the step of determining a first set of circuit design parameters and a first set of PVT case candidates to be explored for the first set of circuit design parameters by applying the average value of each circuit characteristic prediction value, the uncertainty indicator, the PDK, and the target specification to a predetermined optimization policy-based artificial neural network policy model.

[0012] The above circuit simulation method may further include: a step of applying the determined first circuit design parameter set to each ensemble model for a first PVT case among the first PVT case candidates to be explored, in which the uncertainty index is below a predetermined threshold, to output a predicted value of circuit operation characteristics for the first PVT case; a step of applying the determined first circuit design parameter set to an actual circuit simulator for a second PVT case among the first PVT case candidates to be explored, in which the uncertainty index exceeds the predetermined threshold, to output a value of circuit operation characteristics for the second PVT case; a step of determining a worst PVT case exhibiting the most unfavorable performance based on the predicted value of circuit operation characteristics for the first PVT case and the value of circuit operation characteristics for the second case; and a step of determining whether the value of circuit operation characteristics in the worst PVT case satisfies the target specification. The above circuit simulation method may further include the step of determining the determined first circuit design parameter set as the optimal circuit design parameter set when it is determined that the circuit operation characteristic value in the worst PVT case satisfies the target specification.

[0013] The above circuit simulation method may further include the step of determining a second circuit design parameter set by applying it to the optimization policy-based artificial neural network policy model in a manner such as applying a penalty to the output first circuit design parameter set or granting a low reward when it is determined that the circuit operation characteristic value in the worst PVT case does not satisfy the target specification. The above circuit simulation method may further include the step of applying the second circuit design parameter set to each of the learned ensemble models to output a predicted value of the circuit operation characteristic according to each PVT case; the step of outputting an uncertainty index related to the deviation between the ensemble models regarding the predicted value of the circuit operation characteristic for each ensemble model for the second circuit design parameter set; and the step of determining a third circuit design parameter set and a second PVT case candidate group to search for the third circuit design parameter set by applying the average value of each predicted value of the circuit characteristic for the second circuit design parameter set, the uncertainty index, the PDK, and the target specification to the predetermined optimization policy-based artificial neural network policy model.

[0014] The above circuit simulation method may further include: a step of applying the determined third circuit design parameter set to each ensemble model for a third PVT case among the second PVT case candidates to be explored, wherein the uncertainty index for the third circuit design parameter set is below the predetermined threshold, and outputting a predicted value of the circuit operation characteristic for the third PVT case; a step of applying the determined third circuit design parameter set to the actual circuit simulator for a fourth PVT case among the second PVT case candidates to be explored, wherein the uncertainty index for the third circuit design parameter set exceeds the predetermined threshold, and outputting a circuit operation characteristic value for the fourth PVT case; a step of determining a worst PVT case for the third circuit design parameter set based on the output predicted value of the circuit operation characteristic for the third PVT case and the output circuit operation characteristic value for the fourth case; and a step of determining whether the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification.

[0015] The above circuit simulation method may further include the step of determining the determined third circuit design parameter set as the optimal circuit design parameter set when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification.

[0016] The above circuit simulation method may include the step of determining a fourth circuit design parameter set after applying a penalty or a low reward to the third circuit design parameter set and applying it to the predetermined optimization policy-based artificial neural network policy model when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set does not satisfy the target specification; the step of recalculating the circuit characteristic prediction value and uncertainty index by applying the fourth circuit design parameter set to each ensemble model; and the step of calculating a fifth circuit design parameter set and a third PVT case candidate group to be searched by applying the recalculated values ​​to the predetermined optimization policy-based artificial neural network policy model, wherein the process of determining the worst PVT case for the fifth circuit design parameter set and comparing it with the target specification by applying the fifth circuit design parameter set and the third PVT case candidate group to be searched to each ensemble model to output a circuit operation characteristic prediction value and applying it to the actual circuit simulator (150) to output a circuit operation characteristic value may be repeatedly performed until an optimal circuit design parameter set is calculated.

[0017] A circuit simulation device reflecting PVT and random variation at the device level according to the present invention for achieving the other technical objectives mentioned above comprises: a graph neural network processing unit that applies a netlist and a Process Design Kit (PDK) to a predetermined graph neural network (GNN) model to output a circuit characteristic vector in which the circuit topology and device information are expressed as context; a first computation processing unit that applies the output circuit characteristic vector, Process-Voltage-Temperature (PVT) cases, and an initial circuit design parameter set to each of the learned ensemble models to output a predicted value of circuit operation characteristics according to each PVT case; and a second computation processing unit that outputs an uncertainty index related to the deviation between the ensemble models regarding the predicted value of circuit operation characteristics for each ensemble model. and may include a third processing unit that determines a first circuit design parameter set and a first PVT case candidate group to search for the first circuit design parameter set by applying the average value of each circuit characteristic prediction value, the uncertainty index, the PDK, and the target specification to a predetermined optimization policy-based artificial neural network policy model.

[0018] The circuit simulation device further includes an actual circuit simulator that outputs a circuit operation characteristic value for a second PVT case using a determined first circuit design parameter set for a second PVT case in which the uncertainty index exceeds a predetermined threshold among the first PVT case candidates to be explored, and the first computational processing unit outputs a predicted value for a circuit operation characteristic for a first PVT case in which the uncertainty index is below a predetermined threshold among the first PVT case candidates to be explored by applying the determined first circuit design parameter set to each ensemble model, and the second computational processing unit can determine a worst PVT case that exhibits the most unfavorable performance based on the predicted value for a circuit operation characteristic for a first PVT case and the circuit operation characteristic value for a second case outputted, and determine whether the circuit operation characteristic value in the worst PVT case satisfies the target specification.

[0019] If it is determined that the circuit operation characteristic value in the above worst PVT case satisfies the above target specification, the above third processing unit may determine the determined first circuit design parameter set as the optimal circuit design parameter set.

[0020] The third operation processing unit can determine the second circuit design parameter set by applying it to the optimization policy-based artificial neural network policy model in a manner that applies a penalty to the output first circuit design parameter set or grants a low reward when it is determined that the circuit operation characteristic value in the worst PVT case does not satisfy the target specification.

[0021] The first computational processing unit applies the second circuit design parameter set to each of the learned ensemble models to output a predicted value of circuit operation characteristics according to each PVT case, the second computational processing unit outputs an uncertainty index related to the deviation between the ensemble models regarding the predicted value of circuit operation characteristics for each ensemble model for the second circuit design parameter set, and the third computational processing unit applies the average value of each predicted value of circuit characteristics for the second circuit design parameter set, the uncertainty index, the PDK, and the target specification to the predetermined optimization policy-based artificial neural network policy model to determine the third circuit design parameter set and the second PVT case candidate group to be searched for the third circuit design parameter set.

[0022] The first processing unit applies the determined third circuit design parameter set to each ensemble model for a third PVT case among the second PVT case candidates to be searched, in which the uncertainty index for the third circuit design parameter set is below the predetermined threshold, and outputs a predicted value of the circuit operation characteristic for the third PVT case; the actual circuit simulator applies the determined third circuit design parameter set for a fourth PVT case among the second PVT case candidates to be searched, in which the uncertainty index for the third circuit design parameter set exceeds the predetermined threshold, and outputs a circuit operation characteristic value for the fourth PVT case; and the second processing unit determines a worst PVT case for the third circuit design parameter set based on the predicted value of the circuit operation characteristic for the third PVT case and the circuit operation characteristic value for the fourth case, and can determine whether the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification.

[0023] The second operation processing unit may determine the determined third circuit design parameter set as the optimal circuit design parameter set if it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification.

[0024] The third processing unit determines the fourth circuit design parameter set by applying a penalty or a low reward to the third circuit design parameter set and applying it to the predetermined optimization policy-based artificial neural network policy model when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set does not satisfy the target specification, and the first processing unit and the second processing unit each apply the fourth circuit design parameter set to the respective ensemble model to recalculate the circuit characteristic prediction value and uncertainty index, and the third processing unit can calculate the fifth circuit design parameter set and the third PVT case candidate group to be searched by applying the recalculated values ​​to the predetermined optimization policy-based artificial neural network policy model.

[0025] The second operation processing unit can control the first operation processing unit to apply the fifth circuit design parameter set and the third PVT case candidate group to be searched to each ensemble model to output a predicted value of circuit operation characteristics, control the actual circuit simulator to output a circuit operation characteristic value based on the fifth circuit design parameter set and the third PVT case candidate group to be searched, and control the process of determining the worst PVT case for the fifth circuit design parameter set and comparing it with the target specification to be performed repeatedly until the optimal circuit design parameter set is calculated. Effects of the invention

[0026] The circuit simulation device and method according to the present invention can dramatically improve the search efficiency of the entire PVT space.

[0027] In addition, it significantly reduces simulator computational budget and time costs, enables uncertainty-based dynamic resource allocation and automatic worst-case detection, and offers the effect of highly reliable circuit performance prediction through a Topology-aware Neural Simulator structure.

[0028] Consequently, the present invention provides a circuit simulation platform capable of simultaneously securing accuracy and computational efficiency through an AI-based automation and uncertainty-aware structure, compared to the existing heuristic-based manual worst-case search method.

[0029] The effects obtainable from the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description below. Brief explanation of the drawing

[0030] FIG. 1 is a block diagram showing the configuration of a circuit simulation device (100) according to the present invention. FIG. 2 is a diagram illustrating a circuit simulation method according to the present invention. Figure 3 is a flowchart schematically illustrating the overall process of the circuit simulation method according to the present invention. FIG. 4 is a flowchart illustrating the process of determining a PVT case candidate group and performing parallel evaluation and verification in a circuit simulation method according to the present invention. FIG. 5 is a flowchart showing the process for determining an optimal circuit design parameter set following the process of FIG. 4 in the circuit simulation method according to the present invention. FIG. 6 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 5 in the circuit simulation method according to the present invention. FIG. 7 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 6 in the circuit simulation method according to the present invention. FIG. 8 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 7 in the circuit simulation method according to the present invention. FIG. 9 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 8 in the circuit simulation method according to the present invention. Specific details for implementing the invention

[0031] Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. The detailed description disclosed below, together with the accompanying drawings, is intended to describe exemplary embodiments of the present invention and is not intended to represent the only embodiment in which the present invention may be practiced. The following detailed description includes specific details to provide a complete understanding of the present invention. However, those skilled in the art will know that the present invention may be practiced without such specific details.

[0032] In some cases, to avoid obscuring the concept of the present invention, known structures and devices may be omitted or illustrated in the form of block diagrams focusing on the core functions of each structure and device. Additionally, throughout this specification, the same components are described using the same reference numerals.

[0033] The present invention is capable of various modifications and may have various embodiments, and specific embodiments are illustrated in the drawings and described in detail. However, this is not intended to limit the invention to specific embodiments, and it should be understood that the invention includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention.

[0034] When it is stated that one component is "connected" or "connected" to another component, it should be understood that while it may be directly connected or connected to that other component, there may also be other components in between. On the other hand, when it is stated that one component is "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between.

[0035] Terms such as "first," "second," etc., may be used to describe various components, but said components should not be limited by said terms. These terms are used solely for the purpose of distinguishing one component from another.

[0036] The terms used herein are merely for describing specific embodiments and are not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this specification, terms such as “comprising” or “having” are intended to indicate the presence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0037] Furthermore, the components of the embodiments described with reference to each drawing are not limited to the respective embodiments and may be implemented to be included in other embodiments within the scope of maintaining the technical spirit of the present invention. It is also obvious that multiple embodiments may be re-implemented as a single embodiment that integrates multiple embodiments, even if a separate description is omitted.

[0038] Additionally, terms such as “part,” “unit,” “module,” and “device” described in the specification refer to a unit that processes at least one function or operation, and this may be implemented in hardware, software, or a combination of hardware and software.

[0039] Before describing the present invention below, the optimization policy-based artificial neural network model used in the present invention will be briefly described first.

[0040] Reinforcement learning is a type of machine learning in which an agent learns actions to maximize rewards while interacting with an environment. The agent refers to a machine learning model as the entity performing the learning. The agent selects an action from a specific state within the environment. A state is information representing the current situation of the environment, and the agent determines its next action based on this state. An action is a behavior that the agent can choose based on the state, and each action changes the state of the environment. The environment is the world in which the agent interacts; it changes its state according to the agent's actions and provides rewards in return. A policy is a strategy that determines which action an agent will take in a given state. Policies can be defined probabilistically or deterministically. A reward is the feedback obtained as a result of the agent performing a specific action.

[0041] The process of reinforcement learning consists of: 1) an initialization process in which the agent observes the state within the environment and recognizes the initial state; 2) a behavior selection process in which the agent selects an action based on the current state and the agent's policy; 3) an environment response process in which the environment transitions to a new state and provides a reward based on the agent's action; 4) a learning process in which the agent evaluates how good the chosen action was based on the received reward and updates the policy or value function; and 5) an iterative process in which the agent learns better actions by repeating this process and forms a policy that obtains the maximum reward in the long term.

[0042] In a reinforcement learning model, the State is the current set of circuit design parameters (e.g., Transistor W / L, Bias Current, etc.), and the Action is the proposal of new circuit design parameters, such as increasing a specific transistor W or adjusting the Bias Current. The Reward is defined based on the difference between the target specifications and the predicted circuit characteristics; a high reward is granted when the target specifications are satisfied, and an additional, higher reward may be granted if the target specifications are satisfied even under Worst Case conditions. A Penalty may be applied in cases of violating the target specifications, failing to satisfy the target specifications even under Worst Case conditions, or exploring only regions with excessively high uncertainty indicators. The optimized policy-based artificial neural network model applied in the present invention may be such a reinforcement learning model.

[0043] Due to the rapid increase in complexity in the field of circuit design, traditional simulators require high computational costs and long execution times; consequently, there is a growing demand for artificial neural network models capable of providing efficient and fast approximations. This invention proposes a neural network-based circuit simulator capable of simultaneously considering PVT variations and local variations.

[0044] The following briefly describes the terms to be used in relation to the artificial neural network model-based circuit simulation device and method according to the present invention.

[0045] A netlist describes the electrical connections and components of an electronic circuit, defining the circuit topology and representing the connections of transistors, resistors, capacitors, and the like. A Process Design Kit (PDK) is a collection of files that models semiconductor manufacturing processes, providing the tools and data necessary for integrated circuit design. Netlists are used for simulation and manufacturing, and PDKs are utilized to identify the characteristics of devices usable in specific manufacturing technologies. PDKs provide all the necessary information and tools to enable designers to design chips using specific process technologies.

[0046] The number of PVT cases can reach 27 or more, and if local variations are also considered, existing methods require a very large number of separate training models. Furthermore, simulation costs become very high. For example, a simple (Na When applying the approach, a separate model (a total of 27) is required for each case of PVT, and if the circuit's topology changes, the number of required models increases significantly accordingly. Accordingly, the present invention proposes a circuit simulator that can effectively predict the worst case while simultaneously considering PVT and local variations by applying a topology-aware neural network.

[0047] A PVT case is a simulation / verification condition defined by a combination of specific process states, voltage levels, and temperature conditions. First, process variation refers to changes in transistor characteristics during the manufacturing process; examples include Fast-Fast (FF), Typical-Typical (TT), Slow-Slow (SS), Fast-Slow (FS), and Slow-Fast (SF). This means that changes in channel length, mobility, threshold voltage, etc., result in variations in circuit speed and power characteristics. Next, voltage variation refers to the supply voltage deviating by more than ±10% from the design nominal value. For example, VDD could be 1.0 V (nominal), 0.9 V (low), and 1.1 V (high). This implies that speed slows down at low voltages, while power consumption and heat generation increase at high voltages. Temperature variation refers to changes in the semiconductor operating environment temperature, such as -40°C (low), 25°C (room), and 125°C (high). Leakage current increases at high temperatures, while delay time is reduced at low temperatures. Considering the three types of process, voltage, and temperature described above, there are at least 27 PVT cases. For example, PVT Case 1: (FF, 1.1 V, -40°C), PVT Case 2: (TT, 1.0 V, 25°C), and PVT Case 3: (SS, 0.9 V, 125°C).

[0048] The process of converting these PVT cases into a form that is easy for a neural network to handle is called embedding.

[0049] Random variations at the device level in semiconductor circuits are referred to as Local Variations (hereinafter abbreviated as location variations). Since the characteristics of each device (such as transistors) are probabilistically and randomly distributed (e.g., threshold voltage Vth, mobility μ, W / L fine error), it is difficult to incorporate them as deterministic categorical characteristics, and it is necessary to reflect statistical distributions. In the present invention, location variation is primarily reflected in the Real Simulator during the High Sigma Monte Carlo simulation stage. Local Variations are treated as learning data attributes of the Real Simulator rather than as direct inputs, and the Neural Simulator is designed to learn them implicitly. The Real Simulator may refer to a simulator that calculates circuit operation characteristic values ​​based on a physical model, and may include analog simulators, digital simulators, or mixed-signal simulators.

[0050] Local variations are included in the dataset reflected by Monte Carlo simulation in a real circuit simulator, and are indirectly reflected in the form of 'output uncertainty' by a neural network-based simulator learning from them. In this way, the present invention resolves local variations by embedding them into the attributes of Monte Carlo-based training data generated in a real circuit simulator, rather than inputting them as separate inputs to the Neural Simulator. While learning this data, the Neural Simulator absorbs the effects of local variations, and through the uncertainty output (based on an ensemble model), it becomes possible to search for the worst case considering local variations. The optimization policy-based artificial neural network model according to the present invention helps to enable the search for the worst case by utilizing the Neural Simulator output (predicted value + uncertainty indicator).

[0051] Target usage or target specification refers to the target performance that the designer intends to achieve, for example, Gain It can be 60 dB, Power ≤ 1 mW, etc.

[0052] FIG. 1 is a block diagram showing the configuration of a circuit simulation device (100) according to the present invention, and FIG. 2 is a diagram for explaining a circuit simulation method according to the present invention.

[0053] Referring to FIGS. 1 and 2, the circuit simulation device (100) may include a graph neural network processing unit (110), a first computation processing unit (120) including a Neural Simulator, a second computation processing unit (130), a third computation processing unit (140), a Real Simulator (150), and a memory (160).

[0054] The actual circuit simulator (150) may include an input unit (155) and a computation unit (157), and the actual circuit simulator (150) may be a traditional circuit analysis tool such as NgSPICE, HSPICE, or SPICE as a Real Simulator. The actual circuit simulator (150) can provide very accurate results based on the actual semiconductor process (PDK) and netlist, but tends to have long simulation times and consume a lot of computational resources. The actual circuit simulator (150) can output or calculate circuit operation characteristic values ​​using the netlist and PDK. This value calculated by the actual circuit simulator (150) is used for learning by the second computation processing unit (130) as a physically accurate reference value, and the result from the actual circuit simulator (150) is also provided to the third computation processing unit (140) so that the third computation processing unit (140) uses it for reinforcement learning of an artificial neural network model based on an optimization policy.

[0055] The terms used in this specification, the first operation processing unit (120) and the third operation processing unit (140), may each mean a processor capable of performing matrix operations in parallel (e.g., Graphic Processing Unit, GPU, etc.) and its dedicated memory (e.g., VRAM), and the term used in this specification, the second operation processing unit (130), may mean a processor capable of performing general-purpose operations (e.g., Central Processing Unit, CPU, etc.) and system memory (RAM).

[0056] The memory (160) may store artificial neural network models according to the present invention, training data, netlist, PDK, and target spec, etc., before learning or prediction (inference). In addition, the memory (160) may store information for various operations and information for various controls.

[0057] Graph Neural Network (GNN) models receive basic circuit information, such as netlists and PDKs, as input, interpret the circuit as a graph structure, convert various circuit topologies into contexts (e.g., vectors) of a predetermined length (or convert them into numerical values), and output circuit embeddings. The output circuit embeddings can be circuit feature vectors that represent the circuit's topologies and component information as context. GNN models compress even circuits with different topologies into a vector space of the same dimension, making it easier for the artificial neural network model to process them and facilitating fast and efficient learning in subsequent stages. In other words, GNN models can perform the process of converting complex circuit structures into easy-to-understand data representations. GNN models generate topology-aware embeddings by receiving structural and physical information about the circuit; they can take netlists and PDKs as input and output circuit feature vectors based on the netlists and PDKs.

[0058] In this way, the graph neural network processing unit (110) can apply a predetermined netlist, PDK, and target specification to a predetermined (trained) GNN model to output a circuit feature vector that represents the circuit topology and component information as context. The output result is a circuit feature vector, which can be efficiently utilized in subsequent processing steps by converting circuits with various structures into a consistent data representation. Although the term "circuit feature vector" is used in the present invention, it may be referred to in various ways, such as "circuit structural representation data" or "circuit graph representation vector."

[0059] The circuit simulation device (100) may be equipped with at least two artificial neural network models as an ensemble model, and for convenience of explanation, FIG. 2 is illustrated as having multiple artificial neural network models, which are ensemble models, equipped in a Neural Simulator (120). However, alternatively, ensemble models may be equipped in each Neural Simulator. The ensemble method involves having multiple independently trained Neural Simulators, and collecting / acquiring their respective outputs for the same input to calculate the mean value (final predicted value) and the variance value (uncertainty index). That is, there must be multiple ensemble models to provide prediction reliability simultaneously.

[0060] The Neural Simulator is pre-trained, and the pre-training is briefly explained. The Neural Simulator may be a surrogate model that simulates the circuit operation characteristic value (Ground Truth) calculated by the actual circuit simulator (150) based on SPICE, etc., and may be an artificial neural network-based simulator.

[0061] The Neural Simulator receives PVT cases embedded during training and an initial set of circuit design parameters as input. Using a supervised learning method, the results / outputs (e.g., gain, power, delay, etc.) of the actual circuit simulator (150) are learned as the correct answers (labels). In other words, the Neural Simulator directly learns the ground truth dataset. Subsequently, the difference between the Neural Simulator's predicted value and the ground truth becomes the loss. The Neural Simulator can be described as a learned model in which the artificial neural network weights are updated to reduce this difference. In this way, the Neural Simulator acts as a surrogate capable of replacing the high-cost simulation of the actual circuit simulator (150). The Neural Simulator is a (artificial) neural network-based simulator that predicts and outputs circuit operation characteristic values ​​based on an artificial neural network ensemble model, and can be described as being equipped in the first computational processing unit (120).

[0062] The first computational processing unit (120) can apply the circuit characteristic vector output from the GNN model to a predetermined learned ensemble model to output a predicted value of the circuit operation characteristic. This ensemble model is also called a surrogate model and can be called a Neural Simulator because it is an artificial neural network-based alternative simulator, and it serves as a high-speed approximation simulator. The surrogate model can mainly train an artificial neural network to approximate and output the circuit operation characteristic value output by an existing actual circuit simulator.

[0063] Circuit operation characteristic values ​​are values ​​representing actual circuit operation characteristics, such as power consumption (e.g., 4.5mW), latency (e.g., 0.8ns), and chip area (e.g., 0.1mm²). 2There may be the internal operating temperature of the chip, output voltage waveform, etc. The circuit operation characteristic value used in the present invention represents a performance indicator and may be referred to by various terms such as circuit performance metric, circuit performance parameters, and circuit operation result data.

[0064] Figure 3 is a flowchart schematically illustrating the overall process of the circuit simulation method according to the present invention.

[0065] FIG. 3 illustrates the circuit simulation process according to the present invention from a one-round perspective. Referring to FIG. 3, the third computational processing unit (140) according to the present invention may propose a set of circuit design parameters through an optimization policy-based artificial neural network model and may also propose a group of candidate PVT cases to be explored (S310). Such a set of circuit design parameters may include, for example, transistor size, bias, capacitance, etc.

[0066] Subsequently, the first computational processing unit (120) and the actual circuit simulator (150) each perform verification, such as calculating performance for the corresponding PVT case candidate group to be explored for the circuit design parameter set (S320). The second computational processing unit (130) determines the Worst PVT case by comparing performance values ​​for each PVT case based on the output of the first computational processing unit (120) and the output of the actual circuit simulator (150) (S320). Subsequently, the second computational processing unit (130) determines whether the Worst PVT case satisfies the target specification by comparing the performance value in the Worst PVT case with the target specification (S330).

[0067] At this time, if the target specifications are satisfied even in the worst PVT case, the third processing unit (140) determines that the above circuit design parameter set is the optimal circuit design parameter set as a robust design because it satisfies the target specifications in all PVT ranges. On the other hand, if the target specifications are not satisfied in the worst PVT case, the third processing unit (140) controls the optimization policy-based artificial neural network model to undergo reinforcement learning by applying a penalty or low reward to the above circuit design parameter set (S340). Then, after updating the optimization policy-based artificial neural network model through reinforcement learning, the third processing unit (140) proposes circuit design parameters again and repeats the process from S310 to S340 until the optimal circuit design parameter set is found. That is, the next-round process is performed again.

[0068] This third computational processing unit (140) can be implemented as a predetermined optimization policy-based artificial neural network model, and as an example, can be implemented as a reinforcement learning (Policy Network) or an optimization agent. In this case, the third computational processing unit (140) may be referred to as an AI Agent model, etc.

[0069] Referring to FIGS. 2 and 3, the first operation processing unit (120) can apply the circuit characteristic vector, PVT case(s), and initial circuit design parameter set output from the graph neural network processing unit (110) to each of the pre-trained ensemble models to output predicted values ​​for circuit operation characteristics for each PVT case.

[0070] When a circuit operation characteristic prediction value is output for each ensemble model, the second computation processing unit (130) can output / calculate an uncertainty index related to the deviation of the output circuit operation characteristic prediction value between the ensemble models. In this case, the second computation processing unit (130) can output an uncertainty index for each PVT case. This uncertainty index may be in the form of the variance value of the output values ​​between the ensemble models. In addition, the second computation processing unit (130) can also calculate an average value for the output circuit operation characteristic prediction value for each ensemble model.

[0071] The process outlined in Figure 3 will be explained in detail below.

[0072] FIG. 4 is a flowchart illustrating the process of determining a PVT case candidate group and performing parallel evaluation and verification in a circuit simulation method according to the present invention.

[0073] Referring to FIG. 4, the third computational processing unit (140) can determine a first circuit design parameter set for PVT case evaluation by applying the average value of each circuit characteristic prediction value output by each ensemble model processed by the second computational processing unit (130), the uncertainty index, and a pre-prepared PDK and target specification to a predetermined optimization policy-based artificial neural network policy model (S410). Additionally, the third computational processing unit (140) can determine a first PVT case candidate group to search for the first circuit design parameter set determined among all PVT cases. In this way, since the third computational processing unit (140) determines a first PVT case candidate group to search for the first circuit design parameter set among all PVT cases, some PVT case candidate groups are eliminated. These elimination criteria may be defined in advance, and as an example, there may be PVT cases where the uncertainty index calculated by the second operation processing unit (130) is much lower than a predetermined threshold value, indicating high prediction reliability; PVT cases where the predicted value of the circuit operation characteristic output by the first operation processing unit (120) is in an area that sufficiently satisfies the target specifications; and PVT cases that have been confirmed to be stable in previous iteration processes. The third operation processing unit (140) may exclude some PVT cases from the search PVT case candidate group according to the above elimination criteria.

[0074] Conversely, PVT cases that serve as candidates for the search PVT case group may include PVT cases where the uncertainty index is much higher than a predetermined threshold and thus the prediction reliability is low, or PVT cases where the circuit operation characteristic prediction value output from the first computational processing unit (120) is near the target specification boundary and is judged to be in a risk area, PVT cases that were near the worst PVT case candidate group in the past, or PVT cases where the sensitivity is greater than a predetermined threshold due to PDK / toplug characteristics.

[0075] The third computational processing unit (140) can apply a certain standard (e.g., uncertainty index) to the first PVT case candidate group to be searched, which is partially eliminated based on the elimination standard, so that some of the first PVT case candidate group can be evaluated and verified in the Neural Simulator, and the rest can be evaluated and verified in the actual circuit simulator (150). In this way, the first PVT case candidate group can also be classified into two groups and evaluated and verified in different ways. The PVT cases classified into these two groups can be evaluated and verified simultaneously and / or in parallel in the Neural Simulator and the actual circuit simulator (150).

[0076] This parallel evaluation and verification has various advantages, such as improving speed by shortening the overall processing time by rapidly processing low-uncertainty cases using only the Neural Simulator, ensuring accuracy by preventing error accumulation through correction of high-uncertainty PVT cases using analog simulation, optimizing hardware resources by concentrating high-cost simulations only on necessary cases, and ensuring search stability in the worst-case scenario by integrating parallel execution results to determine whether target specifications are satisfied under the most unfavorable conditions.

[0077] In this way, the first computation processing unit (120) can apply a determined first circuit design parameter set to each ensemble model for first PVT cases among the first PVT case candidate group to be searched, where the uncertainty index is below a predetermined threshold, and output a predicted value of the circuit operation characteristics for the first PVT case (S420). Here, the first PVT case includes one or more PVT cases.

[0078] The actual circuit simulator (150) can output / calculate circuit operation characteristic values ​​for the second PVT case using a determined first circuit design parameter set for the second PVT case among the first PVT case candidates to be explored, for the second PVT case in which the uncertainty index exceeds a predetermined threshold (S420). Here, the second PVT case includes one or more PVT cases.

[0079] The second operation processing unit (130) can determine the worst PVT case that exhibits the most unfavorable performance based on the predicted value of the circuit operation characteristic for the first PVT case and the value of the circuit operation characteristic for the second case (S430). Then, the second operation processing unit (130) determines whether the value of the circuit operation characteristic in the determined worst PVT case satisfies the target specification (S440).

[0080] FIG. 5 is a flowchart showing the process for determining an optimal circuit design parameter set following the process of FIG. 4 in the circuit simulation method according to the present invention.

[0081] Referring to FIG. 5, if it is determined that the circuit operation characteristic value in the worst PVT case satisfies the target specification, the third operation processing unit (140) can determine the determined first circuit design parameter set as the optimal circuit design parameter set (S510).

[0082] However, conversely, if it is determined that the circuit operation characteristic value in the worst PVT case does not satisfy the target specifications, the third computation processing unit (140) applies a penalty to the output first circuit design parameter set or grants a low reward (S520). In this way, the third computation processing unit (140) can determine a new circuit design parameter as an alternative by applying it to an optimization policy-based artificial neural network policy model in a manner that grants a penalty or a low reward (S530). Here, this new circuit design parameter set is referred to as the second circuit design parameter set. Then, the third computation processing unit (140) can transmit the determined second circuit design parameter set to the Neural Simulator (S540).

[0083] FIG. 6 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 5 in the circuit simulation method according to the present invention.

[0084] Referring to FIGS. 2 and FIGS. 6, the first computational processing unit (120) applies the second circuit design parameter set to each of the learned ensemble models and outputs a predicted value of the circuit operation characteristic according to each PVT case (S610). The second computational processing unit (130) can output or calculate an uncertainty index related to the deviation between ensemble models regarding the predicted value of the circuit operation characteristic for each ensemble model for the second circuit design parameter set (S520). Additionally, the second computational processing unit (130) can output or calculate the average value of the predicted values ​​of the circuit operation characteristics of the ensemble models for the second circuit design parameter set (S620).

[0085] The third computation processing unit (140) can determine the third circuit design parameter set by applying the average value of each circuit characteristic prediction value for the second circuit design parameter set, the newly calculated uncertainty index, PDK, and target specification to a predetermined optimization policy-based artificial neural network policy model (S630). Additionally, the third computation processing unit (140) can redetermine a group of PVT case candidates corresponding to the determined third circuit design parameter set or to be searched for the third circuit design parameter set (S640). At this time, the group of PVT case candidates to be searched that is redetermine is referred to as the second PVT case candidate group.

[0086] FIG. 7 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 6 in the circuit simulation method according to the present invention.

[0087] Referring to FIGS. 2 and FIGS. 7, the second computation processing unit (130) can separate the PVT cases into two groups based on the uncertainty index for the third circuit design parameter set among the second PVT case candidates to be searched, control the first group of PVT cases (here, the third PVT case) to perform PVT evaluation verification in the Neural Simulator, and control the second group of PVT cases (here, the fourth PVT case) to perform PVT evaluation verification in the actual circuit simulator (150).

[0088] The first computation processing unit (120) can apply the determined third circuit design parameter set to each ensemble model for third PVT cases among the second PVT case candidate group to be searched, where the uncertainty index for the third circuit design parameter set is below a predetermined threshold, and output a predicted value of the circuit operation characteristic for the third PVT case (S710).

[0089] The actual circuit simulator (150) can output / calculate circuit operation characteristic values ​​for the fourth PVT case by applying the determined third circuit design parameter set to the fourth PVT case among the second PVT case candidate group to be explored, in which the uncertainty index for the third circuit design parameter set exceeds a predetermined threshold (S720). Here, steps S710 and S720 are performed simultaneously and / or in parallel as described above.

[0090] The second operation processing unit (130) can determine the worst PVT case for the third circuit design parameter set based on the predicted value of the circuit operation characteristic for the output third PVT case and the value of the circuit operation characteristic for the output fourth case (S730). Additionally, the second operation processing unit (130) can determine whether the value of the circuit operation characteristic in the worst PVT case for the third circuit design parameter set satisfies the target specification (S740).

[0091] FIG. 8 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 7 in the circuit simulation method according to the present invention.

[0092] Referring to FIGS. 2, FIGS. 7 and FIGS. 8, if the second processing unit (130) determines that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification, the determined third circuit design parameter set can be determined as the optimal circuit design parameter set (S810). The optimal circuit design parameter set determined in this way can be finally evaluated and verified through an actual circuit simulator (150).

[0093] If the third processing unit (140) determines that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set does not satisfy the target specifications, it applies a penalty to the third circuit design parameter set or grants a low reward (S820). The third processing unit (140) reinforces the optimization policy-based artificial neural network policy model by applying a penalty or granting a low reward to the third circuit design parameter set. After applying the penalty or granting a low reward to the third circuit design parameter set and applying it to the optimization policy-based artificial neural network policy model, the third processing unit (140) needs to determine a new circuit design parameter set as an alternative (S830). In the description related to FIG. 8, the new circuit design parameter set is referred to as the fourth circuit design parameter set. The third processing unit (140) transmits the fourth circuit design parameter set to the Neural Simulator. The Neural Simulator then performs PVT case evaluation and verification on the received fourth circuit design parameter set.

[0094] FIG. 9 is a flowchart showing the process for searching for an optimal circuit design parameter set following the process of FIG. 8 in the circuit simulation method according to the present invention.

[0095] Referring to FIGS. 2, 8, and 9, the first computational processing unit (120) can recalculate / re-output circuit characteristic prediction values ​​by applying the fourth circuit design parameter set to each ensemble model (S910). The second computational processing unit (130) can recalculate the uncertainty index between ensemble models for the circuit characteristic prediction values ​​re-output for each ensemble model (S820). Additionally, the second computational processing unit (130) can calculate the average value for the circuit characteristic prediction values ​​re-output from the ensemble models (S920).

[0096] The third computation processing unit (140) can determine the fifth circuit design parameter set by applying the recalculated values ​​to a predetermined optimization policy-based artificial neural network policy model (S930). The third computation processing unit (140) can determine a new PVT case candidate group to search for the fifth circuit design parameter set (S940). Here, the new PVT case candidate group is referred to as the third PVT case candidate group.

[0097] Similar to what is illustrated in FIG. 7, in FIG. 9, the second computational processing unit (130) can separate the PVT cases into two groups based on the uncertainty index for the fifth circuit design parameter set among the third PVT case candidates to be searched, and control the first group of PVT cases (here, the fifth PVT case) to perform PVT evaluation verification in the Neural Simulator, and control the second group of PVT cases (here, the sixth PVT case) to perform PVT evaluation verification in the actual circuit simulator (150).

[0098] The first computational processing unit (120) can apply the determined fifth circuit design parameter set to each ensemble model for the fifth PVT case among the third PVT case candidate group to be searched, where the uncertainty index for the fifth circuit design parameter set is below a predetermined threshold, and output a predicted value of the circuit operation characteristics for the fifth PVT case.

[0099] The actual circuit simulator (150) can perform a simulation for a 6th PVT case among the 3rd PVT case candidates to be explored, in which the uncertainty index for the 5th circuit design parameter set is greater than a predetermined threshold, and output a circuit operation characteristic value.

[0100] In this way, the second computational processing unit (130) can control the process of determining the worst PVT case for the fifth circuit design parameter set and comparing it with the target specification to be performed repeatedly until an optimal circuit design parameter set is calculated. That is, the second computational processing unit (130) can control the process shown in FIGS. 4 to 9 to be performed repeatedly until an optimized circuit design parameter set is searched for / determined as shown in FIGS. 5 and FIGS. 8.

[0101] The worst PVT case described above is not a predefined PVT combination, but rather, for each actual design and parameter combination, which PVT condition will have the most adverse effect will vary. During the search process, the first operation processing unit (120) and the third operation processing unit (140) cooperate to allow the second operation processing unit (130) to dynamically determine the worst PVT case for the current circuit design parameter set.

[0102] In the present invention, the learning / search method of the optimization policy-based artificial neural network model can be further generalized to include a probabilistic optimization (Bayesian optimization) method in addition to using a reinforcement learning agent (RL Agent). That is, in the present invention, in a situation where the cost of calling / executing the actual circuit simulator (150) is very high, the structure refers to applying a Bayesian Optimization Loop to efficiently select the most promising set of circuit parameters and PVT cases while considering uncertainty. In order to balance search and utilization in Bayesian optimization, the acquisition function is, for example,

[0103] Uncertainty-aware sampling can be performed using Expected Improvement and Upper Confidence Bound (UCB). Expected Improvement (EI) refers to selecting points where the probability of improvement over the current optimal value and the expected range are high, while UCB refers to selecting points with good predictions or high uncertainty by combining the mean and uncertainty terms. Uncertainty-aware sampling means selecting exploration points (samples) by utilizing uncertainty metrics calculated by the Neural Simulator ensemble. In other words, it implies that the Policy model is designed to appropriately explore areas of high uncertainty rather than simply sampling based on average performance. Consequently, the reliability of the model can be rapidly improved by exploring areas where current confidence is lacking. Furthermore, this can be highly efficient when the simulator budget is extremely limited.

[0104] According to the present invention described above, it is possible to efficiently reflect the impact of process variation (PVT), such as process, voltage, and temperature, and local variation at the device level on circuit characteristics, while also having the effect of rapidly identifying the worst-case PVT without high-cost simulation of the entire PVT space.

[0105] In addition, the present invention embeds circuit topology and device information through GNN-based circuit characteristic vector output, thereby enabling the prediction of circuit performance while preserving the circuit structural context, and thus can secure high generalization performance even for complex analog circuits.

[0106] In addition, by rapidly predicting circuit operation characteristics for each PVT case using multiple learned ensemble models / Neural Simulator ensembles, the number of calls / executions of the Real Simulator can be significantly reduced.

[0107] The uncertainty index calculated using the prediction deviation between ensemble models quantifies the reliability of each PVT case, and thus, the entire simulation resources can be efficiently allocated by branching the high reliability areas to be verified by multiple ensemble models / Neural Simulator ensembles and the low reliability areas to be verified by the actual circuit simulator (150).

[0108] Furthermore, the optimization policy-based artificial neural network model according to the present invention dynamically determines a group of candidate PVT cases to be explored based on uncertainty indicators and predicted circuit characteristic values, and can generate an efficient search path even under a limited simulator budget through reinforcement learning or a Bayesian optimization loop. As a result, an optimal set of circuit design parameters satisfying target specifications can be rapidly derived even in the worst PVT cases, and accuracy can be improved by updating uncertainty indicators during the iterative search process.

[0109] Accordingly, the circuit simulation device and method according to the present invention have the effects of (1) dramatically improving the search efficiency of the entire PVT space, (2) significantly reducing the simulator computation budget and time costs, (3) enabling uncertainty-based dynamic resource allocation and automatic worst-case search, and (4) enabling highly reliable circuit performance prediction through a Topology-aware Neural Simulator structure. Consequently, compared to the existing heuristic-based manual worst-case search method, the present invention provides a circuit simulation platform capable of simultaneously securing accuracy and computational efficiency through an AI-based automation and uncertainty-aware structure.

[0110] The processing device in the present invention may perform an operating system (OS) and one or more software applications executed on said operating system. Additionally, the processing device may access, store, manipulate, process, and generate data in response to the execution of software. For ease of understanding, the processing device may be described as being used as a single unit, but those skilled in the art will understand that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, the processing device may include multiple processors or one processor and one controller. In addition, other processing configurations, such as parallel processors, are also possible.

[0111] Software may include computer programs, code, instructions, or a combination of one or more of these, and may configure a processing unit to operate as desired or command the processing unit independently or collectively. Software and / or data may be permanently or temporarily embodied in any type of machine, component, physical device, virtual equipment, computer storage medium or device, or transmitted signal wave so as to be interpreted by the processing unit or to provide instructions or data to the processing unit. Software may be distributed over networked computing devices and may be stored or executed in a distributed manner. Software and data may be stored on one or more computer-readable recording media.

[0112] The method according to the embodiment may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may include program instructions, data files, data structures, etc., either individually or in combination. The program instructions recorded on the medium may be those specifically designed and configured for the embodiment, or they may be those known and available to those skilled in the art of computer software.

[0113] Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tapes; optical recording media such as CD-ROMs and DVDs; magneto-optical media such as floptical disks; and hardware devices specifically configured to store and execute program instructions, such as ROM, RAM, and flash memory. Examples of program instructions include machine code, such as that generated by a compiler, as well as high-level language code that can be executed by a computer using an interpreter, etc. The hardware devices described above may be configured to operate as one or more software modules to perform the operation of the embodiments, and vice versa.

[0114] The embodiments described above are combinations of the components and features of the present invention in a specific form. Each component or feature should be considered optional unless otherwise explicitly stated. Each component or feature may be implemented in a form not combined with other components or features.

[0115] Additionally, it is possible to construct embodiments of the present invention by combining some components and / or features. The order of operations described in the embodiments of the present invention may be changed. Some components or features of one embodiment may be included in another embodiment, or may be replaced with corresponding components or features of another embodiment. It is obvious that embodiments may be constructed by combining claims that are not explicitly related in the claims, or that new claims may be included by amendment after filing.

[0116] It is obvious to those skilled in the art that the present invention may be embodied in other specific forms without departing from the essential features of the invention. Accordingly, the foregoing detailed description should not be interpreted restrictively in all respects but should be considered exemplary. The scope of the invention shall be determined by a reasonable interpretation of the appended claims, and all modifications within the equivalent scope of the invention are included within the scope of the invention.

Claims

Claim 1 A circuit simulation method reflecting PVT and random variation at the device level of a circuit simulation device, performed by one or more computational processing units, wherein the one or more computational processing units output a circuit characteristic vector in which the circuit topology and device information are expressed as context by applying a netlist and a Process Design Kit (PDK) to a predetermined Graph Neural Network (GNN) model; the one or more computational processing units output a predicted value of circuit operation characteristics for each PVT case by applying the outputted circuit characteristic vector, Process-Voltage-Temperature (PVT) cases, and an initial circuit design parameter set to each of the learned ensemble models; and the one or more computational processing units calculate an uncertainty index between the ensemble models for each PVT case based on the deviation of the predicted value of circuit operation characteristics between the ensemble models. A circuit simulation method reflecting PVT and device-unit random variation, comprising the step of one or more computational processing units applying the average value of circuit characteristic prediction values ​​between the ensemble models for each PVT case, the uncertainty index between the ensemble models for each PVT case, the PDK, and the target specification to a predetermined optimization policy-based artificial neural network policy model to determine a first PVT case candidate group to be evaluated for the first circuit design parameter set among the first circuit design parameter set and all PVT cases. Claim 2 In claim 1, the one or more computational processing units apply the determined first circuit design parameter set to each ensemble model for a first PVT case among the first PVT case candidate group in which the uncertainty index is below a predetermined threshold, and output a predicted value of the circuit operation characteristic for the first PVT case; the one or more computational processing units apply the determined first circuit design parameter set to an actual circuit simulator for a second PVT case among the first PVT case candidate group in which the uncertainty index exceeds the predetermined threshold, and output a circuit operation characteristic value for the second PVT case; the one or more computational processing units determine a Worst PVT Case exhibiting the most unfavorable performance based on the output predicted value of the circuit operation characteristic for the first PVT case and the output circuit operation characteristic value for the second case. A circuit simulation method reflecting PVT and device-unit random variation, wherein the above one or more computational processing units further include a step of determining whether the circuit operation characteristic value in the worst PVT case satisfies the target specification. Claim 3 A circuit simulation method reflecting PVT and device-unit random variation, wherein, in paragraph 2, the above one or more computational processing units further include the step of determining the determined first circuit design parameter set as the optimal circuit design parameter set when it is determined that the circuit operation characteristic value in the worst PVT case satisfies the target specification. Claim 4 A circuit simulation method reflecting PVT and device-unit random variation, wherein, in the second paragraph, if the one or more computational processing units determine that the circuit operation characteristic value in the worst PVT case does not satisfy the target specification, the method further includes the step of determining a second circuit design parameter set by applying it to the optimization policy-based artificial neural network policy model in a manner such as applying a penalty to the output first circuit design parameter set or granting a low reward. Claim 5 A circuit simulation method reflecting PVT and device-unit random variation, comprising: a step in which one or more computational processing units output a predicted value of circuit operation characteristics for each PVT case by applying the second circuit design parameter set to each of the learned ensemble models; a step in which one or more computational processing units output an uncertainty index between the ensemble models for each PVT case based on the deviation of the predicted value of circuit operation characteristics between the ensemble models for the second circuit design parameter set; and a step in which one or more computational processing units determine a candidate group of second PVT cases to be evaluated for the third circuit design parameter set among the third circuit design parameter set and the entire PVT case by applying the average value of the predicted value of circuit characteristics between the ensemble models for each PVT case for the second circuit design parameter set, the uncertainty index between the ensemble models for each PVT case, the PDK, and the target specification to the predetermined optimization policy-based artificial neural network policy model. Claim 6 In claim 5, the one or more computational processing units apply the determined third circuit design parameter set to each ensemble model for a third PVT case among the second PVT case candidate group in which the uncertainty index for the third circuit design parameter set is below the predetermined threshold, and output a predicted value for the circuit operation characteristic of the third PVT case; the one or more computational processing units apply the determined third circuit design parameter set to the actual circuit simulator for a fourth PVT case among the second PVT case candidate group in which the uncertainty index for the third circuit design parameter set exceeds the predetermined threshold, and output a predicted value for the circuit operation characteristic of the fourth PVT case; the one or more computational processing units determine a worst PVT case for the third circuit design parameter set based on the predicted value for the circuit operation characteristic of the third PVT case and the predicted value for the fourth case. A circuit simulation method reflecting PVT and device-unit random variation, wherein the above one or more computational processing units further include the step of determining whether the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification. Claim 7 A circuit simulation method reflecting PVT and element-unit random variation, wherein, in claim 6, the above one or more computational processing units further include the step of determining the determined third circuit design parameter set as the optimal circuit design parameter set when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification. Claim 8 In claim 6, if the one or more computational processing units determine that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set does not satisfy the target specification, they apply a penalty or grant a low reward to the third circuit design parameter set and then apply it to the predetermined optimization policy-based artificial neural network policy model to determine the fourth circuit design parameter set; and if the one or more computational processing units determine that the circuit characteristic prediction value for each PVT case and the uncertainty index between the ensemble model for each PVT case are recalculated by applying the fourth circuit design parameter set to each ensemble model, the method comprises: a step in which the one or more computational processing units recalculate the uncertainty index between the circuit characteristic prediction value for each PVT case and the ensemble model for each PVT case by applying the fourth circuit design parameter set to each ensemble model. A circuit simulation method reflecting PVT and device-unit random variation, comprising the step of one or more computational processing units applying the recalculated values ​​to a predetermined optimization policy-based artificial neural network policy model to calculate a fifth circuit design parameter set and a third PVT case candidate group to be evaluated for the fifth circuit design parameter set, wherein the one or more computational processing units apply each PVT case included in the fifth circuit design parameter set, the circuit characteristic vector, and the third PVT case candidate group to each ensemble model to output a circuit operation characteristic prediction value and output a circuit operation characteristic value through the actual circuit simulator, thereby repeatedly performing the process of determining the worst PVT case for the fifth circuit design parameter set and comparing it with the target specification until an optimal circuit design parameter set is calculated. Claim 9 A circuit simulation device reflecting PVT and random variation at the device level, comprising: a graph neural network processing unit that applies a netlist and a Process Design Kit (PDK) to a predetermined graph neural network (GNN) model to output a circuit characteristic vector in which the circuit topology and device information are expressed as context; a first computational processing unit that outputs predicted values ​​of circuit operation characteristics for each PVT case by applying the outputted circuit characteristic vector, Process-Voltage-Temperature (PVT) cases, and an initial circuit design parameter set to each of the learned ensemble models; and a second computational processing unit that calculates an uncertainty index between the ensemble models for each PVT case based on the deviation of the predicted values ​​of circuit operation characteristics between the ensemble models. A circuit simulation device comprising a third computational processing unit that determines a group of first PVT case candidates to be evaluated for the first circuit design parameter set among the first circuit design parameter set and all PVT cases by applying the average value of the circuit characteristic prediction values ​​between the ensemble models for each PVT case, the uncertainty index between the ensemble models for each PVT case, the PDK, and the target specification to a predetermined optimization policy-based artificial neural network policy model. Claim 10 In claim 9, the circuit simulation device further comprises an actual circuit simulator that outputs a circuit operation characteristic value for a second PVT case using the determined first circuit design parameter set for a second PVT case in which the uncertainty index among the first PVT case candidates exceeds a predetermined threshold, wherein the first computational processing unit outputs a predicted value for a circuit operation characteristic for a first PVT case by applying the determined first circuit design parameter set to each ensemble model for a first PVT case in which the uncertainty index among the first PVT case candidates is less than or equal to the predetermined threshold, and the second computational processing unit determines a worst PVT case exhibiting the most unfavorable performance based on the predicted value for a circuit operation characteristic for the first PVT case and the circuit operation characteristic value for the second case output, and determines whether the circuit operation characteristic value in the worst PVT case satisfies the target specification. Claim 11 A circuit simulation device according to claim 10, wherein if it is determined that the circuit operation characteristic value in the worst PVT case satisfies the target specification, the third computational processing unit determines the determined first circuit design parameter set as the optimal circuit design parameter set. Claim 12 A circuit simulation device according to claim 10, wherein the third processing unit determines a second circuit design parameter set by applying it to the optimization policy-based artificial neural network policy model in a manner that applies a penalty to the output first circuit design parameter set or grants a low reward when it is determined that the circuit operation characteristic value in the worst PVT case does not satisfy the target specification. Claim 13 A circuit simulation device according to claim 12, wherein the first computational processing unit outputs a predicted value of circuit operation characteristics for each PVT case by applying the second circuit design parameter set to each of the learned ensemble models, the second computational processing unit outputs an uncertainty index related to the ensemble models for each PVT case based on the deviation of the predicted value of circuit operation characteristics between the ensemble models for the second circuit design parameter set, and the third computational processing unit determines a candidate group of second PVT cases to be evaluated for the third circuit design parameter set among the third circuit design parameter set and the entire PVT case by applying the average value of the predicted value of circuit characteristics between the ensemble models for each PVT case for the second circuit design parameter set, the uncertainty index between the ensemble models for each PVT case, the PDK, and the target specification to the predetermined optimization policy-based artificial neural network policy model. Claim 14 In claim 13, the first computational processing unit applies the determined third circuit design parameter set to each ensemble model for a third PVT case among the second PVT case candidate group in which the uncertainty index for the third circuit design parameter set is below the predetermined threshold and outputs a predicted value of the circuit operation characteristic for the third PVT case, and the actual circuit simulator applies the determined third circuit design parameter set to a fourth PVT case among the second PVT case candidate group in which the uncertainty index for the third circuit design parameter set exceeds the predetermined threshold and outputs a circuit operation characteristic value for the fourth PVT case, and the second computational processing unit determines a worst PVT case for the third circuit design parameter set based on the output predicted value of the circuit operation characteristic for the third PVT case and the output circuit operation characteristic value for the fourth case, and determines whether the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification, circuit simulation device. Claim 15 A circuit simulation device according to claim 14, wherein the second operation processing unit determines the determined third circuit design parameter set as the optimal circuit design parameter set when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set satisfies the target specification. Claim 16 In claim 14, the third computational processing unit determines the fourth circuit design parameter set after applying a penalty or granting a low reward to the third circuit design parameter set and applying it to the predetermined optimization policy-based artificial neural network policy model when it is determined that the circuit operation characteristic value in the worst PVT case for the third circuit design parameter set does not satisfy the target specification; the first computational processing unit and the second computational processing unit each recalculate the uncertainty index between the circuit characteristic prediction value for each PVT case and the ensemble model for each PVT case by applying the fourth circuit design parameter set to each ensemble model; the third computational processing unit calculates the fifth circuit design parameter set and the third PVT case candidate group to be evaluated for the fifth circuit design parameter set by applying the recalculated values ​​to the predetermined optimization policy-based artificial neural network policy model, wherein the second computational processing unit [determines] each PVT case included in the fifth circuit design parameter set, the circuit characteristic vector, and the third PVT case candidate group as each A circuit simulation device that controls the output of predicted values ​​for circuit operation characteristics by applying them to an ensemble model, and controls the actual circuit simulator to output circuit operation characteristic values ​​based on each PVT case included in the fifth circuit design parameter set, the circuit characteristic vector, and the third PVT case candidate group, thereby controlling the process of determining the worst PVT case for the fifth circuit design parameter set and comparing it with the target specification to be performed repeatedly until an optimal circuit design parameter set is calculated. Claim 17 A computer-readable recording medium having a program for executing a method described in any one of paragraphs 1 through 8 on a computer.

Images