Methods for determining the suitability of Czochralski growth conditions for producing substrates for epitaxy

Abstract

Methods for determining the suitability of Czochralski growth conditions for producing silicon substrates for epitaxy. These methods involve the step of evaluating substrates sliced ​​from ingots grown under different growth conditions (e.g., impurity profiles) by imaging the wafer by infrared depolarization. Infrared depolarization parameters are generated for each epitaxial wafer. The parameters can be compared to determine which growth conditions are suitable for producing substrates for epitaxial and / or epi-post-thermal treatments.

Description

Technology Field

[0001] <Cross-reference to related applications>

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 213,460 filed June 22, 2021, which is incorporated herein by reference in its entirety.

[0003] <Field of the present disclosure>

[0004] The field of the present disclosure relates to methods for determining the suitability of Czochralski growth conditions (e.g., molten impurity profile) for producing silicon substrates for epitaxy, in particular, for determining the slip resistance of such substrates during epitaxy and post-epitaxy thermal treatment. Background Technology

[0005] Slips are often generated during epitaxial wafer production and post-epi thermal cycles. Slip resistance has become an increasingly important capability in advanced integrated circuit manufacturing technology. Conventional methods for detecting slip resistance are destructive processes in which wafers are not preserved for further use. For example, wafers can be stressed in an annealing furnace, and wafer warping can be measured as an indicator of wafer strength. Additionally, conventional processes do not make it possible to evaluate different epitaxial substrates for slip resistance under different epitaxial and post-epi treatments.

[0006] Substrates for use in epitaxial wafer production can be grown by the so-called Czochralski process, in which a silicon seed crystal comes into contact with a silicon melt. The silicon seed crystal and the single-crystal silicon ingot attached thereto are withdrawn from the melt. There is a need for reliable and non-destructive processes that make it possible to quantitatively evaluate the Czochralski process (e.g., different impurity levels in the melt) for the slip resistance of the resulting substrates under various epitaxial processes and heat treatments.

[0007] This section is intended to introduce to the reader various aspects of the art that may be related to the various aspects of the present disclosure described and / or claimed below. It is believed that this discussion will be helpful in providing background information to facilitate a better understanding of the various aspects of the present disclosure to the reader. Accordingly, it should be understood that these descriptions should be read in this context, rather than as an acknowledgment of prior art.

[0008] One aspect of the present disclosure relates to a method for determining the suitability of Czochralski growth conditions for producing silicon substrates for epitaxy. A crucible containing a silicon filler is heated to allow a silicon melt to form in the crucible. A silicon seed crystal is brought into contact with the silicon melt. The silicon melt has a first impurity profile. A silicon seed crystal is withdrawn to grow a first single-crystal silicon ingot. A first plurality of silicon substrates are sliced ​​from the first single-crystal silicon ingot. The front surface of a silicon substrate among the first plurality of silicon substrates is brought into contact with a silicon-containing gas. The silicon-containing gas is decomposed to form an epitaxial silicon layer on the silicon substrate to form a first epitaxial wafer. The first epitaxial wafer is imaged by infrared depolarization to determine a first infrared depolarization parameter. A crucible containing a silicon filler is heated to allow a second silicon melt to form in the crucible. A silicon seed crystal is brought into contact with a second silicon melt. The second silicon melt has a second impurity profile. The first impurity profile of the first melt is different from the second impurity profile of the second melt. The silicon seed crystal is withdrawn to grow a second single-crystal silicon ingot. A second plurality of silicon substrates are sliced ​​from the second single-crystal silicon ingot. The front surface of a silicon substrate among the second plurality of silicon substrates is brought into contact with a silicon-containing gas. The silicon-containing gas decomposes to form an epitaxial silicon layer on the silicon substrate to form a second epitaxial wafer. The second epitaxial wafer is imaged by infrared depolarization to determine a second infrared depolarization parameter. Based on the first and second infrared depolarization parameters, the suitability of the first impurity profile and the second impurity profile for producing substrates for epitaxy is determined.

[0009] Another aspect of the present disclosure relates to a method for determining the suitability of a silicon substrate for epitaxy. A silicon substrate is loaded onto a susceptor disposed within a processing reactor. The front surface of the silicon substrate is brought into contact with a silicon-containing gas. The silicon-containing gas decomposes to form a first epitaxial silicon layer on the silicon substrate. The front surface of the first epitaxial silicon layer is brought into contact with the silicon-containing gas. The silicon-containing gas decomposes to form a second epitaxial silicon layer on the first epitaxial silicon layer to form an epitaxial wafer. The epitaxial wafer is imaged by infrared depolarization to determine infrared depolarization.

[0010] Another aspect of the present disclosure relates to a method for determining the suitability of a silicon substrate for epitaxy. In a first heat treatment step, the substrate is heat-treated. In a second heat treatment step, the substrate is heat-treated. After the first and second heat treatment steps, the substrate is imaged by infrared depolarization to determine infrared depolarization parameters.

[0011] Various improvements to the features noted in relation to the aforementioned embodiments of the present disclosure exist. Likewise, additional features may also be incorporated into the aforementioned embodiments of the present disclosure. These improvements and additional features may exist individually or in any combination. For example, various features discussed below in relation to any of the exemplified embodiments of the present disclosure may be incorporated into any of the embodiments described above of the present disclosure, either alone or in any combination. Brief explanation of the drawing

[0012] Figure 1 is a cross-section of an ingot puller device before silicon ingot growth. Figure 2 is a cross-section of the ingot puller device of Figure 1 during silicon ingot growth. Figure 3 is a cross-sectional view of a semiconductor substrate for producing an epitaxial wafer. Figure 4 is a cross-sectional view of an epitaxial wafer. FIG. 5 is a flowchart of an example of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 6 is a flowchart of another embodiment of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 7 is a flowchart of another embodiment of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 8 is a flowchart of an additional embodiment of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 9 is a flowchart of another additional embodiment of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 10 is a flowchart of another exemplary embodiment of a method for determining the suitability of a silicon substrate for epitaxy. FIG. 11 is a flowchart of another embodiment of a method for determining the suitability of a silicon substrate for epitaxy. Figure 12 is a graph of nitrogen concentration in a single-crystal silicon ingot for various starting nitrogen concentrations; Figure 13 is a graph of various oxygen concentrations of oxygen profiles of various ingots used to produce substrates for use in epitaxial layers. FIG. 14 is a perspective view of a processing reactor for removing the reactor cover and depositing an epitaxial layer on a substrate. FIG. 15 is a schematic diagram of a device for imaging epitaxial wafers by infrared depolarization. FIG. 16 is a top view of an epitaxial wafer showing an annular edge ring imaged by infrared depolarization. FIG. 17 is a variability plot illustrating the depolarization of epitaxial wafers having substrates sliced ​​from wafers grown from melts having different nitrogen and oxygen concentrations after the growth of two epitaxial layers. FIG. 18 is another variability plot illustrating the depolarization of epitaxial wafers having substrates sliced ​​from wafers grown from melts having different nitrogen and oxygen concentrations after the growth of two epitaxial layers. FIG. 19 is a variability plot illustrating the depolarization of substrates sliced ​​from wafers grown from melts having different impurity profiles after two heat treatments. Corresponding reference characters indicate corresponding parts throughout the drawings. Specific details for implementing the invention

[0013] The provision of the present disclosure relates to methods for determining the suitability of silicon substrates for epitaxy, such as by determining the slip resistance of the substrate during epitaxial layer deposition and / or epi-post-thermal treatments. In some embodiments, the composition of the melt in which the silicon ingot is grown to produce the substrate of the epitaxial wafer is varied, and the resulting epitaxial wafers are imaged by infrared depolarization. Imaging results in the production of one or more infrared depolarization parameters for each imaged wafer. The parameters may be used to determine the suitability (e.g., slip resistance) of the silicon substrate for epitaxy (and the impurity profile of the melt in which it is grown).

[0014] The methods of the present disclosure may generally be performed in any ingot puller apparatus configured to pull a single-crystal silicon ingot. An exemplary ingot puller apparatus (or more simply an "ingot puller") is generally denoted as "101" in FIG. 1. The ingot puller apparatus (101) comprises a crucible (102) for holding a melt (104) of a semiconductor or solar-grade material, such as silicon, supported by a susceptor (106). The ingot puller apparatus (101) comprises a crystal puller housing (108) defining a growth chamber (152) for pulling a silicon ingot (113) ( FIG. 2) from the melt (104) along a pulling axis (A).

[0015] The crucible (102) includes a floor (129) and a side wall (131) extending upward from the floor (129). The side wall (131) is generally vertical. The floor (129) includes a curved portion of the crucible (102) extending below the side wall (131). Inside the crucible (102) is a silicon melt (104) having a melt surface (111) (i.e., a melt-ingot interface).

[0016] In some embodiments, the crucible (102) is laminated. For example, the crucible (102) may consist of a quartz base layer and a synthetic quartz liner disposed on the quartz base layer.

[0017] The susceptor (106) is supported by the shaft (105). The susceptor (106), crucible (102), shaft (105) and ingot (113) (Fig. 2) have a common longitudinal axis (A) or "pull axis" (A).

[0018] A pulling mechanism (114) is provided within an ingot puller device (101) to grow and pull an ingot (113) from a melt (104). The pulling mechanism (114) comprises a pulling cable (118), a seed holder or chuck (120) coupled to one end of the pulling cable (118), and a silicon seed crystal (122) coupled to the seed holder or chuck (120) to initiate crystal growth. One end of the pulling cable (118) is connected to a pulley (not shown) or a drum (not shown), or any other suitable type of lifting mechanism, for example, a shaft, and the other end is connected to the chuck (120) holding the seed crystal (122). In operation, the seed crystal (122) is lowered to come into contact with the melt (104). The pulling mechanism (114) is operated to cause the seed crystal (122) to rise. This allows the single crystal ingot (113) (Fig. 2) to be drawn out of the molten material (104).

[0019] During heating and crystal pulling, a crucible drive unit (107) (e.g., a motor) rotates the crucible (102) and the susceptor (106). A lift mechanism (112) raises and lowers the crucible (102) along the pulling axis (A) during the growth process. For example, the crucible (102) may be at a lowest position (near the bottom heater (126)) where the initial fill of solid-phase polycrystalline silicon previously added to the crucible (102) is melted. Crystal growth is initiated by bringing the melt (104) into contact with the seed crystal (122) and lifting the seed crystal (122) by the pulling mechanism (114). As the ingot grows, the silicon melt (104) is consumed and the height of the melt in the crucible (102) decreases. The crucible (102) and susceptor (106) can be raised to maintain the molten surface (111) at the same position relative to or near the ingot fuller device (101) (Fig. 2).

[0020] A crystal drive unit (not shown) can also rotate the pulling cable (118) and the ingot (113) (Fig. 2) in a direction opposite to (e.g., reverse rotation) the direction in which the crucible drive unit (107) rotates the crucible (102). In embodiments using iso-rotation, the crystal drive unit can rotate the pulling cable (118) in the same direction in which the crucible drive unit (107) rotates the crucible (102). Additionally, the crystal drive unit raises and lowers the ingot (113) relative to the molten surface (111) as desired during the growth process.

[0021] The ingot puller device (101) may include an inert gas system for introducing and withdrawing an inert gas, such as argon, from a growth chamber (152). The ingot puller device (101) may also include a dopant supply system (not shown) for introducing a dopant into the melt (104).

[0022] According to the Czochralski single-crystal growth process, a certain amount of polycrystalline silicon, or polysilicon, is filled into a crucible (102). The initial semiconductor or solar-grade material introduced into the crucible is melted by heat provided from one or more heating elements to form a silicon melt in the crucible. The ingot puller device (101) includes a bottom insulation (115) and side insulation (124) to retain heat in the ingot puller device. In the illustrated embodiment, the ingot puller device (101) includes a bottom heater (126) positioned below the crucible floor (129). The crucible (102) may be moved so as to be in a relatively close proximity to the bottom heater (126) to melt the polycrystalline material filled into the crucible (102).

[0023] To form an ingot, a seed crystal (122) is brought into contact with the surface (111) of the melt (104). A pulling mechanism (114) is operated to pull the seed crystal (122) from the melt (104). Referring now to FIG. 2, the ingot (113) includes a crown portion (142) that transitions outward from the seed crystal (122) and tapers so that the ingot reaches a target diameter. The ingot (113) includes a portion of the crystal with a constant diameter (145) or a cylindrical "main body" that grows by increasing the pulling speed. The main body (145) of the ingot (113) has a relatively constant diameter. The ingot (113) includes a tail or end-cone (not shown) after the main body (145) where the ingot taperes in diameter. When the diameter becomes sufficiently small, the ingot (113) is then separated from the melt (104).

[0024] The ingot puller device (101) includes a susceptor (106) surrounding a crucible (102) and a side heater (135) to maintain the temperature of the melt (104) during crystal growth. Since the crucible (102) moves up and down along the pulling axis (A), the side heater (135) is positioned radially outward with respect to the crucible sidewall (131). The side heater (135) and the bottom heater (126) may be any type of heater that allows the side heater (135) and the bottom heater (126) to operate as described herein. In some embodiments, the heaters (135, 126) are resistance heaters. The side heater (135) and the bottom heater (126) may be controlled by a control system (not shown) so that the temperature of the melt (104) is controlled throughout the entire pulling process.

[0025] The ingot puller device (101) may include a heat shield (151). The heat shield (151) may cover the ingot (113) and may be placed inside the crucible (102) during crystal growth (Fig. 2).

[0026] According to embodiments of the present disclosure, Czochralski growth conditions are selected in the first step (100) (Fig. 5) to determine the suitability of a subsequent sliced ​​substrate for use in epitaxy. For example, the impurity and / or dopant concentrations of the crucible melt may be varied to alter the properties of the resulting substrate on which the epitaxial layer is formed. For example, one or more of the nitrogen concentration, oxygen concentration, or boron concentration (or other dopant concentrations) are varied as further described below. In some embodiments, the concentration of a compound (e.g., oxygen, nitrogen, or boron) is varied during the growth of a segment of the main body (145) of the ingot (113).

[0027] In some embodiments, the nitrogen concentration varies. Nitrogen of various concentrations can be doped into the ingot. For example, and as shown in FIG. 12, nitrogen concentrations in the crystal are 1 x 10⁻⁶ 13 atoms / cm 3 Up to 1 x 10 15 atoms / cm 3It can be any suitable amount such as. Nitrogen doping in the ingot follows a separation curve, which means that the nitrogen concentration at the beginning of ingot growth and at the end of ingot growth can differ by 6 to 7 times, regardless of the starting concentration. To address these differences in nitrogen concentration, ingot growth conditions can be controlled to control oxygen concentrations differently at the beginning, middle, and / or end of crystal growth according to the nitrogen concentration differences caused by separation. Additionally, the combination of oxygen and nitrogen can be controlled according to epitaxial wafer quality and SIRD (Scanning Infrared Depolarization) measurements, such as after thermal processes and / or a number of specially designed stages of Epi that result in increased slip resistance (e.g., under specific combinations of high-temperature heat treatments while maintaining an epi stacking-defect-free structure).

[0028] As illustrated in FIG. 13, the oxygen concentration may vary (e.g., by increasing the oxygen concentration at the beginning stage of ingot growth relative to conventional methods and / or decreasing the oxygen concentration at the end stage of ingot growth relative to conventional methods). In some embodiments, the ingot has an oxygen concentration of less than 12.5 nppma.

[0029] The boron concentration of the ingot (and resulting substrates) can vary (e.g., ranging from lightly doped to heavily doped). For example, 1.0 x 10⁻⁶ 12 Up to 1.0 x 10 20 atoms / cm 3 Silicon melt can be doped with boron to produce doped silicon ingots (and sliced ​​wafers) having a boron concentration in the range.

[0030] Once the ingot (113) is grown, in the second step (200) (Fig. 5), the ingot (113) is sliced ​​into a plurality of silicon substrates (i.e., wafers) for use in preparing an epitaxial wafer (20) (Fig. 4). The substrate (1) is a single-crystal silicon wafer. Now, referring to Fig. 3, each substrate (1) has a front surface (3) and a rear surface (9).

[0031] Once the substrate (1) is sliced ​​(e.g., in the first step (100) (Fig. 5)), the substrate (1) can be processed (e.g., sliced ​​from an ingot and followed by various steps of reduction and / or smoothing of surface roughness). In the third step (300), the front surface (3) is decomposed and an epitaxial layer (25) (Fig. 4) is deposited on the front surface (3) (Fig. 3) of the substrate (1) by contacting it with a silicon-containing gas that forms an epitaxial silicon layer (25) on the substrate (1). Generally, any of the methods available to those skilled in the art for depositing a silicon epitaxial layer on a silicon substrate may be used unless otherwise noted. For example, the epitaxial layer (25) may be deposited in an exemplary processing reactor (110) as shown in Fig. 14. The reactor (110) includes a processing chamber (103) in which a single semiconductor is etched. A gas manifold (140) is used to direct an incoming gas into the processing chamber (103). The incoming process gas flows into the processing chamber (103) through the gas manifold (140) and is discharged through a gas discharge port. The reactor (110) includes a susceptor (121) placed within the processing chamber (103) to support a substrate (1). A preheating ring (127) surrounds the susceptor (121) to bring the process gases to a temperature before contacting the substrate (1). The substrate (1) is rotated to deposit an epitaxial layer evenly on the substrate (1).

[0032] Silicon can be deposited by epitaxy to any suitable thickness depending on the device application. For example, silicon can be deposited using MOCVD (metalorganic chemical vapor deposition), PVD (physical vapor deposition), CVD (chemical vapor deposition), LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), APCVD (atmospheric pressure chemical vapor deposition), RPCVD (reduced pressure chemical vapor deposition), or MBE (molecular beam epitaxy). Silicon precursors for LPCVD or PECVD (i.e., silicon-containing gases) include, among others, methylsilane, silicon tetrahydride (silane), trisilane, disilane, pentasilane, neopentasilan, tetrasilane, dichlorosilane (SiH2Cl2), trichlorosilane (SiHCl3), and silicon tetrachloride (SiCl4). For example, silicon can be deposited by thermally decomposing silane (SiH4) in a temperature range of about 550°C to about 690°C, such as about 580°C to about 650°C. The chamber pressure can be in the range of about 70 to about 400 mTorr.

[0033] In some embodiments, a boron-containing gas is introduced into the reactor (110) to dope the epitaxial layer with boron. For example, B2H6 may be added to the deposition gas. The mole fraction of B2H6 in the atmosphere used to obtain desired properties (e.g., resistivity) will depend on several factors, such as the amount of boron ex-diffusion from a particular substrate during epitaxial deposition, the quantity of p-type and n-type dopants present in the reactor and substrate as contaminants, and the reactor pressure and temperature.

[0034] Once the epitaxial layer (25) is deposited, the epitaxial wafer (20) (which may be referred to herein as the “first” epitaxial wafer) can be imaged by infrared depolarization (step (400) shown in FIG. 5) to determine the infrared depolarization parameters of the wafer (20). The epitaxial wafer (20) can be imaged immediately after the deposition of the layer, or one or more epi-post-processes can be performed (e.g., cleaning). Infrared depolarization imaging can be performed on commercially available inspection tools, such as a Scanning Infrared Depolarization (SIRD) system sold by PVA TePla America, Inc. (Corona, CA) or a PSI system available from Semilab Semiconductor Physics Laboratory Co., Ltd. (Budapest, Hungary).

[0035] An exemplary device (201) for imaging epitaxial wafers (20) is illustrated in FIG. 15. A laser (230) transmits light through a polarizer (240). Linearly polarized light (e.g., a wavelength of about 1.3 μm) penetrates the wafer (20) generally perpendicular to its surface. The exemplary device (201) directs the light through the rear surface of the wafer (20), but in other embodiments, the device (201) directs the light through the front surface. The wafer (20) is rotated while being scanned.

[0036] The analyzer (251) measures the linear state of light passing through the wafer (20). The analyzer (251) is connected in parallel (P) by diodes (255, 257). || ) and vertical (P ⊥ ) Measures the power of the electromagnetic field components. Not bound by any specific theory, the resident stress fields in the wafer (20) are believed to change their polarization state due to stress-induced birefringence. Depolarization can be linearly correlated with local stress in the volume penetrated by the laser light.

[0037] Depolarization can be measured as follows:

[0038] (1).

[0039] D(depolarization) is a dimensionless value ranging from 0 to 2. When D(depolarization) approaches 0, little to no birefringence is observed, indicating the absence of stress at the imaged wafer site. When D(depolarization) approaches 1, circular polarization is present. When D(depolarization) approaches 2, a half-plate is indicated (full shift in polarization). D(depolarization) is one DU = 10 -6*D can be expressed as DU (depolarization units). In some embodiments, global stress defined by DC (depolarization contrast) may be used:

[0040] (2).

[0041] In some embodiments, shear stress equivalence (G) may be determined (see pages 33-39 of the PVA TePla SIRD User Manual (2007) - The User Manual is incorporated herein by reference for all relevant and consistent purposes - see).

[0042] Depolarization can be measured in "tracks" of the scanned surface, and each track has a number of "track points" within the track where depolarization is measured (see page 32 of the PVA TePla SIRD User Manual (2007) by reference in this specification). An average can be established for each track, and the percentage of track points deviating from the average can be recorded (i.e., "bad fraction"). The bad fraction of track points can be based on the minimum deviation from the average depolarization of the track (± 20% of the average, or ± 30%, ± 40%, or ± 50% of the average). Resolution can be adjusted by changing the number of track points measured within the track and by track separation.

[0043] Now, referring to FIG. 16, in some embodiments of the present disclosure, only annular edge region (302) of the epitaxial wafer (20) is imaged by infrared depolarization to determine infrared depolarization parameters. For example, the annular edge region (302) may extend toward the circumferential edge (315) from at least about 85% of the radius R of the epitaxial wafer (20). In other embodiments, the annular edge region (302) extends toward the circumferential edge (315) from at least about 90% or at least about 95% of the radius R of the epitaxial wafer. The annular edge region (302) may terminate at or before the circumferential edge (315). For example, the annular edge region may extend to 99.5% of the radius R or even 99.9% of the radius R. In other embodiments, the wafer (20) is not imaged only at the annular edge region, but rather the entire wafer is imaged (optionally, the edge exclusion region is not imaged).

[0044] The infrared depolarization parameter of the wafer (20) may generally be any parameter based on the characterization of the wafer imaging (step (500) of FIG. 5). For example, the infrared depolarization parameter may be a wafer map (e.g., an image of the wafer showing defects, stress points, bad fraction track points, or other characteristics of the scan). Alternatively or also, the parameter may be related to the "bad fraction" of the track points (e.g., a bad fraction variability chart, bad fraction average, or total bad fraction). Alternatively or also, the parameter may be related to a depolarization value (e.g., average depolarization value or total depolarization value), depolarization contrast, or shear stress equivalence.

[0045] Once the infrared depolarization parameter is determined, the suitability of the substrate for use in epitaxy can be determined. For example, the parameter can be compared to a critical parameter and / or it can be determined whether the parameter falls within a critical range.

[0046] In some embodiments of the present disclosure, two or more epitaxial wafers sliced ​​from ingots grown from melts having different impurity profiles are imaged by infrared depolarization, and each of these infrared depolarization parameters is compared to determine the suitability (e.g., strength and / or slip resistance and optionally after downstream heat treatment) of one or more ingot growth parameters (e.g., one or more impurity profiles) for producing substrates used for epitaxy. For example, to produce a first epitaxial wafer, after a silicon melt is formed, a seed crystal (122) is brought into contact with a melt having a first impurity profile (e.g., concentration of oxygen, nitrogen, or boron or other dopants). To form a first single-crystal silicon ingot, the seed crystal is withdrawn, and a first plurality of silicon substrates are sliced ​​from the single-crystal silicon ingot. To form a first epitaxial wafer, an epitaxial layer is deposited on one of the silicon substrates. A first epitaxial wafer is imaged by infrared depolarization to determine a first infrared depolarization parameter.

[0047] According to an embodiment of the present disclosure, a second melt having a second impurity profile (e.g., a different impurity profile having one or more impurities of different concentrations) is formed (in the same or different crystal fuller or even a different crystal fuller device). A silicon seed crystal (the same or different crystal as before) is brought into contact with the second silicon melt and is withdrawn to grow a second single-crystal silicon ingot. The second single-crystal silicon ingot is sliced ​​into a second plurality of silicon substrates. An epitaxial layer is deposited on one of the silicon substrates to form a second epitaxial wafer. The second epitaxial wafer is imaged by infrared depolarization to determine a second infrared depolarization parameter. Based on the first and second infrared depolarization parameters, the suitability of the first impurity profile and the second impurity profile for producing substrates for epitaxy can be determined.

[0048] In some embodiments, some wafers sliced ​​from each of the first and second ingots may be processed as described above to determine first and second infrared depolarization parameters (e.g., depolarization parameters are averaged for each ingot). For example, epitaxial layers may be deposited on a first group of multiple silicon wafers sliced ​​from a first silicon ingot, and epitaxial layers may be deposited on a second group of multiple silicon wafers sliced ​​from a second silicon ingot. A first group of epitaxial wafers may be imaged by infrared depolarization to determine the first infrared depolarization parameter, and a second group of epitaxial wafers may be imaged by infrared depolarization to determine the second infrared depolarization parameter.

[0049] In some embodiments, a group of ingots (i.e., a plurality) is grown from one or more melts having a first impurity profile and / or a group of ingots is grown from one or more melts having a second impurity profile, and the resulting epitaxial wafers may be imaged by infrared depolarization to determine first and second infrared depolarization parameters. For example, a first group of single-crystal silicon ingots is formed from melts having a first impurity profile. A first plurality of silicon substrates are sliced ​​from two or more single-crystal silicon ingots of the first group, and the front surfaces of the first plurality of silicon substrates are contacted with a silicon-containing gas to form a first group of epitaxial wafers. A second group of single-crystal silicon ingots is formed from melts having a second impurity profile. A second plurality of silicon substrates are sliced ​​from two or more single-crystal silicon ingots of the second group. The front surfaces of the second plurality of silicon substrates are contacted with a silicon-containing gas. The silicon-containing gas decomposes to form an epitaxial silicon layer on silicon substrates, thereby forming a second group of epitaxial wafers. Each of the epitaxial wafers of the first and second groups of epitaxial wafers is imaged by infrared depolarization to determine a first infrared depolarization parameter and a second infrared depolarization parameter. For example, the depolarization parameters can be averaged for wafers sliced ​​from ingots grown from melts having first and second impurity profiles, respectively.

[0050] According to embodiments of the present disclosure, the suitability of an impurity profile of a melt (e.g., oxygen, nitrogen, boron, or other dopant or impurity) for producing substrates for epitaxy can be determined based on first and second infrared depolarization parameters. For example, the first infrared depolarization parameter may be compared to the second infrared depolarization parameter to determine the suitability of the impurity profile for epitaxy. Alternatively, or also, the first and second infrared depolarization parameters may be compared to a critical parameter (e.g., a parameter known to be acceptable for the slip resistance of the substrate). Such critical parameters may be determined by determining the infrared depolarization parameters of substrates known or found to have acceptable slip resistance in epitaxy. According to embodiments of the present disclosure, the first infrared depolarization parameter and the second infrared depolarization parameter are the same parameter.

[0051] In embodiments where two or more epitaxial wafers are imaged, epitaxial silicon layers may be formed on each of the silicon substrates under the same process conditions (e.g., process times and temperatures). The use of the same or similar process conditions reduces the influence of process conditions on slip performance when comparing the wafers.

[0052] Now, referring to FIG. 6, in some embodiments, after the epitaxial layer is deposited in step (300) and before imaging (400), the wafer may undergo a heat treatment step (350) (e.g., when more than one wafer is imaging, both wafers are heat treated under the same conditions). The heat treatment step (350) may mimic the heat treatment used during downstream device manufacturing. For example, the heat treatment may involve heating to 1150°C for more than six hours. As shown in FIG. 7, in some embodiments, a second heat treatment (375) is performed after the first heat treatment (350) (e.g., heating to 1150°C for more than six hours). The second heat treatment (375) may be performed after the wafer has cooled after the first heat treatment.

[0053] In some embodiments and as illustrated in FIG. 8, a second epitaxial layer is deposited on the first epitaxial layer prior to infrared depolarization imaging (400) (step (325)). In these embodiments, two layers (i.e., two distinct layers) exist on the surface of the substrate. The second epitaxial layer may be deposited under process conditions similar to those for the deposition of the first layer, or different process conditions may be used. Optionally, a heat treatment (350) (Fig. 9) may be performed after the deposition of the second epitaxial layer (325) (e.g., heating to 1150°C for more than six hours). Optionally, a second heat treatment (375) (Fig. 10) may be performed after the first heat treatment (350). In some embodiments, a heat treatment is performed between the deposition of the first and second epitaxial layers.

[0054] Now, referring to FIG. 11, in some embodiments, an epitaxial layer is not deposited. Instead, two heat treatments (350, 375) are performed (e.g., consecutively).

[0055] Compared to conventional methods for determining the suitability of one or more Czochralski growth parameters for producing wafers for epitaxy, the methods of the present disclosure have several advantages. These methods make it possible to quantitatively characterize and compare slip performance under different epitaxial processes and post-epidural thermal treatments when evaluating various types of substrates. The characterization processes are consistent for each tested wafer. These methods are non-destructive, which allows the tested wafers to be used commercially after imaging and characterization. In embodiments where only the edge regions of the semiconductor structure are imaged, the epitaxial wafer can be scanned relatively quickly and / or sharper resolution can be used without an increase in imaging time. Imaging of the edge regions indicates wafer intensity, as it has been found that high-temperature epitaxial processes impose thermal shock, along with internal stress fields being mostly present at the wafer edges. Unlike other methods (e.g., surface scanning and XRT), infrared depolarization makes it possible to detect internal stress and is characterized by higher sensitivity than other methods. Conventional methods (e.g., XRT) merely generate wafer maps and are not quantitative.

[0056] In embodiments where two epitaxial layers are grown on a substrate prior to imaging, the slips can be increased exponentially, which facilitates the depiction of the slips. The use of two or more heat treatments and / or the growth of two or more epitaxial layers can better simulate customer downstream processes.

[0057] Examples

[0058] The processes of the present disclosure are further illustrated by the following examples. These examples should not be construed as limiting.

[0059] Example 1: Effect of varying molten nitrogen and oxygen on characterization and slip resistance with two epitaxial layers

[0060] Czochralski growth conditions were varied to produce different nitrogen and oxygen concentrations in the melt and in the resulting single-crystal silicon ingots (300 mm). The substrates underwent two epitaxial growth processes—an 8 μm deposition followed by a 5 μm deposition (both at a deposition temperature of 1130°C and a deposition rate of 1.8 μm / min). The epitaxial wafers were imaged by infrared depolarization (~1.3 μm) on a SIRD device (PVA TePla America, Inc. (Corona, CA)). The annular edge region of each wafer was scanned from 144 mm to 149 mm (0.96% to 99.3% of the radius). A 5% defect fraction (40 DU) was set as the target upper limit.

[0061] Example 2: Characterization with 2-stage heat treatment without epitaxial layer deposition

[0062] Czochralski growth conditions were varied to produce different nitrogen and oxygen concentrations in the melt and in the resulting single-crystal silicon ingots (300 mm). The substrates were each subjected to two heat treatment steps at 1100°C for 80 minutes (without epitaxial layer deposition). The substrates were imaged by infrared depolarization (~1.3 μm) on a SIRD device (PVA TePla America, Inc. (Corona, CA)). The annular edge region of each wafer was scanned from 144 mm to 149 mm (0.96% to 99.3% of the radius). A 5% defect fraction (40 DU) was set as the target upper limit. As shown in Fig. 19, two crystal types (A and D) met the specifications, while two ingots did not (B and C).

[0063] As used herein, the terms “about,” “substantially,” “essentially,” and “approximately” are intended to cover variations that may exist in the upper and / or lower limits of the ranges of properties or properties when used with ranges of dimensions, concentrations, temperatures, or other physical or chemical properties or characteristics, including, for example, variations resulting from rounding, measurement methodologies, or other statistical variations.

[0064] When introducing elements of the present disclosure or its embodiments, the articles (“a,” “an,” “the”) and “said” are intended to indicate that one or more elements are present. The terms “comprising,” “including,” “containing,” and “having” are intended to be comprehensive and to indicate that additional elements other than those listed may exist. The use of terms indicating a specific orientation (e.g., “top,” “bottom,” “side,” etc.) is for convenience of description and does not require any specific orientation of the item being described.

[0065] Since various modifications to the above configurations and methods may be made without departing from the scope of the present disclosure, it is intended that all matters included in the above description and illustrated in the accompanying drawings(s) should be interpreted as illustrative rather than restrictive.

Claims

Claim 1 A method for determining the suitability of Czochralski growth conditions for producing silicon substrates for epitaxy, the method comprising: heating a crucible containing a first silicon filler to form a first silicon melt in the crucible; contacting a silicon seed crystal with the first silicon melt, wherein the first silicon melt has a first impurity profile; withdrawing the silicon seed crystal to grow a first single-crystal silicon ingot; slicing a first plurality of silicon substrates from the first single-crystal silicon ingot; contacting the front surface of a silicon substrate among the first plurality of silicon substrates with a first silicon-containing gas, wherein the first silicon-containing gas decomposes to form a first epitaxial silicon layer on the silicon substrate to form a first epitaxial wafer; imaging the first epitaxial wafer by infrared depolarization to determine a first infrared depolarization parameter; and forming a second silicon melt in the crucible. A step of heating the crucible containing a second silicon filler; a step of contacting a silicon seed crystal with the second silicon melt—the second silicon melt has a second impurity profile, and the first impurity profile of the first silicon melt is different from the second impurity profile of the second silicon melt—; a step of withdrawing the silicon seed crystal to grow a second single-crystal silicon ingot; a step of slicing a second plurality of silicon substrates from the second single-crystal silicon ingot; a step of contacting the front surface of a silicon substrate among the second plurality of silicon substrates with a second silicon-containing gas—the second silicon-containing gas decomposes to form a second epitaxial silicon layer on the silicon substrate to form a second epitaxial wafer—; a step of imaging the second epitaxial wafer by infrared depolarization to determine a second infrared depolarization parameter;A method comprising the step of determining the suitability of the first impurity profile and the second impurity profile for producing substrates for epitaxy based on first and second infrared depolarization parameters, wherein the crucible in which the first silicon melt is formed is part of a crystal fuller device, and the crystal fuller device is identical or different from the crystal fuller device comprising the crucible in which the second silicon melt is formed, and the silicon seed crystal in contact with the first silicon melt and the silicon seed crystal in contact with the second silicon melt are identical or different silicon seed crystals.; Claim 2 A method according to claim 1, wherein the step of determining the suitability of the first impurity profile and the second impurity profile for producing substrates for epitaxy comprises the step of comparing the first infrared depolarization parameter with the second infrared depolarization parameter. Claim 3 A method in which, in paragraph 2, the first infrared depolarization parameter and the second infrared depolarization parameter are the same parameter. Claim 4 A method according to claim 1, wherein the step of determining the suitability of the first impurity profile and the second impurity profile for producing substrates for epitaxy includes the step of determining the slip resistance of the substrates. Claim 5 In claim 1, the first infrared depolarization parameter and the second infrared depolarization parameter are each selected from a wafer map, a defect fraction variability chart, a defect fraction average, a total defect fraction, an average depolarization value, a total depolarization value, a depolarization contrast, and a shear stress equivalence. Claim 6 In claim 1, the first infrared depolarization parameter and the second infrared depolarization parameter are a method related to the depolarization value. Claim 7 A method according to claim 1, wherein the first impurity profile and the second impurity profile relate to one or more of the concentration of oxygen, the concentration of nitrogen, or the concentration of boron in the melt. Claim 8 A method according to claim 1, further comprising: a step of heat-treating the first epitaxial wafer before imaging the first epitaxial wafer; and a step of heat-treating the second epitaxial wafer before imaging the second epitaxial wafer. Claim 9 A method according to claim 1, wherein the first epitaxial silicon layer is formed on the silicon substrates of the first plurality of substrates to form the first epitaxial wafer under the same process conditions as the second epitaxial silicon layer is formed on the silicon substrates of the second plurality of substrates to form the second epitaxial wafer. Claim 10 A method according to claim 1 in which only the annular edge regions of the first and second epitaxial wafers are imaged. Claim 11 A method according to claim 1, comprising: forming a first group of epitaxial wafers from a first group of a plurality of silicon substrates; imaging each epitaxial wafer of the first group of epitaxial wafers by infrared depolarization to determine the first infrared depolarization parameter; forming a second group of epitaxial wafers from a second group of a plurality of silicon substrates; and imaging each epitaxial wafer of the second group of epitaxial wafers by infrared depolarization to determine the second infrared depolarization parameter. Claim 12 In claim 1, the method comprises the steps of: forming a first group of single-crystal silicon ingots from a plurality of first silicon melts having the first impurity profile, wherein the first single-crystal silicon ingot is part of the first group; slicing a first plurality of silicon substrates from two or more single-crystal silicon ingots of the first group; forming a first group of epitaxial wafers from the first plurality of silicon substrates; imaging each epitaxial wafer of the first group of epitaxial wafers by infrared depolarization to determine the first infrared depolarization parameter; forming a second group of single-crystal silicon ingots from a plurality of second silicon melts having the second impurity profile, wherein the second single-crystal silicon ingot is part of the second group; slicing a second plurality of silicon substrates from two or more single-crystal silicon ingots of the second group; and forming a second group of epitaxial wafers from the second plurality of silicon substrates. A method comprising the step of imaging each epitaxial wafer of a second group of epitaxial wafers by infrared depolarization to determine the second infrared depolarization parameter. Claim 13 delete Claim 14 delete Claim 15 delete Claim 16 delete Claim 17 delete Claim 18 delete Claim 19 delete Claim 20 delete

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