Circuit board or / and interposer containing TGV filled with conductive paste and its manufacturing method

KR103022536B1Active Publication Date: 2026-09-21JNTC
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Patent Information

Application Number
KR1020250059476
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-05-08
Publication Date
2026-09-21
Estimated Expiration
2045-05-08

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Abstract

The present invention relates to a circuit board or interposer comprising a TGV (Thru-Glass Via) filled with conductive paste. A circuit board or interposer according to the present invention may comprise a glass substrate including an upper surface and a lower surface, an upper plating layer and a lower plating layer formed on the upper surface and the lower surface of the glass substrate, and a via portion connecting the upper plating layer and the lower plating layer through a through hole of the glass substrate, wherein the via portion may comprise a seed layer formed in contact with the upper plating layer and the lower plating layer, and a filling layer formed by filling the space between the seed layer and the surface of the through hole with a conductive paste.
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Description

Technology Field

[0001] The present invention relates to a circuit board or interposer comprising a TGV (Thru-Glass Via) filled with conductive paste and a method for manufacturing the same. Background Technology

[0002] Recently, technology related to electronic products has been progressing toward multifunctionality and high speed, and to respond to this trend, semiconductor chips and circuit boards containing them are also becoming smaller and highly integrated.

[0003] A circuit board is a substrate on which circuit connection patterns are formed using a conductive material, such as copper, and is a general term for the board immediately before electronic components are mounted. To densely mount many different types of electronic components on a flat plate, the mounting positions of each component are determined, and the components are fixed to the surface of the flat plate where the circuit patterns connecting the components are formed.

[0004] A circuit board comprises an insulating layer made of a reinforcing material and a resin, and copper foil formed on the upper and lower surfaces of the insulating layer. A wiring portion disposed on the surface is formed by processing the copper foil, and can be electrically connected by via portions that connect different wiring portions.

[0005] Multiple high-performance electronic components are arranged on such a circuit board to form a semiconductor package.

[0006] In addition, to connect multiple chips to each other on a circuit board forming a semiconductor package, an intermediate connecting board is added between the chip and the circuit board, thereby enabling interconnection between the chips or between the chip and the circuit board.

[0007] Such an interposer (connecting substrate) was introduced to interconnect chips with each other or chips with a circuit board by inserting semiconductor chips into a semiconductor package mounted on a substrate.

[0008] In order to connect chips on a circuit board by embedding an interposer (connection board) into the circuit board, chip assembly is performed after embedding the interposer (connection board) into the board.

[0009] Such an interposer (connecting substrate) also includes an insulating layer, a wiring portion formed by processing copper foil formed on the upper and lower surfaces of the insulating layer, and a via portion connecting different wiring portions.

[0010] Recently, glass substrates have been introduced as the substrate constituting the aforementioned insulating layer and are being used to realize high-performance semiconductor packages. Glass possesses excellent electrical insulation properties, allowing it to operate stably even in high-voltage or high-frequency environments. Its low dielectric loss minimizes signal loss during high-frequency signal transmission. Furthermore, its low coefficient of thermal expansion reduces substrate deformation due to thermal changes, and its high heat resistance ensures stability even in high-temperature processes such as reflow soldering. Additionally, it can maintain nanometer-scale precision flatness and offers strong resistance to oxidation and moisture, resulting in high quality reliability; consequently, its use is expanding in semiconductor packaging and high-resolution displays.

[0011] As such, glass substrates can increase signal transmission speed and improve power efficiency compared to conventional plastic-based substrates, and are therefore adopted as insulating layers for circuit boards and interposers in semiconductor packages, contributing to performance enhancement.

[0012] An electrical connection via structure made by penetrating such a glass substrate is called a TGV (Thru-Glass Via).

[0013] TGVs are formed by filling fine holes penetrating a glass substrate with a conductive material (mainly copper, etc.). To fill these via holes with a conductive material, two copper plating processes are performed. First, the first plating is performed by electroless copper plating, and the second plating is performed by electrolytic copper plating. However, the electrolytic copper plating performed in the second step is a time-consuming process, which leads to a problem of high manufacturing costs for circuit boards containing TGVs.

[0014] Therefore, it is necessary to develop technology that can improve the productivity of circuit boards or interposers (connecting boards), including TGVs, by effectively filling the fine holes penetrating the glass substrate with conductive material. The problem to be solved

[0015] The technical problem that the present invention aims to solve is to improve the productivity of circuit boards or interposers including TGV (Thru-Glass Via) by filling a conductive paste into a deep and narrow through-hole with high selectivity formed in a glass substrate and ensuring conductivity.

[0016] The technical problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0017] A circuit board or interposer according to the present invention may comprise a glass substrate including an upper surface and a lower surface, an upper plating layer and a lower plating layer formed on the upper surface and the lower surface of the glass substrate, and a via portion connecting the upper plating layer and the lower plating layer through a through hole of the glass substrate, wherein the via portion may comprise a seed layer formed in contact with the upper plating layer and the lower plating layer, and a filling layer formed by filling the space between the seed layer and the surface of the through hole with a conductive paste.

[0018] In some embodiments of the present invention, the conductive paste may include silver powder or copper powder.

[0019] In some embodiments of the present invention, the conductive paste may be characterized by being formed by including less than 90 weight% of a metal mixture as a conductor, 5 weight% or more of a thermosetting resin as a binder, 0.1 weight% or more of a dispersant, and the remainder being an organic solvent.

[0020] In some embodiments of the present invention, the copper powder may be high-purity copper with a purity of 99.99% or higher and have an electrical conductivity of 58.0 MS / m or higher.

[0021] In some embodiments of the present invention, the copper powder may be coated with silver (Ag).

[0022] In some embodiments of the present invention, the silver powder or the copper powder may have a particle size smaller than 2 μm and may be included in the range D50 < 1 μm.

[0023] In some embodiments of the present invention, the upper plating layer or the lower plating layer may be characterized by being formed by electrolytic copper plating.

[0024] A method for manufacturing a circuit board or interposer according to the present invention for solving the above technical problem may include the steps of: processing a through hole in a glass substrate; forming a filling layer by filling the through hole with a conductive paste; forming a seed layer on the upper and lower surfaces of the glass substrate and on the surface of the through hole; and forming an upper plating layer and a lower plating layer, respectively, on the surfaces of the seed layer formed on the upper surface and the lower surface. Effects of the invention

[0025] As described above, according to the circuit board or interposer of the present invention, by filling through holes penetrating a glass substrate with a conductive paste to connect the upper plating layer and the lower plating layer of the glass substrate to form a TGV, the process time for producing a circuit board or interposer including a TGV can be drastically reduced. In particular, by adopting silver-copper paste or copper paste as the conductive paste, expensive silver paste can be replaced, thereby securing price competitiveness. Brief explanation of the drawing

[0026] FIG. 1 is a cross-sectional view showing a circuit board according to one embodiment of the present invention. FIGS. 2 to 5 are drawings illustrating the process of forming a circuit board according to an embodiment of the present invention. Specific details for implementing the invention

[0027] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Throughout the specification, the same reference numerals refer to the same components.

[0028] "And / or" includes each of the mentioned items and all combinations of one or more.

[0029] The terms used herein are for describing embodiments and are not intended to limit the invention. In this specification, the singular form includes the plural form unless specifically stated otherwise in the text. As used herein, "comprising" and / or "comprising" does not exclude the presence or addition of one or more other components, steps, actions, and / or elements to the mentioned components, steps, actions, and / or elements.

[0030] Furthermore, throughout the specification, when a part is described as being "connected" to another part, this includes not only cases where they are "directly connected," but also cases where they are "indirectly" or "electrically connected" with other members or elements in between.

[0031] Additionally, throughout the specification, the description that each layer (film), region, pattern, or structure is formed "on" or "under" the substrate, each layer (film), region, pad, or pattern includes both direct formation and formation through another layer. The criteria for "on" or "under" each layer are described based on the drawings.

[0032] Furthermore, expressions such as 'first, second,' etc., are used solely to distinguish multiple compositions and do not limit the order or other characteristics between the compositions.

[0033] Unless otherwise defined, all terms used in this specification (including technical and scientific terms) may be used in a meaning commonly understood by those skilled in the art to which the present invention pertains. Additionally, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise.

[0034] Since an interposer is another circuit board embedded within a circuit board, the circuit board or interposer will be collectively referred to as a circuit board in the following description.

[0035] FIG. 1 is a cross-sectional view showing a circuit board according to one embodiment of the present invention.

[0036] Referring to FIG. 1, a circuit board (100) according to the present invention may include a glass substrate (110) including an upper surface (120) and a lower surface (130), an upper surface plating layer (121) and a lower surface plating layer (131) formed on the upper surface (120) and lower surface (130) of the glass substrate (110), and a via portion (150) connecting the upper surface plating layer (121) and the lower surface plating layer (131) through a through hole (159) of the glass substrate (110).

[0037] The above glass substrate (110) is a flat substrate formed of glass and has excellent electrical insulation and thermal stability.

[0038] The through hole (159) is a fine hole (via) vertically drilled from the upper surface (120) to the lower surface (130) of the glass substrate (110) and can be formed through processing such as laser drilling, dry or wet etching. The diameter of the through hole (159) may be 10 μm, and it may be a deep and narrow high aspect ratio structure.

[0039] The upper plating layer (121) and the lower plating layer (131) may be copper foil formed on the upper surface (120) and lower surface (130) of the glass substrate (110). A wiring portion disposed on the upper surface (120) and lower surface (130) of the glass substrate (110) is formed by processing the copper foil through processes such as photolithography, metal deposition, and pattern formation, and the wiring portions on the upper surface (120) and lower surface (130) can be electrically connected by a via portion (150) according to the present invention.

[0040] The above via (150) may be composed of a seed layer (151) formed in contact with the upper plating layer (121) and the lower plating layer (131), and a filling layer (153) formed by filling the space between the seed layer (151) and the surface of the through hole (159) with a conductive paste.

[0041] In the manufacturing process, a through hole (159) is formed first, followed by a filling layer (153) and a seed layer (151) being formed in sequence, and finally, an upper plating layer (121) and a lower plating layer (131) are formed. Thus, a seed layer (151) is formed in contact with the upper surface (120) and lower surface (130) of the glass substrate (110), and an upper plating layer (121) and a lower plating layer (131) are formed in contact with the seed layer (151).

[0042] The above seed layer (151) is a thin, continuous metal film and is an electrically conductive layer that allows electroplating to adhere well. A thin conductive seed layer is applied to the surface of the glass substrate (110) to enable electroplating.

[0043] The thickness of the seed layer (151) can be formed very thinly, to the extent of tens to hundreds of nanometers (nm), by a dry process including sputtering or ALD (Atomic Layer Deposition) or a wet process including chemical vapor deposition.

[0044] In particular, the ALD process has an advantage in a high aspect ratio structure where the through hole (159) is deep and narrow. This is because the ALD process forms a layer at the atomic level, so it is possible to form a conductive layer uniformly across the entire wall surface inside the through hole (159).

[0045] The seed layer (151) can be formed from a Ti / Cu or Cr / Cu combination.

[0046] First, a base layer is created using Ti (Titanium) or Cr (Chromium). Ti or Cr has excellent adhesion to insulators such as glass and ceramics, and forms an oxide film easily, acting as an 'adhesive' between metal and glass.

[0047] Next, an upper layer is created using Cu (Copper). Cu has excellent electrical conductivity, so it acts as a conductive path connecting to the plating layer during electroplating.

[0048] Alternatively, the seed layer (151) may be formed of Cu.

[0049] The electroless copper plating process can be performed after activating the surface of the non-conductive through-hole (159) to enable plating through catalysis. Copper is precipitated through the chemical reaction of the electroless copper plating, and copper is uniformly deposited on the inside and wall surface of the through-hole (159).

[0050] The upper plating layer (121) or lower plating layer (131) can be formed by electrolytic copper plating.

[0051] A wiring portion disposed on the upper surface (120) and lower surface (130) of a glass substrate (110) can be formed on the upper surface plating layer (121) and lower surface plating layer (131) through processing processes such as photolithography, metal deposition, and pattern formation.

[0052] The conductive paste may include silver powder or copper powder as a conductor. That is, it may be one of a silver paste formed solely of silver powder, a silver-copper paste formed by mixing silver powder and copper powder, or a copper paste formed solely of copper powder.

[0053] The electrical conductivity of ordinary copper is 58.0 MS / m and the electrical conductivity of silver is 62.1 MS / m, and the electrical conductivity of silver is 106.3% higher than that of ordinary copper.

[0054] Therefore, the conductive paste according to the example is preferably a silver paste, but since silver powder is expensive, a silver-copper paste or a copper paste may be used as a substitute.

[0055] The silver-copper paste according to the example may be formed by including less than 90% by weight of a metal mixture of silver powder and copper powder as a conductor, 5% by weight or more of a thermosetting resin as a binder, 0.1% by weight or more of a dispersant, and the remainder being an organic solvent.

[0056] The content of silver powder in the above metal mixture may be greater than 0 weight% and less than 100 weight% with respect to the total weight of the metal mixture. Accordingly, the content of copper powder may be less than 100 weight% and greater than 0 weight% with respect to the total weight of the metal mixture.

[0057] At this time, the copper powder may be high-purity copper with a purity of 99.99% or higher, and may have an electrical conductivity of 58.0 MS / m or higher.

[0058] The electrical conductivity of ordinary copper is 58.0 MS / m, and the electrical conductivity of high-purity copper of 99.99% or higher is 59.6 MS / m. This is lower compared to the electrical conductivity of silver, 62.1 MS / m, but is 103% higher than that of ordinary copper.

[0059] By using high-purity copper in this way, the decrease in electrical conductivity can be minimized compared to silver paste.

[0060] As such, since both silver and high-purity copper are excellent conductors, a mixture of these metals also becomes an excellent conductor of electricity.

[0061] The content of the metal mixture in the total silver-copper paste composition may be less than 90 weight%.

[0062] If the content of the above metal mixture is 90 weight% or more, it may affect the physical properties of the conductive paste composition, such as viscosity or spreadability, and cause problems in that filling is not properly performed.

[0063] The above silver powder or copper powder may have a particle size smaller than 2 μm and may be included in the D50 < 1 μm range.

[0064] Since the minimum diameter of the through hole (159) formed according to the embodiment is about several tens of μm, the particle size of the silver powder or copper powder must be at least 1 / 5 to 1 / 10 of the minimum diameter of the through hole (159). Therefore, based on the minimum diameter of the through hole (159) of 10 μm, it must be smaller than 2 μm and simultaneously satisfy the range D50 < 1 μm.

[0065] D50 (Median Particle Size) < 1μm indicates that 50% of the total particle distribution consists of particles smaller than 1μm and 50% consists of particles larger than 1μm.

[0066] The thermosetting resin used as a binder may consist of polyimide, siloxane resin, bisphenol-A epoxy, or a mixture of two or more of these, which have a low shrinkage rate and excellent heat resistance and interfacial adhesion.

[0067] When applying conductive paste to a glass substrate, a mismatch in the coefficient of thermal expansion (CTE) can cause problems in the finished product.

[0068] The CTE of glass is at the level of 0.5 ppm / °C, and the CTE of typical conductive paste Since the difference is greater than tens of ppm / °C, cracks or delamination may occur in areas where stress is concentrated due to differences in shrinkage rates caused by temperature changes.

[0069] To solve this problem, it is desirable to use a thermosetting resin with low CTE characteristics.

[0070] The polyimide according to the example has very high heat resistance (above 300°C), excellent mechanical strength, excellent interfacial adhesion, and low thermal expansion.

[0071] The siloxane resin according to the example is stable at high temperatures, possesses thermal shock resistance, and has excellent adhesion to glass or ceramic substrates.

[0072] The bisphenol-A epoxy resin according to the example has lower thermal expansion and a lower price than general epoxy resins. In particular, the CTE can be further lowered by mixing it with silica, AlN, etc., as a filler for controlling CTE.

[0073] The above thermosetting resin may be used in an amount of 5 weight percent or more.

[0074] If the above thermosetting resin is included in an amount of less than 5 weight percent, there may be a problem in that the metal mixture as a conductor is not sufficiently bound.

[0075] As a dispersant used to homogeneously disperse the above metal mixture in a paste, particularly in a thermosetting resin as a binder, a mixture composed of polyamine-based salts, carboxylic acid-based salts, silicone acrylics, etc. may be used.

[0076] The dispersant may be used in an amount of 0.1 weight% or more, and if used in an amount of less than 0.1 weight%, there may be a problem in that the dispersion effect is insufficient.

[0077] The above organic solvent serves to control the viscosity and spreadability of the conductive paste, and in particular improves thixotropy so that the paste can be easily injected into and stably filled into the through hole of the glass substrate (110).

[0078] As organic solvents, almost all commercially available organic solvents such as esters, alcohols, and ketones can be used, and preferably, one selected from butyl cellusolve acetate, benzyl alcohol, cyclohexanol, isophorone, or a mixture of two or more of these can be used.

[0079] A copper paste according to another embodiment may be formed by including less than 90 weight% of copper powder as a conductor, 5 weight% or more of a thermosetting resin as a binder, 0.1 weight% or more of a dispersant, and the remainder being an organic solvent.

[0080] If the content of the above copper powder exceeds 90 weight%, it may affect the physical properties of the conductive paste composition, such as viscosity or spreadability, and there may be a problem where filling is not properly achieved.

[0081] The copper powder is high-purity copper with a purity of 99.99% or higher, and can have an electrical conductivity of 58.0 MS / m or higher.

[0082] The electrical conductivity of ordinary copper is 58.0 MS / m, but the electrical conductivity of high-purity copper with a purity of 99.99% or higher is 59.6 MS / m, which is lower compared to the electrical conductivity of silver, 62.1 MS / m, but 103% higher compared to ordinary copper.

[0083] By using high-purity copper heat-treated in this way, the decrease in electrical conductivity can be minimized compared to silver paste.

[0084] The above copper powder has a particle size smaller than 2 μm and may be included in the D50 < 1 μm range.

[0085] Since the minimum diameter of the through hole (159) formed according to the embodiment is about several tens of μm, the particle size of the copper powder must be at least 1 / 5 to 1 / 10 of the minimum diameter of the through hole (159). Therefore, based on the minimum diameter of the through hole (159) of 10 μm, it must be smaller than 2 μm and simultaneously satisfy the range D50 < 1 μm.

[0086] D50 (Median Particle Size) < 1μm indicates that 50% of the total particle distribution consists of particles smaller than 1μm and 50% consists of particles larger than 1μm.

[0087] To improve the electrical conductivity of copper powder, the surface of the copper powder can be coated with silver (Ag). To coat copper (Cu) particles with a diameter in the micrometer (μm) range with silver (Ag), a galvanic displacement reaction process, which is a wet chemical coating method, can be applied.

[0088] Copper particles from which the surface oxide film has been removed by washing are dispersed in ethanol or the like using a dispersant, and then a silver salt (AgNO3) solution is added to allow silver to be uniformly deposited on the surface of the copper particles, making it a process suitable for mass production.

[0089] At this time, a silver coating layer is formed on the surface of the copper particles with a thickness of within 20% of the diameter of the copper particles, and especially when applied to high-frequency circuits, the electrical conductivity can be improved to a value equivalent to silver (Ag) due to the surface effect.

[0090] To compensate for the mismatch in the coefficient of thermal expansion (CTE) between the glass substrate (110) and the conductive paste, the binder material was applied in the same way as in the case of silver-copper paste, and a detailed description thereof is omitted.

[0091] Since the dispersant and organic solvent also use the same composition, they are not described separately.

[0092] FIGS. 2 to 5 are drawings illustrating the process of forming a circuit board according to an embodiment of the present invention.

[0093] Referring to FIGS. 2 to 5, a method for manufacturing a circuit board according to one embodiment may include the steps of: processing a through hole (159) in a glass substrate (110); filling the through hole (159) with a conductive paste to form a filling layer (153); forming a seed layer (151) on the surface of the upper surface (120) and lower surface (130) of the glass substrate (110) and the surface of the through hole (159); and forming an upper plating layer (121) and a lower plating layer (131), respectively, on the surface of the seed layer (151) formed on the upper surface (120) and the lower surface (130).

[0094] Referring to FIG. 2, a through hole (159) is first processed in a glass substrate (110) so that a substrate (100a) can be formed during the process.

[0095] The through hole (159) is formed through processing such as laser drilling, dry or wet etching, has a diameter of at least 10 μm, and may be a deep and narrow high aspect ratio structure.

[0096] Referring to FIG. 3, the through hole (159) can be filled with a conductive paste to form a filling layer (153).

[0097] Conductive paste can be filled through screen printing or vacuum assisted filling.

[0098] Screen printing can fill multiple vias at once with conductive paste using a screen mask under pressure. It is suitable for high-speed, large-area manufacturing and is widely used on glass substrates.

[0099] Also, vacuum-assisted filling is a method in which a substrate is immersed in a vacuum and then pressure is applied to inject paste into the vias. It is effective in removing air bubbles and is advantageous for narrow and deep vias (high selectivity vias).

[0100] Referring to FIG. 4, a seed layer (151) can be formed on the upper surface (120) and lower surface (130) of the glass substrate (110) and on the surface of the through hole (159).

[0101] The thickness of the seed layer (151) is very thin, ranging from tens to hundreds of nanometers (nm), and can be formed by a dry process including sputtering or ALD, or a wet process such as electroless copper plating. In particular, the ALD process can form the seed layer (151) so that atoms are evenly distributed in a high aspect ratio structure in which the through-hole (159) is deep and narrow.

[0102] The seed layer (151) can be formed from Cu, Ti / Cu, or Cr / Cu combinations.

[0103] Referring to FIG. 5, an upper plating layer (121) and a lower plating layer (131) can be formed on the surface of the seed layer (151) formed on the upper surface (120) and the lower surface (130), respectively.

[0104] The upper plating layer (121) and the lower plating layer (131) can be formed by electrolytic copper plating.

[0105] A circuit board (100) can be completed by forming wiring portions on the upper surface (120) and lower surface (130) of a glass substrate (110) through processing processes such as photolithography, metal deposition, and pattern formation on the upper surface plating layer (121) and lower surface plating layer (131).

[0106] According to the circuit board and / or interposer of the present invention, the process time required for the production of a circuit board can be drastically reduced by filling through holes penetrating a glass substrate with a conductive paste to connect the upper plating layer and the lower plating layer of the glass substrate to form a TGV. In particular, by using silver-copper paste or copper paste as the conductive paste, it is possible to replace expensive silver paste and secure price competitiveness.

[0107] Although the present invention has been described above, those skilled in the art will recognize that the invention may be implemented in other forms while maintaining the technical concept and essential features of the invention.

[0108] The scope of the present invention shall be defined by the claims, but all modifications or variations derived from configurations directly derived from the descriptions in the claims, as well as configurations equivalent thereto, shall be interpreted as being included within the scope of the present invention. Explanation of the symbols

[0109] 100: Circuit board 100a: Substrate during process 110: Glass substrate 120: Top surface 121: Top surface plating layer 130: If 131: Bottom plating layer 150: Viabu 151: Seed layer 153: Packing layer 159: Through hole

Claims

Claim 1 A glass substrate including an upper surface and a lower surface; an upper plating layer and a lower plating layer formed on the upper surface and the lower surface of the glass substrate; A circuit board comprising a via portion connecting an upper plating layer and a lower plating layer through a through hole of the glass substrate, wherein the via portion comprises a seed layer formed in contact with the upper plating layer and the lower plating layer, and a filling layer formed by filling the space between the seed layer and the surface of the through hole with a conductive paste, wherein the conductive paste is formed by comprising less than 90 weight% of a metal mixture as a conductor, 5 weight% or more of a thermosetting resin as a binder, 0.1 weight% or more of a dispersant, and the remainder being an organic solvent, wherein the metal mixture comprises silver (Ag) powder or silver-coated copper powder, wherein the silver powder or the copper powder has a particle size smaller than 2 μm and is included in the range D50 < 1 μm, and the thermosetting resin is composed of polyimide, siloxane resin, or a mixture thereof. Claim 2 delete Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 delete Claim 7 A method for manufacturing a circuit board comprising: a step of processing a through hole in a glass substrate; a step of filling the through hole with a conductive paste to form a filling layer; a step of forming a seed layer on the upper and lower surfaces of the glass substrate and on the surface of the through hole; and a step of forming an upper plating layer and a lower plating layer, respectively, on the surfaces of the seed layer formed on the upper surface and the lower surface, wherein the conductive paste is formed by comprising less than 90 weight% of a metal mixture as a conductor, 5 weight% or more of a thermosetting resin as a binder, 0.1 weight% or more of a dispersant, and the remainder being an organic solvent, wherein the metal mixture comprises silver (Ag) powder or silver-coated copper powder, wherein the silver powder or the copper powder has a particle size smaller than 2 μm and is included in the range D50 < 1 μm, and the thermosetting resin is composed of polyimide, siloxane resin, or a mixture thereof.

Citation Information

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