Mutilayer electronic component

KR103022605B1Active Publication Date: 2026-09-21SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
KR1020240182886
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2024-12-10
Publication Date
2026-09-21
Estimated Expiration
2041-12-31

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Abstract

A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, a body comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode comprising a first connection portion disposed on the third surface and a first band portion extending from the first connection portion to a part of the first surface; a second external electrode comprising a second connection portion disposed on the fourth surface and a second band portion extending from the second connection portion to a part of the first surface; an insulating layer disposed on the second surface and extending to a part of the first and second connection portions; and a plating layer disposed on the first and second band portions; wherein the insulating layer may include an oxide containing Si.
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Description

Technology Field

[0001] The present invention relates to a stacked electronic component. Background Technology

[0003] A Multi-Layered Ceramic Capacitor (MLCC), one of the multilayer electronic components, is a chip-type capacitor mounted on the printed circuit boards of various electronic products—such as video devices like Liquid Crystal Displays (LCDs) and Plasma Display Panels (PDPs), computers, smartphones, and mobile phones—that serves to charge or discharge electricity.

[0005] These multilayer ceramic capacitors can be used as components in various electronic devices due to their advantages of being compact, guaranteeing high capacitance, and being easy to mount.

[0006] Recently, with the miniaturization and multifunctionality of electronic products, the demand for higher integration and capacitance of multilayer ceramic capacitors has increased, leading to the minimization of the space between multilayer ceramic capacitors.

[0007] In addition, as multilayer ceramic capacitors are used in automobiles or infotainment systems, there is an increasing demand for high reliability, high strength characteristics, and miniaturization.

[0009] To achieve miniaturization and high capacitance of multilayer ceramic capacitors, it is necessary to increase the number of layers by forming the internal electrodes and dielectric layers thinly, and to increase the effective volume fraction required for capacitance implementation by minimizing the volume of parts that do not affect capacitance formation.

[0010] In addition, in order to mount the maximum number of components within a limited substrate area, it is necessary to minimize the mounting space.

[0011] In addition, as multilayer ceramic capacitors become smaller and have higher capacitance, the margin thickness becomes thinner, which can make it easier for external moisture or plating solution to penetrate, and this can compromise reliability. Therefore, a method is required to protect multilayer ceramic capacitors from external moisture or plating solution penetration. The problem to be solved

[0013] One of the various objectives of the present invention is to solve the problem that it is difficult to form a uniform film when a glass layer surrounding a stacked electronic component is formed to protect the stacked electronic component from thermal expansion and thermal contraction, as clumping occurs in the glass layer.

[0014] One of the various objectives of the present invention is to solve the problem of causing cracks and delamination in stacked electronic components as stress is transmitted to the stacked electronic components as the hardness of the glass layer increases at a temperature below the softening point.

[0015] One of the various objectives of the present invention is to solve the problem of radiation cracking occurring when the metal of the external electrode constituting the stacked electronic component diffuses into the internal electrode during the process of raising the temperature.

[0017] However, the purpose of the present invention is not limited to the above description and may be more easily understood in the process of explaining specific embodiments of the present invention. means of solving the problem

[0019] A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, a body comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode comprising a first connection portion disposed on the third surface and a first band portion extending from the first connection portion to a part of the first surface; a second external electrode comprising a second connection portion disposed on the fourth surface and a second band portion extending from the second connection portion to a part of the first surface; an insulating layer disposed on the second surface and extending onto the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion; wherein the insulating layer may comprise an oxide containing silicon (Si).

[0021] A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, a body including first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode including a first connection portion disposed on the third surface and a first band portion extending from the first connection portion to a part of the first surface; a second external electrode including a second connection portion disposed on the fourth surface and a second band portion extending from the second connection portion to a part of the first surface; an insulating layer disposed on the second surface and extending onto the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion. It includes, and the insulating layer may include at least one of an oxide containing boron (B), a borosilicate, and a zinc-borosilicate.

[0023] A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, a body including first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode including a first connection portion disposed on the third surface, a first band portion extending from the first connection portion to a part of the first surface, and a third band portion extending from the first connection portion to a part of the second surface; a second external electrode including a second connection portion disposed on the fourth surface, a second band portion extending from the second connection portion to a part of the first surface, and a fourth band portion extending from the second connection portion to a part of the second surface; and an insulating layer disposed on the first and second connection portions and disposed to cover the second surface and the third and fourth band portions. It includes a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion; wherein the insulating layer may include an oxide containing silicon (Si).

[0025] A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, a body including first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode including a first connection portion disposed on the third surface, a first band portion extending from the first connection portion to a part of the first surface, and a first corner portion disposed extending from the first connection portion to a corner connecting the second surface and the third surface; and a second external electrode including a second connection portion disposed on the fourth surface, a second band portion extending from the second connection portion to a part of the first surface, and a second corner portion disposed extending from the second connection portion to a corner connecting the second surface and the fourth surface. The invention comprises: an insulating layer disposed on the first and second connection portions and disposed to cover the second surface, the first and second corner portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion; wherein B3 is the second direction average size from the extension line of the third surface to the end of the first corner portion, B4 is the second direction average size from the extension line of the fourth surface to the end of the second corner portion, G1 is the second direction average size of the area separated from the third surface and the second internal electrode, and G2 is the second direction average size of the area separated from the fourth surface and the first internal electrode, satisfying B3≤G1 and B4≤G2, and the insulating layer may include an oxide containing silicon (Si).

[0027] A stacked electronic component according to one embodiment of the present invention comprises a dielectric layer and first and second internal electrodes alternately disposed with respect to the dielectric layer, a body comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode comprising a first connecting electrode disposed on the third surface and a first band electrode disposed on the first surface and connected to the first connecting electrode; a second external electrode comprising a second connecting electrode disposed on the fourth surface and a second band electrode disposed on the first surface and connected to the second connecting electrode; a first insulating layer disposed on the first connecting electrode; a second insulating layer disposed on the second connecting electrode; a first plating layer disposed on the first band electrode; and a second plating layer disposed on the second band electrode; wherein the insulating layer may comprise an oxide comprising silicon (Si). Effects of the invention

[0029] One of the various effects of the present invention is to protect laminated electronic components from thermal expansion and thermal contraction and to form a uniform insulating film.

[0030] One of the various effects of the present invention is to prevent cracks and delamination in stacked electronic components by suppressing the transmission of stress to stacked electronic components as the hardness of the glass layer increases at temperatures below the softening point.

[0031] One of the various effects of the present invention is to suppress the occurrence of radiation cracks caused by the diffusion of metal from the external electrode constituting the stacked electronic component to the internal electrode during the process of raising the temperature.

[0033] However, the various and beneficial advantages and effects of the present invention are not limited to those described above and may be more easily understood in the process of explaining specific embodiments of the present invention. Brief explanation of the drawing

[0035] FIG. 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. Figure 2 is a schematic perspective view of the body of the stacked electronic component of Figure 1. Figure 3 is a cross-sectional view according to II' of Figure 1. FIG. 4 is an exploded perspective view schematically illustrating the body of FIG. 2 disassembled. FIG. 5 is a schematic perspective view of a substrate on which the stacked electronic components of FIG. 1 are mounted. FIG. 6 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 7 is a cross-sectional view taken along II-II' of FIG. 6. FIG. 8 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 9 is a cross-sectional view taken along III-III' of FIG. 8. FIG. 10 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 11 is a cross-sectional view taken along IV-IV' of FIG. 10. FIG. 12 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 13 is a cross-sectional view according to VV' of FIG. 12. FIG. 14 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 15 is a cross-sectional view taken along VI-VI' of FIG. 14. FIG. 16 illustrates a modified example of FIG. 14. FIG. 17 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 18 is a cross-sectional view along VII-VII' of FIG. 17. FIG. 19 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 20 is a cross-sectional view along VIII-VIII' of FIG. 19. FIG. 21 illustrates a modified example of FIG. 19. FIG. 22 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 23 is a cross-sectional view along IX-IX' of FIG. 22. FIG. 25 illustrates a modified example of FIG. 22. FIG. 25 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 26 is a cross-sectional view according to XX' of FIG. 25. FIG. 27 illustrates a modified example of FIG. 25. FIG. 28 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 29 is a cross-sectional view taken along XI-XI' of FIG. 28. FIG. 30 illustrates a modified example of FIG. 28. FIG. 31 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 32 is a cross-sectional view taken along XII-XII' of FIG. 31. FIG. 33 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 34 is a cross-sectional view taken along XIII-XIII' of FIG. 33. FIG. 35 illustrates a modified example of FIG. 33. FIG. 36 schematically illustrates a perspective view of a stacked electronic component according to one embodiment of the present invention. FIG. 37 is a cross-sectional view along XIV-XIV' of FIG. 36. FIG. 38 is an enlarged view of the K1 region of FIG. 36. Specific details for implementing the invention

[0036] Embodiments of the present invention will be described below with reference to specific embodiments and the attached drawings. However, embodiments of the present invention may be modified in various different forms, and the scope of the present invention is not limited to the embodiments described below. Furthermore, embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shapes and sizes of elements in the drawings may be exaggerated for clearer explanation, and elements indicated by the same reference numerals in the drawings are the same elements.

[0037] Furthermore, in order to clearly explain the invention in the drawings, parts unrelated to the explanation are omitted, and the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation; thus, the invention is not necessarily limited to what is illustrated. Additionally, components with the same function within the scope of the same concept are described using the same reference numerals. Moreover, throughout the specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0038] In the drawing, the first direction may be defined as the stacking direction or the thickness (T) direction, the second direction as the length (L) direction, and the third direction as the width (W) direction.

[0040] FIG. 1 is a schematic perspective view of a stacked electronic component according to one embodiment of the present invention.

[0041] Figure 2 is a schematic perspective view of the body of the stacked electronic component of Figure 1.

[0042] Figure 3 is a cross-sectional view according to II' of Figure 1.

[0043] FIG. 4 is an exploded perspective view schematically illustrating the body of FIG. 2 disassembled.

[0044] FIG. 5 is a schematic perspective view of a substrate on which the stacked electronic components of FIG. 1 are mounted.

[0046] Hereinafter, with reference to FIGS. 1 to 5, a stacked electronic component (1000) according to one embodiment of the present invention will be described.

[0048] A stacked electronic component (1000) according to one embodiment of the present invention comprises: a dielectric layer (111); first and second internal electrodes (121, 122) alternately arranged with the dielectric layer in between; a body (110) comprising first and second surfaces (1, 2) facing in a first direction, third and fourth surfaces (3, 4) connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces (5, 6) connected to the first to fourth surfaces and facing in a third direction; and a first external electrode (131) comprising a first connection portion (131a) disposed on the third surface, a first band portion (131b) extending from the first connection portion to a part of the first surface, and a third band portion (131c) extending from the first connection portion to a part of the second surface. A second external electrode (132) comprising a second connection portion (132a) disposed on the fourth surface, a second band portion (132b) extending from the second connection portion to a part of the first surface, and a fourth band portion (132c) extending from the second connection portion to a part of the second surface; an insulating layer (151) disposed on the first and second connection portions and disposed to cover the second surface, the third and fourth band portions (131c, 132c); a first plating layer (141) disposed on the first band portion (131b); and a second plating layer (142) disposed on the second band portion (132b); wherein the insulating layer (151) may include an oxide containing silicon (Si).

[0050] The body (110) has dielectric layers (111) and internal electrodes (121, 122) alternately stacked.

[0051] There are no specific restrictions on the specific shape of the body (110), but as illustrated, the body (110) may be formed in a cuboid shape or a similar shape. Due to the shrinkage of the ceramic powder contained in the body (110) during the firing process, the body (110) may not have a cuboid shape with perfect straight lines, but may have a substantially cuboid shape.

[0052] The body (110) may have first and second surfaces (1, 2) facing each other in a first direction, third and fourth surfaces (3, 4) connected to the first and second surfaces (1, 2) and facing each other in a second direction, and fifth and sixth surfaces (5, 6) connected to the first and second surfaces (1, 2) and facing each other in a third direction.

[0053] In one embodiment, the body (110) includes a first-3 corner connecting a first surface and a third surface, a first-4 corner connecting the first surface and a fourth surface, a second-3 corner connecting the second surface and a third surface, and a second-4 corner connecting the second surface and a fourth surface, wherein the first-3 corner and the second-3 corner have a shape that contracts toward the center of the first direction of the body as they get closer to the third surface, and the first-4 corner and the second-4 corner may have a shape that contracts toward the center of the first direction of the body as they get closer to the fourth surface.

[0054] As the margin area where the internal electrodes (121, 122) are not placed on the dielectric layer (111) overlaps, a step difference occurs due to the thickness of the internal electrodes (121, 122), so that the corner connecting the first surface and the third to sixth surfaces and / or the corner connecting the second surface and the third to sixth surfaces may have a shape that is contracted toward the center of the first direction of the body (110) when viewed with respect to the first surface or the second surface. Alternatively, due to shrinkage behavior during the sintering process of the body, the corner connecting the first surface (1) and the third to sixth surfaces (3, 4, 5, 6) and / or the corner connecting the second surface (2) and the third to sixth surfaces (3, 4, 5, 6) may have a shape that is contracted toward the center of the first direction of the body (110) when viewed with respect to the first surface or the second surface. Alternatively, in order to prevent chipping defects, the corners connecting each face of the body (110) may be rounded by performing a separate process, so that the corner connecting the first face and the third to sixth faces and / or the corner connecting the second face and the third to sixth faces may have a round shape.

[0055] The above corners may include a 1-3 corner connecting the first surface and the third surface, a 1-4 corner connecting the first surface and the fourth surface, a 2-3 corner connecting the second surface and the third surface, and a 2-4 corner connecting the second surface and the fourth surface. Additionally, the corners may include a 1-5 corner connecting the first surface and the fifth surface, a 1-6 corner connecting the first surface and the sixth surface, a 2-5 corner connecting the second surface and the fifth surface, and a 2-6 corner connecting the second surface and the sixth surface. The first to sixth surfaces of the body (110) may generally be flat surfaces, and uneven areas may be viewed as corners. Hereinafter, the extension line of each surface may mean a line extended based on the flat part of each surface.

[0056] At this time, among the external electrodes (131, 132), the area placed on the corner of the body (110) may be called the corner portion, the area placed on the third and fourth surfaces of the body (110) may be called the connection portion, and the area placed on the first and second surfaces of the body may be called the band portion.

[0057] Meanwhile, in order to suppress the step difference caused by the internal electrodes (121, 122), after lamination, the internal electrodes are cut so that they are exposed to the fifth and sixth surfaces (5, 6) of the body, and then a single dielectric layer or two or more dielectric layers are laminated in the third direction (width direction) on both sides of the capacitance forming part (Ac) to form a margin part (114, 115), the part connecting the first surface and the fifth and sixth surfaces and the part connecting the second surface and the fifth and sixth surfaces may not have a shrunken shape.

[0059] A plurality of dielectric layers (111) forming the body (110) are in a sintered state, and the boundary between adjacent dielectric layers (111) can be integrated to such an extent that it is difficult to verify without using a scanning electron microscope (SEM).

[0060] According to one embodiment of the present invention, the raw material forming the dielectric layer (111) is not particularly limited as long as sufficient capacitance can be obtained. For example, a barium titanate-based material, a lead composite perovskite-based material, or a strontium titanate-based material may be used. The barium titanate-based material may include BaTiO3-based ceramic powder, and examples of the ceramic powder include BaTiO3, or BaTiO3 in which Ca (calcium), Zr (zirconium), etc. are partially dissolved (Ba 1-x Ca x )TiO3(0 <x<1), Ba(Ti 1-y Ca y )O3(0 <y<1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3(0 <x<1, 0<y<1)또는 Ba(Ti1-y Zr y )O3(0 <y<1) 등을 들 수 있다.

[0061] In addition, the raw material forming the dielectric layer (111) may have various ceramic additives, organic solvents, binders, dispersants, etc. added to a powder such as barium titanate (BaTiO3) according to the purpose of the present invention.

[0063] Meanwhile, the average thickness (td) of the dielectric layer (111) does not need to be specifically limited.

[0064] However, generally, when the dielectric layer is formed thinly with a thickness of less than 0.6 μm, especially when the thickness of the dielectric layer is 0.35 μm or less, there was a concern that reliability would be reduced.

[0065] According to one embodiment of the present invention, by placing an insulating layer on the connection portion of an external electrode and placing a plating layer on the band portion of an external electrode, the penetration of external moisture and plating solution can be prevented, thereby improving reliability, so excellent reliability can be secured even when the average thickness of the dielectric layer (111) is 0.35 μm or less.

[0066] Therefore, when the average thickness of the dielectric layer (111) is 0.35 μm or less, the reliability improvement effect according to the present invention can be more pronounced.

[0067] The average thickness (td) of the dielectric layer (111) may refer to the average thickness of the dielectric layer (111) disposed between the first and second internal electrodes (121, 122).

[0068] The average thickness of the dielectric layer (111) can be measured by scanning an image of the cross-section of the body (110) in the length and thickness direction (LT) using a scanning electron microscope (SEM) at a magnification of 10,000. More specifically, the average value can be measured by measuring the thickness of a dielectric layer at 30 equally spaced points in the length direction from the scanned image. The 30 equally spaced points can be designated in the capacitance forming unit (Ac). In addition, if this average value measurement is extended to 10 dielectric layers and the average value is measured, the average thickness of the dielectric layer can be further generalized.

[0070] The body (110) may include a capacitance forming part (Ac) in which a capacitance is formed by including a first internal electrode (121) and a second internal electrode (122) that are positioned facing each other with a dielectric layer (111) in between, and cover parts (112, 113) formed on the upper and lower sides of the first direction of the capacitance forming part (Ac).

[0071] In addition, the capacitance forming part (Ac) is a part that contributes to the capacitance formation of the capacitor, and can be formed by repeatedly stacking a plurality of first and second internal electrodes (121, 122) with a dielectric layer (111) in between.

[0073] The cover portion (112, 113) may include an upper cover portion (112) positioned above the first direction of the capacity forming portion (Ac) and a lower cover portion (113) positioned below the first direction of the capacity forming portion (Ac).

[0074] The upper cover portion (112) and lower cover portion (113) can be formed by stacking a single dielectric layer or two or more dielectric layers in the thickness direction on the upper and lower surfaces of the capacitance forming portion (Ac), respectively, and can basically perform the role of preventing damage to the internal electrode due to physical or chemical stress.

[0075] The upper cover portion (112) and lower cover portion (113) above do not include an internal electrode and may include the same material as the dielectric layer (111).

[0076] That is, the upper cover portion (112) and the lower cover portion (113) may include a ceramic material, for example, a barium titanate (BaTiO3)-based ceramic material.

[0077] Meanwhile, the average thickness of the cover portions (112, 113) does not need to be specifically limited. However, in order to more easily achieve miniaturization and high capacity of the stacked electronic component, the average thickness (tc) of the cover portions (112, 113) may be 15 μm or less. In addition, according to one embodiment of the present invention, by placing an insulating layer on the connection portion of the external electrode and placing a plating layer on the band portion of the external electrode, the penetration of external moisture and plating solution can be prevented, thereby improving reliability. Therefore, excellent reliability can be secured even when the average thickness (tc) of the cover portions (112, 113) is 15 μm or less.

[0078] The average thickness (tc) of the cover portion (112, 113) may mean the first direction size and may be the average value of the first direction sizes of the cover portion (112, 113) measured at five equally spaced points on the upper or lower part of the capacitance forming portion (Ac).

[0080] In addition, a margin portion (114, 115) may be disposed on the side of the above-mentioned capacity forming portion (Ac).

[0081] The margin portions (114, 115) may include a first margin portion (114) disposed on the fifth surface (5) of the body (110) and a second margin portion (115) disposed on the sixth surface (6). That is, the margin portions (114, 115) may be disposed on both end surfaces in the width direction of the ceramic body (110).

[0082] The margin portion (114, 115) may refer to the area between the two ends of the first and second internal electrodes (121, 122) and the boundary surface of the body (110) in a cross-section cut in the width-thickness (WT) direction of the body (110), as shown in FIG. 3.

[0083] The margin portion (114, 115) can basically perform the role of preventing damage to the internal electrode due to physical or chemical stress.

[0084] The margin portion (114, 115) may be formed by applying a conductive paste to the ceramic green sheet, excluding the area where the margin portion is to be formed, to form an internal electrode.

[0085] In addition, to suppress the step difference caused by the internal electrodes (121, 122), after lamination, the internal electrodes may be cut so that they are exposed to the fifth and sixth sides (5, 6) of the body, and then a single dielectric layer or two or more dielectric layers may be laminated in the third direction (width direction) on both sides of the capacitance forming part (Ac) to form a margin part (114, 115).

[0086] Meanwhile, the width of the margin portion (114, 115) does not need to be specifically limited. However, in order to more easily achieve miniaturization and high capacity of the stacked electronic component, the average width of the margin portion (114, 115) may be 15 μm or less. In addition, according to one embodiment of the present invention, by placing an insulating layer on the connection portion of the external electrode and placing a plating layer on the band portion of the external electrode, the penetration of external moisture and plating solution can be prevented, thereby improving reliability. Therefore, excellent reliability can be secured even when the average width of the margin portion (114, 115) is 15 μm or less.

[0087] The average width of the margin portion (114, 115) may mean the average size of the third direction of the margin portion (114, 115), and may be the average value of the third direction sizes of the margin portion (114, 115) measured at five equally spaced points on the side of the capacitance forming portion (Ac).

[0089] The internal electrodes (121, 122) are alternately stacked with the dielectric layer (111).

[0090] The internal electrodes (121, 122) may include first and second internal electrodes (121, 122). The first and second internal electrodes (121, 122) are alternately arranged to face each other with the dielectric layer (111) constituting the body (110) in between, and may be exposed to the third and fourth surfaces (3, 4) of the body (110), respectively.

[0091] Referring to FIG. 3, the first internal electrode (121) may be spaced apart from the fourth surface (4) and exposed through the third surface (3), and the second internal electrode (122) may be spaced apart from the third surface (3) and exposed through the fourth surface (4). A first external electrode (131) may be disposed on the third surface (3) of the body and connected to the first internal electrode (121), and a second external electrode (132) may be disposed on the fourth surface (4) of the body and connected to the second internal electrode (122).

[0092] That is, the first internal electrode (121) is connected to the first external electrode (131) but is not connected to the second external electrode (132), and the second internal electrode (122) is connected to the second external electrode (132) but is not connected to the first external electrode (131). Accordingly, the first internal electrode (121) can be formed at a certain distance from the fourth surface (4), and the second internal electrode (122) can be formed at a certain distance from the third surface (3).

[0093] At this time, the first and second internal electrodes (121, 122) can be electrically separated from each other by a dielectric layer (111) placed in the middle.

[0094] The body (110) can be formed by alternately stacking a ceramic green sheet with a first internal electrode (121) printed thereon and a ceramic green sheet with a second internal electrode (122) printed thereon, and then firing them.

[0095] The material forming the internal electrode (121, 122) is not particularly limited and a material with excellent electrical conductivity may be used. For example, the internal electrode (121, 122) may include one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0096] Additionally, the internal electrodes (121, 122) can be formed by printing a conductive paste for internal electrodes, comprising one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof, onto a ceramic green sheet. The printing method of the conductive paste for internal electrodes may include screen printing or gravure printing, but the present invention is not limited thereto.

[0098] Meanwhile, the average thickness (te) of the internal electrodes (121, 122) does not need to be specifically limited.

[0099] However, generally, when the internal electrode is formed thinly with a thickness of less than 0.6 μm, especially when the thickness of the internal electrode is 0.35 μm or less, there was a concern that reliability would be reduced.

[0100] According to one embodiment of the present invention, by placing an insulating layer on the connection portion of an external electrode and placing a plating layer on the band portion of an external electrode, the penetration of external moisture and plating solution can be prevented, thereby improving reliability, so excellent reliability can be secured even when the average thickness of the internal electrode (121, 122) is 0.35 μm or less.

[0101] Accordingly, when the thickness of the internal electrodes (121, 122) is 0.35 μm or less on average, the effect according to the present invention can be more pronounced, and the miniaturization and high capacity of the ceramic electronic component can be achieved more easily.

[0102] The average thickness (te) of the internal electrodes (121, 122) above may mean the average thickness of the internal electrodes (121, 122).

[0103] The average thickness of the internal electrodes (121, 122) can be measured by scanning an image of the cross-section of the body (110) in the length and thickness direction (LT) using a scanning electron microscope (SEM) at a magnification of 10,000. More specifically, the average value can be measured by measuring the thickness of one internal electrode at 30 equally spaced points in the length direction from the scanned image. The 30 equally spaced points can be designated in the capacitance forming unit (Ac). Additionally, if this average value measurement is extended to 10 internal electrodes and the average value is measured, the average thickness of the internal electrodes can be further generalized.

[0105] The external electrodes (131, 132) may be disposed on the third surface (3) and the fourth surface (4) of the body (110). The external electrodes (131, 132) may include first and second external electrodes (131, 132) respectively disposed on the third and fourth surfaces (3, 4) of the body (110) and connected to the first and second internal electrodes (121, 122) respectively.

[0106] The external electrodes (131, 132) may include a first external electrode (131) comprising a first connection portion (131a) disposed on a third surface and a first band portion (131b) extending from the first connection portion to a part of the first surface, and a second external electrode (132) comprising a second connection portion (132a) disposed on a fourth surface and a second band portion (132b) extending from the second connection portion to a part of the first surface. The first connection portion (131a) may be connected to the first internal electrode (121) on the third surface, and the second connection portion (132a) may be connected to the second internal electrode (122) on the fourth surface.

[0107] Additionally, the first external electrode (131) may include a third band portion (131c) extending from the first connection portion (131a) to a part of the second surface, and the second external electrode (132) may include a fourth band portion (132c) extending from the second connection portion (132a) to a part of the second surface. Furthermore, the first external electrode (131) may include a first side band portion extending from the first connection portion (131a) to a part of the fifth and sixth surfaces, and the second external electrode (132) may include a second side band portion extending from the second connection portion (132a) to a part of the fifth and sixth surfaces.

[0108] However, the third band portion, the fourth band portion, the first side band portion, and the second side band portion may not be essential components of the present invention. The first and second external electrodes (131, 132) may not be disposed on the second surface, nor may they be disposed on the fifth and sixth surfaces. Since the first and second external electrodes (131, 132) are not disposed on the second surface, the first and second external electrodes (131, 132) may be disposed below the extension line of the second surface of the body. Additionally, the first and second connection portions (131a, 132a) may be disposed spaced apart from the fifth and sixth surfaces, and the first and second connection portions (131a, 132a) may be disposed spaced apart from the second surface. Additionally, the first and second band portions (131b, 132b) may also be disposed spaced apart from the fifth and sixth surfaces.

[0109] Meanwhile, when the first and second external electrodes (131, 132) include third and fourth band portions (131c, 132c), an insulating layer is shown disposed on the third and fourth band portions (131c, 132c), but is not limited thereto, and a plating layer may be disposed on the third and fourth band portions (131c, 132c) to improve ease of mounting. Additionally, the first and second external electrodes (131, 132) may be in a form that includes the third and fourth band portions (131c, 132c) but does not include the side band portions, in which case the first and second connection portions (131a, 132a) and the first to fourth band portions (131a, 132b, 131c, 132c) may have a form that is spaced apart from the fifth and sixth surfaces.

[0111] In this embodiment, a ceramic electronic component (100) is described having a structure having two external electrodes (131, 132), but the number or shape of the external electrodes (131, 132) may change depending on the shape of the internal electrodes (121, 122) or other purposes.

[0113] Meanwhile, the external electrodes (131, 132) can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc., and furthermore, they can have a multilayer structure.

[0114] The external electrode (131, 132) may be a fired electrode including a conductive metal and glass, or a resin-based electrode including a conductive metal and resin.

[0115] Additionally, the external electrodes (131, 132) may be formed such that a sintered electrode and a resin-based electrode are sequentially formed on the body. Additionally, the external electrodes (131, 132) may be formed by transferring a sheet containing a conductive metal onto the body, or by transferring a sheet containing a conductive metal onto the sintered electrode.

[0116] The conductive metal included in the external electrodes (131, 132) may be a material with excellent electrical conductivity and is not specifically limited. For example, the conductive metal may be one or more of Cu, Ni, Pd, Ag, Sn, Cr, and their alloys. Preferably, the external electrodes (131, 132) may include one or more of Ni and Ni alloys, thereby further improving connectivity with the internal electrodes (121, 122) containing Ni.

[0118] The insulating layer (151) can be placed on the first and second connection parts (131a, 132a).

[0119] Since the first and second connection portions (131a, 132a) are parts connected to the internal electrodes (121, 122), they can become a path for the penetration of plating solution during the plating process or for moisture penetration during actual use. In the present invention, since an insulating layer (151) is disposed on the connection portions (131a, 132a), the penetration of external moisture or plating solution can be prevented.

[0120] The insulating layer (151) may be positioned to be in contact with the first and second plating layers (141, 142). At this time, the insulating layer (151) may be in contact with the first and second plating layers (141, 142) in a manner that partially covers the ends of the insulating layer (151), or the first and second plating layers (141, 142) may be in contact with the insulating layer (151) in a manner that partially covers the ends of the insulating layer (151).

[0121] An insulating layer (151) is disposed on the first and second connection portions (131a, 132a) and may be disposed to cover the second surface and the third and fourth band portions (131c, 132c). At this time, the insulating layer (151) may be disposed to cover the area of ​​the second surface where the third and fourth band portions (131c, 132c) are not disposed, and the third and fourth band portions (131c, 132c). Accordingly, the insulating layer (151) can further improve moisture resistance reliability by covering the area where the ends of the third and fourth band portions (131c, 132c) and the body (110) come into contact, thereby blocking the moisture penetration path.

[0122] The insulating layer (151) may be disposed on the second surface and extended to the first and second connection parts (131a, 132a). Additionally, if the external electrodes (131, 132) are not disposed on the second surface, the insulating layer may be disposed to cover the entire second surface. Meanwhile, the insulating layer (151) does not necessarily have to be disposed on the second surface; the insulating layer may not be disposed on part or all of the second surface, and the insulating layer may be separated into two parts and disposed on the first and second connection parts (131a, 132a), respectively. If the insulating layer is not disposed on the entire second surface, it may be disposed below the extension line of the second surface. Additionally, the insulating layer may not be disposed on the second surface but may extend to the fifth and sixth surfaces on the first and second connection parts (131a, 132a) to form a single insulating layer.

[0123] Furthermore, the insulating layer (151) may be positioned to cover parts of the first and second side band portions, the fifth surface, and the sixth surface. At this time, parts of the fifth surface and the sixth surface that are not covered by the insulating layer (151) may be exposed to the outside.

[0124] Additionally, the insulating layer (151) may be arranged to cover all of the first and second side band portions, the fifth surface, and the sixth surface. In this case, the fifth surface and the sixth surface are not exposed to the outside, thereby improving moisture resistance reliability, and the connection portions (131a, 132a) are also not directly exposed to the outside, thereby improving the reliability of the stacked electronic component (1000). More specifically, the insulating layer may cover all of the first and second side band portions and cover all of the fifth and sixth surfaces except for the area where the first and second side band portions are formed.

[0126] The insulating layer (151) can prevent the formation of a plating layer (141, 142) on the external electrode (131, 132) on which the insulating layer (151) is placed, and can improve sealing characteristics to minimize the penetration of moisture or plating solution from the outside.

[0128] The insulating layer (151) may include an oxide containing silicon (Si).

[0129] To mount stacked electronic components onto a substrate, a solder reflow process is required. During this process, temperature fluctuations occur, leading to thermal expansion and contraction, which can apply tensile stress to the stacked electronic components. Such tensile stress can cause cracks in the components, thereby degrading their electrical characteristics.

[0130] Conventionally, to protect laminated electronic components from thermal shock caused by thermal expansion and contraction, an insulating layer made of a glass-based material was formed on a portion of the surface of the external electrode and body.

[0131] An insulating layer containing a glass-based material can be formed by molding glass powder or glass paste and then raising and lowering the temperature to near the softening point. At this time, during the process of raising and lowering the temperature of the insulating layer, clumping of the insulating layer may occur, making it difficult to form a uniform film. Additionally, as the hardness of the insulating layer increases at temperatures below the softening point, stress is transmitted to the stacked electronic component, which may cause cracks and delamination in the stacked electronic component. Furthermore, during the process of raising the temperature, there is a risk that the metal of the external electrodes (131, 132) constituting the stacked electronic component (1000) may diffuse into the internal electrodes (121, 122), causing radiation cracks. In particular, if the thickness of the insulating layer (151) and the internal electrodes (121, 122) is reduced to increase the capacity and miniaturization of the stacked electronic component (1000), it may become more vulnerable to radiation cracks and delamination.

[0133] In an embodiment of the present invention, the insulating layer (151) in the stacked electronic component (1000) includes an oxide containing Si, thereby preventing the agglomeration of the insulating layer to form a uniform film, and preventing stress from being transmitted to the stacked electronic component (1000) as the hardness increases at high temperatures. Additionally, since the insulating layer containing an oxide containing Si can be formed at a lower temperature compared to a general glass layer, the phenomenon of the metal of the external electrodes (131, 132) constituting the stacked electronic component (1000) diffusing to the internal electrodes (121, 122) can be suppressed, thereby reducing the occurrence of radiation cracks.

[0134] Meanwhile, the higher the content of Si included in the insulating layer (151), the more effectively the penetration of external moisture can be prevented compared to an insulating layer of the same thickness formed of other materials, and the corrosion resistance and resistance to acids or bases such as plating solutions can be improved.

[0135] In one embodiment, the insulating layer may have a mole of Si atoms equal to a mole of the remaining elements excluding oxygen, such that the mole of Si atoms is 0.95 or more. That is, the insulating layer (151) may be composed of an oxide substantially containing Si, excluding elements detected as impurities.

[0136] Meanwhile, there may be various methods for forming an insulating layer (151) containing an oxide containing Si. For example, it may be formed by sol-gel processing, chemical vapor deposition (CVD), atomic layer deposition (ALD), etc., but is not limited thereto, and may also be formed by other methods that can form a thin and uniform insulating layer.

[0137] Meanwhile, the oxide containing Si may be silica (SiO2). Silica (SiO2) can form a thin and uniform insulating layer (151) compared to general glass-based materials, and has excellent impact resistance and corrosion resistance compared to other inorganic materials such as alumina (Al2O3).

[0138] In one embodiment, the oxide containing Si included in the insulating layer (151) may be silica (SiO2), and accordingly, the insulating layer (151) of the stacked electronic component (1000) can be formed uniformly, and the occurrence of cracks and delamination can be suppressed and the occurrence of radiation cracks can be suppressed.

[0140] In the case where the insulating layer (151) includes an oxide containing Si, such as in a stacked electronic component (1000) according to one embodiment of the present invention, each material forming the insulating layer may exist unstably.

[0141] Boron-containing oxides can stabilize the insulating layer by forming compounds with other materials included in the insulating layer, such as SiO2, ZnO, etc. In one embodiment, the insulating layer (151) containing a Si-containing oxide can improve the stability of the insulating layer (151) by further including a boron-containing oxide to organically bond the materials.

[0143] In particular, if the insulating layer (151) contains an oxide containing boron, it can react with the barium oxide on the surface of the body (110) at a low temperature to form an eutectic. Accordingly, in one embodiment, the stacked electronic component (1000) may further include an adhesive layer containing barium and boron at the interface where the insulating layer (151) containing an oxide containing boron and the body (110) come into contact.

[0144] Since the material included in the insulating layer is an insulating material such as SiO2 or B2O3, it has poor adhesion to the first and second external electrodes (131, 132) containing a conductive metal. Although the insulating layer (151) and the first and second external electrodes (131, 132) of the stacked electronic component (1000) according to one embodiment of the present invention have poor adhesion to the body (110) containing the insulating material, the strength of the entire stacked electronic component (1000) can be improved.

[0146] More preferably, an oxide containing boron included in the insulating layer (151) and a barium oxide included in the body (110) can form an eutectic bonding at the interface where the insulating layer (151) and the body (110) come into contact, and an adhesive layer containing barium and boron can be formed, and the strength of the entire stacked electronic component (1000) can be further improved.

[0148] In one embodiment, the insulating layer (151) further includes a boric oxide and an adhesive layer including barium and boron at the interface where the insulating layer (151) and the body (110) meet, thereby improving the adhesion between the insulating layer (151) and the body (110) and improving the overall strength of the stacked electronic component (1000).

[0149] At this time, the composition of the insulating layer (151) may be calculated from an image observed using SEM-EDS (Scanning Electron Microscope - Energy Dispersive X-ray Spectroscopy). Specifically, after polishing a stacked electronic component to the center position in the width direction (third direction) to expose the cross-section in the length direction and thickness direction (LT cross-section), the moles of each element included in the insulating layer can be measured using EDS in the central region among the regions in which the insulating layer is divided into five parts in the thickness direction, and the moles of Si atoms or boron atoms can be calculated relative to the total moles of the remaining elements excluding oxygen atoms.

[0151] Meanwhile, in another embodiment of the stacked electronic component (1000) according to one embodiment, the stacked electronic component (1000) according to another embodiment of the present invention comprises a dielectric layer (111) and first and second internal electrodes (121, 122) alternately arranged with the dielectric layer (111) in between, and a body (110) comprising first and second surfaces (1, 2) facing in a first direction, third and fourth surfaces (3, 4) connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces (5, 6) connected to the first to fourth surfaces and facing in a third direction; and a first external electrode (131) comprising a first connection portion (131a) disposed on the third surface (3) and a first band portion (131b) extending from the first connection portion (131a) to a part of the first surface (1). A second external electrode (132) comprising a second connection portion (132a) disposed on the fourth surface (4) and a second band portion (132b) extending from the second connection portion (132a) to a part of the first surface (1); an insulating layer (151) disposed on the second surface (2) and extending to a part of the first and second connection portions (131a), and a plating layer (141, 142) disposed on the first and second band portions (131b, 132b); wherein the insulating layer (151) may comprise at least one of an oxide containing boron (B), a borosilicate, and a zinc-borosilicate.

[0153] Insulating layers containing conventional glass-based materials have a coefficient of thermal expansion that is relatively larger than that of the ceramic body or external electrode, which can apply excessive stress to stacked electronic components.

[0154] When the insulating layer contains a boron-containing oxide, it is possible to form the insulating layer at a lower temperature compared to an insulating layer containing a glass-based material, thereby preventing radiation cracks that may occur during the insulating layer formation process, and it has the advantage of being able to be formed by various methods such as liquid phase and gas phase methods.

[0155] In addition, the insulating layer containing a boron-containing oxide has a lower coefficient of thermal expansion compared to the insulating layer containing a glass-based material, so it can minimize the stress applied to the stacked electronic component even when heat treatment is performed on the stacked electronic component or when external thermal shock is applied, and since it has strong resistance to physical shock, it can act as a buffer to protect the stacked electronic component.

[0156] In one embodiment, the reliability of the stacked electronic component (1000) can be improved by making the insulating layer (151) include a boric oxide.

[0157] Meanwhile, the oxide containing boron is preferably composed of B2O3, but is not limited thereto.

[0158] In one embodiment, the insulating layer (151) may have a mole of boron atoms of 0.95 or more relative to the total mole of elements other than oxygen atoms. That is, the insulating layer (151) may be composed of an oxide substantially containing boron, excluding elements detected as impurities.

[0160] Borosilicate has higher corrosion resistance compared to boric oxide containing boron, so it can serve not only as an insulating layer but also protect the stacked electronic component from the penetration of plating solution, and has low moisture permeability. In one embodiment, by making the insulating layer (151) include borosilicate, the penetration of moisture and plating solution from the outside of the stacked electronic component (1000) can be prevented, thereby improving reliability.

[0161] In one embodiment, the insulating layer (151) may have a mole ratio of boron and silicon atoms to the total mole ratio of elements other than oxygen atoms at 0.95 or higher. That is, the insulating layer (151) may substantially consist of borosilicate, excluding elements detected as impurities.

[0163] Zinc-borosilicate can be formed at a lower temperature compared to borosilicate, which further prevents the formation of radiating cracks, and has good wettability with metals such as Cu included in the external electrode.

[0164] In one embodiment, by including zinc-borosilicate in the insulating layer (151), the formation of radiating cracks can be prevented, and at the same time, the bonding strength between the insulating layer (151) and the first and second external electrodes (131, 132) can be improved. In addition, the improved bonding strength can help improve the reliability of the stacked electronic component (1000) by preventing the penetration of plating solution and moisture.

[0165] In one embodiment, the insulating layer (151) may have a mole ratio of boron, silicon, and zinc atoms to the total mole ratio of elements other than oxygen atoms at a ratio of 0.95 or higher. That is, the insulating layer (151) may substantially consist of zinc borosilicate, excluding elements detected as impurities.

[0167] Meanwhile, there may be various methods for forming an insulating layer comprising at least one of a boric oxide, a borosilicate, and a zinc-borosilicate. For example, it may be formed by sol-gel processing, chemical vapor deposition (CVD), atomic layer deposition (ALD), etc., but is not limited thereto, and may also be formed by other methods capable of forming a thin and uniform insulating layer.

[0169] At this time, the composition of the insulating layer (151) may be calculated from an image observed using SEM-EDS (Scanning Electron Microscope - Energy Dispersive X-ray Spectroscopy). Specifically, after polishing a stacked electronic component to the center position in the width direction (third direction) to expose the cross-section in the length direction and thickness direction (LT cross-section), the moles of each element included in the insulating layer can be measured using EDS in the central region among the regions in which the insulating layer is divided into five parts in the thickness direction, and the moles of Si atoms, moles of boron atoms, or moles of zinc atoms can be calculated relative to the total moles of the remaining elements excluding oxygen atoms.

[0171] In one embodiment, the insulating layer (151) may include at least one of a boric oxide, a borosilicate, and a zinc-borosilicate, and may also include various additives. By making the insulating layer (151) include at least one of a boric oxide, a borosilicate, and a zinc-borosilicate, the stress applied to the stacked electronic component (1000) from external thermal shock is reduced, thereby reducing the occurrence of cracks and delamination, preventing the formation of radiating cracks, and preventing the penetration of plating solution and external moisture, thereby improving the reliability of the stacked electronic component (1000).

[0173] The first and second plating layers (141, 142) can be placed on the first and second band portions (131b, 132b), respectively. The plating layers (141, 142) can perform a role in improving mounting characteristics, and as the plating layers (141, 142) are placed on the band portions (131b, 132b), the mounting space can be minimized and reliability can be improved by minimizing the penetration of the plating solution into the internal electrode. One end of the first and second plating layers (141, 142) can be in contact with the first surface, and the other end can be in contact with the insulating layer (151).

[0174] The type of plating layer (141, 142) is not specifically limited and may be a plating layer comprising one or more of Cu, Ni, Sn, Ag, Au, Pd and alloys thereof, and may be formed into multiple layers.

[0175] As a more specific example regarding the plating layer (141, 142), the plating layer (141, 142) may be a Ni plating layer or a Sn plating layer, and may be in the form where the Ni plating layer and the Sn plating layer are sequentially formed on the first and second band portions (131b, 132b).

[0177] In one embodiment, the first and second plating layers (141, 142) may be extended and arranged to partially cover the first and second connection portions (131a, 132a), respectively. When the average size in the first direction to the internal electrode closest to the first surface (1) among the first and second internal electrodes (121, 122) is denoted as H1, and the average size in the first direction to the end of the first and second plating layers (141, 142) arranged on the first and second connection portions (131a, 132a) from the extension line of the first surface (1) is denoted as H2, H1 > H2 can be satisfied. Accordingly, the penetration of the plating solution into the internal electrode during the plating process can be suppressed, thereby improving reliability.

[0178] H1 and H2 may be the average of values ​​measured at cross-sections (LT cross-sections) cut in the first and second directions at five points that are equally spaced in the third direction of the body (110). H1 may be the average of values ​​measured at the point where the internal electrode placed closest to the first surface (1) in each cross-section is connected to the external electrode, and H2 may be the average of values ​​measured based on the end of the plating layer in contact with the external electrode, and the extension line of the first surface that serves as the reference when measuring H1 and H2 may be the same.

[0180] In one embodiment, the first plating layer (141) is positioned to cover the end portion disposed on the first external electrode (131) of the insulating layer (151), and the second plating layer (142) may be positioned to cover the end portion disposed on the second external electrode (132) of the insulating layer (151). Accordingly, the bonding strength between the insulating layer (151) and the plating layers (141, 142) can be strengthened to improve the reliability of the stacked electronic component (1000).

[0181] In one embodiment, the insulating layer (151) is positioned to cover the end positioned on the first external electrode (131) of the first plating layer (141), and the insulating layer (151) may be positioned to cover the end positioned on the second external electrode (132) of the second plating layer (142). Accordingly, the bonding strength between the insulating layer (151) and the plating layers (141, 142) can be strengthened to improve the reliability of the stacked electronic component (1000).

[0183] In one embodiment, when the second direction average size of the body (110) is L, the second direction average size from the extension line of the third surface to the end of the first band portion is B1, and the second direction average size from the extension line of the fourth surface to the end of the second band portion is B2, then 0.2≤B1 / L≤0.4 and 0.2≤B2 / L≤0.4 can be satisfied.

[0184] If B1 / L and B2 / L are less than 0.2, it may be difficult to secure sufficient adhesion strength. On the other hand, if B2 / L is greater than 0.4, there is a risk that leakage current may occur between the first band portion (131b) and the second band portion (132b) under high voltage current, and there is a risk that the first band portion (131b) and the second band portion (132b) may become electrically connected due to plating bleeding during the plating process.

[0185] B1, B2 and L may be the average of values ​​measured at cross-sections (LT cross-sections) cut in the first and second directions at five equally spaced points in the third direction of the body (110).

[0187] Referring to FIG. 5, which illustrates a mounting substrate (1100) on which a stacked electronic component (1000) is mounted, the plating layer (141, 142) of the stacked electronic component (1000) can be joined by electrode pads (181, 182) disposed on the substrate (180) and solder (191, 192).

[0188] Meanwhile, when the internal electrodes (121, 122) are stacked in a first direction, the stacked electronic component (1000) can be horizontally mounted on the substrate (180) so that the internal electrodes (121, 122) are parallel to the mounting surface. However, the present invention is not limited to horizontal mounting, and when the internal electrodes (121, 122) are stacked in a third direction, the stacked electronic component can be vertically mounted on the substrate so that the internal electrodes (121, 122) are perpendicular to the mounting surface.

[0190] The size of the stacked electronic component (1000) does not need to be specifically limited.

[0191] However, in order to achieve both miniaturization and high capacity simultaneously, the thickness of the dielectric layer and internal electrode must be reduced to increase the number of layers, so the reliability and capacity improvement effects per unit volume according to the present invention can be more pronounced in a stacked electronic component (1000) having a size of 1005 (length x width, 1.0 mm x 0.5 mm) or less.

[0192] Accordingly, considering manufacturing error, external electrode size, etc., if the length of the ceramic electronic component (100) is 1.1 mm or less and the width is 0.55 mm or less, the reliability improvement effect according to the present invention may be more pronounced. Here, the length of the stacked electronic component (1000) refers to the maximum size in the second direction of the stacked electronic component (1000), and the width of the stacked electronic component (1000) may refer to the maximum size in the third direction of the stacked electronic component (1000).

[0194] FIG. 6 is a schematic perspective view of a stacked electronic component (1001) according to one embodiment of the present invention, and FIG. 7 is a cross-sectional view according to II-II' of FIG. 6.

[0195] Referring to FIGS. 6 and 7, in a stacked electronic component (1001) according to one embodiment of the present invention, the first and second plating layers (141-1, 142-1) may be arranged below the extension line (E1) of the first surface. Accordingly, the height of the solder can be minimized during mounting and the mounting space can be minimized.

[0196] Additionally, the insulating layer (151-1) may be extended below the extension line of the first surface and arranged to be in contact with the first and second plating layers (141-1, 142-1).

[0198] FIG. 8 is a schematic perspective view of a stacked electronic component (1002) according to one embodiment of the present invention, and FIG. 9 is a cross-sectional view along III-III' of FIG. 8.

[0199] Referring to FIGS. 8 and 9, a stacked electronic component (1002) according to one embodiment of the present invention may further include an additional insulating layer (161) disposed on a first surface (1) and disposed between a first band portion (131b) and a second band portion (132b). Accordingly, leakage current, etc., that may occur between the first band portion (131b) and the second band portion (132b) under high voltage current can be prevented.

[0200] The type of additional insulating layer (161) does not need to be specifically limited. For example, like the insulating layer (151), it may include at least one of an oxide containing Si, a boron oxide (boric oxide), a borosilicate, and a zinc-borosilicate. Meanwhile, the additional insulating layer (161) and the insulating layer (151) do not need to be formed of the same material and may be formed of different materials. For example, the additional insulating layer (161) may include one or more thermosetting resins selected from epoxy resin, acrylic resin, etc. In addition, the additional insulating layer (161) may include one or more additives selected from TiO2, BaTiO3, Al2O3, SiO2, BaO, etc., in addition to the polymer resin. Accordingly, the bonding strength with the body or external electrode can be improved.

[0202] FIG. 10 is a schematic perspective view of a stacked electronic component (1003) according to one embodiment of the present invention, and FIG. 11 is a cross-sectional view according to IV-IV' of FIG. 10.

[0203] Referring to FIGS. 10 and 11, in a multilayer electronic component 1003 according to an embodiment, when H1 is an average size in a first direction from a first surface 1 to an internal electrode disposed closest to the first surface 1 among first and second internal electrodes 121 and 122, and H2 is an average size in the first direction from an extension line of the first surface 1 to an end of plating layers 141-3 and 142-3 disposed on first and second connection parts 131a and 132a, the multilayer electronic component can satisfy H1<H2. Accordingly, adhesion strength can be improved by increasing a contact area with solder during mounting.

[0204] More preferably, when T is an average size of a body 110 in the first direction, the multilayer electronic component can satisfy H2<T / 2. That is, the multilayer electronic component can satisfy H1<H2<T / 2. This is because when H2 is equal to or greater than T / 2, there is a risk that the effect of improving moisture resistance reliability by an insulating layer may be reduced.

[0205] H1, H2, and T may be average values of values measured in cross-sections (L-T cross-sections) obtained by cutting the body 110 in the first and second directions at five equally spaced points in a third direction. H1 may be an average value of values measured at a point where the internal electrode disposed closest to the first surface 1 in each cross-section is connected to an external electrode, H2 may be an average value of values measured based on an end of the plating layer in contact with the external electrode in each cross-section, and the extension line of the first surface serving as a reference when measuring H1 and H2 may be the same. In addition, T may be an average value obtained after measuring the maximum size of the body 110 in the first direction in each cross-section.

[0207] FIG. 12 is a schematic perspective view of a multilayer electronic component 1004 according to an embodiment of the present invention, and FIG. 13 is a cross-sectional view taken along line V-V' of FIG. 12.

[0208] Referring to FIG. 12 and FIG. 13, in a stacked electronic component (1004) according to one embodiment of the present invention, the average length (B1) of the first band portion (131b-4) may be longer than the average length (B3) of the third band portion (131c-4), and the average length of the second band portion (132b-4) may be longer than the average length (B4) of the fourth band portion (132c-4). Accordingly, the area in contact with the solder during mounting can be increased to improve adhesion strength.

[0209] More specifically, when the second direction average size from the extension line of the third surface (3) to the end of the first band portion (131b-4) is denoted as B1, the second direction average size from the extension line of the fourth surface (4) to the end of the second band portion (132b-4) is denoted as B2, the second direction average size from the extension line of the third surface (3) to the end of the third band portion (131c-4) is denoted as B3, and the second direction average size from the extension line of the fourth surface (4) to the end of the fourth band portion (132c-4) is denoted as B4, B3 <B1 및 B4<B2를 만족할 수 있다.

[0210] At this time, when the average size of the second direction of the body (110) is L, 0.2≤B1 / L≤0.4 and 0.2≤B2 / L≤0.4 can be satisfied.

[0211] B1, B2, B3, B4 and L may be the average of values ​​measured at cross-sections (LT cross-sections) cut in the first and second directions at five points with equal intervals in the third direction of the body (110).

[0212] Additionally, the first external electrode (131-4) may include a first side band portion extending from the first connection portion (131a-4) to a part of the fifth and sixth surfaces, and the second external electrode (132-4) may include a second side band portion extending from the second connection portion (132a-4) to a part of the fifth and sixth surfaces. In this case, the size of the second direction of the first and second side band portions may gradually increase as it approaches the first surface. That is, the first and second side band portions may be arranged in a tapered shape or a trapezoidal shape.

[0214] Furthermore, when B3 is the average size in the second direction from the extension line of the third surface to the end of the third band portion (131c-4), B4 is the average size in the second direction from the extension line of the fourth surface to the end of the fourth band portion (132c-4), G1 is the average size in the second direction of the area separated from the third surface and the second internal electrode (122), and G2 is the average size in the second direction of the area separated from the fourth surface and the first internal electrode (121), then B3≤G1 and B4≤G2 can be satisfied. Accordingly, the volume occupied by the external electrode can be minimized, thereby increasing the capacity per unit volume of the stacked electronic component (1004).

[0215] The above G1 and G2 may be such that, in a cross-section where the body is cut in the first and second directions from the center of the third direction, the average value of the second direction size spaced apart to the third surface measured for any five second internal electrodes located in the center of the first direction is G1, and the average value of the second direction size spaced apart to the fourth surface measured for any five first internal electrodes located in the center of the first direction is G2.

[0216] Furthermore, G1 and G2 can be obtained from cross-sections (LT cross-sections) in which the body (110) is cut in the first and second directions at five points with equal intervals in the third direction, and the average values ​​of them can be further generalized as G1 and G2.

[0217] However, the present invention is not intended to be limited to B3≤G1 and B4≤G2, and cases satisfying B3≥G1 and B4≥G2 may also be included as embodiments of the present invention. Accordingly, in one embodiment, when B3 is the second direction average size from the extension line of the third surface to the end of the third band portion, B4 is the second direction average size from the extension line of the fourth surface to the end of the fourth band portion, G1 is the second direction average size of the area separated from the third surface and the second internal electrode, and G2 is the second direction average size of the area separated from the fourth surface and the first internal electrode, B3≥G1 and B4≥G2 may be satisfied.

[0219] In one embodiment, when the average size in the second direction from the extension line of the third surface (E3) to the end of the first band portion is denoted as B1 and the average size in the second direction from the extension line of the fourth surface to the end of the second band portion is denoted as B2, B1 ≥ G1 and B2 ≥ G2 can be satisfied. Accordingly, the adhesion strength with the substrate (180) of the stacked electronic component (1004) can be improved.

[0221] FIG. 14 is a schematic perspective view of a stacked electronic component (1005) according to one embodiment of the present invention, and FIG. 15 is a cross-sectional view according to VI-VI' of FIG. 14.

[0222] Referring to FIGS. 14 and 15, the first and second external electrodes (131-5, 132-5) of a stacked electronic component (1005) according to one embodiment of the present invention may not be placed on the second plane but may be placed on the third, fourth, and first planes to have an L-shape. That is, the first and second external electrodes (131-5, 132-5) may be placed below the extension line of the second plane.

[0223] The first external electrode (131-5) may include a first connection portion (131a-5) disposed on the third surface (3) and a first band portion (131b-5) extending from the first connection portion (131a-5) to a part of the first surface (1), and the second external electrode (132-5) may include a second connection portion (132a-5) disposed on the fourth surface (4) and a second band portion (132b-5) extending from the second connection portion (132a-5) to a part of the first surface (1). The external electrodes (131-5, 132-5) may not be disposed on the second surface (2), so that the insulating layer (151-5) may be disposed to cover the entire second surface (2). Accordingly, since the volume occupied by the external electrodes (131-5, 132-5) can be minimized, the capacity per unit volume of the stacked electronic component (1005) can be further improved. However, it is not necessary to limit the insulating layer (151-5) to a form that covers the entire second surface (2), and the insulating layer may not cover part or all of the second surface (2), but may be separated and cover the first and second connection parts (131a-5, 132a-5) respectively.

[0224] Additionally, the insulating layer (151-5) may be positioned to cover a portion of the fifth and sixth surfaces to further improve reliability. At this time, a portion of the fifth and sixth surfaces not covered by the insulating layer (151-5) may be exposed to the outside.

[0225] Further, the insulating layer (151-5) may be disposed to cover the entire fifth surface and the entire sixth surface. In this case, the fifth surface and the sixth surface are not exposed to the outside, whereby moisture resistance reliability can be further improved.

[0227] A first plating layer (141-5) is disposed on the first band part (131b-5), and a second plating layer (142-5) is disposed on the second band part (132b-5), wherein the first and second plating layers (141-5, 142-5) may extend to a portion of the first and second connection parts (132a-5, 132b-5).

[0228] In this case, the external electrodes (131-5, 132-5) may not be disposed even on the fifth and sixth surfaces (5, 6). That is, the external electrodes (131-5, 132-5) may have a form disposed only on the third, fourth, and first surfaces.

[0229] When H1 is the average dimension in the first direction from the first surface (1) to the internal electrode disposed closest to the first surface (1) among the first and second internal electrodes (121, 122), and H2 is the average dimension in the first direction from the extension line of the first surface (1) to the end of the plating layers (141-5, 142-5) disposed on the first and second connection parts (131a-5, 132a-5), the relationship H1 < H2 may be satisfied. Accordingly, the area in contact with solder during mounting can be increased to improve bonding strength, and an increase in ESR (Equivalent Series Resistance) can be suppressed by increasing the contact area between the external electrodes (131-5, 132-5) and the plating layers (141-5, 142-5).

[0230] More preferably, when T is the average dimension of the body (110) in the first direction, the relationship H2 < T / 2 may be satisfied. That is, the relationship H1 < H2 < T / 2 may be satisfied. This is because when H2 is equal to or greater than T / 2, there is a risk that the effect of improving moisture resistance reliability provided by the insulating layer may be reduced.

[0231] Additionally, the first and second plating layers (141-5, 142-5) may be arranged to cover a portion of the insulating layer (151-1) on the third and fourth sides. That is, the plating layers (141-5, 142-5) may be arranged to cover the ends of the insulating layer (151-5) on the third and fourth sides. Accordingly, the bonding strength between the insulating layer (151-5) and the plating layers (141-5, 142-5) can be strengthened, thereby improving the reliability of the stacked electronic component (1005).

[0232] Additionally, the insulating layer (151-5) may be positioned to cover a portion of the first and second plating layers (141-5, 142-5) on the third and fourth sides. That is, the insulating layer (151-5) may be positioned to cover the ends of the plating layers (141-5, 142-5) on the third and fourth sides. Accordingly, the reliability of the stacked electronic component (1005) can be improved by strengthening the bonding strength between the insulating layer (151-5) and the plating layers (141-5, 142-5).

[0234] FIG. 16 illustrates a variation of FIG. 14. Referring to FIG. 16, a variation (1006) of a stacked electronic component (1005) according to one embodiment of the present invention may have a first additional electrode layer (134) disposed between a first connection portion (131a-6) and a third surface, and a second additional electrode layer (135) disposed between a second connection portion (132a-6) and a fourth surface. The first additional electrode layer (134) may be disposed within a range that does not extend beyond the third surface, and the second additional electrode layer (135) may be disposed within a range that does not extend beyond the fourth surface. The first and second additional electrode layers (134, 135) can improve electrical connectivity between the internal electrode (121, 122) and the external electrode (131-6, 132-6), and have excellent bonding strength with the external electrode (131-6, 132-6), thereby performing the role of further improving the mechanical bonding strength of the external electrode (131-6, 132-6).

[0235] The first and second external electrodes (131-6, 132-6) may have an L-shape in which the first and second external electrodes are not disposed on the second surface.

[0236] The first external electrode (131-6) may include a first connection portion (131a-6) disposed on the first additional electrode layer (134) and a first band portion (131b-6) extending from the first connection portion (131a-6) to a part of the first surface (1), and the second external electrode (132-6) may include a second connection portion (132a-6) disposed on the second additional electrode layer (135) and a second band portion (132b-6) extending from the second connection portion (132a-6) to a part of the first surface (1).

[0237] Meanwhile, the first and second additional electrode layers (131-6, 132-6) can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc. Additionally, the first and second additional electrode layers (131-6, 132-6) may be fired electrodes including a conductive metal and glass, or resin-based electrodes including a conductive metal and resin. Additionally, the first and second additional electrode layers (131-6, 132-6) may be formed by transferring a sheet containing a conductive metal onto a body.

[0238] The conductive metal included in the first and second additional electrode layers (131-6, 132-6) may be a material with excellent electrical conductivity and is not specifically limited. For example, the conductive metal may be one or more of Cu, Ni, Pd, Ag, Sn, Cr, and their alloys. Preferably, the first and second additional electrode layers (131-6, 132-6) may include one or more of Ni and Ni alloys, thereby further improving connectivity with the internal electrode (121, 122) containing Ni.

[0240] FIG. 17 is a schematic perspective view of a stacked electronic component (1007) according to one embodiment of the present invention, and FIG. 18 is a cross-sectional view according to VII-VII' of FIG. 17.

[0241] Referring to FIGS. 17 and 18, the average thickness (t1) of the first and second plating layers (141-6, 142-6) of a stacked electronic component (1007) according to one embodiment of the present invention may be thinner than the average thickness (t2) of the insulating layer (151-6).

[0242] The insulating layer (151-6) serves to prevent external moisture penetration or plating solution penetration, but its weak connectivity with the plating layer (141-6, 142-6) may cause delamination of the plating layer (141-6, 142-6). When the plating layer is delaminated, the adhesion strength with the substrate (180) may decrease. Here, delamination of the plating layer (141-6, 142-6) may mean that the plating layer is partially detached or physically separated from the external electrode (131-5, 132-5). Because the connectivity between the plating layer and the insulating layer is weak, there is a higher possibility that a gap will open at the interface between the insulating layer and the plating layer or that foreign substances will penetrate, and it may become vulnerable to external impacts, thereby increasing the likelihood of delamination.

[0243] According to one embodiment of the present invention, the average thickness (t1) of the plating layer can be made thinner than the average thickness (t2) of the insulating layer to reduce the contact area between the plating layer and the insulating layer, thereby suppressing the occurrence of delamination and improving the adhesion strength with the substrate (180) of the stacked electronic component (1000).

[0244] The average thickness (t1) of the first and second plating layers (141-6, 142-6) may be the average of the thicknesses measured at five equally spaced points on the first and second connection portions (131a-5, 132a-5) or the first and second band portions (131b-5, 132b-5), and the average thickness (t2) of the insulating layer (151-6) may be the average of the thicknesses measured at five equally spaced points on the first and second connection portions (131a-5, 132a-5).

[0246] FIG. 19 schematically illustrates a perspective view of a stacked electronic component (2000) according to one embodiment of the present invention. FIG. 20 is a cross-sectional view according to VIII-VIII' of FIG. 19.

[0247] Hereinafter, a stacked electronic component (2000) according to an embodiment of the present invention will be described in detail with reference to FIGS. 19 and 20. However, content that overlaps with the above description may be omitted to avoid redundant explanation.

[0248] A stacked electronic component (2000) according to one embodiment of the present invention comprises: a dielectric layer (111); first and second internal electrodes (121, 122) alternately arranged with the dielectric layer in between; a body (110) comprising first and second surfaces (1, 2) facing in a first direction, third and fourth surfaces (3, 4) connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces (5, 6) connected to the first to fourth surfaces and facing in a third direction; a first external electrode (231) comprising a first connecting electrode (231a) disposed on the third surface and a first band electrode (231b) disposed on the first surface and connected to the first connecting electrode; and a second external electrode (232) comprising a second connecting electrode (232a) disposed on the fourth surface and a second band electrode (232b) disposed on the first surface and connected to the second connecting electrode. It includes a first insulating layer (251) disposed on the first connecting electrode; a second insulating layer (252) disposed on the second connecting electrode; a first plating layer (241) disposed on the first band electrode; and a second plating layer (242) disposed on the second band electrode; wherein the first and second insulating layers (251, 252) may include an oxide containing silicon (Si).

[0250] The first connecting electrode (231a) may be placed on the third surface (3) and connected to the first internal electrode (121), and the second connecting electrode (231b) may be placed on the fourth surface (4) and connected to the second internal electrode (122). Additionally, a first insulating layer (251) may be placed on the first connecting electrode (231a'), and a second insulating layer (252) may be placed on the second connecting electrode (232a).

[0251] Conventionally, when forming external electrodes, a paste containing a conductive metal was used, and a method of dipping the exposed surface of the internal electrode of the body into the paste was mainly used. However, the thickness of the external electrode formed by the dipping method could be too thick at the center in the thickness direction. Furthermore, even without the problem of thickness imbalance of the external electrode due to this dipping method, since the internal electrode is exposed on the third and fourth surfaces of the body, the thickness of the external electrode placed on the third and fourth surfaces was formed to be greater than a certain level in order to suppress the penetration of moisture and plating solution through the external electrode.

[0252] On the other hand, in the present invention, since an insulating layer (251, 252) is placed on the connecting electrode (231a, 232a), sufficient reliability can be ensured even if the thickness of the connecting electrode (231a, 232a) on the third and fourth surfaces where the internal electrode is exposed is thin.

[0254] The first and second connecting electrodes (231a, 232a) may each have a shape corresponding to the third and fourth surfaces, and the surfaces of the first and second connecting electrodes (231a, 232a) facing the body (110) may each have the same area as the third and fourth surfaces of the body (110). The first and second connecting electrodes (231a, 232a) may be positioned within a range that does not extend beyond the third and fourth surfaces (3, 4). The connecting electrodes (231a, 232a) may be positioned so as not to extend to the first, second, fifth, and sixth surfaces (1, 2, 5, 6) of the body (110). Specifically, in one embodiment, the first and second connecting electrodes (231a, 232a) may be spaced apart from the fifth and sixth surfaces. Accordingly, sufficient connectivity between the internal electrodes (121, 122) and the external electrodes (231, 232) can be secured while minimizing the volume occupied by the external electrodes, thereby increasing the capacity per unit volume of the stacked electronic component (2000).

[0255] In this regard, the first and second connecting electrodes (231a, 232a) may be spaced apart from the second surface (2). That is, since the external electrodes (231, 232) are not placed on the second surface, the volume occupied by the external electrodes (231, 232) can be further minimized, thereby further increasing the capacity per unit volume of the stacked electronic component (2000).

[0257] However, the connecting electrodes (231a, 232a) may include a corner portion that extends to the corner of the body (110) and is disposed on the corner. That is, in one embodiment, the first connecting electrode includes a corner portion (not shown) that extends to and is disposed on the first-3 corner and the second-3 corner, and the second connecting electrode may include a corner portion (not shown) that extends to and is disposed on the first-4 corner and the second-4 corner.

[0259] In addition, the connecting electrodes (231a, 232a) may have a uniform and thin thickness compared to the external electrodes formed by the conventional dipping method.

[0260] The method of forming the connecting electrodes (231a, 232a) does not need to be specifically limited, but, for example, they can be formed by transferring a sheet containing a conductive metal, an organic material such as a binder, etc., to the third and fourth surfaces, but is not limited thereto, and they can be formed by plating a conductive metal on the third and fourth surfaces. That is, the connecting electrodes (231a, 232a) may be a fired layer of a conductive metal or a plated layer.

[0261] The thickness of the connecting electrode (231a, 232a) is not specifically limited, but may be, for example, 2 to 7 μm. Here, the thickness of the connecting electrode (231a, 232a) may mean the maximum thickness and may mean the second direction size of the connecting electrode (231a, 232a).

[0262] In one embodiment, the first and second connecting electrodes (231a, 232a) may include a metal and glass identical to the metal included in the internal electrodes (121, 122). As the first and second connecting electrodes (231a, 232a) include a metal identical to the metal included in the internal electrodes (121, 122), electrical connectivity with the internal electrodes (121, 122) can be improved, and as the first and second connecting electrodes (231a, 232a) include glass, bonding strength with the body (110) and / or insulating layer (251, 252) can be improved. In this case, the metal identical to the metal included in the internal electrodes (121, 122) may be Ni.

[0264] The first and second insulating layers (251, 252) are each placed on the first and second connecting electrodes (231a, 232a) and can perform the function of preventing a plating layer from being formed on the first and second connecting electrodes (231a, 232a). In addition, the first and second insulating layers (251, 252) can perform the function of improving sealing characteristics to minimize the penetration of moisture or plating solution from the outside.

[0266] In one embodiment, the first and second insulating layers (251, 252) may include an oxide containing silicon (Si). Accordingly, moisture resistance reliability can be further improved, and cracks caused by thermal shrinkage, radiation cracks caused by metal diffusion, etc. can be suppressed.

[0267] In this case, in one embodiment, the first and second insulating layers (251, 252) further include a boric oxide, and the first and second insulating layers (251, 252) and the body (110) further include an adhesive layer containing barium and boron at the interface where they meet, thereby improving the adhesion between the insulating layers (251, 252) and the body (110) and improving the overall strength of the stacked electronic component (2000).

[0269] In one embodiment, the first and second insulating layers (251, 252) may have a mole ratio of Si atoms to the mole ratio of elements other than oxygen at 0.95 or higher. That is, the insulating layer (151) may be composed of an oxide substantially containing Si, excluding elements detected as impurities, and accordingly, the penetration of external moisture can be effectively prevented compared to an insulating layer composed of other components having the same thickness, and corrosion resistance and resistance to acids or bases such as plating solutions can be improved.

[0271] In addition, in one embodiment, the first and second insulating layers (251, 252) may include at least one of a boric oxide, a borosilicate, and a zinc-borosilicate. Accordingly, the stress applied to the stacked electronic component (2000) from external thermal shock is reduced, thereby reducing the occurrence of cracks and delamination, preventing the formation of radiating cracks, and preventing the penetration of plating solution and external moisture, thereby improving the reliability of the stacked electronic component (2000).

[0273] In the above embodiments, if the first and second insulating layers (251, 252) contain at least one of a boron-containing oxide, a borosilicate, and a zinc-borosilicate, they can react with the barium oxide on the surface of the body (110) at a low temperature to form an eutectic. Accordingly, in one embodiment, the stacked electronic component (2000) may further include an adhesive layer containing barium and boron at the interface where the insulating layer (251, 252) containing a boron-containing oxide and the body (110) come into contact.

[0274] Since the material included in the insulating layer is an insulating material such as SiO2 or B2O3, it has poor adhesion to the first and second external electrodes (231, 232) containing a conductive metal. Although the insulating layer (251, 252) and the first and second external electrodes (231, 232) of the stacked electronic component (2000) according to one embodiment of the present invention have poor adhesion to the body (110) containing the insulating material, the strength of the entire stacked electronic component (2000) can be improved.

[0276] The first and second band electrodes (231b, 232b) may be placed on the first surface (1) of the body (110). The first and second band electrodes (231b, 232b) may be electrically connected to the first and second internal electrodes (121, 122), respectively, by contacting the first and second connecting electrodes (231a, 232a), respectively.

[0277] The external electrode formed by the conventional dipping method was formed thickly on the third and fourth surfaces and partially extended on the first, second, fifth, and sixth surfaces, which made it difficult to secure a high effective volume ratio.

[0278] On the other hand, according to one embodiment of the present invention, the first and second connecting electrodes (231a, 232a) are placed on the surface where the internal electrode is exposed, and the first and second band electrodes (231b, 232b) are placed on the surface mounted on the substrate, thereby securing a high effective volume ratio.

[0279] Meanwhile, when the internal electrodes (121, 122) are stacked in a first direction, the stacked electronic component (2000) can be horizontally mounted on a substrate such that the internal electrodes (121, 122) are parallel to the mounting surface. However, the present invention is not limited to horizontal mounting, and when the internal electrodes (121, 122) are stacked in a third direction, the stacked electronic component can be vertically mounted on a substrate such that the internal electrodes (121, 122) are perpendicular to the mounting surface.

[0281] The first and second band electrodes (231b, 232b) can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc. For example, the first and second band electrodes (231, 232b) may be fired electrodes including a conductive metal and glass, and may be formed by applying a paste including a conductive metal and glass to the first surface of the body, but is not limited thereto, and may be a plating layer in which a conductive metal is plated on the first surface of the body.

[0282] The conductive metal included in the first and second band electrodes (231b, 232b) may be a material with excellent electrical conductivity and is not specifically limited. For example, the conductive metal may be one or more of nickel (Ni), copper (Cu), and their alloys, and may include the same metal as the metal included in the internal electrodes (121, 122).

[0284] Meanwhile, in order to secure sealing characteristics and high strength, in one embodiment, the first external electrode (231) further includes a third band electrode (not shown) disposed on the second surface (2) and connected to the first connecting electrode (231a), and the second external electrode (232) may further include a fourth band electrode (not shown) disposed on the second surface (2) and connected to the second connecting electrode (232a).

[0286] In one embodiment, when the distance from the extension line (E3) of the third surface to the end of the first band electrode (231b) is B1, the distance from the extension line (E4) of the fourth surface to the end of the second band electrode (232b) is B2, the distance from the extension line of the third surface to the end of the third band electrode (not shown) is B3, the distance from the extension line of the fourth surface to the end of the fourth band electrode (not shown) is B4, the average size in the second direction of the area separated from the third surface and the second internal electrode (122) is G1, and the average size in the second direction of the area separated from the fourth surface and the first internal electrode (121) is G2, then B1 ≥ G1, B3 ≤ G1, B2 ≥ G2, and B4 ≤ G2 can be satisfied. Accordingly, the volume occupied by the external electrode is minimized to increase the capacity per unit volume of the stacked electronic component (2000), and at the same time, the contact area with the solder during mounting is increased to improve the adhesion strength.

[0287] However, the present invention is not intended to be limited to B1≥G1, B3≤G1, B2≥G2, and B4≤G2, and cases satisfying B1≥G1, B3≥G1, B2≥G2, and B4≥G2 may also be included as embodiments of the present invention. Accordingly, in one embodiment, when the distance from the extension line (E3) of the third surface to the end of the first band electrode (231b) is B1, the distance from the extension line (E4) of the fourth surface to the end of the second band electrode (232b) is B2, the distance from the extension line of the third surface to the end of the third band electrode (not shown) is B3, the distance from the extension line of the fourth surface to the end of the fourth band electrode (not shown) is B4, the average size in the second direction of the area separated from the third surface and the second internal electrode (122) is G1, and the average size in the second direction of the area separated from the fourth surface and the first internal electrode (121) is G2, then B1≥G1, B3≥G1, B2≥G2, and B4≥G2 can be satisfied.

[0289] The first and second plating layers (241, 242) may be disposed on the first and second band electrodes (231b, 232b). The first and second plating layers (241, 242) serve to improve mounting characteristics. The types of the first and second plating layers (241, 242) are not specifically limited and may be plating layers comprising one or more of Ni, Sn, Pd, and alloys thereof, and may be formed in multiple layers.

[0290] As a more specific example regarding the first and second plating layers (241, 242), the first and second plating layers (241, 242) may be a Ni plating layer or a Sn plating layer, and may be in the form where the Ni plating layer and the Sn plating layer are sequentially formed on the first and second band electrodes (231b, 232b).

[0292] In one embodiment, the first and second plating layers (241, 242) may be extended and arranged to partially cover the first and second connecting electrodes (231a, 232a), respectively.

[0293] When the average size in the first direction from the first surface (1) to the internal electrode closest to the first surface (1) among the first and second internal electrodes (121, 122) is denoted as H1, and the average size in the first direction from the extension line of the first surface (1) to the end of the first and second plating layers (241, 242) placed on the first and second connecting electrodes (231a, 232a) is denoted as H2, H1 > H2 can be satisfied. Accordingly, the penetration of the plating solution into the internal electrode during the plating process can be suppressed, thereby improving reliability.

[0295] In one embodiment, the first and second insulating layers (251, 252) are arranged to be in direct contact with the first and second connecting electrodes (231a, 232a), respectively, and the first and second connecting electrodes (231a, 232a) may include a conductive metal and glass. Accordingly, since the plating layer (241, 242) may not be arranged in the area where the insulating layer (251, 252) is arranged on the outer surface of the first and second connecting electrodes (231a, 232a), the prevention of external electrode erosion by the plating solution can be effectively suppressed.

[0297] In one embodiment, the first and second insulating layers (251, 252) are arranged to be in direct contact with the first and second connecting electrodes (231a, 232a), respectively, and the first and second connecting electrodes (231a, 232a) may include a conductive metal and a resin. Accordingly, since the plating layer (241, 242) may not be arranged in the area where the insulating layer (251, 252) is arranged on the outer surface of the first and second connecting electrodes (231a, 232a), the prevention of external electrode erosion by the plating solution can be effectively suppressed.

[0299] In one embodiment, the first plating layer (241) is positioned to cover the end of the first external electrode (231) of the first insulating layer (251), and the second plating layer (242) may be positioned to cover the end of the second external electrode (232) of the second insulating layer (252). Accordingly, the reliability of the stacked electronic component (3000) can be improved by strengthening the bonding strength between the insulating layer (251, 252) and the plating layer (241, 242). In addition, by forming the first and second insulating layers (251, 252) first before forming the plating layer (241, 242) on the external electrode (231, 232), the penetration of the plating solution during the plating layer formation process can be more reliably suppressed. By forming the insulating layer before the plating layer, the plating layer (241, 242) may have a shape that covers the ends of the insulating layer (251, 252).

[0301] In one embodiment, the first insulating layer (251) is positioned to cover the end positioned on the first external electrode (231) of the first plating layer (241), and the second insulating layer (252) may be positioned to cover the end positioned on the second external electrode (332) of the second plating layer (342). Accordingly, the bonding strength between the insulating layer (351) and the plating layers (341, 342) can be strengthened to improve the reliability of the stacked electronic component (3000).

[0303] FIG. 21 illustrates a variation of FIG. 19. Referring to FIG. 21, a variation (2001) of a stacked electronic component (2000) according to one embodiment of the present invention may be connected to a single insulating layer (253-1) by extending the first and second insulating layers (251-1, 252-1) to the fifth and sixth surfaces (5, 6) and connecting them to each other. At this time, the connected first and second insulating layers (253-1) may be arranged to cover a portion of the fifth and sixth surfaces.

[0305] FIG. 22 schematically illustrates a perspective view of a stacked electronic component (2002) according to one embodiment of the present invention. FIG. 23 is a cross-sectional view according to IX-IX' of FIG. 22.

[0306] Referring to FIGS. 22 and 23, in a stacked electronic component (2002) according to one embodiment of the present invention, the first and second plating layers (241-2, 242-2) may be arranged below the extension line of the first surface. Accordingly, the height of the solder can be minimized during mounting and the mounting space can be minimized.

[0307] Additionally, the first and second insulating layers (251-2, 252-2) may be arranged to extend below the extension line of the first surface and to be in contact with the first and second plating layers (241-2, 242-2).

[0309] FIG. 25 illustrates a variation of FIG. 22. Referring to FIG. 25, a variation (2003) of a stacked electronic component (2002) according to one embodiment of the present invention may be connected to a single insulating layer (253-3) by extending the first and second insulating layers (251-3, 252-3) to the fifth and sixth surfaces (5, 6) and connecting them to each other. At this time, the connected first and second insulating layers (253-3) may be arranged to cover the entirety of the fifth and sixth surfaces.

[0311] FIG. 25 schematically illustrates a perspective view of a stacked electronic component (2004) according to one embodiment of the present invention. FIG. 26 is a cross-sectional view according to XX' of FIG. 25.

[0312] Referring to FIGS. 25 and 26, a stacked electronic component (2004) according to one embodiment of the present invention may further include an additional insulating layer (261) disposed on a first surface (1) and between a first band electrode (231b) and a second band electrode (232b). Accordingly, leakage current, etc., that may occur between the first band electrode (231b) and the second band electrode (232b) under high voltage current can be prevented.

[0313] There is no need to specifically limit the type of the additional insulating layer (261). For example, the additional insulating layer (261) may include at least one of an oxide containing Si, a boric oxide, a borosilicate, and a zinc-borosilicate, just like the first and second insulating layers (251-2, 252-2). However, there is no need to limit the additional insulating layer (261) and the first and second insulating layers (251-2, 252-2) to the same material, and they may be formed of different materials. For example, they may include one or more selected from epoxy resin, acrylic resin, ethyl cellulose, etc., or glass.

[0315] FIG. 27 illustrates a modified example of FIG. 25. Referring to FIG. 27, a modified example 2005 of a multilayer electronic component 2004 according to an embodiment of the present invention may be connected as a single insulating layer 253-5 by having first and second insulating layers 251-5, 252-5 extend to fifth and sixth surfaces 5, 6 and connected to each other.

[0317] FIG. 28 schematically illustrates a perspective view of a multilayer electronic component 2006 according to an embodiment of the present invention. FIG. 29 is a cross-sectional view taken along line XI-XI' of FIG. 28.

[0318] Referring to FIGS. 28 and 29, the multilayer electronic component 2006 according to an embodiment includes a first insulating layer 251-6 disposed on a first connection electrode 231a and a second insulating layer 252-6 disposed on a second connection electrode 232a. When an average dimension in a first direction from a first surface 1 to the internal electrode disposed closest to the first surface 1 among the first and second internal electrodes 121, 122 is defined as H1, and an average dimension in the first direction from an extension line of the first surface 1 to ends of first and second plating layers 241-6, 242-6 disposed on the first and second connection electrodes 231a, 232a is defined as H2, the relationship H1<H2 may be satisfied. Accordingly, an area in contact with solder during mounting can be increased to improve adhesion strength.

[0319] More preferably, when an average dimension of a body 110 in the first direction is defined as T, the relationship H2<T / 2 may be satisfied. That is, the relationship H1<H2<T / 2 may be satisfied. This is because when H2 is greater than or equal to T / 2, the effect of improving moisture resistance reliability by the insulating layer may be reduced.

[0321] FIG. 30 illustrates a variation of FIG. 28. Referring to FIG. 30, a variation (2007) of a stacked electronic component (2006) according to one embodiment of the present invention can be connected to a single insulating layer (253-7) by extending the first and second insulating layers (251-7, 252-7) to the fifth and sixth surfaces (5, 6) and connecting them to each other.

[0323] FIG. 31 schematically illustrates a perspective view of a stacked electronic component (2008) according to one embodiment of the present invention. FIG. 32 is a cross-sectional view taken along XII-XII' of FIG. 31.

[0324] Referring to FIG. 31 and FIG. 32, a stacked electronic component (2008) according to one embodiment of the present invention may be connected to a single insulating layer (253-8) by extending the first and second insulating layers (251-8, 252-8) to the second, fifth, and sixth surfaces (2, 5, 6) and connecting them to each other. As shown in FIG. 33, the insulating layer (253-8) may be in a form that covers the entire second surface, and may be in a form that covers only a portion of the fifth and sixth surfaces.

[0326] FIG. 33 schematically illustrates a perspective view of a stacked electronic component (2009) according to one embodiment of the present invention. FIG. 34 is a cross-sectional view according to XIII-XIII' of FIG. 33.

[0327] Referring to FIGS. 35 and 36, the average thickness (t1) of the first and second plating layers (241-9, 242-9) of a stacked electronic component (2009) according to one embodiment of the present invention may be thinner than the average thickness (t2) of the first and second insulating layers (251-9, 252-9).

[0328] According to one embodiment of the present invention, the average thickness (t1) of the first and second plating layers (241-9, 242-9) can be made thinner than the average thickness (t2) of the first and second insulating layers (251-9, 252-9) to reduce the contact area between the plating layer and the insulating layer, thereby suppressing the occurrence of delamination and improving the adhesion strength with the substrate (180) of the stacked electronic component (2009).

[0329] The average thickness (t1) of the first and second plating layers (241-9, 242-9) may be the average of the thicknesses measured at five equally spaced points on the first and second connecting electrodes (231a, 232a) or the first and second band electrodes (231b, 232b), and the average thickness (t2) of the insulating layer (251-9, 252-9) may be the average of the thicknesses measured at five equally spaced points on the first and second connecting electrodes (231a, 232a).

[0331] FIG. 35 illustrates a variation of FIG. 33. Referring to FIG. 35, a variation (2010) of a stacked electronic component (2009) according to one embodiment of the present invention can be connected to a single insulating layer (253-10) by extending the first and second insulating layers (251-10, 252-10) to the fifth and sixth surfaces (5, 6) and connecting them to each other.

[0333] FIG. 36 schematically illustrates a perspective view of a stacked electronic component (3000) according to one embodiment of the present invention. FIG. 37 is a cross-sectional view along XIV-XIV' of FIG. 36. FIG. 38 is an enlarged view of the K1 region of FIG. 36.

[0334] Referring to FIGS. 36 to 42, a stacked electronic component (3000) according to one embodiment of the present invention comprises a dielectric layer (111) and first and second internal electrodes (121, 122) alternately arranged with the dielectric layer in between, a body (110) comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; and a first external electrode (331) comprising a first connection portion (331a) disposed on the third surface of the body, a first band portion (331b) extending from the first connection portion to a part of the first surface, and a first corner portion (331c) extending from the first connection portion to a corner connecting the second surface and the third surface of the body. A second external electrode (332) comprising a second connection portion (332a) disposed on the fourth surface of the body, a second band portion (332b) extending from the second connection portion to a part of the first surface, and a second corner portion (332c) extending from the second connection portion to a corner connecting the second surface and the fourth surface of the body; an insulating layer (351) disposed on the first and second connection portions (331a, 332a) and disposed to cover the second surface and the first and second corner portions; a first plating layer (341) disposed on the first band portion; and a second plating layer (342) disposed on the second band portion; wherein the insulating layer (351) may include an oxide containing silicon (Si).

[0336] In one embodiment, when the average size in the second direction from the extension line of the third surface to the end of the first corner portion (331c) is B3, the average size in the second direction from the extension line of the fourth surface to the end of the second corner portion (332c) is B4, the average size in the second direction of the area separated from the third surface and the second internal electrode is G1, and the average size in the second direction of the area separated from the fourth surface and the first internal electrode is G2, then B3 ≤ G1 and B4 ≤ G2 can be satisfied. Accordingly, the volume occupied by the external electrodes (331, 332) can be minimized, thereby increasing the capacity per unit volume of the stacked electronic component (3000).

[0337] At this time, when the average size in the second direction from the extension line of the third surface to the end of the first band portion (331b) is denoted as B1 and the average size in the second direction from the extension line of the fourth surface to the end of the second band portion (332b) is denoted as B2, B1 ≥ G1 and B3 ≥ G2 can be satisfied. Accordingly, the bonding strength can be improved by increasing the surface area in contact with the solder during mounting.

[0339] A stacked electronic component (3000) according to one embodiment may include a dielectric layer (111) and first and second internal electrodes (121, 122) alternately arranged with the dielectric layer in between, and may include a body (110) comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction. The body (110) of the stacked electronic component (3000) may have the same configuration as the body (110) of the stacked electronic component (1000), except that the end of the first or second surface of the body has a contracted shape as described below.

[0341] The external electrodes (331, 332) may be disposed on the third surface (3) and the fourth surface (4) of the body (110). The external electrodes (331, 332) may include first and second external electrodes (331, 332) respectively disposed on the third and fourth surfaces (3, 4) of the body (110) and connected to the first and second internal electrodes (121, 122) respectively.

[0342] The external electrodes (331, 332) may include a first external electrode (331) comprising a first connection portion (331a) disposed on a third surface, a first band portion (331b) extending from the first connection portion to a part of the first surface, and a first corner portion (331c) disposed extending from the first connection portion to a corner connecting the second surface and the third surface, and a second external electrode (132) comprising a second connection portion (332a) disposed on a fourth surface, a second band portion (332b) extending from the second connection portion to a part of the first surface, and a second corner portion (332c) disposed extending from the second connection portion to a corner connecting the second surface and the fourth surface. The first connection portion (331a) may be connected to the first internal electrode (121) on the third surface, and the second connection portion (332a) may be connected to the second internal electrode (122) on the fourth surface.

[0343] In one embodiment, the first and second connection portions (331a, 332a) may be spaced apart from the fifth and sixth surfaces. Accordingly, the proportion occupied by the external electrodes (331, 332) can be minimized, thereby making the stacked electronic component (3000) even smaller.

[0345] As the margin area where the internal electrodes (121, 122) are not placed on the dielectric layer (111) overlaps, a step difference occurs due to the thickness of the internal electrodes (121, 122), so that the corner connecting the first surface and the third to sixth surfaces and / or the corner connecting the second surface and the third to sixth surfaces may have a shape that is contracted toward the center of the first direction of the body (110) when viewed with respect to the first surface or the second surface. Alternatively, due to shrinkage behavior during the sintering process of the body, the corner connecting the first surface (1) and the third to sixth surfaces (3, 4, 5, 6) and / or the corner connecting the second surface (2) and the third to sixth surfaces (3, 4, 5, 6) may have a shape that is contracted toward the center of the first direction of the body (110) when viewed with respect to the first surface or the second surface. Alternatively, in order to prevent chipping defects, the corners connecting each face of the body (110) may be rounded by performing a separate process, so that the corner connecting the first face and the third to sixth faces and / or the corner connecting the second face and the third to sixth faces may have a round shape.

[0346] The above corner may include a 1-3 corner (c1-3) connecting the first surface and the third surface, a 1-4 corner (c1-4) connecting the first surface and the fourth surface, a 2-3 corner (c2-3) connecting the second surface and the third surface, and a 2-4 corner (c2-4) connecting the second surface and the fourth surface. Additionally, the corner may include a 1-5 corner connecting the first surface and the fifth surface, a 1-6 corner connecting the first surface and the sixth surface, a 2-5 corner connecting the second surface and the fifth surface, and a 2-6 corner connecting the second surface and the sixth surface. However, in order to suppress the step difference caused by the internal electrodes (121, 122), after lamination, the internal electrodes are cut so that they are exposed to the fifth and sixth surfaces (5, 6) of the body, and then a single dielectric layer or two or more dielectric layers are laminated in the third direction (width direction) on both sides of the capacitance forming part (Ac) to form a margin part (114, 115), the part connecting the first surface and the fifth and sixth surfaces and the part connecting the second surface and the fifth and sixth surfaces may not have a shrunken shape.

[0347] Meanwhile, the first to sixth surfaces of the body (110) may be generally flat surfaces, and the non-flat areas may be viewed as corners. Additionally, the area of ​​the external electrodes (131, 132) placed on the corner may be viewed as a corner section.

[0349] In this regard, the first and second corner portions (331c, 332c) may be positioned below the extension line (E2) of the second surface, and the first and second corner portions (331c, 332c) may be positioned spaced apart from the second surface. That is, as the external electrodes (331, 332) are not positioned on the second surface, the volume occupied by the external electrodes (331, 332) can be further minimized, thereby further increasing the capacity per unit volume of the stacked electronic component (3000). Additionally, the first corner portion (331c) may be positioned on a part of the second-third corner (C2-3) connecting the third surface and the second surface, and the second corner portion (332c) may be positioned on a part of the second-fourth corner (C2-4) connecting the fourth surface and the second surface.

[0351] The extension line (E2) of the second plane can be defined as follows.

[0352] In a length-thickness cross-section (LT cross-section) obtained by cutting a stacked electronic component (3000) at the center in the width direction, seven straight lines (P0, P1, P2, P3, P4, P5, P6, P7) in the thickness direction are drawn with equal spacing in the length direction from the third surface to the fourth surface, and the straight line passing through the point where P2 meets the second surface and the point where P4 meets the second surface can be defined as the extension line (E2) of the second surface.

[0354] Meanwhile, the external electrodes (331, 332) can be formed using any material that has electrical conductivity, such as metal, and the specific material can be determined by considering electrical properties, structural stability, etc., and furthermore, they can have a multilayer structure.

[0355] The external electrode (331, 332) may be a fired electrode including a conductive metal and glass, or a resin-based electrode including a conductive metal and resin.

[0356] Additionally, the external electrodes (331, 332) may be formed such that a sintered electrode and a resin-based electrode are sequentially formed on the body. Additionally, the external electrodes (331, 332) may be formed by transferring a sheet containing a conductive metal onto the body, or by transferring a sheet containing a conductive metal onto the sintered electrode.

[0357] The conductive metal included in the external electrodes (331, 332) may be a material with excellent electrical conductivity and is not specifically limited. For example, the conductive metal may be one or more of Cu, Ni, Pd, Ag, Sn, Cr, and their alloys. Preferably, the external electrodes (331, 332) may include one or more of Ni and Ni alloys, thereby further improving connectivity with the internal electrodes (121, 122) containing Ni.

[0359] The insulating layer (351) can be placed on the first and second connection parts (331a, 332a).

[0360] Since the first and second connection portions (331a, 332a) are parts connected to the internal electrodes (121, 122), they can become a path for the penetration of plating solution during the plating process or for moisture penetration during actual use. In the present invention, since an insulating layer (351) is disposed on the connection portions (331a, 332a), the penetration of external moisture or plating solution can be prevented.

[0361] The insulating layer (351) may be positioned to be in contact with the first and second plating layers (341, 342). At this time, the insulating layer (351) may be in contact with the first and second plating layers (341, 342) in a manner that partially covers the ends of the insulating layer (351), or the first and second plating layers (341, 342) may be in contact with the insulating layer (351) in a manner that partially covers the ends of the insulating layer (351).

[0362] The insulating layer (353) is disposed on the first and second connection portions (331a, 332a) and may be disposed to cover the second surface and the first and second corner portions (331c, 332c). Additionally, the insulating layer (351) can further improve moisture resistance reliability by covering the area where the ends of the first and second corner portions (331c, 332c) and the body (110) come into contact, thereby blocking the moisture penetration path.

[0363] The insulating layer (351) may be disposed on the second surface and extended to the first and second connection portions (331a, 332a). Additionally, if the external electrodes (331, 332) are not disposed on the second surface, the insulating layer may be disposed to cover the entire second surface. Meanwhile, the insulating layer (351) is not necessarily disposed on the second surface, and the insulating layer may not be disposed on part or all of the second surface, or the insulating layer may be separated into two parts and disposed on the first and second connection portions (331a, 332a), respectively. However, even in this case, the insulating layer may be disposed to cover the entire first and second corner portions (331c, 332c). If the insulating layer is not disposed on the entire second surface, it may be disposed below the extension line of the second surface. Additionally, although the insulating layer is not placed on the second surface, it may extend to the fifth and sixth surfaces on the first and second connecting portions (331a, 332a) to form a single insulating layer.

[0364] In one embodiment, the insulating layer (351) may be positioned to cover a portion of the fifth and sixth surfaces to improve reliability. At this time, the portion of the fifth and sixth surfaces not covered by the insulating layer may be exposed to the outside.

[0365] Furthermore, the insulating layer (351) may be arranged to cover the entirety of the fifth and sixth surfaces, in which case the fifth and sixth surfaces are not exposed to the outside, thereby further improving moisture resistance.

[0367] The insulating layer (351) can perform the role of preventing the formation of a plating layer (341, 342) on the external electrode (331, 332) on which the insulating layer (351) is disposed, and can perform the role of improving sealing characteristics to minimize the penetration of moisture or plating solution from the outside. Since the components, composition, average thickness, and resulting effects of the insulating layer (351) are the same as those of the insulating layer (151, 251, 252, 253) included in the stacked electronic component (1000, 2000) or various embodiments thereof, a description thereof will be omitted.

[0369] The first and second plating layers (341, 342) can be placed on the first and second band portions (331b, 332b), respectively. The plating layers (341, 342) can perform a role in improving mounting characteristics, and as the plating layers (341, 342) are placed on the band portions (331b, 332b), the mounting space can be minimized and reliability can be improved by minimizing the penetration of the plating solution into the internal electrode. One end of the first and second plating layers (341, 342) can be in contact with the first surface, and the other end can be in contact with the insulating layer (351).

[0370] The type of plating layer (341, 342) is not specifically limited and may be a plating layer comprising one or more of Cu, Ni, Sn, Ag, Au, Pd and alloys thereof, and may be formed in multiple layers.

[0371] As a more specific example regarding the plating layer (341, 342), the plating layer (341, 342) may be a Ni plating layer or a Sn plating layer, and may be in the form where the Ni plating layer and the Sn plating layer are sequentially formed on the first and second band portions (331b, 332b).

[0373] In one embodiment, the insulating layer (351) is positioned to be in direct contact with the first and second external electrodes (331, 332), and the first and second external electrodes (331, 332) may include a conductive metal and glass. Accordingly, since the plating layer (341, 342) may not be positioned in the area where the insulating layer (351) is positioned on the outer surface of the first and second external electrodes (331, 332), the prevention of external electrode erosion by the plating solution can be effectively suppressed.

[0375] In one embodiment, the insulating layer (351) is positioned to be in direct contact with the first and second external electrodes (331, 332), and the first and second external electrodes (331, 332) may include a conductive metal and a resin. Accordingly, since the plating layer (341, 342) may not be positioned in the area where the insulating layer (351) is positioned on the outer surface of the first and second external electrodes (331, 332), the prevention of external electrode erosion by the plating solution can be effectively suppressed.

[0377] In one embodiment, the first plating layer (341) is positioned to cover the end of the first external electrode (331) of the insulating layer (351), and the second plating layer (342) may be positioned to cover the end of the second external electrode (332) of the insulating layer (351). Accordingly, the reliability of the stacked electronic component (3000) can be improved by strengthening the bonding strength between the insulating layer (351) and the plating layers (341, 342). Additionally, by forming the insulating layer (351) first before forming the plating layers (341, 342) on the external electrodes (331, 332), the penetration of the plating solution during the plating layer formation process can be more reliably suppressed. By forming the insulating layer before the plating layer, the plating layer (341, 342) may have a shape that covers the end of the insulating layer (351).

[0378] In one embodiment, the insulating layer 351 is disposed to cover an end of the first plating layer 341 disposed on the first external electrode 331, and the insulating layer 351 may be disposed to cover an end of the second plating layer 342 disposed on the second external electrode 332. Accordingly, the bonding strength between the insulating layer 351 and the plating layers 341 and 342 can be enhanced, thereby improving the reliability of the multilayer electronic component 3000.

[0380] In one embodiment, the first and second plating layers 341 and 342 may be extended and disposed to partially cover the first and second connection portions 331a and 332a, respectively. When H1 is the average dimension in the first direction from the first surface 1 to the internal electrode disposed closest to the first surface 1 among the first and second internal electrodes 121 and 122, and H2 is the average dimension in the first direction from an extension line of the first surface 1 to ends of the first and second plating layers 341 and 342 disposed on the first and second connection portions 131a and 132a, the condition H1>H2 can be satisfied. Accordingly, penetration of a plating solution into the internal electrodes during a plating process can be suppressed, thereby improving reliability.

[0382] In one embodiment, when H1 is the average dimension in the first direction from the first surface to the internal electrode disposed closest to the first surface among the first and second internal electrodes 121 and 122, and H2 is the average dimension in the first direction from an extension line of the first surface to ends of the plating layers 341 and 342 disposed on the first and second connection portions 331a and 332a, the condition H1<H2 can be satisfied. Accordingly, the area in contact with solder during mounting can be increased, thereby improving bonding strength. More preferably, when T is the average dimension of the body 110 in the first direction, the condition H2<T / 2 can be satisfied. That is, the condition H1<H2<T / 2 can be satisfied. This is because when H2 is equal to or greater than T / 2, there is a risk that the effect of improving moisture resistance reliability provided by the insulating layer may be degraded.

[0384] In one embodiment, the first and second plating layers (341, 342) may be positioned below the extension line of the first surface. Accordingly, the height of the solder can be minimized during mounting and the mounting space can be minimized. Additionally, the insulating layer (351) may be positioned to extend below the extension line of the first surface and be in contact with the first and second plating layers (341, 342).

[0386] In one embodiment, when the second direction average size of the body is L, the second direction average size from the extension line of the third surface to the end of the first band portion is B1, and the second direction average size from the extension line of the fourth surface to the end of the second band portion is B2, then 0.2≤B1 / L≤0.4 and 0.2≤B2 / L≤0.4 can be satisfied.

[0387] If B1 / L and B2 / L are less than 0.2, it may be difficult to secure sufficient adhesion strength. On the other hand, if B2 / L is greater than 0.4, there is a risk that leakage current may occur between the first band portion (331b) and the second band portion (332b) under high voltage current, and there is a risk that the first band portion (331b) and the second band portion (332b) may become electrically connected due to plating bleeding during the plating process.

[0389] In one embodiment, an additional insulating layer may be further included that is disposed on the first surface and disposed between the first band portion (331b) and the second band portion (332b). Accordingly, leakage current, etc., that may occur between the first band electrode (331b) and the second band electrode (332b) under high voltage current can be prevented.

[0390] There is no need to specifically limit the type of additional insulating layer. For example, the additional insulating layer may include an insulating layer (351) and at least one of an oxide containing Si, a boron oxide (boric oxide), a borosilicate, and a zinc-borosilicate. However, there is no need to limit the additional insulating layer and the insulating layer (351) to the same material, and they may be formed of different materials. For example, they may include one or more selected from epoxy resin, acrylic resin, ethyl cellulose, etc., or glass.

[0392] In one embodiment, when the second direction average size from the extension line of the third surface to the end of the first band portion is denoted as B1 and the second direction average size from the extension line of the fourth surface to the end of the second band portion is denoted as B2, B3 <B1 및 B4<B2를 만족할 수 있다. 제1 밴드부(331b)의 평균 길이(B1)가 제1 코너부 (331c)의 평균 길이(B3)보다 길 수 있으며, 제2 밴드부(332b)의 평균 길이가 제2 코너부(332)의 평균 길이(B4)보다 길 수 있다. 이에 따라, 실장시 솔더와 접하는 면적을 증가시켜 고착 강도를 향상시킬 수 있다.

[0393] More specifically, when the second direction average size from the extension line of the third surface (3) to the end of the first band portion (331b) is denoted as B1, the second direction average size from the extension line of the fourth surface (4) to the end of the second band portion (332b) is denoted as B2, the second direction average size from the extension line of the third surface (3) to the end of the first corner portion (331c) is denoted as B3, and the second direction average size from the extension line of the fourth surface (4) to the end of the second corner portion (332c) is denoted as B4, B3 <B1 및 B4<B2를 만족할 수 있다.

[0395] In one embodiment, the average thickness of the first and second plating layers (341, 342) may be thinner than the average thickness of the insulating layer (351).

[0396] The insulating layer (351) serves to prevent external moisture penetration or the penetration of plating solution, but its weak connectivity with the plating layer (341, 342) can cause delamination of the plating layer. When the plating layer is delaminated, the adhesion strength with the substrate may decrease. Here, delamination of the plating layer may mean that the plating layer is partially detached or physically separated from the external electrode (331, 332). Because the connectivity between the plating layer and the insulating layer is weak, there is a higher possibility that a gap will open at the interface between the insulating layer and the plating layer or that foreign substances will penetrate, and it may become vulnerable to external impacts, thereby increasing the likelihood of delamination.

[0397] According to one embodiment of the present invention, the average thickness of the plating layer can be made thinner than the average thickness of the insulating layer to reduce the contact area between the plating layer and the insulating layer, thereby suppressing the occurrence of delamination and improving the adhesion strength of the stacked electronic component (3000).

[0399] The size of the stacked electronic component (3000) does not need to be specifically limited.

[0400] However, in order to achieve both miniaturization and high capacity simultaneously, the thickness of the dielectric layer and internal electrode must be reduced to increase the number of layers, so the reliability and capacity improvement effects per unit volume according to the present invention can be more pronounced in a stacked electronic component (3000) having a size of 1005 (length × width, 1.0 mm × 0.5 mm) or less.

[0401] Accordingly, considering manufacturing error, external electrode size, etc., if the length of the stacked electronic component (3000) is 1.1 mm or less and the width is 0.55 mm or less, the reliability improvement effect according to the present invention may be more pronounced. Here, the length of the stacked electronic component (3000) refers to the maximum size in the second direction of the stacked electronic component (3000), and the width of the stacked electronic component (3000) may refer to the maximum size in the third direction of the stacked electronic component (3000).

[0403] Although embodiments of the present invention have been described in detail above, the present invention is not limited by the aforementioned embodiments and accompanying drawings, but is intended to be limited by the appended claims. Accordingly, various substitutions, modifications, and changes may be made by those skilled in the art within the scope of the technical concept of the present invention as described in the claims, and such are also to be considered to fall within the scope of the present invention.

[0405] Furthermore, the expression "one embodiment" as used in this disclosure does not imply identical embodiments, but is provided to emphasize distinct features of each. However, the presented one embodiment does not exclude implementation in combination with features of other one embodiments. For example, even if a matter described in a specific one embodiment is not described in another one embodiment, it may be understood as a description related to another one embodiment, provided that there is no description in another one embodiment that contradicts or conflicts with such matter.

[0406] The terms used in this disclosure are used merely to describe one embodiment and are not intended to limit this disclosure. Whereby, singular expressions include plural expressions unless the context clearly indicates otherwise. Explanation of the symbols

[0408] 1000, 2000, 3000: Stacked electronic components 1100: Mounting board for stacked electronic components 110: Body 111: Genome layer 112, 113: Cover section 114, 115: Margin 121, 122: Internal electrodes 131, 231, 331: First external electrode 132, 232, 332: Second external electrode 134, 135: Additional electrode layer 141, 142, 241, 242, 341, 342: Plating layer 151, 251, 252, 253, 351: Insulating layer 161, 261: Additional insulation layer 180: Substrate 181, 182: Electrode pads 191, 192: Solder

Claims

Claim 1 A body comprising a dielectric layer and first and second internal electrodes alternately arranged with the dielectric layer in between, and comprising first and second surfaces facing in a first direction, third and fourth surfaces connected to the first and second surfaces and facing in a second direction, and fifth and sixth surfaces connected to the first to fourth surfaces and facing in a third direction; a first external electrode comprising a first connection portion disposed on the third surface and a first band portion extending from the first connection portion to a part of the first surface; a second external electrode comprising a second connection portion disposed on the fourth surface and a second band portion extending from the second connection portion to a part of the first surface; a first insulating layer disposed on the first connection portion; a second insulating layer disposed on the second connection portion; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion. A laminated electronic component comprising, wherein the first insulating layer and the second insulating layer comprise an oxide containing silicon (Si), and the number of moles of silicon (Si) atoms relative to the number of moles of elements other than oxygen in the insulating layer is 0.95 or greater. Claim 2 In claim 1, the oxide containing Si is silica (SiO2) in the laminated electronic component. Claim 3 A laminated electronic component according to claim 1, wherein the first insulating layer and the second insulating layer further comprise an oxide containing boron (B). Claim 4 A laminated electronic component according to claim 3, wherein the body comprises barium (Ba), and an adhesive layer comprising barium (Ba) and boron (B) is disposed at the interface where the first and second insulating layers and the body come into contact. Claim 5 A stacked electronic component according to claim 1, wherein H1 is the average size in the first direction from the first surface to the internal electrode closest to the first surface among the first and second internal electrodes, and H2 is the average size in the first direction from the extension line of the first surface to the end of the plating layer disposed on the first and second connection portions, satisfying H1 > H2. Claim 6 In claim 1, when H1 is the average size in the first direction from the first surface to the internal electrode closest to the first surface among the first and second internal electrodes, and H2 is the average size in the first direction from the extension line of the first surface to the end of the plating layer disposed on the first and second connection portions, H1 <H2를 만족하는 적층형 전자 부품. Claim 7 In paragraph 6, when the average size of the first direction of the above body is denoted as T, H2 <T / 2를 만족하는적층형 전자 부품. Claim 8 A stacked electronic component according to claim 1, wherein the first and second plating layers are arranged below the extension line of the first surface. Claim 9 A stacked electronic component according to claim 1, wherein L is the average size in the second direction of the body, B1 is the average size in the second direction from the extension line of the third surface to the end of the first band portion, and B2 is the average size in the second direction from the extension line of the fourth surface to the end of the second band portion, satisfying 0.2≤B1 / L≤0.4 and 0.2≤B2 / L≤0.

4. Claim 10 A laminated electronic component according to claim 1, further comprising an additional insulating layer disposed on the first surface and disposed between the first band portion and the second band portion. Claim 11 A stacked electronic component according to claim 1, wherein the average thickness of the dielectric layer is 0.35 μm or less. Claim 12 A stacked electronic component according to claim 1, wherein the average thickness of the first and second internal electrodes is 0.35 μm or less. Claim 13 A stacked electronic component according to claim 1, wherein the body comprises a capacitance forming portion including first and second internal electrodes alternately arranged with the dielectric layer in between, and a cover portion disposed on both ends of the capacitance forming portion in a first direction, and the average size of the cover portion in the first direction is 15 μm or less. Claim 14 A stacked electronic component according to claim 1, wherein the average thickness of the first and second plating layers is thinner than the average thickness of the area disposed on the first and second connection portions among the first and second insulating layers. Claim 15 A stacked electronic component according to claim 1, wherein the first plating layer is arranged to cover an end near the first surface of the first insulating layer, and the second plating layer is arranged to cover an end near the first surface of the second insulating layer. Claim 16 A stacked electronic component according to claim 1, wherein the first insulating layer is disposed to cover the end disposed on the first external electrode of the first plating layer, and the second insulating layer is disposed to cover the end disposed on the second external electrode of the second plating layer. Claim 17 A stacked electronic component according to claim 1, wherein the first external electrode includes a first side band portion extending from the first connection portion to a part of the fifth and sixth surfaces, and the second external electrode includes a second side band portion extending from the second connection portion to a part of the fifth and sixth surfaces, and the second direction size of the first and second side band portions increases as it approaches the first surface. Claim 18 In claim 1, the first and second external electrodes are spaced apart from the fifth and sixth surfaces and are a stacked electronic component. Claim 19 In claim 1, the first and second external electrodes are arranged spaced apart from the second surface and are a stacked electronic component. Claim 20 A stacked electronic component according to claim 1, wherein the first and second insulating layers extend to the second surface and are connected to each other. Claim 21 A laminated electronic component according to claim 1, wherein the first and second insulating layers extend to the fifth and sixth surfaces and are connected to each other. Claim 22 In claim 1, the insulating layer is not disposed on the second, fifth, and sixth surfaces of the laminated electronic component. Claim 23 A stacked electronic component according to claim 1, wherein the first external electrode includes a third band portion extending from the first connection portion to a part of the second surface, and the second external electrode includes a fourth band portion extending from the second connection portion to a part of the second surface. Claim 24 A stacked electronic component according to claim 1, wherein the body includes a 1-3 corner connecting the first surface and the third surface, a 1-4 corner connecting the first surface and the fourth surface, a 2-3 corner connecting the second surface and the third surface, and a 2-4 corner connecting the second surface and the fourth surface, wherein the 1-3 corner and the 2-3 corner have a shape that contracts toward the center of the first direction of the body as they approach the third surface, and the 1-4 corner and the 2-4 corner have a shape that contracts toward the center of the first direction of the body as they approach the fourth surface, and the first external electrode includes a first corner portion that extends from the first connection portion onto the 1-3 corner and the 2-3 corner, and the second external electrode includes a second corner portion that extends from the second connection portion onto the 1-4 corner and the 2-4 corner. Claim 25 A stacked electronic component according to claim 24, wherein B3 is the second direction average size from the extension line of the third surface to the end of the first corner portion, B4 is the second direction average size from the extension line of the fourth surface to the end of the second corner portion, G1 is the second direction average size of the area separated from the third surface and the second internal electrode, and G2 is the second direction average size of the area separated from the fourth surface and the first internal electrode, satisfying B3≤G1 and B4≤G2. Claim 26 A stacked electronic component according to claim 1, wherein the first external electrode comprises a first connecting electrode disposed on the third surface and a first band electrode disposed on the first surface and connected to the first connecting electrode, and the second external electrode comprises a second connecting electrode disposed on the fourth surface and a second band electrode disposed on the first surface and connected to the second connecting electrode. Claim 27 In claim 26, the first and second connecting electrodes are a stacked electronic component spaced apart from the fifth and sixth surfaces. Claim 28 In claim 26, the first and second connecting electrodes are a stacked electronic component spaced apart from the second surface. Claim 29 A stacked electronic component according to claim 26, wherein the first external electrode further comprises a third band electrode disposed on the second surface and connected to the first connecting electrode, and the second external electrode further comprises a fourth band electrode disposed on the second surface and connected to the second connecting electrode. Claim 30 In claim 26, the first connecting electrode and the second connecting electrode are a stacked electronic component comprising the same metal as the metal included in the internal electrode. Claim 31 In claim 26, the first band electrode and the second band electrode are a stacked electronic component in which the first band electrode and the second band electrode are fired electrodes comprising a conductive metal and glass. Claim 32 In claim 26, the first connecting electrode and the second connecting electrode are a stacked electronic component in which the electrodes are fired electrodes comprising a conductive metal and glass. Claim 33 In claim 26, the above-mentioned first band electrode and the above-mentioned second band electrode are a plating layer, forming a stacked electronic component. Claim 34 In claim 26, the first connecting electrode and the second connecting electrode are a plating layer, forming a laminated electronic component.

Citation Information

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