Regulator

Abstract

The regulator of the present embodiment comprises: an error amplifier in which a reference voltage is provided as one input and the output voltage of the regulator is divided and provided as another input; a first pass transistor in which the output of the error amplifier is applied to the gate; an AC inverter that inverts the phase of the output of the error amplifier and outputs it; a second pass transistor in which the output of the AC inverter is applied to the gate; the source electrodes of the first pass transistor and the second pass transistor are connected to each other to provide an input voltage, and the drain electrodes of the first pass transistor and the second pass transistor are connected to each other to form an output node and output a voltage in which the input voltage is regulated.

Description

Technology Field

[0001] The present disclosure generally relates to regulators. Background Technology

[0002] A low dropout regulator (LDO) is a DC linear voltage regulator circuit that can operate even when the supply voltage is close to the output voltage. Compared to other DC-DC voltage regulators, the advantages of an LDO regulator include very low switching noise, a small device size as it does not require large inductors or transformers, and a simple design.

[0003] LDO regulators are robust power supplies with low voltage drop that play a crucial role in various electronic devices. For instance, in the case of comparators, even a minute offset can transmit incorrect information to the output signal. Furthermore, it is essential to provide a stable supply voltage (VDD) when accurate output signals are required, such as in oscillators or clock generators. The problem to be solved

[0004] These LDO regulators are used in the majority of applications requiring linear supply voltages due to their simplicity and the small number of components required for design. However, these LDO regulators are affected by various types of noise and are vulnerable to noise provided by the driving voltage source.

[0005] One of the problems to be solved by the present disclosure is to resolve the difficulties of LDO regulators according to the prior art described above. means of solving the problem

[0006] The regulator of the present embodiment comprises: an error amplifier in which a reference voltage is provided as one input and the output voltage of the regulator is divided and provided as another input; a first pass transistor in which the output of the error amplifier is applied to the gate; an AC inverter that inverts the phase of the output of the error amplifier and outputs it; a second pass transistor in which the output of the AC inverter is applied to the gate; the source electrodes of the first pass transistor and the second pass transistor are connected to each other to provide an input voltage, and the drain electrodes of the first pass transistor and the second pass transistor are connected to each other to form an output node and output a voltage in which the input voltage is regulated.

[0007] According to one aspect of the present embodiment, the AC inverter outputs the phase of the error amplifier output while maintaining the DC level.

[0008] According to one aspect of the present embodiment, the AC inverter comprises a decoupling capacitor connected in series with the output of the error amplifier, a first amplifier that amplifies the output of the decoupling capacitor, and a second amplifier that inverts and amplifies the difference between the output of the error amplifier and the output of the first amplifier. In this aspect, the gain of the first amplifier is 2, and the gain of the second amplifier is 1.

[0009] According to one aspect of the present embodiment, noise having opposite phases is applied to the gate of the first pass transistor and the gate of the second pass transistor so that the influence of the noise is canceled out at the output node of the regulator. In this aspect, the noise is provided by being mixed into the reference voltage.

[0010] According to one aspect of the present embodiment, the regulator further comprises a voltage divider connected to the output node, wherein the voltage divider divides the voltage formed at the output node and provides it to the other input. In this aspect, the regulator further comprises a smoothing capacitor connected in parallel with the voltage divider at the output node.

[0011] According to one aspect of the present embodiment, the regulator further includes a bandgap reference element that provides the reference voltage. Effects of the invention

[0012] According to the present disclosure, the advantage is provided that the influence of noise applied through a reference voltage generator can be reduced. In addition, the regulator according to the present embodiment improves linearity in various circuits. Brief explanation of the drawing

[0013] FIG. 1 is a circuit diagram illustrating an overview of a regulator according to the present embodiment. Figure 2 is a schematic diagram illustrating the input and output signals of an AC converter. Figure 3 is a diagram illustrating an example of an AC inverter. Figure 4 is a diagram illustrating the voltage at each node of the exemplified AC inverter. FIG. 5(a) is a diagram illustrating the noise exclusion performance of a conventional regulator, and FIG. 5(b) is a diagram illustrating the noise exclusion performance of a regulator of the present embodiment. Specific details for implementing the invention

[0014] The present embodiment is described below with reference to the attached drawings. FIG. 1 is a circuit diagram illustrating an overview of a regulator according to the present embodiment. Referring to FIG. 1, the regulator (10) of the present embodiment comprises: an error amplifier (100) to which a reference voltage (Vref) is provided as one input and a divided output voltage of the regulator is provided as another input; a first pass transistor (M1) to which the output of the error amplifier is applied to the gate; an AC inverter (200) to which the phase of the error amplifier output is inverted and output; a second pass transistor (M2) to which the output of the AC inverter (200) is applied to the gate; the source electrodes of the first pass transistor (M1) and the second pass transistor (M2) are connected to each other, and the drain electrodes of the first pass transistor (M1) and the second pass transistor (M2) are connected to each other to form an output node and output a regulated voltage (Vout). In Figure 1, the thick solid line indicates that noise has been introduced into the signal provided through the line, and the thick dashed line indicates that noise with a phase opposite to that of the thick solid line has been introduced.

[0015] The input voltage (Vin) is applied to the source electrodes of the reference voltage generator (400), the error amplifier (100), and the first and second pass transistors (M1, M2). The reference voltage generator (400) receives the input voltage (Vin) and forms and outputs a reference voltage (Vref).

[0016] In one embodiment, the reference voltage generator (400) is a bandgap reference circuit. A bandgap reference circuit is a device in which the output voltage is not sensitive to variation factors (PVT variation), such as process variation, voltage variation, and temperature variation.

[0017] A reference voltage (Vref) is provided as one input to the error amplifier (100), and a voltage formed by dividing the output voltage (Vout) is provided as another input. In one embodiment, the regulator (10) further includes a voltage divider (300) and a smoothing capacitor connected in parallel with the voltage divider. As illustrated in the embodiment, the voltage divider (300) may include at least two resistors connected in series. At the node where the two resistors are connected, the output voltage (Vout) is divided and provided as another input to the error amplifier (100).

[0018] Noise may be introduced through the input voltage (Vin). The noise introduced through the input voltage (Vin) may be provided to the error amplifier (100) via the reference voltage generator (400) as illustrated. Since the noise provided as the input to the error amplifier (100) is amplified by the gain of the error amplifier (100) and output to the pass transistor, it affects the performance of the regulator and therefore needs to be removed.

[0019] FIG. 2 is a schematic diagram illustrating the input and output signals of an AC inverter (200). It is assumed that the output voltage of the error amplifier (100) is superimposed with a DC component (Vdc) shown as a black dashed line and an AC component (Vac) shown as a thin black solid line. As illustrated, the AC inverter (200) receives the output of the error amplifier and outputs it while maintaining the DC level (Vdc), but outputs (Vac') by inverting the phase of the AC component (Vac) in the output signal of the error amplifier (100) as shown by the gray solid line.

[0020] Included in the signals provided to the gate electrode of the first pass transistor (M1) and the gate electrode of the second pass transistor (M2) direct current All components are excluded due to the characteristics of the differential structure. In addition, AC components including noise components included in the signals provided to the gate electrode of the first pass transistor (M1) and the gate electrode of the second pass transistor (M2) have opposite phases, and the output signals of the two pass transistors are also amplified and output with opposite phases.

[0021] At the drain electrodes of the first pass transistor (M1) and the second pass transistor (M2), which are output nodes, signals with opposite phases are canceled out and removed, and similarly, noise components are also canceled out and removed. Therefore, the influence of noise introduced through the reference voltage generator (400) is removed from the output voltage (Vout) output from the output node.

[0022] FIG. 3 is a diagram illustrating an embodiment of an AC inverter (200), and FIG. 4 is a diagram illustrating the voltage at each node of the illustrated AC inverter (200). Referring to FIG. 1 to FIG. 4, the AC inverter (200) includes a decoupling capacitor (Cde) connected in series with the output of an error amplifier (100), a first amplifier (210) that amplifies the output of the decoupling capacitor (Cde), and a second amplifier (220) that inverts and amplifies the difference between the output of the error amplifier (100) and the output of the first amplifier (210).

[0023] The output of the error amplifier (100) illustrated in FIG. 4(a) is provided to one electrode of the decoupling capacitor (Cde). As exemplified in FIG. 4(b), the AC component from which the DC component has been removed from the output of the error amplifier (100) is output to the other electrode of the decoupling capacitor (Cde). For example, if the output of the error amplifier (100) is Vac + Vdc, the voltage at the other electrode of the decoupling capacitor (Cde) is Vac from which the DC component has been removed.

[0024] The first amplifier (210) receives the output signal of the decoupling capacitor (Cde) and amplifies the signal with a first gain (A1) to output it. The shape of the output signal of the first amplifier (210) is as shown in FIG. 4(c). For example, the first gain (A1) may be 2, and the output signal of the first amplifier (210) may be 2Vac.

[0025] The second amplifier (220) amplifies the difference between the output signal of the error amplifier (100) and the output signal of the first amplifier (210) by a second gain (A2) and outputs it. In one embodiment, the gain of the second amplifier (220) may be 1, and the output signal of the second amplifier (220) is 1×(Vac - 2Vac) + Vdc = ??Vac + Vdc, and as exemplified in FIG. 2(d), a signal can be obtained in which the DC component is maintained at the output of the error amplifier, but only the phase of the AC component is inverted.

[0026] The LDO regulator according to the present embodiment has a low voltage drop and is robust, so it can be applied to a comparator, oscillator, and clock generator to supply voltage (VDD).

[0027] Simulation example

[0028] FIG. 5(a) is a diagram illustrating the noise exclusion performance of a conventional regulator, and FIG. 5(b) is a diagram illustrating the noise exclusion performance of a regulator of the present embodiment. In FIG. 5(a) and FIG. 5(b), noise is represented by a red line, the gate signal of the pass transistor in the conventional regulator is represented by green, the gate signal of the regulator of the present embodiment is represented by green and yellow, and the output signal of the regulator is represented by a blue line.

[0029] Referring to Fig. 5(a), a noise component of 10 nV was introduced through a reference voltage generator as shown in the red curve. It can be seen that the output voltage of the conventional regulator shows that the introduced 10 nV noise is amplified eightfold to approximately 80 nV.

[0030] Referring to the drawing illustrating the noise exclusion performance of the regulator of the present embodiment as exemplified by FIG. 5(b), it can be seen that noise of 10 nV is attenuated to about 150 pV, which is 0.015 times.

[0031] To aid in understanding the present invention, the embodiments illustrated in the drawings have been described with reference to the examples shown; however, these are merely illustrative examples for implementation, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the appended claims. Explanation of the symbols

[0032] 10: Regulator 100: Error amplifier 200: AC inverter 210: 1st Amplifier 220: 2nd Amplifier 300: Voltage divider

Claims

Claim 1 A regulator comprising: an error amplifier in which a reference voltage is provided as one input and the output voltage of the regulator is divided and provided as another input; a first pass transistor in which the output of the error amplifier is applied to the gate; an AC inverter that outputs an inverted phase of the output of the error amplifier; a second pass transistor in which the output of the AC inverter is applied to the gate; the source electrodes of the first pass transistor and the second pass transistor are connected to each other to provide an input voltage, and the drain electrodes of the first pass transistor and the second pass transistor are connected to each other to form an output node, and the regulator outputs a voltage in which the input voltage is regulated. Claim 2 In claim 1, the AC inverter is a regulator that inverts the phase of the error amplifier output while maintaining the DC level. Claim 3 In claim 1, the AC converter comprises a regulator including a decoupling capacitor connected in series with the output of the error amplifier, a first amplifier that amplifies the output of the decoupling capacitor, and a second amplifier that inverts and amplifies the difference between the output of the error amplifier and the output of the first amplifier. Claim 4 A regulator according to paragraph 3, wherein the gain of the first amplifier is 2 and the gain of the second amplifier is 1. Claim 5 A regulator according to claim 1, wherein noise having opposite phases is applied to the gate of the first pass transistor and the gate of the second pass transistor, and the influence of the noise is canceled out at the output node of the regulator. Claim 6 In paragraph 5, the noise is a regulator provided by applying it to the reference voltage. Claim 7 In claim 1, the regulator further comprises a voltage divider connected to the output node, wherein the voltage divider divides the voltage formed at the output node and provides it to the other input. Claim 8 In claim 7, the regulator further comprises a smoothing capacitor connected in parallel with the voltage divider at the output node. Claim 9 In claim 1, the regulator further comprises a bandgap reference element that provides the reference voltage. Claim 10 The regulator in claim 1 is a regulator used in one or more of a comparator, an oscillator, and a clock generator.

Images