Display device

Abstract

The present disclosure relates to a display device, wherein a display device according to one embodiment comprises a main display portion, a substrate including a first side portion connected to the main display portion, a plurality of scan lines and data lines located on the substrate, a plurality of pixels connected to the plurality of scan lines and the data lines, a plurality of data voltage transmission lines connected to each of the data lines, a connection wiring connected to the data voltage transmission lines, a sub-connection wiring connected to the connection wiring, and a driving portion connected to the sub-connection wiring, wherein the arrangement order of the data lines connected to the connection wiring and the arrangement order of the sub-connection wiring connected to the connection wiring are identical.

Description

Technology Field

[0001] The present disclosure relates to a display device. Background Technology

[0002] Various electronic devices are in use that utilize Liquid Crystal Displays (LCDs) or Organic Light Emitting Diodes (OLEDs) as display devices, such as mobile phones, navigation systems, digital cameras, e-books, portable game consoles, and various terminals.

[0003] Conventionally, such display devices were generally rectangular, but recently, developments have been made for display devices with rounded corners and display devices that display images on the sides as well.

[0004] In this case, as signal lines are placed to transmit video signals to rounded corners, side sections, etc., the non-display area increases and the light-emitting area decreases. If signal lines are placed to prevent a reduction in the light-emitting area, the arrangement order of the driving unit and the signal lines differs, and in this case, a specific arrangement of the driving unit is required. The problem to be solved

[0005] The embodiments are intended to provide a display device that can prevent an increase in the cost of the driving unit while preventing a reduction in the light-emitting area. means of solving the problem

[0006] A display device according to one embodiment of the present invention comprises a main display unit, a substrate including a first side unit connected to the main display unit, a plurality of scan lines and data lines located on the substrate, a plurality of pixels connected to the plurality of scan lines and the data lines, a plurality of data voltage transmission lines connected to each of the data lines, a connection wiring connected to the data voltage transmission lines, a sub-connection wiring connected to the connection wiring, and a driving unit connected to the sub-connection wiring, wherein the arrangement order of the data lines connected to the connection wiring and the arrangement order of the sub-connection wiring connected to the connection wiring are identical.

[0007] The connecting wire connected to the data line located at the nth position among the above data lines may be connected to the sub-connecting wire located at the nth position among the sub-connecting wires connected to the driving unit.

[0008] It includes a second side portion that is bent from the main display portion, and the driving portion may be connected to the second side portion.

[0009] The above main display unit includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer that are insulated from each other, and the connecting wiring may include one or more of a first connecting wiring located on the same layer as the first conductive layer, a second connecting wiring located on the same layer as the second conductive layer, a third connecting wiring located on the same layer as the third conductive layer, and a fourth connecting wiring located on the same layer as the fourth conductive layer.

[0010] The above data line and the above data voltage transmission line can be connected to each other at one edge of the first side portion.

[0011] The device further includes an edge portion located between the main display portion and the first side portion, and when n data lines are located between the first side portion and the edge portion, one edge of a data voltage transmission line connected to the n data lines of the first side portion and the edge portion may be located between the n data lines of the main display portion adjacent to the edge portion.

[0012] The n data lines of the main display unit are connected to the driving unit through the first connecting wire or the second connecting wire, and the data voltage transmission line may be connected to the driving unit through the first sub-connecting wire and the fourth connecting wire, or the second sub-connecting wire and the fourth connecting wire.

[0013] A plurality of insulating films are located between the first sub-connecting wire and the fourth connecting wire, and contact holes are located in the plurality of insulating films, and the first sub-connecting wire and the fourth connecting wire can be connected to each other through the contact holes.

[0014] The first connecting wire and the second connecting wire can be positioned alternately one by one.

[0015] It may further include a shielding layer located between the second sub-connecting wire and the fourth connecting wire, and located on the same layer as the third conductive layer.

[0016] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire may be located between the bending unit and the driving circuit unit.

[0017] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire may be located between the second side unit and the bending unit.

[0018] A display device according to another embodiment of the present invention includes a main display unit, a substrate including a first side unit connected to the main display unit, a plurality of scan lines and data lines located on the substrate, a plurality of pixels connected to the plurality of scan lines and the data lines, a plurality of data voltage transmission lines connected to each of the data lines, a connecting wire connected to the data voltage transmission lines, and a driving unit connected to the connecting wire.

[0019] The above connecting wiring includes a third connecting wiring and a fourth connecting wiring, and n data lines of the main display unit are connected to the driving unit through the third connecting wiring, and the data voltage transmission line may be connected to the driving unit through the third connecting wiring and the fourth connecting wiring.

[0020] An insulating layer is located between the third connecting wire and the fourth connecting wire, and the insulating layer includes a contact hole, through which the third connecting wire and the fourth connecting wire can come into contact with each other.

[0021] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire may be located in the bending unit.

[0022] The above connecting wire includes a third connecting wire and a fifth connecting wire, and n data lines of the main display unit are connected to the driving unit through the third connecting wire, and the data voltage transmission line is connected to the driving unit through the third connecting wire and the fifth connecting wire, and may further include a shielding layer located between the third connecting wire and the fifth connecting wire and located in the same layer as the fourth conductive layer.

[0023] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fifth connecting wire may be located in the bending unit.

[0024] The above connecting wiring includes a first connecting wiring, a second connecting wiring, and a fourth connecting wiring, and n data lines of the main display unit are connected to a driving unit through the first connecting wiring or the second connecting wiring, and the data voltage transmission line may be connected to a driving unit through the fourth connecting wiring.

[0025] The first connecting wire or the second connecting wire and the fourth connecting wire may cross each other with an insulating film in between.

[0026] Between the first or second connecting wire and the fourth connecting wire, a shielding layer located in the same layer as the third conductive layer may be further included.

[0027] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire may be located between the second side unit and the bending unit.

[0028] The above driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire may be located between the bending unit and the driving circuit unit.

[0029] The above connecting wiring includes a first connecting wiring, a second connecting wiring, and a fourth connecting wiring, and the driving unit includes a chip-on-film, and n data lines of the main display unit are connected to the chip-on-film through the first connecting wiring or the second connecting wiring, and the data voltage transmission line may be connected to the chip-on-film through the fourth connecting wiring.

[0030] A display device according to another embodiment of the present invention comprises a main display portion, a substrate including a first side portion connected to the main display portion, a scan line and a data line located on the substrate,

[0031] It includes a pixel connected to the scan line and the data line, a data voltage transmission line connected to the data line, a connection wire connected to the data voltage transmission line, a sub-connection wire connected to the connection wire, and a driving unit connected to the sub-connection wire, wherein the data line and the data voltage transmission line are connected to each other at one edge of the first side portion.

[0032] The arrangement order of the data lines connected to the above connection wiring and the arrangement order of the sub-connection wiring connected to the above connection wiring may be the same.

[0033] The connecting wire connected to the data line located at the nth position among the above data lines may be connected to the sub-connecting wire located at the nth position among the sub-connecting wires connected to the driving unit.

[0034] The above main display unit includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer that are insulated from each other, and the connecting wiring may include one or more of a first connecting wiring located on the same layer as the first conductive layer, a second connecting wiring located on the same layer as the second conductive layer, a third connecting wiring located on the same layer as the third conductive layer, and a fourth connecting wiring located on the same layer as the fourth conductive layer.

[0035] It includes a second side portion that is bent from the main display portion, and the driving portion may be connected to the second side portion.

[0036] The above driving unit includes a bending unit and a driving circuit unit, and the bending unit may be located between the second side unit and the driving circuit unit. Effects of the invention

[0037] According to the embodiments, by making the arrangement order of data lines and the connection order of the driving unit identical through the connecting wiring, it is possible to prevent a reduction in the light-emitting area and prevent an increase in the cost of the driving unit. Brief explanation of the drawing

[0038] FIG. 1 is a perspective view of a display device according to one embodiment. Figure 2 is an unfolded view of the display device shown in Figure 1. Figure 3 illustrates the connection between the wiring located on the first side and edge portions of the substrate and the driving unit. Figure 4 shows the area marked A in Figure 3 separately. FIG. 5 is a cross-sectional view taken along the V-V' line of FIG. 4. FIG. 6 illustrates a display device according to another embodiment. FIG. 7 illustrates a display device according to another embodiment. Figure 8 is an enlarged view of the area marked A in Figure 7. Figure 9 is a cross-sectional view taken along the line IX-IX' of Figure 8. FIG. 10 illustrates the same location as FIG. 8 for another embodiment. Figure 11 is a cross-sectional view taken along the line XI-XI' of Figure 10. FIG. 12 illustrates a display device according to another embodiment. FIG. 13 is a cross-sectional view taken along the line XII-XII' of FIG. 12. FIG. 14 illustrates the same area as FIG. 12 for another embodiment. FIG. 15 illustrates the same area as FIG. 12 for a display device according to another embodiment. FIG. 16 is an equivalent circuit diagram for a pixel of a display device according to one embodiment. FIG. 17 is a timing diagram of driving signals of a display device according to one embodiment. FIG. 18 is a plan view showing a plurality of pixels adjacent to each other of a display device according to one embodiment. FIG. 19 is a plan view showing one of the pixels of FIG. 18. FIG. 20 is a cross-sectional view taken along the line XX-XX' of FIG. 19. FIG. 21 is a plan view showing one pixel of a display device according to one embodiment. FIG. 22 is a cross-sectional view taken along the line XXII-XXII' of FIG. 21. Specific details for implementing the invention

[0039] Hereinafter, various embodiments of the present invention will be described in detail with reference to the attached drawings so that those skilled in the art can easily implement the present invention. The present invention may be embodied in various different forms and is not limited to the embodiments described herein.

[0040] To clearly explain the present invention, parts unrelated to the explanation have been omitted, and the same reference numerals are used for identical or similar components throughout the specification.

[0041] Furthermore, the size and thickness of each component shown in the drawings are depicted arbitrarily for convenience of explanation, and thus the present invention is not necessarily limited to what is illustrated. Thicknesses have been enlarged in the drawings to clearly represent various layers and regions. Additionally, for convenience of explanation, the thickness of some layers and regions has been exaggerated in the drawings.

[0042] Furthermore, when it is said that a part, such as a layer, membrane, region, or plate, is "on" or "on" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when it is said that a part is "directly above" another part, it means that there is no other part in between. Also, saying that a part is "on" or "on" a reference part means that it is located above or below the reference part, and does not necessarily mean that it is located "on" or "on" in the direction opposite to gravity.

[0043] Furthermore, throughout the specification, when a part is described as "including" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0044] Additionally, throughout the specification, "planar" means when the subject part is viewed from above, and "cross-sectional" means when the cross-section obtained by vertically cutting the subject part is viewed from the side.

[0045] Hereinafter, a display device according to an embodiment of the present invention will be described with reference to the drawings.

[0046] First, a display device according to one embodiment will be described as follows with reference to FIGS. 1 to 3. FIG. 1 is a perspective view of a display device according to one embodiment, and FIG. 2 is an unfolded view of the display device shown in FIG. 1.

[0047] As illustrated in FIGS. 1 and 2, a display device according to one embodiment includes a substrate (110) comprising a main display portion (111), an edge portion (112) located at the edge of the main display portion (111), a first side portion (115) folded from the edge portion (112), and a second side portion (116) folded from the main display portion (111). The main display portion (111), the edge portion (112), the first side portion (115), and the second side portion (116) are referred to as a display portion (DA).

[0048] The main display (111) is located at the center of the substrate (110) and may be polygonal. For example, as illustrated, the main display (111) may be square. The main display (111) may be a rectangle including two sides extended in a first direction (W1) and two sides extended in a second direction (W2). In this case, the length of the two sides extended in the first direction (W1) may be longer than the length of the two sides extended in the second direction (W2).

[0049] The edge portion (112) is located on both edges of the main display portion (111). For example, as illustrated, the edge portion (112) may be located on the left and right edges of the main display portion (111). The edge portion (112) is extended along the first direction (W1). The edge portion (112) may include a corner portion (113). Although the corner portion (113) is shown as being round in Fig. 1, the corner portion (113) may be square instead of round. That is, the shape of the corner portion (113) may be round or square and is not limited to the shape disclosed in Fig. 1.

[0050] The first side portion (115) is bent from the edge portion (112). At this time, the first side portion (115) extends from the portion excluding the corner portion (113) of the edge portion (112). Therefore, no side is formed in the portion where the corner portion (113) is located. The first side portion (115) is extended along the first direction (W1).

[0051] According to the embodiment, the edge portion (112) may be omitted. In this case, the first side portion (115) may be folded from the main display portion (111).

[0052] The second side portion (116) is bent from the main display portion (111). For example, as illustrated, the second side portion (116) is bent from the upper and lower edges of the main display portion (111). However, the present invention is not limited thereto, and the edge portion (112) may be located at the upper and lower edges of the main display portion (111). In this case, the second side portion (116) may be bent from the left and right edges of the main display portion (111). The second side portion (116) is extended along the second direction (W2).

[0053] The second side portion (116) is connected to a driving portion (420). The driving portion (420) includes a driving circuit portion (400) and a bending portion (410). The bending portion (410) is located between the second side portion (116) and the driving circuit portion (400). The driving portion (420) is bent at the bending portion (410), and the driving circuit portion (400) may be located on the back of the main display portion (111). Depending on the embodiment, the bending portion (410) may be omitted.

[0054] In FIGS. 1 and 2, the driving unit (420) may be a chip-on-film (COF).

[0055] FIG. 3 illustrates the connection of the wiring located on the first side portion (115) and the edge portion (112) of the substrate (110) with the driving circuit portion (400). Hereinafter, the edge portion (112) and the first side portion (115) will be referred to as the auxiliary display portion (AA).

[0056] A plurality of data lines (171) are located on the substrate (110) of the auxiliary display unit (AA). The data lines (171) are connected to the driving circuit unit (400) through the data voltage transmission line (510). The contact area between the data lines (171) and the data voltage transmission line (510) is indicated by a black circle. In other drawings as well, the parts where each wire contacts each other are indicated by a black circle. A bending unit (410) is located between the driving circuit unit (400) and the substrate (110).

[0057] In FIG. 3, the numbers of each data line (171) are shown. Referring to FIG. 3, the multiple data lines (171) on the substrate (110) of the auxiliary display unit (AA) are shown in the order 1, 2, ...n, ...2n. However, the order in which they are connected to the bending unit (410) via the data voltage transmission line (510) differs from the order in which the data lines (171) are arranged in the display unit (DA). The corresponding order is shown near the wiring.

[0058] In order to connect the data line (171) located at the first side portion (115) and the edge portion (112) to the driving circuit portion (400), a data voltage transmission line (510) is required. At this time, in order for the arrangement order of the data line (171) and the order of the data voltage transmission line (510) connected to the driving circuit portion (400) to be the same, the contact area of ​​the data line (171) and the data voltage transmission line (510) overlaps significantly with the first side portion (115) and the edge portion (112).

[0059] That is, when the first data line (171) contacts the data voltage transmission line (510) at one edge of the first side portion (115), the second data line (171) must contact the data voltage transmission line (510) slightly above the contact area of ​​the first data line (171). In this way, when n data lines each contact the data voltage transmission line (510) in sequence, n contact areas are required, and these areas overlap with the display area. When the data line (171) and the data voltage transmission line (510) contact within the display area, these contact areas may be visible as diagonal stains when the display device is operated.

[0060] However, with reference to FIG. 3, in the display device according to the present embodiment, contact between the data line (171) and the data voltage transmission line (510) located at the first side portion (115) and the edge portion (112) is made at the edge of the display portion. That is, the data line (171) and the data voltage transmission line (510) make contact at the edge of the first side portion (115) and the edge portion (112) and do not overlap with the display area, thereby preventing the occurrence of diagonal stains.

[0061] However, as shown in FIG. 3, when the data line (171) and the data voltage transmission line (510) come into contact at the edge of the substrate (110), the arrangement order of the data line (171) and the order of connection to the bending part (410) are different. This is because the data voltage transmission line (510) is connected to the data line (171) one by one alternately as shown in FIG. 3.

[0062] Because the arrangement order of the data line (171) and the order in which the data voltage transmission line (510) is connected to the driving circuit (410) are different, the driving circuit (400) also has to change the signal order of each wire, which causes an increase in the cost of the display device.

[0063] However, with reference to FIG. 3, the display device according to the present embodiment connects the data voltage transmission line (510) and the bending section (410) through the first connecting wire (144) and the second connecting wire (145). Subsequently, the bending section (410) and the driving circuit section (400) can be connected through the first sub-connecting wire (144S), the second sub-connecting wire (145S), and the third connecting wire (511). In this process, the order of the data line (171) and the order of the wires connected to the driving circuit section (400) are made identical. Therefore, since the signal order of the driving circuit section (400) does not need to be changed, an increase in cost can be prevented, and the phenomenon of diagonal stains occurring in the display area can also be prevented.

[0064] The connecting wires may be located on various layers. For example, the connecting wires may be located on the same layer as one of the first conductive layer, second conductive layer, third conductive layer, and fourth conductive layer of the display unit (DA). In the following embodiments, the wire located on the same layer as the first conductive layer of the display unit (DA) is referred to as the first connecting wire (144), the wire located on the same layer as the second conductive layer is referred to as the second connecting wire (145), the wire located on the same layer as the third conductive layer is referred to as the third connecting wire (178), and the wire located on the same layer as the fourth conductive layer is referred to as the fourth connecting wire (511).

[0065] The first, second, third, and fourth conductive layers of the display portion (DA) will be described in detail separately later.

[0066] Referring again to FIG. 3, the display device according to the present embodiment includes a first connecting wire (144), a second connecting wire (145), and a fourth connecting wire (511). Additionally, the sub-connecting wire may include a first sub-connecting wire (144S) and a second sub-connecting wire (145S).

[0067] At this time, the first connecting wire (144) and the first sub-connecting wire (144S) may be located on the same layer as the first conductive layer of the display unit (DA), and the second connecting wire (145) and the second sub-connecting wire (145S) may be located on the same layer as the second conductive layer of the display unit (DA). Additionally, the fourth connecting wire (511) may be located on the same layer as the data voltage transmission line (510) and may be located on the same layer as the fourth conductive layer of the display unit (DA).

[0068] FIG. 4 is a separate illustration of the area marked A in FIG. 3. FIG. 5 is a cross-sectional view taken along the V-V' line of FIG. 4. Referring to FIG. 4, a first connecting wire (144) located in the same layer as the first conductive layer and a second connecting wire (145) located in the same layer as the second conductive layer are alternately positioned. Referring to FIG. 4, when n data lines are positioned on the first side portion (115) and the edge portion (112), these n data lines are each connected to the first connecting wire (144) and the second connecting wire (145) through the third connecting wire (511). That is, the first data line (171) is connected to the first first sub-connecting wire (144S) through the fourth connecting wire (511), and the second data line (171) is connected to the first second sub-connecting wire (145S) through the fourth connecting wire (511). Thus, n wires located in the first side section (113) and edge section (112) are connected to the first sub-connecting wire (144S) and the second sub-connecting wire (145S) through the fourth connecting wire (511), and subsequently, wires from the n+1th wire to the 2nth wire are directly connected to the first sub-connecting wire (144S) and the second sub-connecting wire (145S) without passing through the fourth connecting wire (511). Therefore, the arrangement order of the data line (171) in the display section (DA) and the signal order of the driving circuit section (400) can be made identical.

[0069] Since the first sub-connecting wire (144S) and the second sub-connecting wire (145S) are positioned alternately, the gap between the wires can be narrowed. However, in one embodiment, only one of the first sub-connecting wire (144S) or the second sub-connecting wire (145S) may be used.

[0070] FIG. 5 is a cross-sectional view of FIG. 4 cut along the V-V' line. Referring to FIG. 5, a buffer layer (120) is located on a substrate (110). A first insulating layer (141) is located on the buffer layer (120). A first sub-connecting wire (144S) is located on the first insulating layer (141). The first sub-connecting wire (144S) is located on the same layer as the first conductive layer of the display unit (DA).

[0071] Next, a second insulating layer (142) is positioned over the first sub-connecting wire (144S). Next, a second sub-connecting wire (145S) is positioned, and the second sub-connecting wire (145S) is located on the same layer as the second conductive layer of the display unit (DA).

[0072] A shielding layer (177) is located on the third insulating layer (160). The shielding layer (177) is located on the same layer as the third conductive layer of the display unit (DA). The shielding layer (177) can prevent capacitance between the connecting wires. Next, a fourth insulating layer (162) is located on the shielding layer (177).

[0073] A fourth connecting wire (511) is located on the fourth insulating layer (162). The fourth connecting wire (511) is located on the same layer as the fourth conductive layer of the display unit (DA). The fourth connecting wire (511) is electrically connected to the first sub-connecting wire (144S) and the second sub-connecting wire (145S) through contact holes located in the second insulating layer (142), the third insulating layer (160), the shielding layer (177), and the fourth insulating layer (162). Depending on the embodiment, the shielding layer (177) may be omitted.

[0074] In the embodiment of FIG. 3, the first sub-connecting wire (144S), the second sub-connecting wire (145S), and the fourth connecting wire (511) are located between the bending part (410) and the driving circuit part (400).

[0075] FIG. 6 illustrates a display device according to another embodiment. Referring to FIG. 6, the display device according to this embodiment is identical to the embodiment of FIG. 3 except for the positions of the first connecting wire (144), the second connecting wire (145), and the fourth connecting wire (511). A detailed description of the identical components is omitted. Referring to FIG. 6, the first connecting wire (144), the second connecting wire (145), and the fourth connecting wire (511) of the display device according to this embodiment are located between the display part (DA) and the bending part (410).

[0076] FIG. 7 illustrates a display device according to another embodiment. The display device according to the embodiment of FIG. 7 differs from the previously described embodiment in that the order of the data line (171) is changed within the banding portion (410). A detailed description of identical components is omitted. Referring to FIG. 7, the data voltage transmission line (510) is connected to the first connecting wire (144). FIG. 8 is an enlarged view of the area marked A in FIG. 7.

[0077] Referring to FIG. 8, the display device according to the present embodiment includes a third connecting wire (178) located on the same layer as the third conductive layer of the display unit (DA).

[0078] Referring to FIG. 8, when n data lines are located in the first side section (115) and the edge section (112), these n data lines are each connected to the third connection line (178) through the fourth connection line (511). That is, the first data line (171) is connected to the first third connection line (178) through the fourth connection line (511), and the second data line (171) is connected to the second third connection line (178) through the fourth connection line (511). Subsequently, the wires from the n+1th wire to the 2nth wire are directly connected to the third connection line (178) without passing through the fourth connection line (511). Therefore, the arrangement order of the data lines (171) in the display section (DA) and the signal order of the driving circuit section (400) can be made identical.

[0079] FIG. 9 is a cross-sectional view taken along the line IX-IX' of FIG. 8. Referring to FIG. 9, a buffer layer (120), a first insulating layer (141), a second insulating layer (142), and a third insulating layer (160) are positioned in order on a substrate (110).

[0080] A third connecting wire (178) is located on the third insulating layer.

[0081] A fourth insulating layer (162) is positioned on the third connecting wire (178). A fourth connecting wire (511) is positioned on the fourth insulating layer (162).

[0082] The fourth connecting wire (511) and the third connecting wire (178) are connected to each other through the contact hole of the fourth insulating layer (162).

[0083] FIG. 10 illustrates the same location as FIG. 8 for another embodiment. FIG. 11 is a cross-sectional view taken along the line XI-XI' of FIG. 10.

[0084] Referring to FIGS. 10 and 11, the display device according to the present embodiment is identical to the display device according to FIGS. 8 and 9, except that it includes a shielding layer (515) located in the same layer as the fourth conductive layer. A detailed description of identical components is omitted.

[0085] Referring to FIGS. 10 and FIGS. 11, a protective film (180) is located on the shielding layer (515).

[0086] A fifth connecting wire (517) is located on the protective film (180). The fifth connecting wire (517) is connected to the third connecting wire (178) through contact holes located on the fourth insulating layer (162), the shielding layer (515), and the protective film (180). In the embodiment where the shielding layer (515) is located in this way, capacitance between the fifth connecting wire (517) and the third connecting wire (178) can be prevented.

[0087] FIG. 12 illustrates a display device according to another embodiment. FIG. 13 is a cross-sectional view taken along the line XII-XII' of FIG. 12. The display device according to the embodiment of FIG. 12 is identical to the previously described embodiment except that the second connecting wire (145) and the fourth connecting wire (511) intersect each other to arrange the order of the data lines (171). A detailed description of identical components is omitted.

[0088] Referring to FIGS. 12 and 13, in the display device according to the present embodiment, the data voltage transmission line (510) is connected to the fourth connection wire (511), and the data line (171) to which the data voltage transmission line (510) is not connected is connected to the second connection wire (145).

[0089] Between the fourth connecting wire (511) and the second connecting wire (145), a shielding layer (177) is located in the same layer as the third conductive layer. Between the fourth connecting wire (511) and the second connecting wire (145), a second insulating layer (142), a third insulating layer (160), and a fourth insulating layer (162) are located. As can be seen in FIGS. 12 and 13, the second connecting wire (145) and the fourth connecting wire (511) cross each other in different layers to align the connection order of the data line (171) and the driving circuit part (400).

[0090] FIG. 14 illustrates the same area as FIG. 12 for another embodiment. Referring to FIG. 14, the display device according to the present embodiment differs from FIG. 12 in that the second connecting wire (145) and the fourth connecting wire (511) are located between the bending part (410) and the driving circuit part (400). A detailed description of the same components is omitted.

[0091] FIG. 15 illustrates the same area as FIG. 12 for a display device according to another embodiment. With reference to FIG. 15, the display device according to this embodiment is identical to the display device according to the embodiment of FIG. 12, except that it includes a chip-on-film (COF) pad (470) instead of a bending part (410) and a driving circuit part (400). A detailed description of the identical components is omitted.

[0092] Then, the pixels located on the substrate (110) of the display device will be described below.

[0093] Hereinafter, a pixel of a display device according to one embodiment will be described with reference to FIG. 16. FIG. 16 is an equivalent circuit diagram of a pixel of a display device according to one embodiment.

[0094] As illustrated in FIG. 16, a display device according to one embodiment includes a plurality of pixels (PX) capable of displaying an image according to an image signal and a plurality of signal lines (151, 152, 153, 154, 171, 172). A pixel (PX) may include a plurality of transistors (T1, T2, T3, T4, T5, T6, T7), a capacitor (Cst), and at least one light-emitting diode (ED) connected to the plurality of signal lines (151, 152, 153, 154, 171, 172). In this embodiment, an example in which a single pixel (PX) includes a single light-emitting diode (ED) is mainly described.

[0095] The signal lines (151, 152, 153, 154, 171, 172) may include a plurality of scan lines (151, 152, 154), a plurality of control lines (153), a plurality of data lines (171), and a plurality of driving voltage lines (172).

[0096] A plurality of scan lines (151, 152, 154) can each transmit a scan signal (GWn, GIn, GI(n+1)). The scan signal (GWn, GIn, GI(n+1)) can transmit a gate-on voltage and a gate-off voltage that can turn on / turn off the transistors (T2, T3, T4, T7) included in the pixel (PX).

[0097] Scan lines (151, 152, 154) connected to a pixel (PX) may include a first scan line (151) capable of transmitting a scan signal (GWn), a second scan line (152) capable of transmitting a scan signal (GIn) having a gate-on voltage at a different timing than the first scan line (151), and a third scan line (154) capable of transmitting a scan signal (GI(n+1)). In this embodiment, an example in which the second scan line (152) transmits a gate-on voltage at an earlier timing than the first scan line (151) is mainly described. For example, if the scan signal (GWn) is the nth scan signal (Sn) (n is a natural number greater than or equal to 1) among the scan signals applied during one frame, the scan signal (GIn) may be a front-end scan signal such as the (n-1)th scan signal (S(n-1)), and the scan signal (GI(n+1)) may be the nth scan signal (Sn). However, the present embodiment is not limited thereto, and the scan signal (GI(n+1)) may be a scan signal other than the nth scan signal (Sn).

[0098] The control line (153) can transmit a control signal, and in particular, can transmit a light emission control signal capable of controlling the light emission of a light-emitting diode (ED) included in a pixel (PX). The control signal transmitted by the control line (153) can transmit a gate-on voltage and a gate-off voltage, and can have a waveform different from the scan signal transmitted by the scan lines (151, 152, 154).

[0099] The data line (171) can transmit a data signal (Dm), and the driving voltage line (172) can transmit a driving voltage (ELVDD). The data signal (Dm) may have different voltage levels depending on the video signal input to the display device, and the driving voltage (ELVDD) may have a substantially constant level.

[0100] The transistors (T1, T2, T3, T4, T5, T6, T7) may include a first transistor (T1), a second transistor (T2), a third transistor (T3), a fourth transistor (T4), a fifth transistor (T5), a sixth transistor (T6), and a seventh transistor (T7).

[0101] The first scan line (151) can transmit a scan signal (GWn) to the second transistor (T2) and the third transistor (T3), the second scan line (152) can transmit a scan signal (GIn) to the fourth transistor (T4), the third scan line (154) can transmit a scan signal (GI(n+1)) to the seventh transistor (T7), and the control line (153) can transmit a light emission control signal (EM) to the fifth transistor (T5) and the sixth transistor (T6).

[0102] The gate electrode (G1) of the first transistor (T1) is connected to one end (Cst1) of the capacitor (Cst) through the driving gate node (GN), the source electrode (S1) of the first transistor (T1) is connected to the driving voltage line (172) via the fifth transistor (T5), and the drain electrode (D1) of the first transistor (T1) is electrically connected to the anode of the light-emitting diode (ED) via the sixth transistor (T6). The first transistor (T1) can receive a data signal (Dm) transmitted by the data line (171) according to the switching operation of the second transistor (T2) and supply a driving current (Id) to the light-emitting diode (ED).

[0103] The gate electrode (G2) of the second transistor (T2) is connected to the first scan line (151), the source electrode (S2) of the second transistor (T2) is connected to the data line (171), and the drain electrode (D2) of the second transistor (T2) is connected to the source electrode (S1) of the first transistor (T1) and is connected to the driving voltage line (172) via the fifth transistor (T5). The second transistor (T2) is turned on according to the scan signal (GWn) received through the first scan line (151) and can transmit the data signal (Dm) transmitted from the data line (171) to the source electrode (S1) of the first transistor (T1).

[0104] The gate electrode (G3) of the third transistor (T3) is connected to the first scan line (151), and the source electrode (S3) of the third transistor (T3) is connected to the drain electrode (D1) of the first transistor (T1) and is connected to the anode of the light-emitting diode (ED) via the sixth transistor (T6). The drain electrode (D3) of the third transistor (T3) is connected to the drain electrode (D4) of the fourth transistor (T4), one end (Cst1) of the capacitor (Cst), and the gate electrode (G1) of the first transistor (T1). The third transistor (T3) is turned on according to the scan signal (GWn) received through the first scan line (151) to connect the gate electrode (G1) and the drain electrode (D1) of the first transistor (T1) to each other, thereby allowing the first transistor (T1) to be diode-connected.

[0105] The gate electrode (G4) of the fourth transistor (T4) is connected to the second scan line (152), the source electrode (S4) of the fourth transistor (T4) is connected to the initialization voltage (Vint) terminal, and the drain electrode (D4) of the fourth transistor (T4) is connected to one end (Cst1) of the capacitor (Cst) and the gate electrode (G1) of the first transistor (T1) via the drain electrode (D3) of the third transistor (T3). The fourth transistor (T4) can be turned on according to the scan signal (GIn) received through the second scan line (152) to transmit the initialization voltage (Vint) to the gate electrode (G1) of the first transistor (T1) and perform an initialization operation to initialize the voltage of the gate electrode (G1) of the first transistor (T1).

[0106] The gate electrode (G5) of the fifth transistor (T5) is connected to the control line (153), the source electrode (S5) of the fifth transistor (T5) is connected to the driving voltage line (172), and the drain electrode (D5) of the fifth transistor (T5) is connected to the source electrode (S1) of the first transistor (T1) and the drain electrode (D2) of the second transistor (T2).

[0107] The gate electrode (G6) of the sixth transistor (T6) is connected to the control line (153), the source electrode (S6) of the sixth transistor (T6) is connected to the drain electrode (D1) of the first transistor (T1) and the source electrode (S3) of the third transistor (T3), and the drain electrode (D6) of the sixth transistor (T6) is electrically connected to the anode of the light-emitting diode (ED). The fifth transistor (T5) and the sixth transistor (T6) are turned on simultaneously according to the light-emitting control signal (EM) received through the control line (153), and thereby the driving voltage (ELVDD) can be compensated through the diode-connected first transistor (T1) and transmitted to the light-emitting diode (ED).

[0108] The gate electrode (G7) of the seventh transistor (T7) is connected to the third scan line (154), the source electrode (S7) of the seventh transistor (T7) is connected to the drain electrode (D6) of the sixth transistor (T6) and the anode of the light-emitting diode (ED), and the drain electrode (D7) of the seventh transistor (T7) is connected to the initialization voltage (Vint) terminal and the source electrode (S4) of the fourth transistor (T4). Alternatively, the gate electrode (G7) of the seventh transistor (T7) may be connected to a separate control line (not shown).

[0109] The transistors (T1, T2, T3, T4, T5, T6, T7) may be P-type channel transistors such as PMOS, but are not limited thereto, and at least one of the transistors (T1, T2, T3, T4, T5, T6, T7) may be an N-type channel transistor.

[0110] One end (Cst1) of the capacitor (Cst) is connected to the gate electrode (G1) of the first transistor (T1) as described above, and the other end (Cst2) is connected to the driving voltage line (172). The cathode of the light-emitting diode (ED) is connected to a common voltage (ELVSS) terminal that transmits the common voltage (ELVSS) so that the common voltage (ELVSS) can be applied.

[0111] The structure of a pixel (PX) according to one embodiment is not limited to the structure shown in FIG. 16, and the number of transistors and capacitors included in one pixel (PX) and the connection relationship can be varied in various ways.

[0112] The operation of a display device according to one embodiment will be described with reference to FIG. 17 in conjunction with FIG. 16, which was described above. In this description, an example in which the transistors (T1, T2, T3, T4, T5, T6, T7) are P-type channel transistors will be described, and the operation of one frame will be described.

[0113] FIG. 17 is a timing diagram of driving signals of a display device according to one embodiment.

[0114] As illustrated in FIG. 17, a low-level scan signal (…, S(n-2), S(n-1), Sn, …) can be sequentially applied to a plurality of first scan lines (151) connected to a plurality of pixels (PX) within one frame.

[0115] During the initialization period, a low-level scan signal (GIn) is supplied through the second scan line (152). The scan signal (GIn) may be, for example, the (n-1)th scan signal (S(n-1)). Then, in response to the low-level scan signal (GIn), the fourth transistor (T4) is turned on, and an initialization voltage (Vint) is connected to the gate electrode (G1) of the first transistor (T1) through the fourth transistor (T4), and the first transistor (T1) is initialized by the initialization voltage (Vint).

[0116] Next, when a low-level scan signal (GWn) is supplied through the first scan line (151) during the data programming and compensation period, the second transistor (T2) and the third transistor (T3) are turned on in response to the low-level scan signal (GWn). The scan signal (GWn) may be, for example, the nth scan signal (Sn). At this time, the first transistor (T1) is diode-connected by the turned-on third transistor (T3) and is forward-biased. Then, a compensation voltage (Dm+Vth, where Vth is a negative value) that is reduced by the threshold voltage (Vth) of the first transistor (T1) from the data signal (Dm) supplied from the data line (171) is applied to the gate electrode (G1) of the first transistor (T1). That is, the gate voltage applied to the gate electrode (G1) of the first transistor (T1) can be the compensation voltage (Dm+Vth).

[0117] A driving voltage (ELVDD) and a compensation voltage (Dm+Vth) are applied to both ends of the capacitor (Cst), and a charge corresponding to the voltage difference between the two ends can be stored in the capacitor (Cst).

[0118] Next, the light emission control signal (EM) supplied from the control line (153) during the light emission period is changed from a high level to a low level. The point at which the light emission control signal (EM) is changed from a high level to a low level may be after the scan signal (GWn) has been applied to all first scan lines (151) in one frame. Then, the fifth transistor (T5) and the sixth transistor (T6) are turned on by the low-level light emission control signal (EM) during the light emission period. Then, a driving current (Id) is generated according to the voltage difference between the gate voltage of the gate electrode (G1) of the first transistor (T1) and the driving voltage (ELVDD), and the driving current (Id) is supplied to the light-emitting diode (ED) through the sixth transistor (T6), causing current (Ied) to flow in the light-emitting diode (ED). During the light emission period, the gate-source voltage (Vgs) of the first transistor (T1) is maintained at '(Dm+Vth)-ELVDD' by the capacitor (Cst), and according to the current-voltage relationship of the first transistor (T1), the driving current (Id) is the square of the value obtained by subtracting the threshold voltage from the driving gate-source voltage '(Dm-ELVDD) 2 It can be proportional to '. Accordingly, the driving current (Id) can be determined regardless of the threshold voltage (Vth) of the first transistor (T1).

[0119] Meanwhile, during the initialization period, the seventh transistor (T7) is turned on by receiving a low-level scan signal (GI(n+1)) through the third scan line (154). The scan signal (GI(n+1)) may be the nth scan signal (Sn). In this case, the seventh transistor (T7) may be turned on simultaneously with the second and third transistors (T2, T3). A portion of the driving current (Id) may be discharged through the seventh transistor (T7) as a bypass current (Ibp) by the turned-on seventh transistor (T7).

[0120] With reference to FIGS. 18 to 20, along with FIGS. 16 and 17 described above, the structure of a portion of a display device according to one embodiment will be further explained.

[0121] For the sake of convenience of understanding, the planar structure of the display device according to one embodiment will be described first, followed by a detailed description of the cross-sectional structure.

[0122] FIG. 18 is a plan view showing a plurality of adjacent pixels of a display device according to one embodiment, FIG. 19 is a plan view showing one of the pixels of FIG. 18, and FIG. 20 is a cross-sectional view cut along the line XX-XX' of FIG. 19. FIG. 18 to FIG. 20 illustrate pixels located on a first side portion (115 in FIG. 1) and an edge portion (112 in FIG. 1) of a substrate (110).

[0123] A plurality of pixels (PX) included in a display device according to one embodiment may each display a specific color. The plurality of pixels may include, for example, a red pixel (R) capable of displaying red, a green pixel (G) capable of displaying green, and a blue pixel (B) capable of displaying blue. FIG. 18 illustrates adjacent red pixels (R), green pixels (G), and blue pixels (B). Alternatively, at least one of the red pixels (R), green pixels (G), and blue pixels (B) may display a different color. Additionally, pixels capable of displaying colors other than red, green, and blue may be further included.

[0124] A display device according to one embodiment may include a first conductive layer comprising a first scan line (151) for transmitting a scan signal (GWn), a second scan line (152) for transmitting a scan signal (GIn), a third scan line (154) for transmitting a scan signal (GI(n+1)), and a control line (153) for transmitting a light emission control signal (EM). Additionally, the first conductive layer may include a first connecting wire (144) as shown in FIG. 3. The first conductive layer may be located on one surface of a cross-sectional substrate (110), may include the same material, and may be located on the same layer.

[0125] The substrate (110) may include inorganic or organic insulating materials such as glass or plastic, and may have various degrees of flexibility.

[0126] Multiple scan lines (151, 152, 154) and control lines (153) may be extended along the second direction (W2) on a plane. The first scan line (151) may be located between the second scan line (152) and the control line (153) on the plane. When viewed as a whole of the display device, the third scan line (154) is substantially the same as the second scan line (152) and can transmit a scan signal (GI(n+1)) following the scan signal (GIn) transmitted by the second scan line (152). As described above, when the first scan line (151) transmits the nth scan signal (Sn), the third scan line (154) can also transmit the nth scan signal (Sn).

[0127] A display device according to one embodiment may further include a second conductive layer including a storage line (156) and an initialization voltage line (159), etc. Additionally, the second conductive layer may include a second connecting wire (145) as shown in FIG. 3. The second conductive layer is located on a different layer from the first conductive layer in cross-section. For example, the second conductive layer may be located on the first conductive layer in cross-section, may include the same material, and may be located on the same layer.

[0128] The storage line (156) and the initialization voltage line (159) may be extended along the second direction (W2) in a plane. The storage line (156) may be located between the first scan line (151) and the control line (153) in a plane and may include an extension (157) located at each pixel (R, G, B). The extension (157) may be connected to the driving voltage line (172) through a contact hole (68) to receive a driving voltage (ELVDD). A storage opening (51) is formed in the extension (157).

[0129] The initialization voltage line (159) transmits the initialization voltage (Vint) and may be located between the third scan line (154) and the control line (153) on the plane, but the location is not limited thereto.

[0130] A display device according to one embodiment may further include a third conductive layer comprising a data line (171) for transmitting a data signal (Dm) and a driving voltage line (172) for transmitting a driving voltage (ELVDD). The third conductive layer may further include a shielding layer (177) as shown in FIG. 5 or a third connecting wire (178) as shown in FIG. 9 and FIG. 11. The third conductive layer is located on a different layer from the first conductive layer and the second conductive layer in cross-section. For example, the third conductive layer may be located on the second conductive layer in cross-section, may include the same material, and may be located on the same layer.

[0131] The data line (171) and the driving voltage line (172) can be extended mainly along the first direction (W1) in a plane and can intersect with a plurality of scan lines (151, 152, 154), control lines (153), initialization voltage lines (159), and storage lines (156).

[0132] Each pixel (R, G, B) may include a plurality of transistors (T1, T2, T3, T4, T5, T6, T7) and a capacitor (Cst) and a light-emitting diode (ED) connected to scan lines (151, 152, 154), control lines (153), data lines (171), and driving voltage lines (172).

[0133] Each channel of a plurality of transistors (T1, T2, T3, T4, T5, T6, T7) for a single pixel (R, G, B) can be formed inside a single active pattern (130), and the active pattern (130) can be bent into various shapes. The active pattern (130) may include semiconductor materials such as polycrystalline silicon or oxide semiconductor.

[0134] The active pattern (130) can be located between the substrate (110) and the first conductive layer in cross-section.

[0135] The active pattern (130) includes channel regions (131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, 131g) and conductive regions forming the channels of each of the transistors (T1, T2, T3, T4, T5, T6, T7). In particular, the third transistor (T3) and the fourth transistor (T4) may have a dual-gate structure. In this case, the third transistor (T3) may include two channel regions (131c_1, 131c_2), and the fourth transistor (T4) may also include two channel regions (131d_1, 131d_2).

[0136] The conductive region of the active pattern (130) is located on both sides of each channel region (131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, 131g) and has a carrier concentration higher than the carrier concentration of the channel regions (131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, 131g). The remaining part of the active pattern (130), excluding the channel regions (131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, 131g), may mostly be a conductive region. A pair of conductive regions located on both sides of the channel regions (131a, 131b, 131c_1, 131c_2, 131d_1, 131d_2, 131e, 131f, 131g) of each transistor (T1, T2, T3, T4, T5, T6, T7) can function as source and drain electrodes, respectively, as source and drain regions of the corresponding transistor (T1, T2, T3, T4, T5, T6, T7).

[0137] The first transistor (T1) includes a channel region (131a), a source region (136a) and a drain region (137a) which are conductive regions of an active pattern (130) located on both sides of the channel region (131a), and a driving gate electrode (155a) that overlaps the channel region (131a) in a plane.

[0138] The channel region (131a) of the first transistor (T1) may be bent at least once. For example, the channel region (131a) may have a meandering shape or a zigzag shape.

[0139] The source region (136a) and drain region (137a) are connected to both sides of the planar channel region (131a).

[0140] The driving gate electrode (155a) may be included in the first conductive layer and may be connected to the connecting member (174) through the contact hole (61) and the storage opening (51). The storage opening (51) surrounds the contact hole (61). The connecting member (174) may be included in the third conductive layer in cross-section. The connecting member (174) may be extended in a direction generally parallel to the direction in which the data line (171) extends. The connecting member (174) corresponds to the driving gate node (GN) shown in the circuit diagram illustrated in FIG. 16 together with the driving gate electrode (155a).

[0141] The second transistor (T2) includes a channel region (131b), a source region (136b) and a drain region (137b) which are conductive regions of the active pattern (130) located on both sides of the channel region (131b), and a gate electrode (155b) that overlaps the channel region (131b) in a plane. The gate electrode (155b) is part of the first scan line (151). The source region (136b) is located on the plane above the first scan line (151), is connected to the channel region (131b), and is connected to the data line (171) through the contact hole (62). The drain region (137b) is located on the plane below the first scan line (151), is connected to the channel region (131b), and is connected to the source region (136a) of the first transistor (T1).

[0142] The third transistor (T3) may be formed in two parts to prevent leakage current. That is, the third transistor (T3) may include an upper third transistor (T3_1) and a lower third transistor (T3_2) that are adjacent to each other and connected to each other.

[0143] The upper third transistor (T3_1) includes a channel region (131c_1) that overlaps planarly with the first scan line (151), a source region (136c_1) and a drain region (137c_1) which are conductive regions of the active pattern (130) located on both sides of the channel region (131c_1), and a gate electrode (155c_1) that overlaps with the channel region (131c_1). The gate electrode (155c_1) may be part of a protrusion of the first scan line (151). The drain region (137c_1) is located planar above the first scan line (151) and is connected to a connecting member (174) through a contact hole (63).

[0144] The lower third transistor (T3_2) includes a channel region (131c_2) that overlaps planarly with the first scan line (151), a source region (136c_2) and a drain region (137c_2) which are conductive regions of the active pattern (130) located on both sides of the channel region (131c_2), and a gate electrode (155c_2) that overlaps with the channel region (131c_2). The gate electrode (155c_2) is part of the first scan line (151). The source region (136c_2) of the lower third transistor (T3_2) is connected to the drain region (137a) of the first transistor (T1), and the drain region (137c_2) is connected to the source region (136c_1) of the upper third transistor (T3_1).

[0145] The fourth transistor (T4) may also be formed in two parts to prevent leakage current. That is, the fourth transistor (T4) may include a left fourth transistor (T4_1) and a right fourth transistor (T4_2) that are adjacent to each other and connected to each other.

[0146] The left fourth transistor (T4_1) includes a channel region (131d_1) that overlaps planarly with the second scan line (152), a source region (136d_1) and a drain region (137d_1) which are conductive regions of the active pattern (130) located on both sides of the channel region (131d_1), and a gate electrode (155d_1) that overlaps with the channel region (131d_1). The gate electrode (155d_1) is part of the second scan line (152). The drain region (137d_1) is located planar below the second scan line (152), is connected to the drain region (137c_1) of the upper third transistor (T3_1), and is connected to a connecting member (174) through a contact hole (63).

[0147] The right fourth transistor (T4_2) includes a channel region (131d_2) that overlaps planarly with the second scan line (152), a source region (136d_2) and a drain region (137d_2) which are conductive regions of the active pattern (130) located on both sides of the channel region (131d_2), and a gate electrode (155d_2) that overlaps with the channel region (131d_2). The gate electrode (155d_2) is part of the second scan line (152). The drain region (137d_2) is connected to the source region (136d_1) of the left fourth transistor (T4_1), and the source region (136d_2) is connected to a connecting member (175) through a contact hole (65).

[0148] The connecting member (175) may be included in the third conductive layer in cross-section. The connecting member (175) may be electrically connected to the initial voltage line (159) through the contact hole (64).

[0149] The fifth transistor (T5) includes a channel region (131e), a source region (136e) and a drain region (137e) which are conductive regions of the active pattern (130) located on both sides of the channel region (131e), and a gate electrode (155e) that overlaps with the channel region (131e). The gate electrode (155e) is part of the control line (153). The source region (136e) is located on the plane below the control line (153), is connected to the channel region (131e), and is connected to the driving voltage line (172) through the contact hole (67). The drain region (137e) is located on the plane above the control line (153), is connected to the channel region (131e), and is connected to the source region (136a) of the first transistor (T1).

[0150] The sixth transistor (T6) includes a channel region (131f), a source region (136f) and a drain region (137f), which are conductive regions of the active pattern (130) located on both sides of the channel region (131f), and a gate electrode (155f) that overlaps with the channel region (131f). The gate electrode (155f) is part of the control line (153). The source region (136f) is located on the upper plane relative to the control line (153), is connected to the channel region (131f), and is connected to the drain region (137a) of the first transistor (T1). The drain region (137f) is located on the lower plane relative to the control line (153), is connected to the channel region (131f), and is connected to a connecting member (179) through a contact hole (69). The connecting member (179) may be included in the third conductive layer in cross-section.

[0151] The seventh transistor (T7) includes a channel region (131g), a source region (136g) and a drain region (137g) which are conductive regions of the active pattern (130) located on both sides of the channel region (131g), and a gate electrode (155g) that overlaps with the channel region (131g). The gate electrode (155g) is part of the third scan line (154). The source region (136g) is located on the upper plane relative to the third scan line (154) and is connected to the channel region (131g) and is connected to the drain region (137f) of the sixth transistor (T6). The drain region (137g) is located on the lower plane relative to the third scan line (154) and is connected to a connecting member (175) through a contact hole (65) to receive an initialization voltage (Vint).

[0152] The capacitor (Cst) may include two terminals of the extension (157) of the storage line (156) and the driving gate electrode (155a) that overlap each other in a plane. The capacitor (Cst) may maintain a voltage difference corresponding to the difference between the voltage of the extension (157) of the storage line (156) and the driving gate electrode (155a) to which the driving voltage (ELVDD) is applied. The extension (157) of the storage line (156) may have a larger area in a plane than the driving gate electrode (155a) and may cover the entire area of ​​the driving gate electrode (155a).

[0153] The second conductive layer may further include a shielding pattern (158) that overlaps with the data line (171). The shielding pattern (158) may be connected to the driving voltage line (172) through the contact hole (66) to receive the driving voltage (ELVDD). The shielding pattern (158) shields the space between the driving gate node (GN) and the data line (171) to prevent voltage changes in the driving gate node (GN) caused by changes in the data signal (Dm). The shielding pattern (158) may be omitted.

[0154] A display device according to one embodiment may further include a fourth conductive layer comprising a data voltage transmission line (510) that transmits a data signal (Dm). The fourth conductive layer is located on a different layer from the first conductive layer, the second conductive layer, and the third conductive layer in cross-section. For example, the fourth conductive layer may be located on the third conductive layer in cross-section, may include the same material, and may be located on the same layer. The fourth conductive layer may include a fourth connecting wire (511).

[0155] At least a portion of the data voltage transmission line (510) located on the first side portion (115 in FIG. 1) and edge portion (112 in FIG. 1) of the substrate (110) may be extended mainly along the second direction (W2) in a plane.

[0156] The end of the data voltage transmission line (510) may overlap with the data line (171). The data voltage transmission line (510) may be connected to the data line (171) through the contact hole (610) to transmit a data signal (Dm). The data voltage transmission line (510) is located on a different layer from the data line (171).

[0157] The data line (171) located on the first side portion (115 in FIG. 1) and edge portion (112 in FIG. 1) of the substrate (110) is not directly connected to the driving circuit portion (400 in FIG. 1). By connecting the data line (171) located on the first side portion (115 in FIG. 1) and edge portion (112 in FIG. 1) of the substrate (110) with the driving circuit portion (400 in FIG. 1) through the data voltage transmission line (510), the data signal (Dm) can be transmitted.

[0158] A display device according to one embodiment may further include a fifth conductive layer comprising a plurality of pixel electrodes (191a, 191b, 191c) and a pixel conductive pattern (192), etc. The fifth conductive layer is located on a different layer from the first conductive layer, the second conductive layer, the third conductive layer, and the fourth conductive layer in cross-section. For example, the fifth conductive layer may be located on the fourth conductive layer in cross-section, and may be located on the same layer comprising the same material.

[0159] Multiple pixel electrodes (191a, 191b, 191c) may be arranged in a pentile matrix structure. For example, the pixel electrode (191a) of the red pixel (R) and the pixel electrode (191c) of the blue pixel (B) may be arranged alternately in the horizontal direction, the pixel electrode (191a) of the red pixel (R) and the pixel electrode (191b) of the green pixel (G) may be arranged alternately in one diagonal direction, and the pixel electrode (191c) of the blue pixel (B) and the pixel electrode (191b) of the green pixel (G) may be arranged alternately in the other diagonal direction. However, the arrangement structure of the pixel electrodes (191a, 191b, 191c) is not limited to this and can be changed in various ways.

[0160] Each pixel electrode (191a, 191b, 191c) can be connected to a connecting member (179) through a contact hole (89) to receive voltage.

[0161] The pixel conduction pattern (192) may be curved along the edges of adjacent pixel electrodes (191a, 191b, 191c) and may include alternating straight sections (192a, 192b, 192c) and diagonal sections (193). The straight sections (192a, 192b, 192c) may generally extend parallel to the scan lines (151, 152, 154), and the diagonal sections (193) may extend obliquely in the direction of extension of the straight sections (192a, 192b, 192c). The straight section (192a) may be adjacent to the upper side of the pixel electrode (191a) of the red pixel (R), the straight section (192b) may be adjacent to the upper side of the pixel electrode (191b) of the green pixel (G), and the straight section (192c) may be adjacent to the upper side of the pixel electrode (191c) of the blue pixel (B).

[0162] The pixel challenge pattern (192) can transmit an initialization voltage (Vint).

[0163] The cross-sectional structure of a display device according to one embodiment will be further described below.

[0164] A buffer layer (120) may be positioned on a substrate (110). The buffer layer (120) can improve the characteristics of the active pattern (130) and relieve stress by blocking the transfer of impurities from the substrate (110) to the upper layer of the buffer layer (120), particularly to the active pattern (130). The buffer layer (120) may include an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) and / or an organic insulating material. At least a portion of the buffer layer (120) may be omitted.

[0165] An active pattern (130) as described above is located on the buffer layer (120), and a first insulating layer (141) is located on the active pattern (130).

[0166] A first conductive layer described above may be positioned on the first insulating layer (141). The first conductive layer may include metals such as copper (Cu), aluminum (Al), molybdenum (Mo), and alloys thereof.

[0167] A second insulating layer (142) may be located on the first conductive layer and the first insulating layer (141).

[0168] A second conductive layer described above may be positioned on the second insulating layer (142). The second conductive layer may include metals such as copper (Cu), aluminum (Al), molybdenum (Mo), and alloys thereof.

[0169] A third insulating layer (160) may be located on the second conductive layer and the second insulating layer (142).

[0170] At least one of the first insulating layer (141), the second insulating layer (142), and the third insulating layer (160) may include an inorganic insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx) and / or an organic insulating material.

[0171] In the first insulating layer (141), the second insulating layer (142), and the third insulating layer (160), there is a contact hole (61) located over the driving gate electrode (155a), a contact hole (62) located over the source region (136b) of the second transistor (T2), a contact hole (63) located over the drain region (137c_1) of the upper third transistor (T3_1) or the drain region (137d_1) of the left fourth transistor (T4_1), a contact hole (64) located over the initialization voltage line (159), a contact hole (65) located over the source region (136d_2) of the right fourth transistor (T4_2) or the drain region (137g) of the seventh transistor (T7), a contact hole (66) located over the shielding pattern (158), a contact hole (67) located over the source region (136e) of the fifth transistor (T5), and a storage line (156). A contact hole (68) located on the extension portion (157) and a contact hole (69) located on the drain region (137f) of the sixth transistor (T6) may be formed.

[0172] A third conductive layer described above may be positioned on the third insulating layer (160). The third conductive layer may include metals such as copper (Cu), aluminum (Al), molybdenum (Mo), and alloys thereof.

[0173] The extension (157) of the storage line (156) can form a capacitor (Cst) by overlapping with the driving gate electrode (155a) with the second insulating layer (142) in between.

[0174] A fourth insulating layer (162) may be located on top of the third conductive layer and the third insulating layer (160).

[0175] The fourth insulating layer (162) may include inorganic insulating materials such as silicon nitride (SiNx) and silicon oxide (SiOx), and / or organic insulating materials.

[0176] A contact hole (610) located on the data line (171) may be formed in the fourth insulating layer (162).

[0177] A fourth conductive layer described above may be positioned on the fourth insulating layer (162). The fourth conductive layer may include metals such as copper (Cu), aluminum (Al), molybdenum (Mo), and alloys thereof.

[0178] A protective film (180) is positioned over the fourth conductive layer and the fourth insulating layer (162). The protective film (180) may include an organic insulating material such as polyacrylics resin or polyimides resin, and the upper surface of the protective film (180) may be substantially flat. The protective film (180) may include a contact hole (89) positioned over the connecting member (179).

[0179] The fifth conductive layer described above may be located on the protective layer (180).

[0180] A pixel defining layer (PDL) (350) may be positioned on the protective layer (180) and the fifth conductive layer. The pixel defining layer (350) has an opening (351) positioned on the pixel electrodes (191a, 191b, 191c).

[0181] A light-emitting layer (370) is located on the pixel electrodes (191a, 191b, 191c). The light-emitting layer (370) may be located inside the opening (351). The light-emitting layer (370) may include an organic light-emitting material or an inorganic light-emitting material.

[0182] A common electrode (270) is located on the light-emitting layer (370). The common electrode (270) may also be formed on the pixel defining film (350) and extend across multiple pixels.

[0183] The pixel electrodes (191a, 191b, 191c), the light-emitting layer (370), and the common electrode (270) together form a light-emitting diode (ED).

[0184] A sealing layer (not shown) that protects the light-emitting diode (ED) may be further located on the common electrode (270). The sealing layer may include an inorganic film and an organic film that are alternately stacked.

[0185] With reference to FIGS. 21 and 22 together with FIGS. 16 and 17, the structure of another part of the display device according to one embodiment will be further described.

[0186] FIG. 21 is a plan view showing one pixel of a display device according to one embodiment, and FIG. 22 is a cross-sectional view taken along the line XXII-XXII' of FIG. 21. FIG. 21 and FIG. 22 illustrate a pixel located in the main display portion (111 of FIG. 1) of a substrate (110).

[0187] A display device according to one embodiment includes a plurality of signal lines (151, 152, 153, 154, 171, 172) and transistors (T1, T2, T3, T4, T5, T6, T7) located on a substrate (110).

[0188] A display device according to one embodiment may further include a driving voltage transmission line (520) that transmits a driving voltage (ELVDD). The driving voltage transmission line (520) may be located on the main display portion (111 in FIG. 1) of the substrate (110). The driving voltage transmission line (520) may be located on a fourth conductive layer. The driving voltage transmission line (520) may be located on the same layer as the data voltage transmission line (510).

[0189] The driving voltage transmission line (520) can be extended along the first direction (W1) mainly in a plane. The driving voltage transmission line (520) can be extended in a direction parallel to the driving voltage line (172).

[0190] The driving voltage transmission line (520) may overlap with the driving voltage line (172). The driving voltage transmission line (520) is located on a different layer from the driving voltage line (172). The driving voltage transmission line (520) may be located on the fourth insulating layer (162). A contact hole (620) located on the driving voltage line (172) may be formed in the fourth insulating layer (162). The driving voltage transmission line (520) can be connected to the driving voltage line (172) through the contact hole (620) to transmit the driving voltage (ELVDD). The driving voltage transmission line (520) can be connected to the driving voltage line (172) to lower the resistance of the driving voltage line (172).

[0191] Although embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements by those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

Claims

Claim 1 A display device comprising a main display portion, a substrate including a first side portion connected to the main display portion, a plurality of scan lines and data lines located on the substrate, a plurality of pixels connected to the plurality of scan lines and the data lines, a plurality of data voltage transmission lines connected to each of the data lines, a connecting wire connected to the data voltage transmission lines, a sub-connecting wire connected to the connecting wire, and a driving portion including a bending portion connected to the sub-connecting wire, wherein the order in which the data lines connected to the data voltage transmission lines are sequentially arranged along a first direction corresponds to the order in which the sub-connecting wires connected to the connecting wires are sequentially arranged along the first direction, and the order in which the data lines are arranged along the first direction in the first side portion is different from the order in which the connecting wires electrically connected to the data lines through the data voltage transmission lines are arranged along the first direction in the bending portion. Claim 2 In claim 1, the connecting wiring connected to the data line located at the nth position along the first direction among the data lines and the data voltage transmission line is connected to the sub-connecting wiring located at the nth position along the first direction among the sub-connecting wiring connected to the driving unit, in a display device. Claim 3 A display device according to claim 1, comprising a second side portion bent from the main display portion, wherein the driving portion is connected to the second side portion. Claim 4 In paragraph 3, the main display unit comprises a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer that are insulated from each other, and the connecting wiring comprises one or more of a first connecting wiring located on the same layer as the first conductive layer, a second connecting wiring located on the same layer as the second conductive layer, a third connecting wiring located on the same layer as the third conductive layer, and a fourth connecting wiring located on the same layer as the fourth conductive layer. Claim 5 In claim 1, the data line and the data voltage transmission line are connected to each other at one edge of the first side portion of the display device. Claim 6 A display device according to claim 4, further comprising an edge portion located between the main display portion and the first side portion, wherein when n data lines are located between the first side portion and the edge portion, one edge of a data voltage transmission line connected to the n data lines of the first side portion and the edge portion is located between the n data lines of the main display portion adjacent to the edge portion. Claim 7 A display device according to claim 6, wherein n data lines of the main display unit are connected to a driving unit through a first connecting wire or a second connecting wire, and the data voltage transmission line is connected to a driving unit through a first sub-connecting wire and a fourth connecting wire, or a second sub-connecting wire and a fourth connecting wire. Claim 8 A display device according to claim 7, wherein a plurality of insulating films are located between the first sub-connecting wire and the fourth connecting wire, and contact holes are located in the plurality of insulating films, and the first sub-connecting wire and the fourth connecting wire are connected to each other through the contact holes. Claim 9 In paragraph 7, the first connecting wire and the second connecting wire are positioned alternately one by one in a display device. Claim 10 A display device according to claim 7, further comprising a shielding layer located between the second sub-connecting wire and the fourth connecting wire, and located in the same layer as the third conductive layer. Claim 11 In claim 7, the driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire is located between the bending unit and the driving circuit unit, forming a display device. Claim 12 In claim 7, the driving unit includes a bending unit and a driving circuit unit, the bending unit is located between the second side unit and the driving circuit unit, and the fourth connecting wire is located between the second side unit and the bending unit, forming a display device. Claim 13 delete Claim 14 delete Claim 15 delete Claim 16 delete Claim 17 delete Claim 18 delete Claim 19 delete Claim 20 delete Claim 21 delete Claim 22 delete Claim 23 delete Claim 24 delete Claim 25 A display device comprising a main display portion, a substrate including a first side portion connected to the main display portion, a scan line and a data line located on the substrate, a pixel connected to the scan line and the data line, a data voltage transmission line connected to the data line, a connection wire connected to the data voltage transmission line, a sub-connection wire connected to the connection wire, and a driving portion including a bending portion connected to the sub-connection wire, wherein the data line and the data voltage transmission line are connected to each other at one edge of the first side portion, and the order in which the data line is arranged along a first direction in the first side portion is different from the order in which the connection wire, which is electrically connected to the data line through the data voltage transmission line, is arranged along the first direction in the bending portion, and the order in which the data line connected to the connection wire through the data voltage transmission line is sequentially arranged along the first direction corresponds to the order in which the sub-connection wire connected to the connection wire is sequentially arranged along the first direction. Claim 26 delete Claim 27 In paragraph 25, the connecting wiring connected to the data line located at the nth position along the first direction among the data lines and the data voltage transmission line is connected to the sub-connecting wiring located at the nth position along the first direction among the sub-connecting wiring connected to the driving unit, in a display device. Claim 28 In claim 25, the main display unit comprises a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer that are insulated from each other, and the connecting wiring comprises one or more of a first connecting wiring located on the same layer as the first conductive layer, a second connecting wiring located on the same layer as the second conductive layer, a third connecting wiring located on the same layer as the third conductive layer, and a fourth connecting wiring located on the same layer as the fourth conductive layer. Claim 29 In paragraph 25, a display device comprising a second side portion bent from the main display portion, and the driving portion connected to the second side portion. Claim 30 In claim 29, the driving unit includes a bending unit and a driving circuit unit, and the bending unit is a display device located between the second side unit and the driving circuit unit.

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