Method for manufacturing laminated device chip
Patent Information
- Application Number
- KR1020220112409
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-09-29
- Filing Date
- 2022-09-05
- Publication Date
- 2026-09-21
- Estimated Expiration
- 2042-09-05
Smart Images

Figure 112022093480822-PAT00004_ABST
Abstract
Description
Technology Field
[0001] The present invention relates to a method for manufacturing a stacked device chip by stacking chips. Background Technology
[0002] Along with the miniaturization of electronic devices, semiconductor devices are undergoing miniaturization through pattern miniaturization and chip stacking. For example, technologies such as direct bonding, which involves stacking chips and directly bonding electrodes together, have been developed (see, for example, Patent Document 1). In direct bonding, the device surface (the surface on the functional layer side, the surface) of a chip equipped with TSV electrodes is directly overlapped with the back surface of the overlapping chip, so the surface is processed to be flat and prevent foreign substances from being inserted. Prior art literature
[0003] Japanese Published Patent Application No. 2003-249620 The problem to be solved
[0004] When directly bonding device chips having completely identical surface areas, if resin is filled between adjacent device chips, the device chips and the resin are polished to flatten them. However, the elastic resin may swell slightly above the surface of the device chips (surface to be polished) after polishing, and may leak out between the device chips, getting stuck between the overlapping device chips, and potentially hindering the direct bonding.
[0005] Accordingly, the objective of the present invention is to provide a method for manufacturing a stacked device chip capable of suppressing interference between device chips. means of solving the problem
[0006] According to the present invention, a method for manufacturing a stacked device chip comprising a plurality of device chips stacked thereon using a wafer in which a device is formed in each of a plurality of regions of a surface partitioned by a plurality of planned partition lines, the method comprises: a first groove forming step of forming a first groove having a depth exceeding the finishing thickness of a first device chip from the surface of the first wafer along a plurality of planned partition lines of the first wafer; a fixing step of fixing the surface side of the first wafer to a support; a first wafer grinding step of grinding the first wafer fixed to the support from the back side and exposing the first groove on the back side of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; and simultaneously polishing the first wafer fixed to the support and the first resin layer, and thinning the first wafer to a thickness equivalent to the finishing thickness of the first device chip, and the first resin layer formed in the first groove is the first A first wafer polishing step for exposing the back side of a wafer; a second groove forming step for forming a second groove with a depth exceeding the finishing thickness of a second device chip along a plurality of planned division lines of a second wafer having the same configuration as the first wafer, from the surface of the second wafer, wherein the width of the second groove is wider than the width of the first groove on the surface side of the second wafer and narrower than the width on the bottom side of the groove; a bonding step for bringing the polished back side of the first wafer and the surface of the second wafer into contact, and bonding the second wafer to the first wafer such that the first resin layer protruding from the back side of the first wafer is received in the second groove of the second wafer; and a second wafer grinding step for grinding the second wafer bonded to the first wafer from the back side and exposing the second groove on the back side of the second wafer. Step and,A method for manufacturing a stacked device chip is provided, comprising: a second resin layer forming step for forming a second resin layer in a second groove of the second wafer; and a splitting step for cutting the first resin layer and the second resin layer along the first groove and the second groove and manufacturing a stacked device chip.
[0007] Preferably, in the second groove forming step, the second groove is formed by plasma etching using a plasma gas, cutting using a cutting blade, or laser processing using a laser beam.
[0008] Preferably, after the second resin layer forming step and before the dividing step, a second wafer polishing step is additionally provided to simultaneously polish the second wafer and the second resin layer fixed to the first wafer, and to thin the second wafer to a thickness corresponding to the finishing thickness of the second device chip. Effects of the invention
[0009] The present invention exhibits the effect of suppressing interference between device chips. Brief explanation of the drawing
[0010] FIG. 1 is a perspective view showing an example of a wafer to be processed in a method for manufacturing a stacked device chip related to a first embodiment. FIG. 2 is a cross-sectional view schematically showing the main part of the wafer shown in FIG. 1. FIG. 3 is a perspective view showing an example of a stacked device chip manufactured by a method for manufacturing a stacked device chip related to a first embodiment. FIG. 4 is a flowchart showing the flow of a method for manufacturing a stacked device chip related to the first embodiment. FIG. 5 is a cross-sectional view schematically showing the main part of the first wafer after the first groove forming step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 6 is a cross-sectional view schematically showing the main part of the first wafer after the fixed step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 7 is a cross-sectional view schematically showing the main part of the first wafer after the first wafer grinding step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 8 is a cross-sectional view schematically showing the main part of the first wafer after the first resin layer formation step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 9 is a cross-sectional view schematically showing the main part of the first wafer after the first wafer polishing step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 10 is a cross-sectional view schematically illustrating the second groove forming step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 11 is a cross-sectional view schematically showing the main part of the second wafer after the second groove forming step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 12 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the bonding step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 13 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer grinding step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 14 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second resin layer formation step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 15 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the splitting step of the manufacturing method of the stacked device chip shown in FIG. 4. FIG. 16 is a flowchart showing the flow of a method for manufacturing a stacked device chip related to a second embodiment. FIG. 17 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer grinding step of the manufacturing method of the stacked device chip shown in FIG. 16. FIG. 18 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second resin layer formation step of the manufacturing method of the stacked device chip shown in FIG. 16. FIG. 19 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer polishing step of the manufacturing method of the stacked device chip shown in FIG. 16. FIG. 20 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the splitting step of the manufacturing method of the stacked device chip shown in FIG. 16. FIG. 21 is a perspective view schematically showing a second groove forming step of a method for manufacturing a stacked device chip related to a first embodiment and a first variation of a second embodiment. FIG. 22 is a perspective view schematically showing a second groove forming step of a method for manufacturing a stacked device chip related to a first embodiment and a second variation of a second embodiment. FIG. 23 is a cross-sectional view schematically showing the main part of the second wafer after the second groove forming step of the method for manufacturing a stacked device chip related to the first embodiment and the third variation of the second embodiment. Specific details for implementing the invention
[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the embodiments below. Furthermore, the components described below include those that can be easily conceived by those skilled in the art and are substantially identical. Additionally, the configurations described below can be appropriately combined. Furthermore, various omissions, substitutions, or changes to the configurations may be made within the scope of not departing from the gist of the present invention.
[0012] [First Embodiment]
[0013] A method for manufacturing a stacked device chip related to a first embodiment of the present invention will be described based on the drawings. FIG. 1 is a perspective view showing an example of a wafer to be processed by the method for manufacturing a stacked device chip related to the first embodiment. FIG. 2 is a cross-sectional view schematically showing a main part of the wafer shown in FIG. 1. FIG. 3 is a perspective view showing an example of a stacked device chip manufactured by the method for manufacturing a stacked device chip related to the first embodiment. FIG. 4 is a flowchart showing the flow of the method for manufacturing a stacked device chip related to the first embodiment.
[0014] (wafer)
[0015] A method for manufacturing a stacked device chip related to the first embodiment is a method for manufacturing a stacked device chip (10) shown in FIG. 3 using a wafer (1) shown in FIG. 1 and FIG. 2. In the first embodiment, the wafer (1) is a disc-shaped semiconductor wafer or optical device wafer, etc., with silicon, sapphire, or gallium arsenide as the substrate (2). As shown in FIG. 1, the wafer (1) has a device (5) formed in each of a plurality of regions of a surface (3) partitioned by a plurality of intersecting planned division lines (4).
[0016] The device (5) is, for example, an integrated circuit such as an IC (Integrated Circuit) or an LSI (Large Scale Integration), or various types of memory (semiconductor memory device). Also, as shown in FIG. 2, the wafer (1) is embedded within the substrate (2) and has a through electrode (7) extending from the surface (3) toward the back surface (6) behind the surface (3). The through electrode (7) is made of a conductive metal and is connected to the device (5). Also, in FIG. 2, one through electrode (7) is connected to each device (5), but in the present invention, a plurality of through electrodes (7) may be connected to each device (5).
[0017] The wafer (1) is divided into individual device chips (9) shown in FIG. 1 along a planned division line (4). When the wafer (1) is divided into individual device chips (9), the through electrode (7) penetrates the substrate (2) across the surface (3) and back surface (6) and becomes a so-called TSV (Through-Silicon Via) electrode that connects to the device (5) of another device chip (9). The device chip (9) is composed of the substrate (2) and the device (5). Also, the same reference numeral is attached to the parts of the device chip (9) that are identical to the wafer (1), and the description is omitted.
[0018] (Stacked device chip)
[0019] As shown in FIG. 3, the stacked device chip (10) is composed of a plurality (two in the first embodiment) of device chips (9) stacked on top of each other. Except for the surface (3) of one device chip (9), the sides of both device chips (9) and the back surface (6) of the other device chip (9) are covered by a resin layer (11) composed of resin. Additionally, among the two device chips (9) constituting the stacked device chip (10), the upper device chip (9) in FIG. 3 is described below as the first device chip (9-1), and the lower device chip (9) in FIG. 3 is described below as the second device chip (9-2).
[0020] (Method for manufacturing stacked device chips)
[0021] A method for manufacturing a stacked device chip related to the first embodiment comprises, as shown in FIG. 4, a first groove forming step (101), a fixing step (102), a first wafer grinding step (103), a first resin layer forming step (104), a first wafer polishing step (105), a second groove forming step (106), a bonding step (107), a second wafer grinding step (108), a second resin layer forming step (109), and a splitting step (110).
[0022] (1st home formation step)
[0023] FIG. 5 is a cross-sectional view schematically showing the main part of the first wafer after the first groove forming step of the manufacturing method of the stacked device chip shown in FIG. 4. The first groove forming step (101) is a step of forming a first groove (13) with a depth (13-1) exceeding the finishing thickness (12-1) (shown in FIG. 3) of the first device chip (9-1) along a plurality of planned division lines (4) of the first wafer (1-1).
[0024] In the first groove forming step (101), the aforementioned wafer (1) is prepared as the first wafer (1-1), and the cutting device holds the back side (6) of the first wafer (1-1) by suction onto the holding surface of the chuck table. In the first groove forming step (101), the cutting device moves the cutting blade, which is rotated by the spindle, and the chuck table relative to each other along the planned division line (4), and cuts the cutting blade from the surface (3) side into the planned division line (4) to the aforementioned depth (13-1), thereby forming the first groove (13) in each planned division line (4) as shown in FIG. 5. Additionally, the depth (13-1) of the first groove (13) is shallower than the thickness of the first wafer (1-1), and the first groove (13) does not reach the back side (6) of the first wafer (1-1).
[0025] Additionally, the first groove (13) is formed with a width (13-2) that is constant in the thickness direction of the first wafer (1-1), but in the present invention, the width may gradually narrow from the surface (3) toward the back side (6). Also, in the present invention, in the first groove forming step (101), the laser processing device may hold the back side (6) of the first wafer (1-1) by attracting it to the holding surface of the chuck table, and while moving the laser beam irradiation unit and the chuck table relative to each other along the planned division line (4), irradiate a laser beam of a wavelength that is absorbent to the first wafer (1-1) from the laser beam irradiation unit toward the planned division line (4) from the surface (3) side to form the first groove (13) in each planned division line (4).
[0026] (Fixed Step)
[0027] FIG. 6 is a cross-sectional view schematically showing the main part of the first wafer after the fixing step of the manufacturing method of the stacked device chip shown in FIG. 4. The fixing step (102) is a step of fixing the surface (3) side of the first wafer (1-1) to a plate-shaped support (20). In the first embodiment, in the fixing step (102), as shown in FIG. 6, the surface (3) side of the first wafer (1-1) is fixed to a support (20) that is composed of a hard material and has the same diameter as or a larger diameter than the first wafer (1-1) by means of an adhesive not shown.
[0028] In addition, in the first embodiment, the surface (3) side of the first wafer (1-1) is fixed to a support (20) made of a hard material in the fixing step (102), but in the present invention, as a support, the surface (3) side of the first wafer (1-1) may be fixed by heat-pressing a flexible tape having a base layer made of resin and a glue layer made of adhesive resin, or a resin sheet without a glue layer.
[0029] (1st wafer grinding step)
[0030] FIG. 7 is a cross-sectional view schematically showing the main part of the first wafer after the first wafer grinding step of the manufacturing method of the stacked device chip shown in FIG. 4. The first wafer grinding step (103) is a step of grinding the first wafer (1-1) fixed to the support (20) from the back side (6) and exposing the first groove (13) on the back side (6) of the first wafer (1-1).
[0031] In the first wafer grinding step (103), the grinding device holds the surface (3) side of the first wafer (1-1) by means of a support (20) and attracts it to the holding surface of the chuck table. In the first wafer grinding step (103), the grinding device rotates the grinding wheel for grinding around the axis by means of a spindle and also rotates the chuck table around the axis, and while supplying grinding fluid from a grinding fluid nozzle not shown, the grinding wheel of the grinding wheel contacts the back side (6) of the substrate (2) of the first wafer (1-1) and brings it close to the chuck table at a predetermined feed speed, and grinds the back side (6) of the first wafer (1-1) with the grinding wheel.
[0032] In the first embodiment, as shown in FIG. 7, in the first wafer grinding step (103), as shown in FIG. 6, the grinding device grinds the back side (6) of the first wafer (1-1) until the thickness of the first wafer (1-1) is thicker than the finishing thickness (12-1) of the first device chip (9-1) and thinner than the depth (13-1) of the first groove (13). In the first embodiment, in the first wafer grinding step (103), the grinding device exposes at least the first groove (13) on the back side (6) of the first wafer (1-1).
[0033] (First resin layer formation step)
[0034] FIG. 8 is a cross-sectional view schematically showing the main part of the first wafer after the first resin layer forming step of the manufacturing method of the stacked device chip shown in FIG. 4. The first resin layer forming step (104) is a step of forming a resin layer (11) (hereinafter referred to as the first resin layer (11-1)) in the first groove (13) of the first wafer (1-1).
[0035] In the first resin layer forming step (104), a resin that has been softened by heating, etc., is supplied into the first groove (13) of the first wafer (1-1), and this resin is coated onto the back surface (6) of the first wafer (1-1), and as shown in FIG. 8, the first resin layer (11-1) is formed within the first groove (13), and the back surface (6) of the first wafer (1-1) is coated with the first resin layer (11-1).
[0036] (1st Wafer Polishing Step)
[0037] FIG. 9 is a cross-sectional view schematically showing the main part of the first wafer after the first wafer polishing step of the manufacturing method of the stacked device chip shown in FIG. 4. The first wafer polishing step (105) is a step of simultaneously polishing the first wafer (1-1) fixed to the support (20) and the first resin layer (11-1), thinning the first wafer (1-1) to a thickness equivalent to the finishing thickness (12-1) of the first device chip (9-1), and exposing the first resin layer (11-1) formed on the back surface (6) of the first wafer (1-1), the through electrode (7), and the first groove (13) to the back surface (6) side of the first wafer (1-1).
[0038] In the first wafer polishing step (105), the polishing device holds the surface (3) side of the first wafer (1-1) by suction onto the holding surface of the chuck table through the support (20). In the first wafer polishing step (105), the polishing device brings the polishing pad, which has been rotated around the axis, to the chuck table, which has been rotated around the axis, at a predetermined feed speed, and polishes the first resin layer (11-1) on the back side (6) of the first wafer (1-1) with the polishing member. Then, the first resin layer (11-1) on the back side (6) is removed, and the first groove (13) is exposed on the back side (6).
[0039] In the first embodiment, in the first wafer polishing step (105), as shown in FIG. 9, the polishing device simultaneously polishes the back surface (6) of the first wafer (1-1) and the first resin layer (11-1) in the first groove (13) until the thickness of the first wafer (1-1) becomes the finishing thickness (12-1) of the first device chip (9-1), and thins them. After the first wafer polishing step (105), when the back surface (6) of the first wafer (1-1) is not pressed from the polishing pad as shown in FIG. 9, the first resin layer (11-1) protrudes slightly above the back surface (6) due to the restoring force, because the first resin layer (11-1) is composed of resin.
[0040] (Second home formation step)
[0041] FIG. 10 is a cross-sectional view schematically showing the second groove forming step of the manufacturing method of a stacked device chip shown in FIG. 4. FIG. 11 is a cross-sectional view schematically showing the main part of the second wafer after the second groove forming step of the manufacturing method of a stacked device chip shown in FIG. 4. The second groove forming step (106) is a step of forming a second groove (14) with a depth (14-1) exceeding the finishing thickness (12-2) (shown in FIG. 3) of the second device chip (9-2) from the surface (3) of the second wafer (1-2) along a plurality of planned division lines (4) of the second wafer (1-2) having the same configuration as the first wafer (1-1), and forming a groove with a width (14-1) that is wider than the width (13-2) (shown in FIG. 9, etc.) of the first groove (13) on the surface (3) side of the second wafer (1-2) and narrower than the width (14-2) on the bottom side of the groove on the surface (3) side.
[0042] In the first embodiment, in the second groove forming step (106), the aforementioned wafer (1) is prepared as a second wafer (1-2) having the same configuration as the first wafer (1-1), and the surface (3) side of the second wafer (1-2) is coated with a water-soluble resin to form a protective film (21). In the first embodiment, in the second groove forming step (106), a laser beam is irradiated onto the surface (3) of the planned division line (4) of the second wafer (1-2) to remove the protective film (21) on the planned division line (4), thereby exposing the surface (3) of the planned division line (4), while maintaining the state in which the device (5) is coated with the protective film (21). At this time, the width of the surface (3) exposed at each planned division line (4) is wider than the width (13-2) of the first groove (13). In the first embodiment, the water-soluble resin is, for example, polyvinyl alcohol (PVA) or polyvinylpyrrolidone (PVP). The water-soluble resin functions as a shielding film (mask) that is resistant to the plasma-phase etching gas (31) shown in FIG. 10.
[0043] In the first embodiment, in the second groove forming step (106), the plasma etching device (30) attracts and holds the back side (6) of the second wafer (1-2) to the holding surface (33) of the chuck table (32). In the first embodiment, in the second groove forming step (106), the plasma etching device (30) applies a high-frequency voltage to the chuck table to attract plasma-like etching gas (31), and supplies plasma-like etching gas (31) to the upper side of the holding surface (33) of the chuck table (32).
[0044] In the second groove forming step (106), the substrate (2) is etched by a plasma-phase etching gas (31) from the surface (3) side of the exposed split line (4) to the back side (6) after the protective film (21) is removed, and a second groove (14) is formed on the substrate (2) along the split line (4) from the surface (3) side to the back side (6). In the first embodiment, in the second groove forming step (106), a plasma-phase etching gas (31) is supplied while applying a high-frequency power of a voltage capable of anisotropically etching the substrate (2) of the second wafer (1-2) to the chuck table (32) for a predetermined time, so that the width of the second groove (14) gradually narrows from the width (14-2) on the surface (3) side toward the bottom of the groove. In addition, the predetermined time is the time during which the depth (14-1) of the second groove (14) is shallower than the thickness of the second wafer (1-2) and exceeds the finishing thickness (12-2) of the second device chip (9-2). Also, the second groove (14) may be formed using anisotropic etching as well as the so-called Bosch process.
[0045] In the second groove forming step (106), as shown in FIG. 11, a protective film (21) is removed from the surface (3) side of the second wafer (1-2) by supplying cleaning water to the surface (3) of the second wafer (1-2). In this way, in the second groove forming step (106), a second groove (14) with a depth (14-1) exceeding the finishing thickness (12-2) of the second device chip (9-2) is formed by plasma processing using a plasma-phase etching gas (31). Also, the second groove (14) is formed as a groove that is wider than the width (13-2) of the first groove (13) at the width (14-2) of the surface (3) side and narrower than the width (14-2) of the surface (3) side at the width (14-3) of the groove bottom side.
[0046] (Joining Step)
[0047] FIG. 12 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the bonding step of the manufacturing method of the stacked device chip shown in FIG. 4. The bonding step (107) is a step of bonding the second wafer (1-2) to the first wafer (1-1) such that the back surface (6) of the polished first wafer (1-1) and the surface (3) of the second wafer (1-2) are brought into contact, and the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) is received in the second groove (14) of the second wafer (1-2).
[0048] In the bonding step (107), the back surface (6) of the first wafer (1-1) and the surface (3) of the second wafer (1-2) are brought into contact at a position where the devices (5) overlap each other, and the surface (3) of the second wafer (1-2) is overlapped with the back surface (6) of the first wafer (1-1), and the grooves (13, 14) are overlapped together to accommodate the first resin layer (11-1) within the second groove (14). In the bonding step (107), as shown in FIG. 12, the back surface (6) of the first wafer (1-1) and the surface (3) of the second wafer (1-2) are bonded together, and the second wafer (1-2) is bonded to the first wafer (1-1). In addition, in the first embodiment, in the bonding step (107), the through electrode (7) of the first wafer (1-1) is bonded (connected) to the device (5) of the second wafer (1-2).
[0049] (2nd wafer grinding step)
[0050] FIG. 13 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer grinding step of the manufacturing method of the stacked device chip shown in FIG. 4. The second wafer grinding step (108) is a step of grinding the second wafer (1-2) bonded to the first wafer (1-1) from the back side (6) and exposing the second groove (14) on the back side (6) of the second wafer (1-2).
[0051] In the second wafer grinding step (108), the grinding device holds the surface (3) side of the first wafer (1-1) by means of a support (20) and attracts it to the holding surface of the chuck table. In the second wafer grinding step (108), the grinding device rotates the grinding wheel for grinding around the axis by means of a spindle and also rotates the chuck table around the axis, and while supplying grinding fluid from a grinding fluid nozzle not shown, the grinding wheel of the grinding wheel contacts the back side (6) of the substrate (2) of the second wafer (1-2) and brings it close to the chuck table at a predetermined feed speed, and grinds the back side (6) of the second wafer (1-2) with the grinding wheel.
[0052] In the first embodiment, in the second wafer grinding step (108), as shown in FIG. 13, the grinding device grinds the back side (6) of the second wafer (1-2) until the thickness of the second wafer (1-2) becomes the finished thickness (12-2) of the second device chip (9-2). Because of this, in the first embodiment, in the second wafer grinding step (108), the grinding device exposes the second groove (14) and the through electrode (7) on the back side (6) of the second wafer (1-2).
[0053] (Second resin layer formation step)
[0054] FIG. 14 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second resin layer forming step of the manufacturing method of the stacked device chip shown in FIG. 4. The second resin layer forming step (109) is a step of forming a resin layer (11) (hereinafter referred to as the second resin layer (11-2)) in the second groove (14) of the second wafer (1-2).
[0055] In the second resin layer forming step (109), a resin that has been softened by heating, etc., is supplied into the second groove (14) of the second wafer (1-2), and this resin is coated onto the back surface (6) of the second wafer (1-2). As shown in FIG. 14, the second resin layer (11-2) is formed within the second groove (14), and the back surface (6) of the second wafer (1-2) is coated with the second resin layer (11-2). Then, the resin layer (11) is formed by the resin layers (11-1, 11-2).
[0056] (Split Step)
[0057] FIG. 15 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the splitting step of the manufacturing method of the stacked device chip shown in FIG. 4. The splitting step (110) is a step of cutting the first resin layer (11-1) and the second resin layer (11-2) along the first groove (13) and the second groove (14) to manufacture the stacked device chip (10).
[0058] In the splitting step (110), the cutting device holds the back side (6) of the first wafer (1-1) by suction onto the holding surface of the chuck table through the support (20). In the splitting step (110), the cutting device moves the cutting blade, which is rotated by the spindle, and the chuck table relative to each other along the splitting line (4), and cuts the cutting blade from the back side (6) of the second wafer until it reaches the support (20) at the center of the width direction of the groove (13, 14). In the splitting step (110), as shown in FIG. 15, the cutting device cuts the resin layer (11-1, 11-2) within the groove (13, 14) to split the wafer (1-1, 1-2) into individual stacked device chips (10) and manufactures the stacked device chips (10).
[0059] Additionally, the thickness of the cutting blade that cuts the resin layer (11-1, 11-2) in the groove (13, 14) in the splitting step (110) is thinner than the thickness of the cutting blade that forms the first groove (13) in the first groove forming step (101). The manufactured stacked device chip (10) is picked up from the support (20).
[0060] The method for manufacturing a stacked device chip related to the first embodiment described above forms the width (14-2, 14-3) of the second groove (14) of the second wafer (1-2) bonded to the first wafer (1-1) such that the width on the surface (3) side is wider, so that even if there is a first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1), this first resin layer (11-1) is accommodated within the second groove (14) of the second wafer (1-2). Because of this, the method for manufacturing a stacked device chip related to the first embodiment ensures that the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) does not interfere with bonding between wafers (1-1, 1-2), that is, between device chips (9-1, 9-2). As a result, the manufacturing method of the stacked device chip related to the first embodiment has the effect of suppressing interference between the device chips (9-1, 9-2).
[0061] [Second Embodiment]
[0062] A method for manufacturing a stacked device chip related to a second embodiment of the present invention will be described based on the drawings. FIG. 16 is a flowchart showing the flow of a method for manufacturing a stacked device chip related to a second embodiment. FIG. 17 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer grinding step of the method for manufacturing a stacked device chip shown in FIG. 16. FIG. 18 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second resin layer forming step of the method for manufacturing a stacked device chip shown in FIG. 16. FIG. 19 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the second wafer polishing step of the method for manufacturing a stacked device chip shown in FIG. 16. FIG. 20 is a cross-sectional view schematically showing the main parts of the first wafer and the second wafer after the splitting step of the method for manufacturing a stacked device chip shown in FIG. 16. In addition, FIGS. 16, 17, 18, 19, and 20 use the same reference numerals for parts identical to those in the first embodiment and omit the description.
[0063] A method for manufacturing a stacked device chip related to the second embodiment is, as shown in FIG. 16, after performing a second resin layer forming step (109) and before a dividing step (110), a second wafer polishing step (111) is performed to simultaneously polish a second wafer (1-2) fixed to a first wafer (1-1) and a second resin layer (11-2), and to thin the second wafer (1-2) to a thickness corresponding to the finishing thickness (12-2) of the second device chip (9-2), and is identical to the first embodiment except that the second wafer grinding step (108) and the dividing step (110) are different from the first embodiment.
[0064] In the second wafer grinding step (108) of the method for manufacturing a stacked device chip related to the second embodiment, the grinding device holds the surface (3) side of the first wafer (1-1) by means of a support (20) and attracts it to the holding surface of the chuck table. In the second embodiment, in the second wafer grinding step (108), as shown in FIG. 17, the grinding device grinds the back side (6) of the second wafer (1-2) until the thickness of the second wafer (1-2) is thicker than the finishing thickness (12-2) of the second device chip (9-2) and thinner than the depth (15-1) of the second groove (14). For this reason, in the second embodiment, in the second wafer grinding step (108), the grinding device exposes at least the second groove (14) on the back surface (6) of the second wafer (1-2).
[0065] In the second resin layer forming step (109) of the method for manufacturing a stacked device chip related to the second embodiment, as shown in FIG. 18, the second resin layer (11-2) is formed in the second groove (14) in the same way as in the first embodiment, and the back surface (6) of the second wafer (1-2) is covered with the second resin layer (11-2). Then, the resin layer (11) is formed by the resin layers (11-1, 11-2).
[0066] In the second wafer polishing step (111), the polishing device holds the surface (3) side of the first wafer (1-1) by suction to the holding surface of the chuck table through the support (20). In the second wafer polishing step (111), the polishing device brings the polishing pad, which has been rotated around the axis, to the chuck table, which has been rotated around the axis, at a predetermined feed speed, and polishes the second resin layer (11-2) on the back side (6) of the second wafer (1-2) with the polishing member. Then, the second resin layer (11-2) on the back side (6) is removed, and the back side (6) of the second wafer (1-2), the through electrode (7), and the second groove (14) are exposed on the back side (6).
[0067] In the second embodiment, in the second wafer polishing step (111), as shown in FIG. 19, the polishing device simultaneously polishes and thins the back surface (6) of the second wafer (1-2) and the second resin layer (11-2) in the second groove (14) until the thickness of the second wafer (1-2) becomes the finishing thickness (12-2) of the second device chip (9-2).
[0068] In the second embodiment, in the dividing step (110), as in the first embodiment, a cutting device cuts the resin layer (11-1, 11-2) within the groove (13, 14) as shown in FIG. 20, and divides the wafer (1-1, 1-2) into individual stacked device chips (10-2) to manufacture the stacked device chips (10). Additionally, the stacked device chips (10-2) have the back surface (6) of the second device chip (9-2) exposed without being covered by the resin layer (11).
[0069] A method for manufacturing a stacked device chip related to the second embodiment is formed such that the width (14-2, 14-3) of the second groove (14) of the second wafer (1-2) bonded to the first wafer (1-1) is widened on the surface (3) side, so that even if there is a first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1), the first resin layer (11-1) is accommodated within the second groove (14) of the second wafer (1-2), and thus, as in the first embodiment, the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) does not interfere with bonding between wafers (1-1, 1-2), that is, between device chips (9-1, 9-2). As a result, the method for manufacturing a stacked device chip related to the second embodiment has the effect of suppressing interference between device chips (9-1, 9-2), just like the first embodiment. In addition, just as the first wafer (1-1) and the second wafer (1-2) are bonded, the surface (3) of a third wafer (1) (equivalent to wafers 1-1 and 1-2) having a groove formed identically to the groove (14) of the second wafer (1-2) is bonded to the back surface (6) of the second wafer (1-2) to form a stacked device chip (10) in which the device chips (9) are stacked in three or more layers.
[0070] [First Variation Example]
[0071] A method for manufacturing a stacked device chip related to a first embodiment and a first variation of a second embodiment of the present invention is described based on the drawings. FIG. 21 is a perspective view schematically showing a second groove forming step of a method for manufacturing a stacked device chip related to a first embodiment and a first variation of a second embodiment. In addition, FIG. 21 uses the same reference numerals as the first embodiment for the same parts and omits description.
[0072] The method for manufacturing a stacked device chip related to the first variant is the same as the first and second embodiments, except that the second groove forming step (106) is different. In the first variant, in the second groove forming step (106), a cutting device (40) holds the back side (6) of the second wafer (1-2) by suction to the holding surface (42) of the chuck table (41), and moves the cutting blade (44), which is rotated by the spindle (43), and the chuck table (41) relative to each other along the planned division line (4), thereby cutting the cutting blade (44) from the surface (3) side into the planned division line (4) to the aforementioned depth (14-1), and forming a second groove (14) in each planned division line (4) as shown in FIG. 21. In addition, the cutting edge of the cutting blade (44) is formed such that its thickness gradually decreases as it faces the outer edge. In this way, in the first variation, in the second groove forming step (106), the second groove (14) is formed by cutting using a cutting blade (44).
[0073] The manufacturing method of a stacked device chip related to the first modified example is formed such that the width (14-2, 14-3) of the second groove (14) of the second wafer (1-2) is widened on the surface (3) side, so that the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be accommodated within the second groove (14), and, as in the first embodiment, the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be suppressed from interfering with the bonding between wafers (1-1, 1-2), that is, between device chips (9-1, 9-2), thereby exhibiting the effect of suppressing interference with the bonding between device chips (9-1, 9-2).
[0074] [Second Variation Example]
[0075] A method for manufacturing a stacked device chip related to a first embodiment and a second variation of a second embodiment of the present invention will be described based on the drawings. FIG. 22 is a perspective view schematically showing a second groove forming step of a method for manufacturing a stacked device chip related to a first embodiment and a second variation of a second embodiment. In addition, FIG. 22 uses the same reference numerals as the first embodiment for the same parts and omits description.
[0076] The method for manufacturing a stacked device chip related to the second variant is the same as the first and second embodiments, except that the second groove forming step (106) is different. In the second variant, in the second groove forming step (106), a laser processing device (50) holds the back side (6) of the second wafer (1-2) by suction to the holding surface (52) of the chuck table (51), and moves the laser beam irradiation unit (53) and the chuck table (51) relative to each other along the planned division line (4), and irradiates a laser beam (54) of a wavelength that is absorbent to the second wafer (1-2) from the laser beam irradiation unit (53) onto the planned division line (4) from the surface (3) side, thereby forming a second groove (14) in each planned division line (4) as shown in FIG. 22. In this way, in the second variation, in the second groove forming step (106), the second groove (14) is formed by laser processing using a laser beam (54).
[0077] The method for manufacturing a stacked device chip related to the second modified example is formed such that the width (14-2, 14-3) of the second groove (14) of the second wafer (1-2) is widened on the surface (3) side, so that the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be accommodated within the second groove (14), and, similar to the first embodiment, the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be suppressed from interfering with the bonding between wafers (1-1, 1-2), that is, between device chips (9-1, 9-2), thereby exhibiting the effect of suppressing interference with the bonding between device chips (9-1, 9-2).
[0078] [Third Variation Example]
[0079] A method for manufacturing a stacked device chip related to a third variation of the first and second embodiments of the present invention is described based on the drawings. FIG. 23 is a cross-sectional view schematically showing a main part of a second wafer after a second groove forming step of a method for manufacturing a stacked device chip related to a third variation of the first and second embodiments. In addition, FIG. 23 uses the same reference numerals as the first embodiment for the same parts and omits description.
[0080] The method for manufacturing a stacked device chip related to the third variant is the same as the first and second embodiments, except that the second groove forming step (106) is different. In the third variant, in the second groove forming step (106), a cutting device having two cutting blades (hereinafter referred to as the first cutting blade and the second cutting blade) holds the back side (6) of the second wafer (1-2) by suction on the holding surface of the chuck table, and moves the first cutting blade, which is rotated by a spindle, and the chuck table relative to each other along the split line (4), thereby cutting the first cutting blade into the split line (4) from the surface (3) side to the aforementioned depth (14-1).
[0081] In the third variant, in the second groove forming step (106), the cutting device moves the second cutting blade, which is rotated by the spindle, and the chuck table relative to each other along the planned division line (4), and cuts the second cutting blade from the surface (3) side. Also, in the third variant, the thickness of the cutting edge of the first cutting blade is equal to the width (13-2) and constant in the diameter direction, and the thickness of the cutting edge of the second cutting blade is equal to the width (14-2) and constant in the diameter direction. Thus, in the third variation, in the second groove forming step (106), a second groove (14) is formed by a so-called step cut, comprising a narrow groove (14-4) of width (14-3) having a depth (14-1) and a wide groove (14-5) of width (14-2) extending toward the surface (3) side of the narrow groove (14-4). The second groove (14) formed in the third variation is formed as a groove that is wider than the width (13-2) of the first groove (13) at the width (14-2) of the surface (3) side and narrower than the width (14-2) of the surface (3) side at the width (14-3) of the groove bottom side.
[0082] The manufacturing method of a stacked device chip related to the third modified example is formed such that the width (14-2, 14-3) of the second groove (14) of the second wafer (1-2) is widened on the surface (3) side, so that the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be accommodated within the second groove (14), and, similar to the first embodiment, the first resin layer (11-1) protruding from the back surface (6) of the first wafer (1-1) can be suppressed from interfering with the bonding between wafers (1-1, 1-2), that is, between device chips (9-1, 9-2), thereby exhibiting the effect of suppressing interference with the bonding between device chips (9-1, 9-2).
[0083] Furthermore, the present invention is not limited to the above embodiments. That is, it can be implemented with various modifications within the scope of not deviating from the gist of the present invention. For example, the first groove forming step (101) may be performed by plasma etching using a plasma etching device (30) as in the second groove forming step (106). Also, between the first resin layer forming step (104) and the first wafer polishing step (105), a grinding step may be formed in which the first resin layer (11-1) on the back surface (6) of the first wafer (1-1) is ground using a grinding wheel mounted on a grinding device. Explanation of the symbols
[0084] 1 : Wafer 1-1: First Wafer 1-2: 2nd Wafer 3: Surface 4: Line scheduled for division 5 : Device 6 : On the other side 9 : Device Chip 9-1: First Device Chip 9-2: Second Device Chip 10, 10-2: Stacked device chips 11-1 : First resin layer 11-2 : Second resin layer 12-1 : Finishing thickness 12-2 : Finishing thickness 13 : Home 1 13-1 : Depth 14 : 2nd Home 14-1 : Depth 14-2, 14-3 : Width 20 : Support 31: Plasma-phase etching gas (plasma-phase gas) 44: Cutting blade 54: Laser beam 101: First groove forming step 102 : Fixed Step 103: 1st Wafer Grinding Step 104: First resin layer formation step 105: 1st Wafer Polishing Step 106: Second groove forming step 107: Joining Step 108: 2nd wafer grinding step 109: Second resin layer formation step 110: Split Step 111: 2nd Wafer Polishing Step
Claims
Claim 1 A method for manufacturing a stacked device chip comprising a plurality of device chips stacked on top of each other, using a wafer having a device formed in each of a plurality of regions of a surface partitioned by a plurality of intersecting planned division lines, the method comprising: a first groove forming step of forming a first groove having a depth exceeding the finishing thickness of a first device chip from the surface of the first wafer along a plurality of planned division lines of the first wafer; a fixing step of fixing the surface side of the first wafer to a support; a first wafer grinding step of grinding the first wafer fixed to the support from the back side and exposing the first groove on the back side of the first wafer; a first resin layer forming step of forming a first resin layer in the first groove of the first wafer; and simultaneously grinding the first wafer fixed to the support and the first resin layer, and thinning the first wafer to a thickness equivalent to the finishing thickness of the first device chip, so that the first resin layer formed in the first groove of the first wafer A first wafer polishing step for exposing the back side; a second groove forming step for forming a second groove with a depth exceeding the finishing thickness of a second device chip along a plurality of planned division lines of a second wafer having the same configuration as the first wafer, wherein the width of the second groove is wider than the width of the first groove on the surface side of the second wafer and narrower than the width on the bottom side of the groove; a bonding step for bringing the polished back side of the first wafer and the surface of the second wafer into contact, and bonding the second wafer to the first wafer such that the first resin layer protruding from the back side of the first wafer is received in the second groove of the second wafer; a second wafer grinding step for grinding the second wafer bonded to the first wafer from the back side and exposing the second groove on the back side of the second wafer;A method for manufacturing a stacked device chip, comprising: a second resin layer forming step for forming a second resin layer in a second groove of the second wafer; and a splitting step for cutting the first resin layer and the second resin layer along the first groove and the second groove and manufacturing a stacked device chip. Claim 2 A method for manufacturing a stacked device chip according to claim 1, wherein in the second groove forming step, the second groove is formed by plasma etching using a plasma-phase gas, cutting using a cutting blade, or laser processing using a laser beam. Claim 3 A method for manufacturing a stacked device chip according to claim 1, further comprising a second wafer polishing step after performing the second resin layer forming step and before the dividing step, wherein the second wafer fixed to the first wafer and the second resin layer are polished simultaneously, and the second wafer is thinned to a thickness corresponding to the finishing thickness of the second device chip.
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