Display device

KR103023083B1Active Publication Date: 2026-09-21LG DISPLAY CO LTD
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Patent Information

Application Number
KR1020210190221
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-12-28
Publication Date
2026-09-21
Estimated Expiration
2041-12-28

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Abstract

A display device according to one embodiment of the present invention comprises a substrate including a display area and a non-display area surrounding the display area, a gate driving circuit disposed on the substrate, a light-emitting element disposed on the display area on the substrate and including a cathode electrode, a dam disposed on the substrate outside the gate driving circuit, a first dummy conductive layer disposed to cover the dam and made of the same material as the cathode electrode, and a spacer disposed on the substrate between the gate driving circuit and the dam, wherein the cathode electrode extends from the display area to the non-display area and is disposed to overlap with the gate driving circuit. Accordingly, interference between a driving signal and a touch signal can be minimized and, at the same time, moisture penetration into the display device can be prevented.
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Description

Technology Field

[0001] The present invention relates to a display device, and more specifically, to a display device capable of improving reliability. Background Technology

[0002] As the information society develops, the demand for display devices that display images is increasing, and various types of display devices, such as liquid crystal displays and organic light-emitting diodes, are being utilized.

[0003] To provide users with a wider range of functions, this display device provides a function that recognizes a user's touch on the display panel and performs input processing based on the recognized touch.

[0004] A touch-recognition display device includes a plurality of touch electrodes disposed on or embedded in a display panel, and can detect whether a user touches the display panel and the touch coordinates by driving these touch electrodes. The problem to be solved

[0005] The problem that the present invention aims to solve is to provide a display device capable of reducing noise in a touch sensing signal caused by signal interference between a gate driving circuit and a touch routing wire.

[0006] Another problem that the present invention aims to solve is to provide a display device that expands the cathode electrode while simultaneously blocking moisture penetration into the display device.

[0007] Another problem that the present invention aims to solve is to provide a display device capable of preventing the degradation of touch performance so that accurate touch sensing is possible.

[0008] The problems of the present invention are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0009] A display device according to one embodiment of the present invention comprises a substrate including a display area and a non-display area surrounding the display area, a gate driving circuit disposed on the substrate, a light-emitting element disposed on the substrate in the display area and including a cathode electrode, a dam disposed on the substrate outside the gate driving circuit, a first dummy conductive layer disposed to cover the dam and made of the same material as the cathode electrode, and a spacer disposed on the substrate between the gate driving circuit and the dam, wherein the cathode electrode extends from the display area to the non-display area and is disposed to overlap with the gate driving circuit.

[0010] A display device according to another embodiment of the present invention comprises a substrate including a display area and a non-display area surrounding the display area, a gate driving circuit disposed on the substrate, a light-emitting element disposed on the substrate in the display area and including a cathode electrode, a dam disposed on the substrate outside the gate driving circuit, a first dummy conductive layer disposed to cover the dam and made of the same material as the cathode electrode, a plurality of spacers disposed on the substrate between the gate driving circuit and the dam, and a second dummy conductive layer disposed on the plurality of spacers and made of the same material as the cathode electrode, wherein the cathode electrode extends from the display area to the non-display area and is disposed to overlap with the gate driving circuit.

[0011] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0012] The present invention can prevent moisture from penetrating into the display device and improve reliability by placing a spacer between the dam and the display area and disconnecting the extended cathode electrode.

[0013] Since the present invention can extend the cathode electrode, the phenomenon of interference between the driving signal and the touch signal can be minimized.

[0014] The present invention can improve touch precision by reducing noise that may reach the touch detection unit.

[0015] The effects according to the present invention are not limited to those exemplified above, and a wider variety of effects are included within the present invention. Brief explanation of the drawing

[0016] FIG. 1 is a schematic plan view of a display device according to one embodiment of the present invention. FIG. 2 is a schematic plan view of a display device according to one embodiment of the present invention. FIG. 3 is a cross-sectional view of a display device according to one embodiment of the present invention. Figure 4 is a cross-sectional view along IV-IV' of Figure 1. FIG. 5 is a cross-sectional view of a display device according to another embodiment of the present invention. Specific details for implementing the invention

[0017] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0018] Shapes, areas, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are exemplary, and therefore the present invention is not limited to the depicted details. Throughout the specification, the same reference numerals refer to the same components. Furthermore, in describing the present invention, if it is determined that a detailed description of related prior art may unnecessarily obscure the essence of the present invention, such detailed description is omitted. Where terms such as "includes," "has," or "is made up" are used in the present invention, other parts may be added unless "only" is used. When a component is expressed in the singular, it includes cases where it is included in the plural unless specifically stated otherwise.

[0019] In interpreting the components, they are interpreted to include a margin of error even in the absence of a separate explicit statement.

[0020] In the case of describing a positional relationship, for example, when the positional relationship between two parts is described using expressions such as 'on,' 'upper,' 'lower,' or 'next to,' one or more other parts may be located between the two parts unless 'immediately' or 'directly' is used.

[0021] When an element or layer is referred to as "on" another element or layer, it includes cases where another layer or element is placed directly on top of or in between.

[0022] Additionally, terms such as first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below may be the second component within the technical scope of the present invention.

[0023] Throughout the specification, the same reference numerals refer to the same components.

[0024] The area and thickness of each component shown in the drawings are illustrated for convenience of explanation, and the present invention is not necessarily limited to the area and thickness of the illustrated components.

[0025] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0026] The present invention will be described below with reference to the drawings.

[0027] FIG. 1 is a schematic plan view of a display device according to one embodiment of the present invention. For convenience of explanation, FIG. 1 shows only the substrate (110), pad (PAD), gate driving circuit (GIP), and low potential voltage wiring (VSS) among the various components of the display device (100).

[0028] Referring to FIG. 1, a display device (100) includes at least one display area (A / A), and an array of pixels is formed in the display area (A / A). A non-display area (N / A) may be arranged to surround the display area (A / A). That is, the non-display area (N / A) may be adjacent to one or more sides of the display area (A / A). In FIG. 1, the non-display area (N / A) surrounds the rectangular display area (A / A). However, the shape of the display area (A / A) and the shape / arrangement of the non-display area (N / A) adjacent to the display area (A / A) are not limited to the example shown in FIG. 1.

[0029] Each pixel within the display area (A / A) may be associated with a pixel circuit. The pixel circuit may include one or more switching transistors and one or more driving transistors on the backplane. Each pixel circuit may be electrically connected to gate lines and data lines to communicate with one or more driving circuits, such as a gate driving circuit (GIP) and a data driving circuit, located in the non-display area (N / A). Additionally, each pixel circuit may be connected to power supply lines (VDD, VSS, VREF, etc.) located in the non-display area (N / A) to receive the voltage required for driving. The driving circuit may be implemented as a thin film transistor (TFT) in the non-display area (N / A), as shown in FIG. 1. Such a driving circuit may be referred to as a gate-in-panel (GIP). Additionally, some components, such as data driver ICs, may be mounted on a separate printed circuit board and combined with connection interfaces (PADs, bumps, pins, etc.) located in the non-display area (N / A) using circuit films such as FPCB (flexible printed circuit board), COF (chip-on-film), and TCP (tape carrier-package). A gate driving circuit (GIP) may be placed on at least one side of the left and right of the display area (A / A).

[0030] The power supply unit of the display device (100) outputs a high potential voltage and a low potential voltage, etc. The high potential voltage and the low potential voltage, etc., output from the power supply unit are supplied to the display device (100). The high potential voltage is supplied to the display panel through the high potential voltage wiring, and the low potential voltage is supplied to the display device (100) through the low potential voltage wiring (VSS). The voltage output from the power supply unit may also be used in the data driving circuit or the gate driving circuit (GIP). In particular, the low potential voltage wiring (VSS) is a wiring that can be electrically connected to the second electrode of the light-emitting element described below, and can be arranged to surround the gate driving circuit (GIP) and the display area (A / A).

[0031] Additionally, the non-display area (N / A) may include a pad section, and the pad section may include a plurality of pads (PAD). Specifically, the plurality of pads (PAD) may include a plurality of common power supply pads, a plurality of data input pads, a plurality of power supply pads, a plurality of control signal input pads, and a plurality of touch driving pads.

[0032] The display device (100) may further include various additional elements for generating various signals or driving pixels within the display area (A / A). Additional elements for driving pixels may be inverter circuits, multiplexers, electrostatic discharge circuits, etc. The display device (100) may also include additional elements associated with functions other than pixel driving. For example, the display device (100) may include additional elements that provide touch detection functions, user authentication functions (e.g., fingerprint recognition), multi-level pressure detection functions, tactile feedback functions, etc. The aforementioned additional elements may be located in an external circuit connected to a non-display area (N / A) and / or a connection interface.

[0033] FIG. 2 is a schematic plan view of a display device according to an embodiment of the present invention. For convenience of explanation, FIG. 2 shows only the substrate (110), touch detection unit (150), touch routing wiring (155), and a plurality of pads (PAD) among the various components of the display device (100).

[0034] Recently, a touch panel integrated display device has been developed to reduce the thickness of the display device and improve visibility by placing touch electrodes, etc., directly on the encapsulation portion of the display device. A display device (100) according to one embodiment of the present invention is a touch panel integrated display device, and a touch sensing portion (150) may be formed on the encapsulation portion of the display device (100).

[0035] Referring to FIG. 2, the display device (100) includes a touch detection unit (150), a plurality of touch routing wires (155), and a plurality of touch pads (PADs). Here, the touch detection unit (150) includes a plurality of first touch electrodes (151), a plurality of second touch electrodes (152), and a connecting electrode (153).

[0036] A plurality of first touch electrodes (151) may be touch driving electrodes, and a plurality of second touch electrodes (152) may be touch sensing electrodes. A plurality of first touch electrodes (151) may be connected in a row direction to form a plurality of electrode rows, and a plurality of second touch electrodes (152) may be connected in a longitudinal direction by connecting electrodes (153) to form a plurality of electrode columns.

[0037] The first touch electrode (151) and the second touch electrode (152) may be placed on the same layer. However, in the area where the first touch electrode (151) and the second touch electrode (TE2) intersect, the second touch electrode (152) may be placed separately, and the separated second touch electrodes (152) may be connected by a connecting electrode (153).

[0038] At this time, the first touch electrode (151), the second touch electrode (152), and the connecting electrode (153) are placed in an area corresponding to the display area (A / A) of the display device (100).

[0039] The external shape of the first touch electrode (151) and the second touch electrode (152) may correspond to a specific shape. For example, as shown in FIG. 2, the external shape of the first touch electrode (151) and the second touch electrode (152) may have a mesh pattern including a plurality of rhombus shapes. The first touch electrode (151) and the second touch electrode (152) may be made of a metal including at least one of titanium (Ti), aluminum (Al), molybdenum (Mo), molytitatanium (MoTi), copper (Cu), and tantalum (Ta), and may also be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but are not limited thereto. Light emitted from the display device (100) may pass through the first touch electrode (151) and the second touch electrode (152), which are made of a transparent conductive material, and be emitted to the outside. However, not limited thereto, light emitted from the display device (100) may also be emitted to the outside through a plurality of openings included in the first touch electrode (151) and the second touch electrode (152).

[0040] The non-display area (N / A) is an area surrounding the display area (A / A), where a plurality of touch routing wires (155) and a plurality of touch pads (PAD) are arranged.

[0041] Each of the plurality of touch routing wires (155) electrically connects each of the plurality of touch electrodes (151, 152) placed in the display area (A / A) and the touch pad (PAD) in the non-display area (N / A). For example, a touch driving signal can be applied to the first touch electrode (151) through the touch routing wire (155) connected to the first touch electrode (151), and a touch sensing signal can be transmitted to the second touch electrode (152) through the touch routing wire (155) connected to the second touch electrode (152).

[0042] These touch routing wires (155) may be made of a low-resistance metal material and may be made of a transparent conductive material such as ITO, IZO, etc., but are not limited thereto. For example, if multiple touch routing wires (155) are made of a low-resistance metal material, the resistance is lowered and the RC delay can be reduced.

[0043] A plurality of touch pads (PADs) have one end connected to a touch routing wire (155) and the other end electrically connected to an external circuit, such as a touch driving unit, so that a touch signal can be received from the external circuit or a touch detection signal can be transmitted to the external circuit.

[0044] At this time, a plurality of touch routing wires (155) and a plurality of touch pads (PAD) are placed in an area corresponding to a non-display area (N / A) of the display device (100).

[0045] In the following, for a more detailed explanation of the cross-sectional structure of the display area (A / A) of the display device (100), we refer together to FIG. 3.

[0046] FIG. 3 is a cross-sectional view of a display device according to one embodiment of the present invention.

[0047] Referring to FIG. 3, a display device (100) according to one embodiment of the present invention may include a substrate (110), a buffer layer (111), a first thin-film transistor (120), a gate insulating layer (112), a first interlayer insulating layer (113), a conductive layer (160), a second interlayer insulating layer (114), a first flattening layer (115), a connecting electrode (190), a second flattening layer (116), a bank (117), a light-emitting element (130), an encapsulation part (140), a touch insulating layer (154), and a touch sensing part (150).

[0048] The substrate (110) can support various components of the display device (100). The substrate (110) may be made of glass or a plastic material having flexibility. If the substrate (110) is made of a plastic material, for example, it may be made of polyimide (PI).

[0049] A buffer layer (111) may be disposed on a substrate (110). The buffer layer (111) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof. The buffer layer (111) may perform functions such as improving the adhesion between the layers formed on the buffer layer (111) and the substrate (110), and blocking alkaline components, etc., from leaking out from the substrate (110).

[0050] A thin-film transistor (120) may be disposed on a buffer layer (111). The thin-film transistor (120) may include an active layer (121), a gate electrode (124), a source electrode (122), and a drain electrode (123). Here, depending on the design of the pixel circuit, the source electrode (122) may become the drain electrode, and the drain electrode (123) may become the source electrode. The active layer (121) of the thin-film transistor (120) may be disposed on the buffer layer (111).

[0051] The active layer (121) may be made of various materials such as polysilicon, amorphous silicon, oxide semiconductor, etc. The active layer (121) may include a channel region where a channel is formed when the thin-film transistor (120) is driven, a source region on both sides of the channel region, and a drain region. The source region refers to the part of the active layer (121) connected to the source electrode (122), and the drain region refers to the part of the active layer (121) connected to the drain electrode (123).

[0052] A gate insulating layer (112) may be disposed on the active layer (121) of a thin-film transistor (120). The gate insulating layer (112) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes may be formed in the gate insulating layer (112) for the source electrode (122) and drain electrode (123) of the thin-film transistor (120), respectively, to be connected to the source region and drain region, respectively, of the active layer (121) of the thin-film transistor (120).

[0053] A gate electrode (124) of a thin-film transistor (120) may be disposed on a gate insulating layer (112). The gate electrode (124) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The gate electrode (124) may be formed on the gate insulating layer (112) so as to overlap with the channel region of the active layer (121) of the thin-film transistor (120).

[0054] A first interlayer insulating layer (113) may be disposed on the gate insulating layer (112) and the gate electrode (124). The first interlayer insulating layer (113) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes may be formed in the first interlayer insulating layer (113) to expose the source region and drain region of the active layer (121) of the thin-film transistor (120).

[0055] A conductive layer (160) may be disposed on the first interlayer insulating layer (113). The conductive layer (160) may be a wiring or electrode disposed between the gate electrode (124), the source electrode (122), and the drain electrode (123).

[0056] A second interlayer insulating layer (114) may be disposed on the first interlayer insulating layer (113) and the conductive layer (160). The second interlayer insulating layer (114) may be formed of the same material as the first interlayer insulating layer (113). That is, the second interlayer insulating layer (114) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes may be formed in the second interlayer insulating layer (114) to expose the source region and drain region of the active layer (121) of the thin-film transistor (120).

[0057] The source electrode (122) and drain electrode (123) of the thin-film transistor (120) may be disposed on the second interlayer insulating layer (114).

[0058] The source electrode (122) and drain electrode (123) of the thin-film transistor (120) can be connected to the active layer (121) of the thin-film transistor (120) through contact holes formed in the gate insulating layer (112), the first interlayer insulating layer (113), and the second interlayer insulating layer (114). Accordingly, the source electrode (122) of the thin-film transistor (120) can be connected to the source region of the active layer (121) through contact holes formed in the gate insulating layer (112), the first interlayer insulating layer (113), and the second interlayer insulating layer (114). Additionally, the drain electrode (123) of the thin-film transistor (120) can be connected to the drain region of the active layer (121) through contact holes formed in the gate insulating layer (112), the first interlayer insulating layer (113), and the second interlayer insulating layer (114).

[0059] The source electrode (122) and drain electrode (123) of the thin-film transistor (120) can be formed by the same process. Also, the source electrode (122) and drain electrode (123) of the thin-film transistor (120) can be formed from the same material. The source electrode (122) and drain electrode (123) of the thin-film transistor (120) can be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0060] The first flattening layer (115) may be disposed on the source electrode (122), the drain electrode (123), and the second interlayer insulating layer (114). As shown in FIG. 3, a contact hole may be formed in the first flattening layer (115) to expose the drain electrode (123). The first flattening layer (115) may be an organic material layer for flattening the top of the thin-film transistor (120). For example, the first flattening layer (115) may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. However, it is not limited thereto, and the first flattening layer (115) may be an inorganic material layer for protecting the thin-film transistor (120). For example, it can be formed from an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx). The first planarization layer (115) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof.

[0061] A connecting electrode (190) may be disposed on the first flattening layer (115). Additionally, the connecting electrode (160) may be connected to the drain electrode (123) of the thin-film transistor (120) through a contact hole of the first flattening layer (115). The connecting electrode (190) may serve to electrically connect the thin-film transistor (120) and the light-emitting element (130). For example, the connecting electrode (190) may serve to electrically connect the drain electrode (123) of the thin-film transistor (120) and the first electrode (131) of the light-emitting element (130). The connecting electrode (190) may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The connecting electrode (190) can be formed of the same material as the source electrode (122) and drain electrode (123) of the thin-film transistor (120).

[0062] The second flattening layer (116) may be disposed on the connecting electrode (190) and the first flattening layer (115). And, as shown in FIG. 3, a contact hole may be formed in the second flattening layer (116) to expose the connecting electrode (190). The second flattening layer (116) may be an organic material layer for flattening the top of the thin-film transistor (120). For example, the second flattening layer (116) may be formed of an organic material such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0063] A light-emitting element (130) may be disposed on a second flattening layer (116). The light-emitting element (130) may include a first electrode (131), a light-emitting structure (132), and a second electrode (133). The first electrode (131) of the light-emitting element (130) may be disposed on the second flattening layer (116). The first electrode (131) may be electrically connected to a connecting electrode (190) through a contact hole formed in the second flattening layer (116). Thus, the first electrode (131) of the light-emitting element (130) may be electrically connected to a thin-film transistor (120) by being connected to a connecting electrode (190) through a contact hole formed in the second flattening layer (116).

[0064] The first electrode (131) may be formed as a multilayer structure including a transparent conductive film and an opaque conductive film with high reflection efficiency. The transparent conductive film may be made of a material with a relatively high work function value, such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). The opaque conductive film may be formed as a single layer or multilayer structure including Al, Ag, Cu, Pb, Mo, Ti, or alloys thereof. For example, the first electrode (131) may be formed as a structure in which a transparent conductive film, an opaque conductive film, and a transparent conductive film are sequentially stacked. However, it is not limited thereto, and it may also be formed as a structure in which a transparent conductive film and an opaque conductive film are sequentially stacked.

[0065] Since the display device (100) according to one embodiment of the present invention is a top emission display device, the first electrode (131) may be an anode electrode. In the case where the display device (100) is bottom emission, the first electrode (131) disposed on the second flattening layer (116) may be a cathode electrode.

[0066] A bank (117) may be disposed on the first electrode (131) and the second planarization layer (116). An opening may be formed in the bank (117) to expose the first electrode (131). Since the bank (117) can define a light-emitting area of ​​the display device (100), it may also be called a pixel defining film.

[0067] A light-emitting structure (132) including a light-emitting layer can be disposed on the first electrode (131).

[0068] The light-emitting structure (132) of the light-emitting element (130) may be formed by stacking a hole layer, a light-emitting layer, and an electron layer in the order of or in reverse order on the first electrode (131). In addition, the light-emitting structure (132) may have first and second light-emitting structures facing each other with a charge generation layer in between. In this case, one of the light-emitting layers of the first and second light-emitting structures may generate blue light, and the other of the light-emitting layers of the first and second light-emitting structures may generate yellow-green light, thereby generating white light through the first and second light-emitting structures. The white light generated from this light-emitting structure (132) may be incident on a color filter located above the light-emitting structure (132) to create a color image. Alternatively, a color image may be created by generating color light corresponding to each subpixel in each light-emitting structure (132) without a separate color filter. For example, the light-emitting structure (132) of the red (R) subpixel may emit red light, the light-emitting structure (132) of the green (G) subpixel may emit green light, and the light-emitting structure (132) of the blue (B) subpixel may emit blue light.

[0069] A second electrode (133) may be further disposed on the light-emitting structure (132). The second electrode (133) of the light-emitting element (130) may be disposed on the light-emitting structure (132) so as to face the first electrode (131) with the light-emitting structure (132) in between. In a display device (100) according to one embodiment of the present invention, the second electrode (133) may be a cathode electrode. A sealing portion (140) that suppresses moisture penetration may be further disposed on the second electrode (133).

[0070] The encapsulation portion (140) may include a first inorganic encapsulation layer (141), an organic encapsulation layer (142), and a second inorganic encapsulation layer (143). The first inorganic encapsulation layer (141) of the encapsulation portion (140) may be disposed on the second electrode (133). Additionally, the organic encapsulation layer (142) may be disposed on the first inorganic encapsulation layer (141). Furthermore, the second inorganic encapsulation layer (143) may be disposed on the organic encapsulation layer (142). The first inorganic encapsulation layer (141) and the second inorganic encapsulation layer (143) of the encapsulation portion (140) may be formed from an inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx). The organic bag layer (142) of the bag portion (140) can be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0071] The second inorganic encapsulation layer (143) can cover the upper surface and side of the first inorganic encapsulation layer (141) and the organic encapsulation layer (142), respectively, and the second inorganic encapsulation layer (143) minimizes or blocks external moisture or oxygen from penetrating into the first inorganic encapsulation layer (141) and the organic encapsulation layer (142). At this time, the first inorganic encapsulation layer (141) and the second inorganic encapsulation layer (143) serve to block the penetration of moisture or oxygen, and the organic encapsulation layer (142) serves to flatten the upper surface of the first inorganic encapsulation layer (141). Accordingly, the encapsulation portion (140) can cover the gate driving circuit (GIP) and the dam of the display area (A / A) and the non-display area (N / A). However, the configuration of the encapsulation portion (140) is not limited thereto.

[0072] The touch sensing portion (150) may be disposed on the second inorganic encapsulation layer (143) of the encapsulation portion (140). The touch sensing portion (150) may include touch electrodes (151, 152) and a connecting electrode (153).

[0073] A connecting electrode (153) of the touch sensing unit (150) may be disposed on the second inorganic encapsulation layer (143). The connecting electrode (153) is disposed at a point where touch electrodes (151, 152) arranged in different directions intersect and is used to connect touch electrodes (151, 152) arranged in one direction. The connecting electrode (153) may be made of a transparent conductive layer, and may be made of a transparent conductive oxide such as ITO, IZO, etc.

[0074] A touch insulating layer (154) may be disposed on the encapsulation portion (140) and the connecting electrode (153). The touch insulating layer (154) may insulate the connection electrode (153) from the touch electrodes (151, 152). Additionally, the touch insulating layer (154) may be composed of an inorganic material layer or an organic material layer. If the touch insulating layer (154) is an inorganic material layer, the touch insulating layer (154) may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or multiple layers thereof. If the touch insulating layer (154) is an organic material layer, it may be formed from organic materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. A contact hole may be formed in the touch insulating layer (154) to expose the connecting electrode (153).

[0075] A plurality of first touch electrodes (151) and a plurality of second touch electrodes (152) of a touch detection unit (150) may be disposed on a touch insulating layer (151). A plurality of second touch electrodes (152) may be connected to a connecting electrode (153) through a contact hole of the touch insulating layer (154). A plurality of second touch electrodes (152) may be connected to each other by the connecting electrode (153).

[0076] The first touch electrode (151) and the second touch electrode (152) of the touch detection unit (150) may be formed from a transparent conductive film such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO). However, they are not limited thereto, and the first touch electrode (151) and the second touch electrode (152) may be formed from an opaque conductive film having an opening. When the first touch electrode (151) and the second touch electrode (152) are formed from an opaque conductive film having an opening, they may be formed from a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0077] Figure 4 is a cross-sectional view along IV-IV' of Figure 1.

[0078] In the non-display area (N / A) of the display device (100), a gate driving circuit (GIP), low potential voltage wiring (VSS), a dam (DAM), routing wiring (155), and a spacer (SP) may be placed.

[0079] The gate driver circuit (GIP) receives a gate control signal through gate control lines, generates gate signals according to the gate control signal, and sequentially outputs signals to the gate lines of the display area (A / A). The gate driver circuit (GIP) may be placed in the non-display area (N / A) of the substrate (110) in a GIP (gate driver in panel) manner. The gate driver circuit (GIP) may be formed on the same layer as the conductive layer (160) of the display area (A / A). That is, the gate driver circuit (GIP) may be placed between the first interlayer insulating layer (113) and the second interlayer insulating layer (114). However, it is not limited thereto.

[0080] The low potential voltage wiring (VSS) can supply a common voltage to the second electrode (133) of the light-emitting element (130) formed in each pixel of the display area (A / A). Accordingly, the low potential voltage wiring (VSS) can be arranged to surround the gate driving circuit (GIP) and the display area (A / A). That is, the low potential voltage wiring (VSS) can be placed in an outer region of the substrate (110) than the gate driving circuit (GIP). The low potential voltage wiring (VSS) can be formed on the same layer as the gate driving circuit (GIP). That is, the low potential voltage wiring (VSS) can be formed on the same layer as the conductive layer (160) of the display area (A / A) and can be placed between the first interlayer insulating layer (113) and the second interlayer insulating layer (114). However, it is not limited thereto.

[0081] A dam (DAM) may be placed on the first interlayer insulating layer (114) in the non-display area (N / A). The dam (DAM) is placed to control the spreading of the organic encapsulation layer forming the encapsulation portion placed in the display area (A / A) and the non-display area (N / A) of the substrate (110). The dam (DAM) may include a first dam (DAM1) and a second dam (DAM2). The first dam (DAM1) may surround the display area (A / A) adjacent to the display area (A / A), and the second dam (DAM2) may surround the outer edge of the first dam (DAM). Additionally, the first dam (DAM1) and the second dam (DAM2) may be placed outside the substrate (110) of the gate driving circuit (GIP) as in FIG. 4, and may be placed above the low potential voltage wiring (VSS).

[0082] The first dam (DAM1) and the second dam (DAM2) may be formed in multiple layers. Specifically, the first dam (DAM1) may include a first layer (DAM1-1) of the first dam (DAM1) and a second layer (DAM1-2) of the first dam (DAM1). And, the second dam (DAM2) may include a first layer (DAM2-1) of the second dam (DAM2) and a second layer (DAM2-2) of the second dam (DAM2). The first layer (DAM1-1) of the first dam (DAM1) and the first layer (DAM2-1) of the second dam (DAM2) may be disposed on a second interlayer insulating layer (114). The first layer (DAM1-1) of the first dam (DAM1) and the first layer (DAM2-1) of the second dam (DAM2) may be formed in the same layer as the second leveling layer (116) and may be made of the same material. However, they are not limited thereto.

[0083] The second layer (DAM1-2) of the first dam (DAM1) may be placed on the first layer (DAM1-1) of the first dam (DAM1). Additionally, the second layer (DAM2-2) of the second dam (DAM2) may be placed on the first layer (DAM2-1) of the second dam (DAM2). The second layer (DAM1-2) of the first dam (DAM1) and the second layer (DAM2-2) of the second dam (DAM2) may be formed on the same layer as the bank (117) and may be made of the same material.

[0084] However, in one embodiment of the present invention, the display device (100) is shown as having a dam (DAM) composed of two layers, but is not limited thereto. For example, the dam (DAM) may be composed of three or more layers.

[0085] Next, the second electrode (133), i.e., the cathode electrode, may be positioned to extend from the display area (A / A) to the non-display area (N / A) and overlap with the gate driving circuit (GIP). The second electrode (133) may extend to a portion of the non-display area (N / A) and be electrically connected to the low potential voltage wiring (VSS) placed in the non-display area (N / A). It may extend along the top surface of the bank (117) placed in the non-display area (N / A), the side of the bank (117), and the second interlayer insulating layer (114).

[0086] A capping layer that can protect the light-emitting element (130) and increase light-emitting efficiency may be further disposed on the second electrode (133). Although not shown in the drawing, the capping layer may be disposed between the second electrode (133) and the first inorganic encapsulation layer (141) of the encapsulation portion (140). If the second electrode (133) is designed to extend from the display area (A / A) to the non-display area (N / A) beyond the first dam (DAM1) and the second dam (DAM2), the capping layer may also be designed to extend together with the second electrode (133). However, it is not limited thereto.

[0087] A sealing portion (140) for preventing the penetration of moisture and oxygen into the light-emitting element (130) may be disposed on the second electrode (133). Additionally, a touch insulating layer (154) may be disposed on the sealing portion (140) in the non-display area (N / A), and a plurality of touch routing wires (155) may be disposed on the touch insulating layer (154). As shown in FIG. 4, the plurality of touch routing wires (155) may be disposed to overlap with the second electrode (133). Each of the plurality of touch routing wires (155) electrically connects each of the plurality of touch electrodes (151, 152) disposed in the display area (A / A) with the plurality of pads (PAD) in the non-display area (N / A). For example, a touch driving signal may be applied to the first touch electrode (151) through a touch routing wire (155) connected to the first touch electrode (151), and a touch sensing signal may be transmitted to the second touch electrode (152) through a touch routing wire (155) connected to the second touch electrode (152).

[0088] Next, a spacer (SP) may be placed between the gate driving circuit (GIP) and the dam (DAM) on the substrate (110). That is, the spacer (SP) may be placed between the gate driving circuit (GIP) and the low potential voltage wiring (VSS). Since the gate driving circuit (GIP) is placed on at least one side of the left and right layers of the display area (A / A), the spacer (SP) may also be placed on at least one side of the left and right layers of the display area (A / A).

[0089] The spacer (SP) may be formed in multiple layers. Specifically, the spacer (SP) may include a first spacer layer (SP-1) and a second spacer layer (SP-2). The first spacer layer (SP-1) may be made of the same material as the first insulating layer disposed in the display area (A / A) and the non-display area (N / A), and the second spacer layer (SP-2) may be made of the same material as the second insulating layer disposed in the display area (A / A) and the non-display area (N / A). In this case, the first insulating layer disposed in the display area (A / A) and the non-display area (N / A) may be an inorganic insulating layer, and the second insulating layer may be an organic insulating layer. Specifically, the first insulating layer may be a second interlayer insulating layer (114) disposed in a display area (A / A) and a non-display area (N / A), and the second insulating layer may be a second flattening layer (116) disposed in a display area (A / A) and a non-display area (N / A). However, it is not limited thereto.

[0090] The spacer (SP) may have an undercut structure. That is, the area of ​​the upper surface of the first spacer layer (SP-1) may be smaller than the area of ​​the lower surface of the second spacer layer (SP-2). As shown in FIG. 4, both the first spacer layer (SP-1) and the second spacer layer (SP-2) have a positive taper shape, and by positioning the end of the upper surface of the first spacer layer (SP-1) inwardly than the end of the lower surface of the second spacer layer (SP-2), an undercut structure may be formed inwardly. However, this is not limited thereto, and the first spacer layer (SP-1) and the second spacer layer (SP-2) may have various shapes, such as a reverse taper shape, while the thickness of the first spacer layer (SP-1) is formed to be thinner than the thickness of the second spacer layer (SP-2).

[0091] As the spacer (SP) is formed as an undercut structure between the gate driving circuit (GIP) and the dam (DAM), the second electrode (133), which is positioned to overlap with the gate driving circuit (GIP), can be disconnected by the spacer (SP). That is, the cathode electrode can be disconnected by the spacer (SP). When the second electrode (133) is disconnected by the spacer (SP), the cathode electrode, which is not connected to the light-emitting element (130) of the display area (A / A), can no longer function as a cathode electrode and may be referred to as a dummy conductive layer. Accordingly, the first dummy conductive layer (133-1) is disconnected by the second electrode (133) and the spacer (SP) and is placed on the dam (DAM). Additionally, the second dummy conductive layer (133-2) is disconnected by the second electrode (133) and the spacer (SP) and is placed on the spacer (SP). The first dummy conductive layer (133-1) and the second dummy conductive layer (133-2) can be made of the same material as the second electrode (133) of the light-emitting element (130) and can be formed by the same process. Additionally, since the second electrode (133) is separated by the spacer (SP), both sides of the spacer (SP) can be covered by the encapsulation portion (140), and the sides of the spacer (SP) can come into contact with the first inorganic encapsulation layer (141) of the encapsulation portion (140).

[0092] As previously explained, a spacer (SP) can be placed between the gate driving circuit (GIP) and the low potential voltage wiring (VSS). The low potential voltage wiring (VSS) is connected to the second electrode (133) of the light-emitting element (130) to supply a low potential voltage to each pixel of the display area (A / A). If the second electrode (133) is disconnected by the spacer (SP), the second electrode (133) of the light-emitting element (130) and the low potential voltage wiring (VSS) may not be connected in the area where the spacer (SP) is placed. However, since the spacer (SP) can be placed only on at least one side of the left and right of the display area (A / A), just like the gate driving circuit (GIP), the second electrode (133) and the low potential voltage wiring (VSS) can be electrically connected on at least one side of the upper and lower of the display area (A / A). Alternatively, the second electrode (133) and the low potential voltage wiring (VSS) may be electrically connected on the other side if the spacer (SP) is placed on only one side of the display area (A / A), either the left or the right side.

[0093] Accordingly, a display device (100) according to one embodiment of the present invention can improve reliability by preventing noise caused by the inflow of a driving signal while blocking the penetration of moisture and oxygen into the display device (100).

[0094] When driving signals generated from gate driving circuits or similar devices enter the touch routing wiring, these driving signals act as noise. In other words, interference occurs between the driving signals from the gate driving circuits and the touch detection signals, causing confusion in the touch routing wiring, which can lead to touch noise issues in the touch detection unit.

[0095] Driving signals that may occur in the gate driving circuit, etc., can be partially shielded by the second electrode placed above the gate driving circuit. However, in the case of the second electrode, i.e., the cathode electrode, due to design margins, it may only extend to a portion of the non-display area and be disconnected. In particular, since the deposition process of the second electrode uses a process method of full-surface deposition using an open mask without performing photo and etching processes to form a pattern, the edges of the second electrode in the non-display area may have large process tolerances and may not be covered to the desired position. Therefore, in the past, if the second electrode was not sufficiently deposited to overlap with the touch routing line placed at the outermost of a plurality of touch routing lines, it failed to serve as a shield between the touch routing line and the gate driving circuit, resulting in a problem where driving signals generated from the gate driving circuit reached the touch routing line. In other words, in the past, due to the design margin of the second electrode, driving signals were introduced into the touch routing line, causing touch noise defects.

[0096] Accordingly, in a display device (100) according to one embodiment of the present invention, the second electrode (133) can be designed to be expanded to shield a driving signal that may occur in a gate driving circuit (GIP), etc. That is, in the deposition process of the second electrode (133), the second electrode (133) can be formed using an open mask so that the second electrode (133) can also cover the upper part of the dam of the non-display area (N / A). Accordingly, the second electrode (133) can completely cover the gate driving circuit (GIP). Therefore, in a display device (100) according to one embodiment of the present invention, by the second electrode (133) completely covering the gate driving circuit (GIP), the phenomenon of interference between the driving signal of the gate driving circuit (GIP) and the touch signal can be minimized.

[0097] However, if the second electrode (133) is extended and positioned to cover the upper part of the dam (DAM) of the non-display area (N / A), the second electrode (133) may be exposed outside the bag portion (140). In this case, if the second electrode (133) is exposed outside the bag portion (140), there is a risk of moisture and oxygen penetrating into the display device (100).

[0098] Accordingly, in a display device (100) according to one embodiment of the present invention, by placing a spacer (SP) between a gate driving circuit (GIP) and a dam (DAM), the second electrode (133) can be disconnected to prevent moisture and oxygen from penetrating from the outside. The spacer (SP) may include a first spacer layer (SP-1) and a second spacer layer (SP-2), and the upper surface area of ​​the first spacer layer (SP-1) may be smaller than the lower surface area of ​​the second spacer layer (SP-2). Accordingly, during the process of forming the second electrode (133), the second electrode (133) can be disconnected by the spacer (SP). That is, as the end of the second spacer layer (SP-2) is positioned to protrude more than the end of the first spacer layer (SP-1), the second electrode (133) is positioned only on the inner side of the spacer (SP) to cover the gate driving circuit (GIP), and the first dummy conductive layer (133-1) can be positioned on the upper side of the dam (DAM), and the second dummy conductive layer (133-2) can be positioned on the upper side of the spacer (SP). Accordingly, in the display device (100) according to one embodiment of the present invention, even if moisture and oxygen flow along the first dummy conductive layer (133-1) or the second dummy conductive layer (133-2), the second electrode (133) is disconnected by the spacer (SP), so the penetration of moisture and oxygen into the light-emitting element (130) of the display area (A / A) can be prevented.

[0099] FIG. 5 is a cross-sectional view of a display device according to another embodiment of the present invention. Since the display device (200) of FIG. 5 is substantially identical to the display device (100) of FIG. 1 to FIG. 4 except that the spacer (SP') and the second dummy conductive layer S (133-3) are multiple, a redundant description is omitted.

[0100] Referring to FIG. 5, a plurality of spacers (SP') may be disposed between the gate driving circuit (GIP) and the dam (DAM) on the substrate (110). That is, a plurality of spacers (SP') may be disposed between the gate driving circuit (GIP) and the low potential voltage wiring (VSS). Since the gate driving circuit (GIP) is disposed on at least one side of the left and right layers of the display area (A / A), a plurality of spacers (SP') may also be disposed on at least one side of the left and right layers of the display area (A / A).

[0101] A plurality of spacers (SP') includes a first spacer (SP1), a second spacer (SP2), and a third spacer (SP3). The first spacer (SP1) is the spacer closest to the gate driving circuit (GIP) among the plurality of spacers (SP'), the third spacer (SP3) is the spacer closest to the low potential voltage wiring (VSS) among the plurality of spacers (SP'), and the second spacer (SP2) is a spacer positioned between the first spacer (SP1) and the third spacer (SP3).

[0102] A plurality of spacers (SP') may be formed in multiple layers. Specifically, the first spacer (SP1) includes a first spacer layer (SP1-1) and a second spacer layer (SP1-2), the second spacer (SP2) includes a second spacer layer (SP2-1) and a second spacer layer (SP2-2), and the third spacer (SP3) includes a first spacer layer (SP3-1) and a second spacer layer (SP3-2). The first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), and the first spacer layer (SP3-1) of the third spacer (SP3) may be made of the same material as the first insulating layer disposed in the display area (A / A) and the non-display area (N / A), and the second spacer layer (SP1-2) of the first spacer (SP1), the second spacer layer (SP2-2) of the second spacer (SP2), and the second spacer layer (SP3-2) of the third spacer (SP3) may be made of the same material as the second insulating layer disposed in the display area (A / A) and the non-display area (N / A). In this case, the first insulating layer disposed in the display area (A / A) and the non-display area (N / A) may be an inorganic insulating layer, and the second insulating layer may be an organic insulating layer. Specifically, the first insulating layer may be a second interlayer insulating layer (114) disposed in a display area (A / A) and a non-display area (N / A), and the second insulating layer may be a second flattening layer (116) disposed in a display area (A / A) and a non-display area (N / A). However, it is not limited thereto.

[0103] Multiple spacers (SP') may have an undercut structure. That is, the upper surface area of ​​each of the first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), and the first spacer layer (SP3-1) of the third spacer (SP3) may be smaller than the lower surface area of ​​the second spacer layer (SP1-2) of the first spacer (SP1), the second spacer layer (SP2-2) of the second spacer (SP2), and the second spacer layer (SP3-2) of the third spacer (SP3). As shown in FIG. 4, the first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), and the first spacer layer (SP3-1) of the third spacer (SP3), the second spacer layer (SP1-2) of the first spacer (SP1), the second spacer layer (SP2-2) of the second spacer (SP2), and the second spacer layer (SP3-2) of the third spacer (SP3) all have a positive taper shape, and the upper end of the first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), and the first spacer layer (SP3-1) of the third spacer (SP3) is the second spacer layer (SP1-2) of the first spacer (SP1), An undercut structure can be formed inwardly by being positioned inwardly from the end of the lower surface of the second spacer layer (SP2-2) of the second spacer (SP2) and the second spacer layer (SP3-2) of the third spacer (SP3).However, not limited thereto, the thickness of the first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), and the first spacer layer (SP3-1) of the third spacer (SP3) is formed to be thinner than the thickness of the second spacer layer (SP1-2) of the first spacer (SP1), the second spacer layer (SP2-2) of the second spacer (SP2), and the second spacer layer (SP3-2) of the third spacer (SP3), wherein the first spacer layer (SP1-1) of the first spacer (SP1), the first spacer layer (SP2-1) of the second spacer (SP2), the first spacer layer (SP3-1) of the third spacer (SP3), the second spacer layer (SP1-2) of the first spacer (SP1), and the second The second spacer layer (SP2-2) of the spacer (SP2) and the second spacer layer (SP3-2) of the third spacer (SP3) can have various shapes, such as an inverted tapered shape.

[0104] As a plurality of spacers (SP') are formed in an undercut structure between the gate driving circuit (GIP) and the dam (DAM), the second electrode (133), which is positioned to overlap with the gate driving circuit (GIP), can be more easily disconnected by the plurality of spacers (SP). Accordingly, the first dummy conductive layer (133-1) is disconnected by the second electrode (133) and the spacers (SP) and is placed on the dam (DAM). Additionally, a plurality of second dummy conductive layers (133-3) are disconnected by the second electrode (133) and the spacers (SP) and are placed on the plurality of spacers (SP'). The first dummy conductive layer (133-1) and the plurality of second dummy conductive layers (133-3) may be made of the same material as the second electrode (133) of the light-emitting element (130) and may be formed by the same process.

[0105] In a display device (200) according to another embodiment of the present invention, the second electrode (133) can be designed to be extended to shield a driving signal that may occur in a gate driving circuit (GIP), etc. That is, in the deposition process of the second electrode (133), the second electrode (133) can be formed using an open mask so that the second electrode (133) can also cover the upper part of the dam of the non-display area (N / A). Accordingly, the second electrode (133) can completely cover the gate driving circuit (GIP). Therefore, in the display device (200) according to another embodiment of the present invention, by the second electrode (133) completely covering the gate driving circuit (GIP), the phenomenon of interference between the driving signal of the gate driving circuit (GIP) and the touch signal can be minimized.

[0106] In addition, in a display device (200) according to another embodiment of the present invention, by arranging a plurality of spacers (SP') between a gate driving circuit (GIP) and a dam (DAM), the second electrode (133) can be disconnected to prevent the intrusion of moisture and oxygen from the outside. Since each of the plurality of spacers (SP') has an inverse taper shape, the second electrode (133) can be disconnected more reliably. Accordingly, in a display device (200) according to another embodiment of the present invention, even if moisture and oxygen flow in along the first dummy conductive layer (133-1) or the plurality of second dummy conductive layers (133-3), the second electrode (133) is disconnected by the plurality of spacers (SP'), so the intrusion of moisture and oxygen into the light-emitting element (130) of the display area (A / A) can be prevented.

[0107] A display device according to various embodiments of the present invention can be described as follows.

[0108] A display device according to one embodiment of the present invention comprises a substrate including a display area and a non-display area surrounding the display area, a gate driving circuit disposed on the substrate, a light-emitting element disposed on the display area on the substrate and including a cathode electrode, a dam disposed on the substrate outside the gate driving circuit, a first dummy conductive layer disposed to cover the dam and made of the same material as the cathode electrode, and a spacer disposed on the substrate between the gate driving circuit and the dam, wherein the cathode electrode may be disposed to extend from the display area to the non-display area and overlap with the gate driving circuit.

[0109] According to another feature of the present invention, the gate driving circuit of a display area and a non-display area, a sealing portion covering the dam, and a touch sensing portion disposed on the sealing portion are included, the touch sensing portion includes a touch electrode disposed in the display area and a touch routing wire connected to the touch electrode and disposed in the non-display area, and the touch routing wire may overlap with the cathode.

[0110] According to another feature of the present invention, the cathode and the first dummy conductive layer can be separated by a spacer.

[0111] According to another feature of the present invention, the invention further comprises a first insulating layer disposed in a display area and a non-display area on a substrate and a second insulating layer disposed on the first insulating layer, and the spacer comprises a first spacer layer made of the same material as the first insulating layer and a second spacer layer made of the same material as the second insulating layer, and the spacer may have an undercut structure.

[0112] According to another feature of the present invention, the area of ​​the upper surface of the first spacer layer may be smaller than the area of ​​the lower surface of the second spacer layer.

[0113] According to another feature of the present invention, the first insulating layer may be an inorganic insulating layer, and the second insulating layer may be an organic insulating layer.

[0114] According to another feature of the present invention, the side of the spacer may come into contact with the bag portion.

[0115] According to another feature of the present invention, a second dummy conductive layer disposed on a spacer and made of the same material as the cathode electrode may be further included.

[0116] According to another feature of the present invention, the gate driving circuit may be positioned on at least one of the left and right sides of the display area.

[0117] According to another feature of the present invention, a low-potential voltage wiring electrically connected to a cathode is further included, and a spacer may be placed between the gate driving circuit and the low-potential voltage wiring.

[0118] According to another feature of the present invention, the cathode and the low-potential voltage wiring can be electrically connected at least one of the upper and lower sides of the display area.

[0119] Although embodiments of the present invention have been described in more detail with reference to the attached drawings, the present invention is not necessarily limited to these embodiments and may be modified in various ways within the scope of the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not to limit, the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. The scope of protection of the present invention shall be interpreted by the claims below, and all technical spirits within the equivalent scope shall be interpreted as being included within the scope of rights of the present invention. Explanation of the symbols

[0120] 100, 200: Display device GIP: Gate driving circuit VSS: Low voltage wiring A / A: Display area N / A: Non-display area PAD: Pad DAM: Dam DAM1: 1st Dam DAM1-1: 1st layer of the 1st dam DAM1-2: The second layer of the first dam DAM2: The Second Dam DAM2-1: 1st layer of the 2nd Dam DAM2-2: The second layer of the second dam SP, SP': Spacer SP1: 1st Spacer SP2: Second Spacer SP-1, SP1-1, SP2-1, SP3-2: First spacer layer SP-2, SP1-2, SP2-2, SP3-2: Second spacer layer 110: Substrate 111: Buffer layer 112: Gate insulation layer 113: First interlayer insulation layer 114: Second interlayer insulation layer 115: First leveling layer 116: Second leveling layer 117: Bank 120: Thin-film transistor 121: Active layer 122: Source electrode 123: Drain electrode 124: Gate electrode 130: Light-emitting element 131: First electrode 132: Luminous structure 133: Second electrode 133-1: 1st Dummy Challenge Layer 133-2: Second dummy challenge layer 133-3: Multiple second pile conductive layers 140: Bag section 141: 1st plain bag layer 142: Organic bag layer 143: Second weapon bag layer 150: Touch detection unit 151: First touch electrode 152: Second touch electrode 153: Connecting electrode 154: Touch insulation layer 155: Touch Routing Wiring 160: Challenge Floor 190: Connecting electrode

Claims

Claim 1 A display device comprising: a substrate including a display area and a non-display area surrounding the display area; a first insulating layer disposed on the substrate in the display area and the non-display area; a second insulating layer disposed on the first insulating layer; a gate driving circuit disposed on the substrate in the non-display area; a light-emitting element disposed on the substrate in the display area and including a cathode electrode; a dam disposed on the substrate outside the substrate from the gate driving circuit; a first dummy conductive layer disposed to cover the dam and made of the same material as the cathode electrode; and a spacer disposed on the substrate between the gate driving circuit and the dam, wherein the spacer comprises a first spacer layer made of the same material as the first insulating layer and a second spacer layer made of the same material as the second insulating layer, wherein the spacer has an undercut structure, and the cathode electrode extends from the display area to the non-display area and is disposed to overlap with the gate driving circuit. Claim 2 A display device according to claim 1, comprising: a sealing portion covering the gate driving circuit and the dam of the display area and the non-display area; and a touch sensing portion disposed on the sealing portion, wherein the touch sensing portion comprises a touch electrode disposed in the display area and a touch routing wire connected to the touch electrode and disposed in the non-display area, and wherein the touch routing wire overlaps with the cathode. Claim 3 A display device according to claim 1, wherein the cathode and the first dummy conductive layer are separated by the spacer. Claim 4 delete Claim 5 A display device according to claim 1, wherein the upper surface area of ​​the first spacer layer is smaller than the lower surface area of ​​the second spacer layer. Claim 6 A display device according to claim 1, wherein the first insulating layer is an inorganic insulating layer and the second insulating layer is an organic insulating layer. Claim 7 In claim 1, a display device wherein the side of the spacer contacts the bag portion. Claim 8 A display device according to claim 1, further comprising a second dummy conductive layer disposed on the spacer and made of the same material as the cathode electrode. Claim 9 A display device according to claim 1, wherein the gate driving circuit is disposed on at least one side of the left and right sides of the display area. Claim 10 A display device according to claim 1, further comprising a low-potential voltage wiring electrically connected to the cathode, wherein the spacer is disposed between the gate driving circuit and the low-potential voltage wiring. Claim 11 A display device in which, in claim 10, the cathode and the low-potential voltage wiring are electrically connected at least one of the upper and lower sides of the display area.

Citation Information

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