Different pixel refresh characteristics at different refresh rates

Abstract

Generally, the subject matter described in this disclosure may be embodied in methods, systems, and program products for operating a display device. By turning off the emission of an LED; programming a driving transistor that drives the LED; and by programming the driving transistor and turning on the emission of the LED after a first time delay, a pixel of the display device is refreshed while the display device is operating at a first refresh rate. By turning off the emission of an LED; programming the driving transistor that drives the LED; and by programming the driving transistor and turning on the emission of the LED after a second time delay, a pixel of the display device is refreshed while the display device is operating at a second refresh rate.

Description

Technology Field

[0001] This document generally relates to display devices. Background Technology

[0002] Electronic devices may include display devices in which visual images are displayed. The electronic device can provide new image data to the display panel and change the refresh rate provided by the display panel. A higher refresh rate can provide a smoother presentation of content to the user, at the cost of additional power consumption compared to a lower refresh rate.

[0003] This document describes techniques, methods, systems, and other mechanisms for providing display devices in which refresh characteristics for pixels differ at different refresh rates.

[0004] As a further description of the embodiments described below, the present disclosure describes the following embodiments.

[0005] Example 1 is a method for operating a display device, comprising the step of refreshing a pixel of a display device while the display device is operating at a first refresh rate, wherein the emission of an LED of a pixel is kept on for a first time interval and the emission of the LED is turned off; while the emission of the LED is kept off and the display device is operating at the first refresh rate, a driving transistor that drives the LED is programmed; and, while the display device is operating at the first refresh rate, the driving transistor is programmed and the emission of the LED is turned on after a first time delay, thereby refreshing a pixel of a display device. The present method comprises the step of refreshing a pixel of a display device while the display device is operating at a second refresh rate, wherein the emission of the LED is kept on for a second time interval different from the first time interval and the emission of the LED is turned off; while the emission of the LED is kept off and the display device is operating at the second refresh rate, a driving transistor that drives the LED is programmed; The method includes the step of refreshing a pixel of a display device by programming a driving transistor while the display device is operating at a second refresh rate and turning on the emission of an LED after a second time delay, wherein the second time delay is different from the first time delay.

[0006] Example 2 is a method in Example 1, wherein the first refresh rate is a 60 Hz refresh rate; and the second refresh rate is a 90 Hz refresh rate or a 120 Hz refresh rate.

[0007] Example 3 is a method in which, in either Example 1 or Example 2, the second refresh rate is higher than the first refresh rate so that the second time interval is shorter than the first time interval; and the second time delay is greater than the first time delay.

[0008] Example 4 is a method in Example 3, wherein the step of programming a driving transistor while the display device is operating at a first refresh rate includes the step of providing a first voltage to the gate of the driving transistor; the first voltage provided to the gate of the driving transistor decreases at a first rate during a first time delay after programming an LED while the display device is operating at a first refresh rate; the step of programming a driving transistor while the display device is operating at a second refresh rate includes the step of providing a second voltage to the gate of the driving transistor; and the second voltage provided to the gate of the driving transistor decreases at a second rate during a second time delay after programming an LED while the display device is operating at a second refresh rate, wherein the second rate is a rate greater than the first rate as a result of the second time delay being greater than the first time delay.

[0009] Example 5 is a method in which, in Example 4, the first voltage is equal to the second voltage as a result of the same intensity level being programmed to the pixel during both the step of programming the driving transistor while the display device is operating at a first refresh rate and the step of programming the driving transistor while the display device is operating at a second refresh rate; the LED has a first peak intensity by turning on the emission of the LED after the first voltage is programmed to the gate of the driving transistor while the display device is operating at a first refresh rate; the LED has a second peak intensity when the emission of the LED is turned on after the second voltage is programmed to the gate of the driving transistor while the display device is operating at a second refresh rate; and the first peak intensity of the LED is greater than the second peak intensity of the LED.

[0010] Example 6 is a method in Example 4 in which the emission of the LED is turned on simultaneously with the termination of programming of the driving transistor while the display device is operating at a first refresh rate, so that the first time delay becomes zero.

[0011] Example 7 is in any one of Examples 1 to 6,

[0012] While the display device is operating at a first refresh rate, the step of programming the driving transistor includes the step of applying a first voltage to the gate of the driving transistor during a programming time interval; and

[0013] The method comprises the step of programming a driving transistor while the display device is operating at a second refresh rate, wherein the step of applying a second voltage to the upper gate of the driving transistor during the same programming time interval.

[0014] Example 8 is a method in any one of Examples 1 to 7, wherein the step of refreshing a pixel of a display device while the display device is operating at a first refresh rate comprises: (i) the preceding emission of an LED preceding immediately before refreshing the pixel at the first refresh rate is kept on for a first time interval; and (ii) the subsequent emission of an LED following immediately after refreshing the pixel at the first refresh rate is kept on for a first time interval; and the step of refreshing a pixel of a display device while the display device is operating at a second refresh rate comprises: (i) the preceding emission of an LED preceding immediately before refreshing the pixel at the second refresh rate is kept on for a second time interval; and (ii) the subsequent emission of an LED following immediately after refreshing the pixel at the second refresh rate is kept on for a second time interval.

[0015] Example 9 is a method in any one of Examples 1 to 8, wherein, while the display device is operating at a first refresh rate, the step of refreshing a pixel of the display device includes the emission of an LED being off during a refresh time interval; and while the display device is operating at a second refresh rate, the step of refreshing a pixel of the display device includes the emission of an LED being off during the same refresh time interval.

[0016] Example 10 is a method in Example 9, wherein the second time delay is greater than the first time delay; and the programming of the driving transistor occurs at a first location within the refresh time interval while the display device is operating at a first refresh rate; the programming of the driving transistor occurs at a second location within the refresh time interval while the display device is operating at a second refresh rate; and the first location is located later than the second location within the refresh time interval.

[0017] Example 11 is a method in any one of Examples 1 to 10, wherein, while the display device is operating at a first refresh rate, the step of refreshing a pixel of the display device comprises keeping the emission of the pixel off during a first refresh time interval; and while the display device is operating at a second refresh rate, the step of refreshing a pixel of the display device comprises keeping the emission of the pixel off during a second refresh time interval that is greater than the first refresh time interval.

[0018] Example 12 is a method in Example 11, wherein the second time delay is greater than the first time delay; programming of the driving transistor starts a waiting period after the emission of a pixel while the display device is operating at a first refresh rate; and programming of the driving transistor occurs during the same above-mentioned waiting period after the emission of a pixel is turned off while the display device is operating at a second refresh rate.

[0019] Example 13 is a method in any one of Examples 1 to 10, wherein the step of programming a driving transistor while the display device is operating at a first refresh rate includes the step of programming the driving transistor during a programming time interval; and the step of programming a driving transistor while the display device is operating at a second refresh rate includes the step of programming the driving transistor during the same programming time interval.

[0020] Example 14 is a method in any one of Examples 1 to 13, wherein the first time delay is maintained differently from the second time delay regardless of various levels of ambient light incident on a computing device including a display device.

[0021] Example 15 is a method in any one of Examples 1 to 14, wherein the step of programming the driving transistor while the display device is operating at a first refresh rate is performed after the driving transistor is initialized to an initialization voltage while the display device is operating at a first refresh rate; and the step of programming the driving transistor while the display device is operating at a second refresh rate is performed after the driving transistor is initialized to an initialization voltage while the display device is operating at a second refresh rate.

[0022] Example 16 is a method in any one of Examples 1 to 15, wherein the first time delay represents a time delay after the programming of the transistor is terminated while the display device is operating at a second refresh rate; and the second time delay represents a time delay after the programming of the transistor is terminated while the display device is operating at a second refresh rate.

[0023] Example 17 is a computing device comprising: a display device; and a circuit portion, wherein the circuit portion is accompanied by the display device and interacts with the display device to cause the display device to perform any one of the methods of Examples 1 to 16.

[0024] Example 18 is a method for operating a display panel, comprising the steps of: operating a plurality of pixels of the display panel at a first refresh rate; providing a signal to a driving transistor of a pixel while the display is operating at the first refresh rate and turning on at least one pixel among the plurality of pixels after a first time delay; switching the operation of the plurality of pixels to a second refresh rate — the second refresh rate is higher than the first refresh rate —; and providing a signal to a driving transistor of a pixel while the display is operating at the second refresh rate and turning on the pixel after a second time delay, wherein the second time delay is longer than the first time delay.

[0025] Details regarding one or more embodiments are described in the accompanying drawings and the description below. Other features, purposes, and advantages will become apparent from the description and drawings, and from the claims. Brief explanation of the drawing

[0026] Figure 1 illustrates a diagram of an exemplary display system of an electronic device. Figures 2a-b illustrate a diagram of a pixel circuit of a display device and a corresponding timing diagram. Figures 3a-b illustrate the luminance of pixels over a single frame time for different refresh rates. Figure 4a illustrates how pixel transistors can be optically shielded. Figure 4b illustrates a luminance graph and a corresponding timing diagram. Figure 5a shows a luminance graph for indoor and outdoor operation. FIG. 5b illustrates charts illustrating brightness at different refresh rates and environment settings. Figures 6a-c illustrate timing diagrams that result in different time delays at different refresh rates. FIGS. 7a-b illustrates a flowchart of a process for operating a display device with different pixel refresh characteristics at different refresh rates. Figure 8a illustrates a luminance graph and a corresponding timing diagram. Figure 8b illustrates a lookup table used in conjunction with the timing diagram of Figure 8a. FIG. 9 illustrates a block diagram of computing devices that can be used to implement the systems and methods described in this document, as a client, a server, or any one of a plurality of servers. The same reference symbols in various drawings represent the same elements. Specific details for implementing the invention

[0027] This document generally describes mechanisms for providing display devices in which refresh characteristics for pixels differ at different refresh rates. For example, at different refresh rates, intensity values ​​programmed into pixels may be allowed to decay over different time intervals.

[0028] Display devices can be configured to operate at different refresh rates (e.g., 60 Hz and 120 Hz). Animated content can be presented with greater fluidity at higher refresh rates, while energy consumption can be lower at lower refresh rates. It is typical for display devices to operate at higher refresh rates when presenting animated content (e.g., animations or videos) and at lower refresh rates when presenting static content (e.g., static user interfaces or photos).

[0029] The luminance of pixels within a display device may attenuate during the emission period of a single frame (e.g., 1 / 60 second, 1 / 120 second). Since a lower refresh rate is correlated with a longer emission time and consequently a longer amount of time at the attenuated intensity, the average luminance for a given intensity setting may be greater for a higher refresh rate than for a lower refresh rate. The user may detect these different intensities as a step change in the intensity of the display device (e.g., flicker) that occurs when the display device changes from one refresh rate to another.

[0030] To compensate for these differences, display devices may be tuned or calibrated to output different initial luminances for different refresh rates for given programmed pixel values. As a simple example, when a display device is operating at its highest refresh rate (e.g., shortest frame time), the programmed pixel value of each pixel may be reduced by 5% for operation at the lowest refresh rate.

[0031] The problem is that the amount of luminance attenuation occurring during each frame can increase in the presence of strong ambient light. Photons from strong ambient light can interact with semiconductor components within the display device, which can cause current leakage and increased luminance attenuation. As such, luminance tuning or calibration may not accurately compensate for the difference in luminance between refresh rates when the display device is under strong ambient light. This means that an individual using their computing device outdoors on a sunny day may occasionally see "flicker" as the device changes its refresh rate.

[0032] A mechanism for mitigating the influence of ambient light on the intensity of a device having a variable refresh rate may include (1) varying the amount of time delay for different refresh rates between pixels programmed with new image data and (2) pixels turned on to emit image data. During this delay between the programmed pixels and the turned-on pixels (while the pixels are turned off), the intensity level programmed for each pixel is attenuated.

[0033] Allowing the luminance values ​​programmed into pixels to attenuate for a specific time interval before turning on those pixels can result in a reduction in the initial luminance output by the pixels of a display device. Furthermore, since attenuation is logarithmic, the most significant change in luminance between pixel emission in a low ambient light environment and pixel emission in a high ambient light environment occurs at the onset of attenuation. Accordingly, implementing different time delays between programming and emission at different refresh rates can mitigate the appearance of variable refresh rate "flicker" caused by strong ambient light incident on the display device.

[0034] The following discussion regarding the drawings provides additional details regarding these mechanisms for reducing variable refresh rate flicker. The discussion regarding Figures 1 and 2a-b provides an overview of the operation of the display device and its internal components, and Figures 3a-8b explain how these components can operate to mitigate variable refresh rate flicker in the presence of strong ambient light.

[0035] FIG. 1 is a diagram of an exemplary display system (100) of a computing device (190). The display system (100) is an OLED display system comprising an array (112) of light-emitting pixels. Each light-emitting pixel comprises an OLED. The OLED display is driven by drivers comprising SCAN / EM drivers (108) and data drivers (110). The SCAN / EM drivers (108) may be integrated, i.e., stacked row line drivers. Generally, the SCAN / EM drivers (108) select a row of pixels in the display, and the data drivers (110) provide data signals (e.g., voltage data (VDATA)) to the pixels in the selected row to illuminate the OLEDs in the selected row according to image data specified by voltage data. Signal lines such as scan lines, EM (emission) lines, and data lines may be used to control the pixels to display images on the display. FIG. 1 illustrates a display system (100) having SCAN / EM drivers (108) on a single side of the display, but the SCAN / EM drivers (108) may be placed on both the left and right sides of the display to improve driving performance (e.g., speed).

[0036] A pixel array (112) comprises a plurality of light-emitting pixels, for example, pixels (P11 to P43). A pixel is a small element of a display capable of changing color based on image data supplied to the pixel. Each pixel comprises an OLED and a circuitry for addressing and driving the OLED (for example, components shown in FIG. 2a). Each pixel within the pixel array (112) may be individually addressed to generate various color intensities. Each pixel maintains a mostly stable luminance throughout the frame time to display light corresponding to the supplied image data. Frame time, or frame duration, is a amount of time between the start of a frame and the start of the next frame. Frame time may be the inverse of the frame rate of the display system. For example, a frame rate of 60 fps (frames per second) corresponds to a frame time of 1 / 60th of a second, or 0.0167 seconds.

[0037] A pixel array (112) extends in a plane and includes rows and columns. Each row extends horizontally across the pixel array (112). For example, the first row (120) of the pixel array (112) includes pixels (P11, P12, and P13). Each column extends vertically downward across the pixel array (112). For example, the first column (130) of the pixel array (112) includes pixels (P11, P21, P31, and P41). In FIG. 1, only a few pixels are shown for simplification. In reality, the pixel array (112) may contain thousands or millions of pixels. Increasing the number of pixels within a display that maintains the same size results in higher image resolution.

[0038] A display system (100) includes a display driver integration circuit (DDIC) (106) that receives display input data (102). The DDIC (106) may be, for example, a semiconductor integrated circuit or a state machine. The DDIC (106) generates signals having appropriate voltage, current, timing, and demultiplexing to cause the display (104) to show images according to the display input data (102). In some examples, the DDIC may be a microcontroller and may integrate RAM, flash memory, EEPROM, ROM, etc.

[0039] The DDIC (106) includes a timing controller (134), a clock signal generator (136), and a data signal generator (138). The DDIC (106) generates a clock signal (142). The clock signal (142) may be a signal that controls, for example, the display frame start time and the display frame stop time of each frame presented by the display panel (104), where a frame represents a single image in a sequence of images presented by the display panel (104). In examples where each frame presented by the display panel includes multiple emission cycles, the clock signal (142) or another signal not illustrated in FIG. 1 may control the display emission start time and the display emission stop time of each emission cycle of the display panel (104). In some examples, SCAN / EM drivers (108), data drivers (110), or both may be integrated with the DDIC (106).

[0040] SCAN / EM drivers supply SCAN and EM signals to rows of a pixel array (112). For example, SCAN / EM drivers (108) supply scan signals to rows of pixels through scan lines (S1 to S4) and EM signals through EM lines (E1 to E4).

[0041] Data drivers (110) supply signals to columns of a pixel array (112). For example, based on an image data signal (144) from a DDIC (106), data drivers (110) supply data to columns of pixels through data lines (D1 to D3), and the data is provided in a single row at a time based on which row is currently selected by scan / EM signals. For example, data drivers (110) specify a data voltage for each pixel within the currently selected row using the image data signal (144). Data drivers (110) apply the selected data voltages through data lines (D1-D3).

[0042] A clock signal (142) can be used to drive the SCAN / EM drivers (108) and data drivers (110). Accordingly, the DDIC (106) controls the timing of the scan signals, EM signals, and data signals.

[0043] The display system (100) includes a power supply unit (150). The power supply unit (150) provides a first supply voltage (ELVDD) and a second supply voltage (ELVSS), both of which are applied to each pixel in the pixel array (112). In some examples, the power supply unit (150) may be integrated with a DDIC (106).

[0044] Each pixel in the pixel array (112) is addressable by a horizontal scan line, a horizontal EM line, and a vertical data line. For example, pixel (P11) is addressable by a scan line (S1), an EM line (E1), and a data line (D1). In another example, pixel (P32) is addressable by a scan line (S3), an EM line (E3), and a data line (D2).

[0045] SCAN / EM drivers (108) and data drivers (110) provide signals to pixels that enable the pixels to generate an image on a display. SCAN / EM drivers (108) and data drivers (110) provide signals to pixels through scan lines, emission lines, and data lines. To provide signals to pixels, SCAN / EM drivers (108) select a scan line and control the emission operation of the pixels. Data drivers (110) provide data signals to pixels addressable by a selected scan line to illuminate selected OLEDs with intensities specified by image data.

[0046] Scan lines are addressed sequentially for each frame. The scan direction determines the order in which scan lines are addressed. In the display system (100), the scan direction is from the top of the pixel array (112) to the bottom of the pixel array (112). For example, scan line (S1) is addressed first, then scan line (S2), then S3, etc.

[0047] FIG. 1 illustrates that each row is addressed by a single scan line and a single emission line, but each row may also be addressed by multiple scan lines (e.g., nSCAN and pSCAN). FIG. 1 illustrates exemplary components of an OLED display, but the techniques described may be applied to other flat panel display technologies that include arrays of pixels. For example, this technique may be applied to LED (light emitting diode), LCD (liquid crystal display), and PDP (plasma display panel).

[0048] FIG. 2a illustrates a diagram of a pixel circuit of a display device, wherein the pixel circuit includes an LED and a corresponding driving circuit for the pixel circuit. For example, FIG. 2a may illustrate a more detailed view of a single pixel from an array of pixels illustrated in FIG. 1. The present disclosure sometimes refers to the components illustrated in FIG. 2a as "pixel circuits," but the present disclosure may also refer to these components simply as "pixels." Additionally, the pixel illustrated in FIG. 2a may represent a subpixel.

[0049] The pixel circuit may be an AMOLED (active matrix OLED) pixel circuit. The pixel circuit receives emission signals EM, SCAN signals, and a data voltage VDATA signal. The pixel circuit (200) receives a first supply voltage (ELVDD), a second supply voltage (ELVSS), and an initial reference voltage (VINIT).

[0050] The pixel circuit includes an OLED (organic light-emitting diode). The OLED includes a layer of organic compound that emits light in response to an electric current (IOLED). The organic layer is located between two electrodes, namely the anode and the cathode. The OLED is driven by a driving transistor (T1), which acts as a current source to drive the OLED to receive a supply voltage (ELVDD) and emit light.

[0051] The pixel also includes a storage capacitor (C-ST) and transistors (T2 to T7). The operation of the pixel is defined by the states of control signals (SCAN, EM, and VDATA). The OLED current (IOLED) is set by the voltage present at the gate terminal of the driving transistor (T1) (referred to as the "G" node). For example, the driving transistor (T1) has a threshold voltage (VTH) between the gate terminal of the driving transistor (T1) and the source terminal of the driving transistor (T1), and a voltage between the gate terminal and the source terminal exceeding the threshold voltage (VTH) causes the driving transistor (T1) to create a conduction path from the source terminal to the drain terminal.

[0052] FIG. 2b illustrates a timing diagram of control signals for a pixel illustrated in FIG. 2a. These control signals repeatedly switch between an initialization stage, a programming stage, and an emission stage during the operation of the display device (100).

[0053] At the end of the emission stage, the EM signal is switched to an off state (e.g., by changing from a low state to a high state). This transition turns off the transistors (T5 and T6), which interrupts the current supplied from the ELVDD to the OLED, thereby stopping light emission by the OLED.

[0054] During the initialization phase, the SCAN[n-1] signal is turned on (e.g., by changing from a high state to a low state), which turns on the transistor (T4) for a certain period of time and initializes the G node to the initialization voltage (VINIT). The SCAN[n-1] signal may be the SCAN[n] signal provided in the preceding row by the state machine of the SCAN / EM driver (108).

[0055] During the programming stage, the SCAN[n] signal is turned on (e.g., by going low), which turns on the transistors (T2, T3, and T7) for a certain period of time. This causes the voltage value on the voltage data (VDATA) line to be transmitted to the G node through the transistors (T2, T1, and T3), thereby setting the G node to a value based on the VDATA line (e.g., the voltage at VDATA minus the effect of the transistor threshold voltage).

[0056] During the emission stage, the EM signal is switched to the ON state (e.g., by going low), which turns on the transistors (T5 and T6). Current flows from ELVDD through the transistors (T5, T1, and T6) to the anode of the OLED, and the current level is determined by the voltage present at the G node. Accordingly, after the pixel switches to the emission stage of the frame, the level of current (IOLED) flowing through the OLED is based on the voltage set at the G node of the driving transistor (e.g., with the G node voltage level programmed by the voltage data (VDATA) line). The intensity or brightness of light emitted by the OLED is directly correlated with the amount of electric current (IOLED) applied to the OLED, and a higher current corresponds to a greater light intensity than a lower current. The storage capacitor (C-ST) maintains the voltage at the G node, so that the OLED continues to emit light at approximately the same level throughout the duration of the emission stage.

[0057] The voltage at the G node may decrease slightly during the emission stage. As such, the current applied to the OLED (IOLED) and the intensity of the light emitted by the OLED may decrease slightly during the emission stage.

[0058] FIGS. 3a-b illustrate the luminance of pixels over a single frame time for different refresh rates. As previously mentioned, displays of computing devices sometimes support multiple refresh rates. For example, high refresh rates (e.g., 120 Hz, 90 Hz) can be used for moving images to provide high display performance, while low refresh rates (e.g., 60 Hz or lower) can be used for still images or slow-moving images. In this way, computing devices can optimize the refresh rate for the presented content, providing both a high-quality user experience and good battery life.

[0059] The luminance provided by the pixels of the display devices may attenuate during the emission of each frame time. Due to this non-ideal (non-flat) luminance response of the displays over the frame time, there may be a luminance delta between refresh rates. This delta is illustrated in FIG. 3a, which illustrates a luminance graph (300) illustrating the luminance of a pixel programmed to a specific intensity value (e.g., full intensity) over the emission period of a single frame time.

[0060] In the graph (300), the first pixel luminance (310) occurring during a 120 Hz refresh rate results in a first average luminance intensity (312) over a 120 Hz frame time, while the second pixel luminance (320) occurring during a 60 Hz refresh rate results in a second average luminance intensity (322) over a 60 Hz frame time. The second average luminance intensity (322) is lower than the first average luminance intensity (312). This difference in average luminance intensity appears as a refresh rate switching flicker (also called variable refresh rate flicker or VRR flicker) when the system switches from one refresh rate to another.

[0061] Display devices are typically tuned or calibrated so that pixels output different initial luminance levels at different refresh rates for the same given image data in order to mitigate VRR flicker. FIG. 3b illustrates a luminance graph (350) in which the first pixel luminance (360) occurring during a 120 Hz refresh rate and the second pixel luminance (370) occurring during a 60 Hz refresh rate are both tuned or calibrated so that, even when presenting the same image data, the first pixel luminance (360) occurring during a 120 Hz refresh rate starts its emission at a lower intensity value than the second pixel luminance (370) occurring during a 60 Hz refresh rate during the frame.

[0062] This can make the first average luminance intensity (362) at a 120 Hz refresh rate correspond to (e.g., likewise) the second average luminance intensity (372) at a 60 Hz refresh rate. For example, if the pixel to be output by the display device is to be continuously output at exactly the same intensity level (e.g., 52% intensity), the refresh rate calibration can cause the display device circuit to lower the value programmed into the pixel when the display device operates at 120 Hz in order to mitigate VRR flicker. In other words, refresh rate specific amplitude control may be employed to mitigate VRR flicker.

[0063] Transistors in pixels that control individual pixel emission current / luminance (e.g., T1 and / or other transistors in FIG. 2a) may be photosensitive. For example, upon incidence of strong light, off-state leakage current may increase. As illustrated in FIG. 4a, pixel transistors may be optically shielded from strong light shining from the front of the display (e.g., photons (400) are blocked by component (402)). However, optical shielding may not provide adequate protection at all angles (e.g., as illustrated by photons (406) bypassing any optical shielding), and there may also be back-reflected light (e.g., as illustrated by photons (404)). Thus, pixel emission current (IOLED) may decrease when the display is exposed to strong ambient light.

[0064] FIG. 4b illustrates a luminance graph (420) and a corresponding timing diagram (450). The luminance graph (420) illustrates how much greater the initial intensity for the first luminance profile (422) is than the initial intensity for the second luminance profile (424) is than the initial intensity is compared to the initial intensity for the second luminance profile (424) is compared to the initial intensity for the second luminance profile (424) is due to tuning or calibration applied by the computing device to produce the same average intensity for both luminance profiles (422 and 426).

[0065] The luminance graph (420) also illustrates how much greater the initial intensity for the third luminance profile (426) is than the initial intensity for the fourth luminance profile (428) is than the initial intensity at the 90 Hz refresh rate and under outdoor light conditions. The luminance profiles for outdoor light conditions decay at a faster rate than those for indoor light conditions. As previously mentioned, this faster decay results in different average intensity levels when the display device is in outdoor light conditions. For example, tuning or calibration may have been developed for indoor light conditions, and VRR flicker during outdoor light conditions (or other types of light conditions different from the conditions for which tuning or calibration was developed) may not be completely mitigated.

[0066] The timing diagram (450) in FIG. 4b is similar to the timing diagram in FIG. 2b, the main difference being that the timing diagram (450) illustrates a Vsync signal that can switch to a different state for each frame to synchronize various signals. For example, an EM signal may occur during a specified period before or after the switching of the Vsync signal to trigger off the Vsync signal. Similarly, a SCAN signal may also trigger off the Vsync signal.

[0067] The timing diagram (450) displays Δt_60[n], which represents the time delay between the programming of a pixel and the start of the emission period for that pixel when the display device is operating at a refresh rate of 60 Hz. Specifically, the Δt_60[n] period may start when the programming of the pixel is completed or terminated (as specified by the end of the SCAN[n] pulse), and the Δt_60[n] period may end when the emission period starts (as specified by the start of the EM[n] pulse, which is performed as a falling transition in FIG. 4b). The timing diagram (450) also displays Δt_90[n], which represents the time delay between the programming of a pixel and the start of the emission period for that pixel when the display device is operating at a refresh rate of 90 Hz. In this example, for instance, since the SCAN[n] signal pulses at the same location within the "off" portion of the EM signal during both 60 Hz and 90 Hz refresh rates, Δt_60[n] and Δt_90[n] are identical. In other words, the time gap between the Vsync signal and the SCAN signal is the same for both high and low refresh rates.

[0068] The luminance attenuation during pixel emission is at least partially the result of leakage current in transistor (T3) (see FIG. 2b) after VDATA is programmed into the pixel (e.g., after T3 is turned off). As such, regardless of whether the pixel is emitting light, the G electrode voltage begins to attenuate when the VDATA programming period ends (e.g., when the VSYNC pulse ends).

[0069] Accordingly, the initial luminance value for a pixel can be lowered by introducing a time delay between (1) the termination of VDATA in the pixel being programmed and (2) the pixel emission being turned on. When this time delay is greater for a high refresh rate (e.g., 90 Hz) than for a low refresh rate (e.g., 60 Hz), the luminance delta between the high refresh rate and the low refresh rate under strong ambient light is mitigated. In other words, a display device configured to introduce these different time delays at different refresh rates and tuned or calibrated to mitigate VRR flicker under indoor lighting conditions can provide mild or imperceptible VRR flicker under outdoor lighting conditions.

[0070] The use of different time delays is illustrated in FIG. 5a as different delay periods (Δt_60[n] and Δt_90[n]). Due to the larger time delay at 90 Hz, the initial luminance value at 90 Hz differs between indoor and outdoor lighting conditions. The result of introducing this larger time delay is that the average luminance at a 90 Hz refresh rate under outdoor conditions matches the average luminance at a 60 Hz refresh rate under outdoor conditions more closely than when the time delays at different refresh rates were the same.

[0071] A 90 Hz time delay (Δt_90[n]) can be implemented independently of the detection of ambient light levels by the computing device. In other words, the 90 Hz time (Δt_90[n]) can be implemented for all 90 Hz refresh rates. If the computing device detects ambient light levels, that information may not be used to select when to implement the 90 Hz time delay (Δt_90[n]). In some examples, the 60 Hz time delay (Δt_60[n]) is negligible or equal to zero, so that the emission period begins simultaneously with (or even before) the end of the SCAN programming period.

[0072] FIG. 5b includes a first set of graphs (560) illustrating how a display device having the same refresh characteristics at different refresh rates has a 29 nit difference in luminance between different refresh rates during outdoor operation. FIG. 5b includes a second set of graphs (580) illustrating how the same display device having modified operation as described above to have different refresh characteristics (e.g., different Δt_60[n] and Δt_90[n]) at different refresh rates has an 11 nit difference in luminance between different refresh rates during outdoor operation. A smaller nit difference in luminance with the modified operation results in less detectable flicker under strong ambient light conditions.

[0073] FIG. 6a illustrates a timing diagram for a pixel or row of a display device when the display device is operating at a refresh rate of 60 Hz. In this figure, Δt_60[n] represents the time delay between the end of data programming for the pixel or row and the start of the emission period.

[0074] FIG. 6c illustrates a timing diagram for the same pixel or row of a display device when the display device is operating at a refresh rate of 90 Hz. In this figure, Δt_90[n] represents the time delay between the end of data programming and the start of the emission period. The luminous intensity exemplified in FIG. 5a can be achieved by operating with the timing schemes illustrated for 60 Hz and 90 Hz in FIG. 6a and FIG. 6c, respectively. Different refresh rates may be used.

[0075] As exemplified by FIGS. 6a and 6c, the timing delay at 90 Hz is greater than the timing delay at 60 Hz, which results in the voltage programmed to the G node being attenuated more at 90 Hz than at 60 Hz before emission begins. The use of these two different timing schemes is achieved with the same refresh period (e.g., the same period during which emission of a pixel or a row of pixels is turned off), but the 90 Hz SCAN programming pulse occurs earlier in the 90 Hz refresh period than in the 60 Hz refresh period.

[0076] Alternatively, the display device may use the timing schemes of FIG. 6b and FIG. 6c together with refresh rates of 60 Hz and 90 Hz, respectively. With this combination of timing schemes, the 90 Hz time delay (Δt_90[n]) is still greater than the 60 Hz time delay (Δt_60[n]), but the refresh periods have different lengths. In this example, the SCAN programming pulse during both the 60 Hz refresh period and the 90 Hz refresh period starts after the respective refresh periods begin and after the same time length, but the 60 Hz refresh period is shorter than the 90 Hz refresh period.

[0077] FIGS. 7a-b illustrates a flowchart of a process for operating a display device with different pixel refresh characteristics at different refresh rates. This process may be implemented by a display device or a computing device including a display device to achieve, for example, the luminance output exemplified by FIG. 5a and the table set (580) in FIG. 5b.

[0078] In the box (700), the display device operates at a first refresh rate. For example, the display device described in relation to FIGS. 1 and FIGS. 2a-b operates at a refresh rate of 60 Hz and can repeatedly present frames including an initialization period, a program period, and an emission period, respectively (as shown in FIGS. 2b, FIGS. 6a, and FIGS. 6b).

[0079] In box (710), the emission of the pixel's LED is on during the first time interval. For example, pixel P11 (Fig. 1) may be on during the emission period labeled in Fig. 2b and unlabeled in Figs. 6a-b.

[0080] In box (712), the emission of a pixel is turned on for the same time interval in frames preceding and following the pixel refresh. For example, the emission period may precede the pixel refresh (which includes an initialization period and a programming period) illustrated in FIG. 2b, and the emission period having the same length may follow. The frames may be repeated hundreds of times sequentially with the same emission period as a result of the display device operating continuously at the same refresh rate for an extended time interval. Similar operations are illustrated by the timing diagrams in FIG. 6a-b.

[0081] In box (720), the emission of the pixel's LED is turned off. For example, it is turned "off" by switching the EM signal (see FIG. 2b) from low to high. This signal switching causes the LED to stop emitting light, as described in the description of FIG. 2a-b. Similar operations are illustrated by the timing diagrams in FIG. 6a-b.

[0082] In box (722), the pixel is initialized. For example, as described in relation to FIG. 2a-b, the SCAN[n-1] signal (see FIG. 2b) can initialize various components of the pixel. Similar operations are illustrated by the timing diagrams of FIG. 6a-b.

[0083] In box (724), a value is programmed into the driving transistor that drives the LED. For example, as described in relation to FIG. 2a-b, a DATA signal (Fig. 2b) can be transmitted to the G node of the T1 transistor via the VDATA line (Fig. 2a). Similar operations are illustrated by the timing diagrams in FIG. 6a-b.

[0084] In box (730), as described in relation to FIGS. 2a-b, programming of the driving transistor is terminated and the emission of the LED is turned on after a first time delay. Different examples of such time delays are illustrated by Δt_60[n] in FIGS. 6a-b.

[0085] In box (732), the voltage programmed into the driving transistor decreases at a first rate over a first time delay. For example, the luminance graph in FIG. 5a shows that the indoor and outdoor luminance lines decrease slightly over the time interval Δt_60[n] (note that although the indoor and outdoor luminance lines in FIG. 5a are within Δt_60[n], pixel emission is off during this time interval).

[0086] In box (734), the emission of the LED is turned on as programming ends so that the first delay becomes 0. For example, the time interval Δt_60[n] in FIG. 6a-b may be 0, and accordingly, the scan down transition occurs simultaneously with the EM down transition.

[0087] In the box (740), a decision is made regarding whether to switch to different refresh rates. For example, if fast-moving video content is presented, the computing device or the display device located therein may decide to switch to a higher refresh rate. If the display device does not switch between refresh rates, the operations of the box (700) are performed again. If the display device switches between different refresh rates, the operations of the box (760) are performed.

[0088] In the box (750), the display device operates at a second refresh rate different from the first refresh rate. For example, the display device described in relation to FIGS. 1 and FIGS. 2a-b may operate at a refresh rate of 90 Hz or 120 Hz to repeatedly present frames including an initialization period, a program period, and an emission period, respectively (as shown in FIGS. 2b and FIGS. 6c).

[0089] In box (760), the emission of the pixel's LED is on during the first time interval. For example, pixel P11 (Fig. 1) may be on during the emission period labeled in Fig. 2b and unlabeled in Fig. 6c.

[0090] In box (762), the second refresh rate is higher than the first refresh rate. For example, a second refresh rate of 90 Hz or 120 Hz may be higher than a first refresh rate of 60 Hz.

[0091] In box (770), the emission of the pixel's LED is turned off. For example, it is turned "off" by switching the EM signal (see FIG. 2b) from low to high. This signal switching causes the LED to stop emitting light, as described in the description of FIG. 2a-b. Similar operations are illustrated by the timing diagram in FIG. 6c.

[0092] In box (772), the pixel is initialized. For example, as described in relation to FIGS. 2a-b, the SCAN[n-1] signal (see FIG. 2b) can initialize various components of the pixel. Similar operations are illustrated by the timing diagram in FIG. 6c.

[0093] In box (724), a value is programmed into the driving transistor that drives the LED. For example, as described in relation to FIG. 2a-b, a DATA signal (Fig. 2b) can be transmitted to the G node of the T1 transistor via the VDATA line (Fig. 2a). Similar operations are illustrated by the timing diagram in FIG. 6c.

[0094] In box (780), as described in relation to FIGS. 2a-b, the programming of the driving transistor is terminated and the emission of the LED is turned on after a second time delay. An example of such a time delay is illustrated by Δt_90[n] in FIG. 6c.

[0095] In box (782), the voltage programmed into the driving transistor decreases at a second rate over a second time delay, and the second rate is greater than the first rate. For example, the luminance graph in FIG. 5a shows that the indoor and outdoor luminance lines decrease over the time interval Δt_90[n] with a greater rate of decrease than the decrease over the time interval Δt_60[n] (note that although the indoor and outdoor luminance lines in FIG. 5a are within Δt_90[n], pixel emission is off during this time interval).

[0096] In box (784), for the same original display pixel value (e.g., an intensity programmed to 100% in image data prior to any display or refresh rate-specific tuning or calibration), the peak intensity of the LED emission during the second refresh rate is lower than that during the first refresh rate. For example, FIG. 5a illustrates how much higher the initial intensity of the LED at 90 Hz is than the initial intensity of the LED at 60 Hz.

[0097] In the box (790), a decision is made regarding whether to switch to different refresh rates. For example, when fast-moving video content ends and a still image is presented, the computing device or the display device located therein may decide to switch to a lower refresh rate. If the display device does not switch between refresh rates, the operations of the box (750) are performed again. If the display device switches between different refresh rates, the operations of the box (700) are performed.

[0098] In some embodiments, ambient light detected by a light sensor may be used to trigger a change in the characteristics of the refresh period. For example, when the level of ambient light increases, the computing device (e.g., a display device within the computing device) may reduce the emission "on" time to mitigate VRR flicker. FIG. 8a illustrates a luminance graph (810) and a corresponding timing diagram (820). As the detected levels of ambient light increase, the computing device [describes] the emission time (t) at 90 Hz. EM90 ) can be reduced. Since the reduced emission-on time may be relatively small (~0.2 ms out of 11.1 ms for 90 Hz), the impact on OLED lifespan may be negligible.

[0099] Reduced emission on time (t EM90The amount of ) may follow the lookup table of FIG. 8b. The emission "on" time of the low refresh rate (60 Hz) may not change according to changes in the detected ambient light levels. For efficiency and accuracy in luminance control, when reducing the emission "on" time of the high refresh rate, the rising edge of the luminance waveform may be changed rather than the falling edge of the waveform being shifted. Still, the falling edge of the waveform may be shifted in some embodiments.

[0100] FIG. 9 is a block diagram (900, 950) of computing devices that may be used to implement the systems and methods described herein, as a client, a server, or any one of multiple servers. The computing device (900) is intended to represent various types of digital computers, laptops, desktops, workstations, personal digital terminals, servers, blade servers, mainframes, and other suitable computers. The computing device (950) is intended to represent various types of mobile devices, such as personal digital terminals, cellular phones, smartphones, and other similar computing devices. The components, their connections and relationships, and their functions illustrated herein are merely examples and are not intended to limit the embodiments described and / or claimed herein.

[0101] The computing device (900) includes a processor (902), memory (904), a storage device (906), a high-speed controller (908) connected to the memory (904) and a high-speed expansion port (910), and a low-speed controller (912) connected to the low-speed expansion port (914) and the storage device (906). The components (902, 904, 906, 908, 910, and 912) may be interconnected using various buses and mounted on a common motherboard or in other suitable ways. The processor (902) may process instructions to be executed within the computing device (900), including instructions stored in the memory (904) or the storage device (906) to display graphic information for a GUI on an external input / output device such as a display (916) coupled to the high-speed controller (908). In other embodiments, multiple processors and / or multiple buses may be appropriately used with multiple memories and types of memory. Additionally, multiple computing devices (900) may be connected, and each device provides parts of the necessary operations (e.g., as a server bank, a group of blade servers, or a multiprocessor system).

[0102] Memory (904) stores information within a computing device (900). In one embodiment, memory (904) is a volatile memory unit or units. In another embodiment, memory (904) is a non-volatile memory unit or units. Memory (904) may also be another form of computer-readable medium, such as a magnetic or optical disk.

[0103] The storage device (906) may provide large-capacity storage for the computing device (900). In one embodiment, the storage device (906) may be or may include an array of devices, such as a computer-readable medium, including a floppy disk device, a hard disk device, an optical disk device, or a tape device, a flash memory or other similar solid-state memory device, or devices in a storage area network or other configurations. A computer program product may be substantially embodied in an information carrier. The computer program product may also include instructions that perform one or more methods such as those described above when executed. The information carrier is a computer or machine-readable medium, such as memory (904), the storage device (906), or memory on the processor (902).

[0104] The high-speed controller (908) manages bandwidth-intensive operations for the computing device (900), while the low-speed controller (912) manages lower bandwidth-intensive operations. The assignment of these functions is merely an example. In one embodiment, the high-speed controller (908) is coupled to high-speed expansion ports (910) capable of accommodating memory (904), a display (916) (e.g., via a graphics processor or accelerator), and various expansion cards (not shown). In an embodiment, the low-speed controller (912) is coupled to a storage device (906) and a low-speed expansion port (914). A low-speed expansion port, which may include various communication ports (e.g., USB, Bluetooth, Ethernet, wireless Ethernet), may be coupled to one or more input / output devices, such as a keyboard, pointing device, scanner, or networking device such as a switch or router, for example, via a network adapter.

[0105] The computing device (900) may be implemented in a number of different forms as illustrated in the drawing. For example, it may be implemented as a standard server (920) or as a group of such servers. It may also be implemented as part of a rack server system (924). Additionally, it may be implemented as a personal computer such as a laptop computer (922). Alternatively, components of the computing device (900) may be combined with other components within a mobile device (not illustrated), such as a device (950). Each of these devices may include one or more of the computing devices (900, 950), and the entire system may be composed of a number of computing devices (900, 950) communicating with each other.

[0106] The computing device (950) includes, among other components, an input / output device such as a processor (952), memory (964), and a display (954), a communication interface (966), and a transceiver (968). The device (950) may also be provided with a storage device such as a microdrive or other device to provide additional storage. The components (950, 952, 964, 954, 966, and 968) are interconnected using various buses, and multiple components may be mounted on a common motherboard or in other suitable ways.

[0107] The processor (952) can execute instructions within the computing device (950), including instructions stored in memory (964). The processor may be implemented as a chipset of chips including a number of separate analog and digital processors. Additionally, the processor may be implemented using any of a number of architectures. For example, the processor may be a Complex Instruction Set Computer (CISC) processor, a Reduced Instruction Set Computer (RISC) processor, or a Minimal Instruction Set Computer (MISC) processor. The processor may provide coordination of other components of the device (950), such as user interfaces, applications executed by the device (950), and wireless communication by the device (950).

[0108] The processor (952) can communicate with the user through a display interface (956) and a control interface (958) coupled to the display (954). The display (954) may be, for example, a Thin-Film-Transistor Liquid Crystal Display (TFT) display or an Organic Light Emitting Diode (OLED) display, or other suitable display technology. The display interface (956) may include suitable circuitry for driving the display (954) to present graphics and other information to the user. The control interface (958) may receive commands from the user and convert them to submit to the processor (952). Additionally, an external interface (962) may be provided for communication with the processor (952) to enable short-range communication with other devices of the device (950). The external interface (962) may be provided for wired communication in some embodiments, or for wireless communication in other embodiments, and multiple interfaces may be used.

[0109] Memory (964) stores information within the computing device (950). Memory (964) may be implemented as one or more of a computer-readable medium or media, a volatile memory unit or units, or a non-volatile memory unit or units. An extended memory (974) is also provided and may be connected to the device (950) via an extended interface (972) which may include, for example, a Single In Line Memory Module (SIMM) card interface. This extended memory (974) may provide additional storage space for the device (950) or may also store applications or other information for the device (950). Specifically, the extended memory (974) may include instructions that perform or supplement the processes described above, and may also include security information. Accordingly, for example, the extended memory (974) may be provided as a security module of the device (950) and may be programmed with instructions that allow the secure use of the device (950). In addition, security applications can be provided through the SIMM card along with additional information, for example, by placing identification information on the SIMM card in a way that makes it impossible to hack.

[0110] As will be discussed below, memory may include, for example, flash memory and / or NVRAM memory. In one embodiment, a computer program product is tangibly embodied in an information carrier. When executed, the computer program product includes instructions that perform one or more methods as described above. The information carrier is a computer or machine-readable medium, such as memory (964), extended memory (974), or memory on a processor (952), which may be received, for example, through a transceiver (968) or an external interface (962).

[0111] The device (950) can communicate wirelessly through a communication interface (966), which may include a digital signal processing circuit if necessary. The communication interface (966) can provide communication under various modes or protocols, among others, such as GSM voice calls, SMS, EMS, or MMS messaging, CDMA, TDMA, PDC, WCDMA, CDMA2000, or GPRS. Such communication may occur, for example, through a radio frequency transceiver (968). Additionally, short-range communication may occur using, for example, Bluetooth, WiFi, or other such transceivers (not shown). Additionally, a Global Positioning System (GPS) receiver module (970) may provide additional navigation and location-related wireless data to the device (950), which may be appropriately used by applications running on the device (950).

[0112] The device (950) may also communicate in a way that can be heard by using an audio codec (960) capable of receiving information spoken by a user and converting it into usable digital information. The audio codec (960) may also likewise generate sound that can be heard by the user, for example, through a speaker, for example, through the handset of the device (950). Such sound may include sound from a voice phone call, may include recorded sound (e.g., voice message, music file, etc.), and may also include sound generated by applications running on the device (950).

[0113] The computing device (950) may be implemented in a number of different forms as illustrated in the drawing. For example, it may be implemented as a cellular phone (980). It may also be implemented as part of a smartphone (982), a personal information terminal, or other similar mobile device.

[0114] Additionally, the computing device (900 or 950) may include Universal Serial Bus (USB) flash drives. USB flash drives may store operating systems and other applications. The USB flash drives may include input / output components, such as a USB connector or a wireless transmitter, that can be inserted into a USB port of another computing device.

[0115] Various embodiments of the systems and techniques described herein may be realized in digital electronic circuits, integrated circuits, specially designed application-specific integrated circuits (ASICs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may implement one or more computer programs executable and / or interpretable on a programmable system comprising at least one programmable processor, which may be specialized or general-purpose, coupled to receive data and instructions from a storage system, at least one input device, and at least one output device, and to transmit data and instructions thereto.

[0116] These computer programs (also known as programs, software, software applications, or code) contain machine instructions for a programmable processor and may be implemented in a higher-level procedural and / or object-oriented programming language and / or assembly / machine language. As used herein, the terms “machine-readable medium” and “computer-readable medium” refer to any computer program product, device, and / or device (e.g., magnetic disk, optical disk, memory, programmable logic device (PLD)) used to provide machine instructions and / or data to a programmable processor, including a machine-readable medium that receives machine instructions as machine-readable signals. The term “machine-readable signal” refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0117] To provide interaction with a user, the systems and techniques described herein may be implemented on a computer having a display device for displaying information to a user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor), and a keyboard and pointing device (e.g., a mouse or trackball) on which the user can provide input to the computer. Other types of devices may be used to provide interaction with a user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form including sound, voice, or tactile input.

[0118] The systems and technologies described herein may be implemented in a computing system that includes a backend component (e.g., as a data server), a middleware component (e.g., an application server), or a frontend component (e.g., a client computer having a graphical user interface or a web browser that allows a user to interact with an embodiment of the systems and technologies described herein). The components of the system may be interconnected by digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include a local area network (“LAN”), a wide area network (“WAN”), a peer-to-peer network (having ad-hoc or static members), grid computing infrastructures, and the Internet.

[0119] A computing system may include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The relationship between clients and servers is generated by computer programs that run on respective computers and have a client-server relationship with each other.

[0120] Although some embodiments have been described in detail above, other modifications are possible. Additionally, other mechanisms may be used to perform the systems and methods described in this document. Furthermore, the logic flows illustrated in the drawings do not require a specific order or sequential order to achieve desired results. Other steps may be provided, steps may be removed from the described flows, and other components may be added to or removed from the described systems. Accordingly, other embodiments are within the scope of the following claims.

Claims

Claim 1 A method for operating a display device, comprising: a step of refreshing a pixel of the display device while the display device operates at a first refresh rate in which the emission of an LED of a pixel is maintained on during a first time interval; wherein the step of refreshing a pixel of the display device comprises: a step of turning off the emission of the LED; a step of programming a driving transistor that drives the LED while the emission of the LED is maintained off and the display device operates at the first refresh rate; and a step of programming the driving transistor while the display device operates at the first refresh rate and turning on the emission of the LED after a first time delay; and a step of refreshing a pixel of the display device while the display device operates at a second refresh rate in which the emission of the LED is maintained on during a second time interval different from the first time interval; wherein the step of refreshing a pixel of the display device comprises: a step of turning off the emission of the LED; A method comprising: a step of programming a driving transistor that drives the LED while the emission of the LED is kept off and the display device is operating at a second refresh rate; and a step of programming the driving transistor while the display device is operating at a second refresh rate and turning on the emission of the LED after a second time delay, wherein the second refresh rate is higher than the first refresh rate so that the second time interval is shorter than the first time interval; and the second time delay is greater than the first time delay to mitigate the difference between the average luminance at the second refresh rate under outdoor conditions and the average luminance at the first refresh rate under outdoor conditions. Claim 2 A method according to claim 1, wherein the first refresh rate is a 60 Hz refresh rate; and the second refresh rate is a 90 Hz refresh rate or a 120 Hz refresh rate. Claim 3 A method according to claim 1, wherein, while the display device is operating at the first refresh rate, the step of programming the driving transistor includes the step of providing a first voltage to the gate of the driving transistor; the first voltage provided to the gate of the driving transistor decreases by a first rate during the first time delay after programming the LED while the display device is operating at the first refresh rate; the step of programming the driving transistor while the display device is operating at the second refresh rate includes the step of providing a second voltage to the gate of the driving transistor; and the second voltage provided to the gate of the driving transistor decreases by a second rate during the second time delay after programming the LED while the display device is operating at the second refresh rate, wherein the second rate is a rate greater than the first rate as a result of the second time delay being greater than the first time delay. Claim 4 In claim 3, the first voltage is equal to the second voltage as a result of the same intensity level being programmed to the pixel during both the step of programming the driving transistor while the display device is operating at the first refresh rate and the step of programming the driving transistor while the display device is operating at the second refresh rate; the LED has a first peak intensity by the emission of the LED being turned on after the first voltage is programmed to the gate of the driving transistor while the display device is operating at the first refresh rate; the LED has a second peak intensity when the emission of the LED is turned on after the second voltage is programmed to the gate of the driving transistor while the display device is operating at the second refresh rate; and the first peak intensity of the LED is greater than the second peak intensity of the LED, method. Claim 5 In paragraph 3, the emission of the LED is turned on simultaneously with the termination of programming of the driving transistor while the display device is operating at the first refresh rate, so that the first time delay becomes zero. Claim 6 A method according to claim 1, wherein the step of programming the driving transistor while the display device is operating at the first refresh rate includes the step of applying a first voltage to the gate of the driving transistor during a programming time interval; and the step of programming the driving transistor while the display device is operating at the second refresh rate includes the step of applying a second voltage to the upper gate of the driving transistor during the same programming time interval. Claim 7 The method according to claim 1, wherein the step of refreshing the pixel of the display device while the display device is operating at the first refresh rate comprises: (i) the preceding emission of the LED preceding immediately before refreshing the pixel at the first refresh rate is kept on during the first time interval; and (ii) the subsequent emission of the LED following immediately after refreshing the pixel at the first refresh rate is kept on during the first time interval; and the step of refreshing the pixel of the display device while the display device is operating at the second refresh rate comprises: (i) the preceding emission of the LED preceding immediately before refreshing the pixel at the second refresh rate is kept on during the second time interval; and (ii) the subsequent emission of the LED following immediately after refreshing the pixel at the second refresh rate is kept on during the second time interval. Claim 8 A method according to claim 1, wherein the step of refreshing the pixel of the display device while the display device is operating at the first refresh rate includes the emission of the LED being off during the refresh time interval; and the step of refreshing the pixel of the display device while the display device is operating at the second refresh rate includes the emission of the LED being off during the same refresh time interval. Claim 9 In claim 8, the second time delay is greater than the first time delay; and the programming of the driving transistor occurs at a first location within the refresh time interval while the display device is operating at the first refresh rate; the programming of the driving transistor occurs at a second location within the refresh time interval while the display device is operating at the second refresh rate; and the first location is located later than the second location within the refresh time interval. Claim 10 A method according to claim 1, wherein while the display device is operating at the first refresh rate, the step of refreshing the pixel of the display device comprises keeping the emission of the pixel off during the first refresh time interval; and while the display device is operating at the second refresh rate, the step of refreshing the pixel of the display device comprises keeping the emission of the pixel off during the second refresh time interval which is longer than the first refresh time interval. Claim 11 In claim 10, the second time delay is greater than the first time delay; the programming of the driving transistor starts a waiting period after the emission of the pixel while the display device is operating at the first refresh rate; and the programming of the driving transistor occurs during the same waiting period after the emission of the pixel is turned off while the display device is operating at the second refresh rate. Claim 12 A method according to claim 1, wherein the step of programming the driving transistor while the display device is operating at the first refresh rate includes the step of programming the driving transistor during a programming time interval; and the step of programming the driving transistor while the display device is operating at the second refresh rate includes the step of programming the driving transistor during the same programming time interval. Claim 13 A method according to claim 1, wherein the first time delay is maintained differently from the second time delay regardless of various levels of ambient light incident on a computing device including the display device. Claim 14 A method according to claim 1, wherein the step of programming the driving transistor while the display device is operating at the first refresh rate is performed after initializing the driving transistor to the initialization voltage while the display device is operating at the first refresh rate; and the step of programming the driving transistor while the display device is operating at the second refresh rate is performed after initializing the driving transistor to the initialization voltage while the display device is operating at the second refresh rate. Claim 15 A method according to claim 1, wherein the first time delay represents a time delay after the programming of the transistor is terminated while the display device is operating at the second refresh rate; and the second time delay represents a time delay after the programming of the transistor is terminated while the display device is operating at the second refresh rate. Claim 16 As a computing device, the display device; and the circuit portion comprises: a display device; and a circuit portion, wherein the circuit portion is accompanied by the display device and interacts with the display device to cause the display device: to refresh a pixel of the display device while the display device operates at a first refresh rate during which the emission of an LED of a pixel is maintained on for a first time interval; and — to refresh a pixel of the display device comprises: turning off the emission of the LED; programming a driving transistor that drives the LED while the emission of the LED is maintained off and the display device operates at the first refresh rate; and programming the driving transistor while the display device operates at the first refresh rate and turning on the emission of the LED after a first time delay —; And while the display device operates at a second refresh rate during which the emission of an LED is kept ON during a second time interval different from the first time interval, the pixel of the display device is refreshed — refreshing the pixel of the display device comprises: turning off the emission of the LED; programming the driving transistor that drives the LED while the emission of the LED is kept OFF and the display device operates at the second refresh rate; and programming the driving transistor while the display device operates at the second refresh rate and turning on the emission of the LED after a second time delay —, wherein the second refresh rate is higher than the first refresh rate, so that the second time interval is shorter than the first time interval; A computing device in which the second time delay is greater than the first time delay to mitigate the difference between the average luminance at the second refresh rate under outdoor conditions and the average luminance at the second refresh rate under outdoor conditions. Claim 17 A method for operating a display panel, comprising: operating a plurality of pixels of the display panel at a first refresh rate; providing a signal to a driving transistor of the pixel while the display is operating at the first refresh rate and turning on at least one pixel among the plurality of pixels after a first time delay; switching the operation of the plurality of pixels to a second refresh rate — the second refresh rate is higher than the first refresh rate —; and providing a signal to the driving transistor of the pixel while the display is operating at the second refresh rate and turning on the pixel after a second time delay, wherein the second time delay is longer than the first time delay to mitigate the difference between the average brightness at the second refresh rate under outdoor conditions and the average brightness at the second refresh rate under outdoor conditions. Claim 18 delete

Images