Package substrate and semiconductor package

Abstract

A package substrate according to embodiments of the present invention comprises: a glass substrate having a first surface and a second surface facing each other; and a through hole penetrating the glass substrate from the first surface to the second surface, wherein the glass substrate comprises a first surface region located from a depth of 16 nm to a depth of 72 nm from the first surface toward the second surface, and a second surface region located from a depth of 16 nm to a depth of 72 nm from the second surface toward the first surface, and K+avg calculated by a specific formula 1 is 11 atomic% or less.

Description

Technology Field

[0001] The present invention relates to a package substrate and a semiconductor package including the same. Background Technology

[0003] The semiconductor packaging process generally involves a series of assembly steps in which a wafer on which a semiconductor chip is formed is cut, mounted onto various interposers or substrates, and electrically connected to external circuits. In this back-end technology, the package substrate can function as a transmission path for electrical signals and as a supporting structure for the semiconductor package.

[0004] Traditionally, ceramic substrates or organic substrates such as resins have been primarily used as package substrates. However, ceramics generally have a high dielectric constant, making them unsuitable for high-frequency package structures where high-speed signals are transmitted. Furthermore, their high mechanical rigidity can lead to defects such as cracks during microstructure processing or thinning processes. Additionally, resin substrates have a high coefficient of thermal expansion and low thermal conductivity, which degrades dimensional stability in high-temperature environments, and it can be difficult to implement fine-pitch structures on them.

[0005] As an alternative, glass-based substrates are attracting attention. Glass is evaluated as a next-generation packaging material suitable for high-speed and high-density systems because it has a coefficient of thermal expansion similar to silicon and possesses excellent insulation properties and dimensional stability.

[0006] In addition, Through-Glass Via (TGV) technology, which forms through holes within a glass substrate, can be advantageous in terms of high-speed signal transmission, package miniaturization, and improved thermal characteristics. The TGV structure can provide effects such as short wiring distance, low signal delay, and excellent electromagnetic shielding compared to conventional materials by precisely machining micro-holes that penetrate the glass layer vertically and filling them with a conductive material to form an electrical path. Prior art literature

[0008] Republic of Korea Registered Patent Publication No. 10-1067109 The problem to be solved

[0009] The problem to be solved by the present invention is to provide a package substrate with improved long-term reliability and high-speed signal transmission characteristics, wherein the concentration of potassium is controlled to a predetermined range within a surface region located at a specific depth on each side of a glass substrate.

[0010] In addition, we intend to provide a semiconductor package including the above-mentioned package substrate. means of solving the problem

[0012] A package substrate according to an embodiment of the present invention comprises: a glass substrate having a first surface and a second surface facing each other; and a through hole penetrating the glass substrate in a direction from the first surface toward the second surface, wherein the glass substrate comprises a first surface region located from a depth of 16 nm toward the second surface and a second surface region located from a depth of 16 nm toward the first surface and a depth of 72 nm, and K calculated by the following Equation 1. + avg It is 11 atomic percent or less.

[0013] [Equation 1]

[0014] K + avg = (K avg1 +K avg2 ) / 2

[0015] In Equation 1 above, K avg1 is the average of the potassium content values ​​measured based on 100 atomic% of the total oxygen, carbon, and potassium at each measurement point when the content of oxygen, carbon, and potassium, respectively, is measured at 8 nm depth intervals in the first surface region, and K avg2is the average of the potassium content values ​​measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point when the content of oxygen, carbon, and potassium, respectively, was measured at intervals of 8 nm depth in the second surface region.

[0016] A semiconductor package according to another embodiment of the present invention comprises a package substrate according to the above-described embodiment; and a semiconductor element disposed on at least one surface of the package substrate. Effects of the invention

[0018] According to an embodiment of the present invention, as the average value of potassium content in a surface region located at a certain depth from both sides of a glass substrate is controlled to be within a specific range, the plating and insulating layer application processes on the surface of the glass substrate can be performed more efficiently. In addition, by suppressing local characteristic changes due to the movement of alkali ions, the electrical characteristics of the package substrate are improved, and damage caused by thermal and mechanical stress can also be effectively reduced. Brief explanation of the drawing

[0020] FIG. 1 is a schematic cross-sectional view of a package substrate according to some embodiments. FIG. 2 is a schematic plan view of a package substrate according to some embodiments. FIG. 3 is a schematic cross-sectional view of a package substrate according to some embodiments. Figure 4 is an enlarged view of area A of Figure 3. Figure 5 is an enlarged view of area B of Figure 3. FIG. 6 is a schematic cross-sectional view of a package substrate according to some embodiments. FIG. 7 is a schematic cross-sectional view of a package substrate according to some embodiments. Figure 8 is a graph showing the elemental distribution according to depth measured via AES on the upper surface of the package substrate of Example 1. Figure 9 is a graph showing the elemental distribution according to depth measured via AES on the lower surface of the package substrate of Example 1. Figure 10 is a graph showing the elemental distribution according to depth measured via AES on the upper surface of the package substrate of Comparative Example 1. Figure 11 is a graph showing the elemental distribution according to depth measured by AES on the lower surface of the package substrate of Comparative Example 1. Figure 12 is a graph showing the elemental distribution according to depth measured via AES on the upper surface of the package substrate of Comparative Example 2. Figure 13 is a graph showing the elemental distribution according to depth measured by AES on the lower surface of the package substrate of Comparative Example 2. FIG. 14 shows the ratio of oxygen content to potassium according to depth on the upper surface of the package substrates of Example 1, Comparative Example 1, and Comparative Example 2 ([O 2- ] / [K + It is a graph representing ]). FIG. 15 shows the ratio of oxygen content to potassium according to depth on the lower surface of the package substrates of Example 1, Comparative Example 1, and Comparative Example 2 ([O 2- ] / [K + It is a graph representing ]). Specific details for implementing the invention

[0021] The present invention will be described in detail below through various embodiments. The embodiments are not limited to those disclosed below and may be modified in various forms as long as the essence of the invention is not altered.

[0022] In this specification, terms referring to each component are used to distinguish it from other components and are not intended to limit the embodiments. Additionally, singular expressions in this specification include singular or plural expressions unless the context clearly indicates otherwise.

[0023] In this specification, when a part is described as "comprising" a certain component, this means that, unless specifically stated otherwise, it does not exclude other components but may include additional components.

[0024] All numerical ranges representing physical property values, dimensions, etc. of the components described in this specification should be understood to be modified by the term "approximately" in all cases unless otherwise specified.

[0025] In this specification, terms such as "first," "second," etc. are used to describe various components, and said components are not limited by said terms. These terms are used for the purpose of distinguishing one component from another.

[0026] In this specification, the description that one component is formed or positioned above or below another component includes both direct formation or indirect placement between these components through the interposition of another component. Furthermore, it should be understood that the reference for the top and bottom of each component may vary depending on the direction in which the object is observed.

[0027] The description in this specification that one component is connected to another component includes both direct and indirect connections between these components through another component.

[0028] In numerical ranges defining the size, physical properties, etc., of components described in this specification, if a numerical range in which only the upper limit is defined and a numerical range in which only the lower limit is defined are separately exemplified, it should be understood that a numerical range combining these upper and lower limits is also included in the exemplary range.

[0029] Additionally, the dimensions of each component in the drawings may be exaggerated for illustrative purposes and do not imply their actual dimensions. Furthermore, throughout the specification, the same reference numerals refer to the same components.

[0031] Package Substrate

[0032] A package substrate according to an embodiment of the present invention comprises: a glass substrate having a first surface and a second surface facing each other; and a through hole penetrating the glass substrate in a direction from the first surface toward the second surface, wherein the glass substrate comprises a first surface region located from a depth of 16 nm toward the second surface and a second surface region located from a depth of 16 nm toward the first surface and a depth of 72 nm, and K calculated by the following Equation 1. + avg It is 11 atomic percent or less.

[0033] [Equation 1]

[0034] K + avg = (K avg1 +K avg2 ) / 2

[0035] In Equation 1 above, K avg1 is the average of the potassium content values ​​measured at each measurement point based on a total of 100 atomic% of oxygen, carbon, and potassium when the content of oxygen, carbon, and potassium, respectively, is measured at 8 nm depth intervals in the first surface region, and K avg2 is the average of the potassium content values ​​measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point when the content of oxygen, carbon, and potassium, respectively, is measured at intervals of 8 nm depth in the second surface region.

[0036] As used in this specification, the term "thickness direction" is the direction from the first surface to the second surface of the glass substrate and may correspond to the longitudinal direction (TD) in FIG. 1 and FIG. 3 to 6. Additionally, the term "width direction" as used in this specification is perpendicular to the thickness direction and may correspond to the transverse direction (WD) in FIG. 1 and FIG. 3 to 6, in the direction in which the first surface and the second surface of the glass substrate extend.

[0037] Hereinafter, embodiments of the present invention will be described in detail through the drawings.

[0038] FIG. 1 is a schematic cross-sectional view of a package substrate according to some embodiments. FIG. 2 is a schematic top view of a package substrate according to some embodiments. For example, FIG. 1 is a cross-sectional view observed by cutting the package substrate along the C-C' line of FIG. 2.

[0039] The glass substrate (110) forms the core of the package substrate and can serve as a support for the package substrate.

[0040] The above package substrate includes a glass substrate, which can suppress the generation of parasitic elements within the core and power loss resulting from the application of high-frequency power. Additionally, since the glass material has a low coefficient of thermal expansion and high hardness, deformation of the package substrate due to high temperatures during the packaging process can be prevented. Consequently, the breakage and defect rates of the glass substrate can be reduced, and integration density can be improved by forming finer and more precise patterns.

[0041] In one embodiment, the glass substrate (110) may include alkali borosilicate, alkali-free borosilicate, alkali aluminosilicate, alkali-free aluminosilicate, alkali-free aluminoborosilicate, etc., but any plate glass material applied as an electronic component may be used without limitation. For example, the glass substrate (110) may be manufactured by Schott, AGC, Corning, etc., but is not limited thereto.

[0042] A glass substrate (110) has a first surface (112) and a second surface (114) facing each other in the thickness direction (TD). The first surface (112) and the second surface (114) are the main surfaces of the glass substrate (110) and may be surfaces on which a laminated structure, such as an insulating layer and / or a wiring layer, is formed. The first surface (112) may be referred to as the upper surface of the glass substrate (110), and the second surface (114) may be referred to as the lower surface of the glass substrate (110).

[0043] The glass substrate (110) may include a side formed in the thickness direction, which is connected to the first surface (112) and the second surface (114), respectively. The side may be a plane perpendicular to the first surface (112) and the second surface (114), or an inclined surface inclined at a predetermined angle with respect to the first surface (112) and the second surface (114). Additionally, the side may be a curved surface.

[0044] The first surface (112) and the second surface (114) can extend parallel to the width direction (WD) of the glass substrate (110). Accordingly, the glass substrate (110) can have a substantially uniform thickness overall.

[0045] The thickness of the glass substrate (110) may be 50 μm or more. For example, the thickness of the glass substrate (110) may be 100 μm or more, 150 μm or more, 200 μm or more, 250 μm or more, 300 μm or more, 400 μm or more, or 500 μm or more. Additionally, the thickness of the glass substrate (110) may be 3,000 μm or less. For example, the thickness of the glass substrate (110) may be 2,500 μm or less, 2,000 μm or less, 1,500 μm or less, or 1,000 μm or less.

[0046] The above package substrate includes a through hole (120) that penetrates the glass substrate (110) in the thickness direction. For example, the through hole (120) penetrates the glass substrate (110) from a first surface (112) to a second surface (114).

[0047] The through hole (120) is a via formed for electrical connection between the upper and lower parts of the package substrate, and can be referred to as, for example, a TGV (through glass via).

[0048] The through hole (120) includes an internal space and an inner wall surrounding the internal space. The internal space of the through hole (120) refers to an empty space. The inner wall of the through hole (120) refers to the side wall of the glass substrate (110) where the through hole (120) is defined, that is, the surface of the glass substrate (110) at the interface between the glass substrate (110) and the through hole (120).

[0049] The internal space of the through hole (120) can be provided as a space filled with a conductive material such as metal. Accordingly, an electrical signal transmission path can be implemented inside the glass substrate (110) by the through hole (120).

[0050] The through hole (120) may include a first opening in contact with a first surface (112) of the glass substrate (110) and a second opening in contact with a second surface (114) of the glass substrate (110). For example, the first opening may be a surface exposed through the first surface (112) of the glass substrate (110) and may be located on the same plane as the first surface (112). Additionally, the second opening may be a surface exposed through the second surface (114) of the glass substrate (110) and may be located on the same plane as the second surface (114).

[0051] The first opening and the second opening may have various shapes such as a circle, ellipse, rectangle, square, rhombus, parallelogram, triangle, etc. In one embodiment, the shape of the first opening and the second opening may be circular or elliptical, and specifically, may be circular.

[0052] In one embodiment, the first opening and the second opening may have the same shape as each other.

[0053] The widths of the first opening and the second opening may each be 40 μm to 250 μm, 40 μm to 230 μm, 40 μm to 210 μm, 40 μm to 200 μm, 60 μm to 180 μm, 80 μm to 160 μm, or 80 μm to 140 μm. Within the above range, the package substrate may be more highly integrated, and electrical characteristics and reliability may be further improved.

[0054] The width or diameter of the through hole (120) in the thickness direction of the glass substrate (110) may be substantially constant. For example, the diameters of the first opening and the second opening (128) may be maintained over the entire area of ​​the through hole (120).

[0055] In one embodiment, the through hole (120) may have a columnar shape, specifically a cylindrical shape. For example, the cross-section of the through hole (120) may have a square or rectangular shape.

[0056] FIG. 3 is a schematic cross-sectional view of a package substrate according to some embodiments.

[0057] Referring to FIG. 3, the glass substrate (110) includes a first surface region (SA1) located at a predetermined depth from a first surface (112) in an area where a through hole (120) is not formed, and a second surface region (SA2) located at a predetermined depth from a second surface (114).

[0058] Figure 4 is an enlarged view of area A of Figure 3.

[0059] Referring to FIG. 4, the glass substrate (110) includes a first surface region (SA1) located from a first surface (112) toward a second surface (114) to a depth of 16 nm to a depth of 72 nm. Specifically, the first surface region (SA1) is defined as the region between a point located at a depth of 16 nm and a point located at a depth of 72 nm in the thickness direction (TD) from the first surface (112) of the glass substrate (110).

[0060] Figure 5 is an enlarged view of area B of Figure 3.

[0061] Referring to FIG. 5, the glass substrate (110) includes a second surface region (SA2) located from a depth of 16 nm to a depth of 72 nm from the second surface (114) toward the first surface (112). Specifically, the second surface region (SA2) is defined as the region between a point located at a depth of 16 nm and a point located at a depth of 72 nm in the opposite direction of the thickness direction (TD) from the second surface (114) of the glass substrate (110).

[0062] According to embodiments of the present invention, K calculated by the following Equation 1 for the package substrate+ avg It is 11 atomic percent or less.

[0063] [Equation 1]

[0064] K + avg = (K avg1 +K avg2 ) / 2

[0065] In Equation 1 above, K avg1 is the average of the potassium content values ​​measured at each measurement point based on a total of 100 atomic% of oxygen, carbon, and potassium when the content of oxygen, carbon, and potassium, respectively, was measured at intervals of 8 nm depth in the first surface region (SA1).

[0066] For example, when the depth of the first surface (112) of the glass substrate (110) is set to 0 nm, a total of 8 measurement points are set at intervals of 8 nm from a point located at a depth of 16 nm in the thickness direction (TD) from the first surface (112) to a point located at a depth of 72 nm, and the content (concentration) of oxygen, carbon, and potassium at each measurement point can be measured. The potassium content (atomic %) at each measurement point is calculated based on a total of 100 atomic %) of oxygen, carbon, and potassium, and the potassium content values ​​measured at each measurement point are averaged to K avg1 can calculate.

[0067] Also, in the above Equation 1, K avg2 is the average of the potassium content values ​​measured at each measurement point based on a total of 100 atomic% of oxygen, carbon, and potassium when the content of oxygen, carbon, and potassium, respectively, was measured at 8 nm depth intervals in the second surface region (SA2).

[0068] For example, when the depth of the second surface (114) of the glass substrate (110) is set to 0 nm, a total of 8 measurement points are set at intervals of 8 nm from a point located at a depth of 16 nm in the direction opposite to the thickness direction (TD) from the second surface (114) to a point located at a depth of 72 nm, and the content (concentration) of oxygen, carbon, and potassium at each measurement point can be measured. The potassium content (atomic %) at each measurement point is calculated based on a total of 100 atomic %) of oxygen, carbon, and potassium, and the potassium content values ​​measured at each measurement point are averaged to K avg2 can calculate.

[0069] The content (concentration) of each element contained in the glass substrate (110) can be measured using Auger electron spectroscopy (AES). Specifically, the content of each element can be measured using an Auger electron spectrometer, and more specifically, using a high-resolution Field Emission Auger Electron Spectrometer. For example, the content of each element contained in the glass substrate (110) can be measured using an electron beam under conditions of an acceleration voltage of 1 keV to 25 kev, a current of 1 nA to 50 nA, and a tilt of 0° to 60°, under conditions of an ion energy of 1 keV to 5 keV, 30 s / cycle to 90 s / cycle, and a sputtering rate of 4 nm / min to 10 nm / min.

[0070] Average value of potassium content (K) measured in the surface areas on both sides of the glass substrate (110) + avgAs the amount is 11 atomic percent or less, the mobility of alkali ions in the surface region is reduced, so local electric field concentration can be suppressed. Accordingly, a plating layer and an insulating layer having a uniform thickness can be formed during the plating and insulating resin application process on both sides of the glass substrate (110).

[0071] In addition, the potassium concentration is low on both sides of the glass substrate (110), so the Si-O network can be maintained densely on both surface areas. Accordingly, the bonding characteristics for the plating layer and the resin layer on both sides of the glass substrate (110) can be improved, and thus, delamination or cracking at the interface can be suppressed even when thermal and mechanical stress is applied.

[0072] For example, the average value of potassium content (K on both sides of the glass substrate surface area + avg When the amount exceeds 11 atomic percent, the mobility of alkali ions within the glass substrate increases, which may cause the electric field to concentrate in localized areas during the formation of plating layers, such as wiring. In this case, the plating layer may grow excessively or become excessively thin in specific areas, and contact resistance may increase. Additionally, as the Si-O bonds of the glass are loosened by potassium ions, the chemical durability of the glass substrate may be reduced.

[0073] Meanwhile, the outermost surface region of the glass substrate, ranging from a depth of 0 nm to a depth of 16 nm, can be easily contaminated by process residues, external contaminants, chemical damage, etc., generated during manufacturing processes of the glass substrate such as polishing, cleaning, and heat treatment, or through-hole formation processes such as drilling and etching. Consequently, within the outermost surface region, the measurement error regarding the content of each element may increase, and reproducibility or reliability may be reduced as it fails to reflect the elemental composition on the actual surface of the glass substrate. According to embodiments of the present invention, by measuring the elemental composition in the surface region from a depth of 16 nm to a depth of 72 nm, the unique surface characteristics of the glass substrate can be more accurately reflected, thereby providing high reliability.

[0074] In some embodiments, K calculated by Equation 1 above + avg can be 5 atomic percent or more. For example, K calculated by Equation 1 above. + avg It can be 5 atomic% to 11 atomic%.

[0075] Accordingly, the coefficient of thermal expansion in the surface region of the glass substrate (110) increases, thereby further improving the electrical reliability and structural stability of the package substrate. For example, the glass substrate has a lower coefficient of thermal expansion than metal, so delamination or cracking may occur at the interface with the metal layer formed on the glass substrate in an environment where thermal stress is applied or the temperature changes rapidly during subsequent processes. However, according to some embodiments, the difference in the coefficient of thermal expansion with respect to the metal layer on both sides of the glass substrate can be reduced by having a potassium content of 5 atomic percent or more in the surface region, and thus stability and reliability can be further improved.

[0076] In one embodiment, K calculated by Equation 1 above + avgmay be 6 atomic% or more, 7 atomic% or more, 7.5 atomic% or more, 8 atomic% or more, 8.5 atomic% or more, 9 atomic% or more, 9.5 atomic% or more, or 10 atomic% or more. In one embodiment, K calculated by Equation 1 above. + avg It may be 10.9 atomic% or less, 10.8 atomic% or less, 10.7 atomic% or less, 10.6 atomic% or less, or 10.5 atomic% or less.

[0077] According to some embodiments, the average value of potassium content measured at 8 nm depth intervals in the first surface region (SA1) and the average value of potassium content measured at 8 nm depth intervals in the second surface region (SA2) may each be 12 atomic% or less. For example, K in Equation 1 above. avg1 and K avg2 Each may be 12 atomic percent or less. As the potassium content in the surface areas of both sides of the glass substrate (110) is low within the range described above, the difference in thermal and mechanical stress between the upper and lower interfaces of the glass substrate (110) can be minimized. Therefore, even during repeated thermal cycling or driving processes, the peeling of the package substrate, delamination or cracking at the interface can be suppressed, and the electrical resistance is maintained stably along the interface, so that signal transmission characteristics and electrical reliability can be improved even during high-speed signal transmission.

[0078] In one embodiment, K avg1 and K avg2 Each may be 5 atomic% or more, 6 atomic% or more, 7 atomic% or more, 7.5 atomic% or more, 8 atomic% or more, 8.5 atomic% or more, 9 atomic% or more, or 9.5 atomic% or more, and may be 11.8 atomic% or less, 11.6 atomic% or less, 11.4 atomic% or less, 11.2 atomic% or less, or 11 atomic% or less.

[0079] In some embodiments, the potassium content in the first surface region (SA1) and the second surface region (SA2) may be smaller than the carbon content. Accordingly, the mobility of potassium ions in a moist and high-temperature environment may be suppressed, thereby improving electrical properties and surface durability, and the interfacial affinity with organic resin materials may also be excellent due to the carbon.

[0080] In some embodiments, the potassium content in the first surface region (SA1) and the second surface region (SA2) may be less than the oxygen content. For example, if potassium is present in excess of oxygen within the glass substrate, it may distort the glass structure and create abnormal ion conduction pathways, but as the potassium content in the surface region is less than the oxygen content, the chemical structure in the surface region of the glass substrate may be more stabilized, and thus the mechanical strength and insulation properties may be further improved.

[0081] In some embodiments, the oxygen content in the first surface region (SA1) and the second surface region (SA2) may be smaller than the carbon content. Accordingly, the surface may exhibit a relatively organic-friendly tendency, thereby improving the uniformity of resin application and adhesion reliability.

[0082] In one embodiment, the potassium content in the first surface region (SA1) and the second surface region (SA2) of the glass substrate (110) is smaller than the carbon and oxygen content, and the oxygen content may be smaller than the carbon content.

[0083] In some embodiments, the potassium content in the entire area of ​​the first surface region (SA1) and the second surface region (SA2) may be 7 to 14 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium. For example, when the potassium content is measured by selecting any point between the first surface region (SA1) and the second surface region (SA2), the potassium content at all points of the first surface region (SA1) and the second surface region (SA2) may be 7 to 14 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium.

[0084] For example, in the first surface region (SA1) and the second surface region (SA2) of the glass substrate (110), the potassium content based on a total of 100 atomic percent of oxygen, carbon, and potassium may be 7.2 atomic percent or more, 7.3 atomic percent or more, 7.4 atomic percent or more, or 7.5 atomic percent or more, and may be 13.8 atomic percent or less, 13.7 atomic percent or less, 13.6 atomic percent or less, 13.5 atomic percent or less, or 13.4 atomic percent or less.

[0085] In some embodiments, the oxygen content in the entire area of ​​the first surface region (SA1) and the second surface region (SA2) may be 8 to 25 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium.

[0086] As the oxygen content is 8 atomic percent or more across the entire surface area of ​​both sides of the glass substrate (110), active sites for oxygen are properly secured on the surface of the glass substrate (110), thereby further enhancing the uniformity of plating and interfacial characteristics, and the bonding with the insulating layer through hydrogen bonding or covalent bonding can also be further improved. In addition, as the oxygen content in the surface area is 25 atomic percent or less, distortion and loss of electrical signals caused by high concentrations of oxygen ions can be suppressed.

[0087] For example, in the first surface region (SA1) and the second surface region (SA2), based on a total of 100 atomic percent of oxygen, carbon, and potassium, the oxygen content may be 8.2 atomic percent or more, 8.4 atomic percent or more, 8.6 atomic percent or more, 8.8 atomic percent or more, or 9 atomic percent or more, and may be 24 atomic percent or less, 23 atomic percent or less, 22 atomic percent or less, 21.5 atomic percent or less, or 21 atomic percent or less.

[0088] In some embodiments, the carbon content in the entire area of ​​the first surface region (SA1) and the second surface region (SA2) may be 65 atomic percent to 85 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium.

[0089] As the carbon content is 60 atomic percent or more across the entire surface area of ​​both sides of the glass substrate (110), the surface energy of the glass substrate (110) is lowered and hydrophobicity is increased, thereby suppressing the adsorption of unnecessary moisture or impurities in subsequent processes and improving electrical stability. In addition, dielectric loss in high-frequency and high-speed signal environments can be reduced due to carbon, which is a non-polar material. Furthermore, as the carbon content is 85 atomic percent or less, defects in plating and insulation resin application on the surface can be suppressed, and the increase in leakage current and insulation breakdown caused by carbon-containing impurities can be suppressed, thereby further enhancing insulation reliability.

[0090] For example, in the first surface region (SA1) and the second surface region (SA2), based on a total of 100 atomic percent of oxygen, carbon, and potassium, the carbon content may be 61 atomic percent or more, 62 atomic percent or more, 63 atomic percent or more, 64 atomic percent or more, or 65 atomic percent or more, and may be 84 atomic percent or less, 83.5 atomic percent or less, 83 atomic percent or less, 82 atomic percent or less, or 82.5 atomic percent or less.

[0091] In one embodiment, the average (O) of the oxygen content values ​​measured at intervals of 8 nm depth in the first surface region (SA1) avg1 ), and the average of the oxygen content values ​​measured at 8 nm depth intervals in the second surface region (SA2) (O avg2 ) may each be 10 atomic% to 20 atomic%, 11 atomic% to 19 atomic%, 12 atomic% to 18 atomic%, 13 atomic% to 17 atomic%, 14 atomic% to 16 atomic%, or 15 atomic% to 16 atomic%. The oxygen content is measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point.

[0092] In one embodiment, the average (C) of carbon content values ​​measured at intervals of 8 nm depth in the first surface region (SA1) avg1 ), and the average of the carbon content values ​​measured at 8 nm depth intervals in the second surface region (SA2) (C avg2 ) may be 65 atomic% to 80 atomic%, 68 atomic% to 80 atomic%, 70 atomic% to 78 atomic%, 72 atomic% to 78 atomic%, or 72 atomic% to 76 atomic%, respectively. The carbon content is measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point.

[0093] According to some embodiments, the potassium content ([K + Oxygen content ([O) for ]) 2- The ratio of ])([O 2- ] / [K + ]) may be greater than 1 and less than or equal to 2.5.

[0094] As the ratio of potassium to oxygen content in the surface areas of both sides of the glass substrate (110) is greater than 1, the cations and anions are balanced, and the mobility of the ions is suppressed, so that the glass surface can be in an electrically stable state. Oxygen can contribute to the formation of active sites such as hydroxyl groups on the surface of the glass substrate, so that the bonding strength to the insulating layer or plating layer can be further enhanced.

[0095] As the ratio of potassium to oxygen content in the surface areas of both sides of the glass substrate (110) is 2.5 or less, electrical distortion caused by excessive oxygen ions on the surface of the glass substrate can be prevented, and the formation of an electric double layer during high-speed signal transmission, signal reflection, or increased noise can be suppressed. In addition, the deterioration of uniformity of the plating layer and the insulating layer due to excessive hydrophilicity caused by oxygen ions can be prevented.

[0096] In one embodiment, the ratio of potassium and oxygen content ([O₂) in the first surface region (SA1) and the second surface region (SA2) 2- ] / [K + ]) may be 1.01 or more, 1.02 or more, 1.03 or more, 1.05 or more, or 1.06 or more, and may be 2.45 or less, 2.44 or less, 2.43 or less, 2.42 or less, 2.41 or less, or 2.4 or less.

[0097] In some embodiments, the glass substrate (110) having the through hole (120) formed therein can be formed through etching and ion beam treatment of the glass substrate.

[0098] One or both sides of the glass substrate may be chemically etched. The etching may be performed by wet etching using an etchant. The etchant is not limited to any that can be conventionally applied to etch a glass substrate. For example, the etchant may include a sulfuric acid solution, a nitric acid solution, a hydrofluoric acid solution, etc.

[0099] In one embodiment, the wet etching may be performed by immersing a glass substrate in an etching solution containing hydrofluoric acid and / or nitric acid and applying ultrasonic treatment, etc. For example, the concentration of hydrofluoric acid in the etching solution may be 0.5 M or more, or 1.1 M or more, and 3 M or less, or 2 M or less. For example, the concentration of nitric acid in the etching solution may be 0.5 M or more, or 1 M or more, and 2 M or less. The ultrasonic treatment may be performed at a frequency of 40 Hz to 120 Hz, or 60 Hz to 100 Hz.

[0100] At least one surface of the etched glass substrate can be treated with an ion beam. For example, the ion beam treatment can be performed on both sides of the etched glass substrate.

[0101] The above ion beam treatment can be performed using an inert gas as an ion beam source. For example, helium (He), argon (Ar), xenon (Ze), krypton (Kr), xenon (Xe), or a combination thereof may be applied as the ion beam source. Preferably, the ion beam treatment can be performed using an argon source.

[0102] In the above ion beam treatment step, the atmosphere pressure is 1×10 -5 Torr or greater, 1×10 -4 Torr or greater, 1×10 -3 It can be greater than Torr, and 1×10 -1 Torr or less, 1×10 -2 Torr or less, or 0.5 × 10⁻⁶ -2 It may be less than Torr.

[0103] In the above ion beam treatment step, the flow rate of the inert gas may be 1 sccm or more, 3 sccm or more, or 5 sccm or more, and may be 20 sccm or less, 15 sccm or less, or 10 sccm or less.

[0104] In the above ion beam processing step, the source power may be 30 W or more, 50 W or more, 100 W or more, 150 W or more, or 200 W or more, and may be 500 W or less, 400 W or less, 350 W or less, or 300 W or less.

[0105] In the above ion beam treatment step, the ion beam treatment may be performed for 1 minute or more, 2 minutes or more, or 3 minutes or more, and may be performed for 10 minutes or less, 5 minutes or less, or 4 minutes or less.

[0106] A glass core including the glass substrate and the through hole can be formed by etching and ion beam treatment of the glass substrate. For example, the distribution of ions in the surface region of the glass substrate (110) can be controlled to have desired characteristics by adjusting the conditions of etching and ion beam treatment of the glass substrate.

[0107] The package substrate may include via electrodes (130) that fill at least a portion of the internal space of the through hole (120).

[0108] The upper and lower portions of the glass substrate (110) can be electrically connected through via electrodes (130). For example, the via electrodes (130) may be connection terminals for vertical electrical connection within the package substrate.

[0109] The via electrode (130) may cover the inner wall of the through hole (120). The via electrode (130) may fill only a portion of the internal space of the through hole (120). For example, the via electrode (130) may have a hollow column shape formed along the inner wall of the through hole (120). For example, when observed in a direction perpendicular to the thickness direction of the glass substrate (120), the cross-section of the via electrode (130) may have a circular, elliptical, or square ring shape.

[0110] When the via electrode (130) is formed only in a part of the internal space of the through hole (120), an insulating layer may be disposed in the remaining space of the internal space, as shown in FIG. 4. For example, the via electrode (130) may be disposed adjacent to the inner wall of the through hole (120), and an insulating layer may be disposed in the space surrounded by the via electrode (130).

[0111] In some embodiments, the via electrode (130) may fill the entire internal space of the through hole (120). For example, only the via electrode (130) may exist within the through hole (120).

[0112] In some embodiments, the through hole (130) may have a shape in which the width gradually decreases in the thickness direction and then increases again. Additionally, the cross-section of the via electrode (130) filled in the through hole (130) may have an hourglass shape.

[0113] In one embodiment, the via electrode (130) may include a seed layer and an electrically conductive layer formed on the seed layer.

[0114] For example, the seed layer may be formed along the inner wall of the through hole (120) and may uniformly cover the inner wall of the through hole (120). The electrically conductive layer may be formed on the seed layer to fill at least a portion of the internal space of the through hole (120).

[0115] The seed layer can be formed in a dry manner. For example, the seed layer can be formed through a deposition process such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), or Atomic Layer Deposition (ALD). For example, it can be formed by sputtering a metal element along the inner wall of the through hole (120).

[0116] The above seed layer may include metals such as copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), tungsten (W), titanium (Ti), tantalum (Ta), indium (In), molybdenum (Mo), cobalt (Co), tin (Sn), magnesium (Mg), silver (Ag), and gold (Au), or alloys thereof, but is not limited thereto.

[0117] The above electrically conductive layer can be formed by a plating method using the above seed layer.

[0118] The above electrically conductive layer comprises a conductive material. For example, the above electrically conductive layer may comprise metals such as copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), tungsten (W), titanium (Ti), tantalum (Ta), indium (In), molybdenum (Mo), cobalt (Co), tin (Sn), magnesium (Mg), silver (Ag), and gold (Au), or alloys thereof, but is not limited thereto.

[0119] The thickness of the electrically conductive layer can be controlled by adjusting various process conditions, such as the concentration of the plating solution, the plating time, and the type of additive included in the plating solution, during the plating process.

[0120] In some embodiments, the seed layer may include a metal element included in the electrically conductive layer. In some embodiments, the seed layer may include an element different from the metal element included in the electrically conductive layer.

[0121] FIG. 6 is a schematic cross-sectional view of a package substrate according to some embodiments.

[0122] Referring to FIG. 6, the package substrate may include an insulating layer (206) that is disposed on a glass substrate (110) and covers a first surface and a second surface of the glass substrate (110).

[0123] The insulating layer (206) may include an insulating resin. For example, the insulating layer (206) may include an epoxy resin, an acrylic resin, an imide resin, or a combination thereof. In one embodiment, the insulating layer (206) may further include inorganic particles such as fillers.

[0124] The insulating layer (206) can be formed through a lamination method, and specifically, a pressure reduction lamination method can be applied.

[0125] The above insulating resin film is an uncured or semi-cured resin film and may include an epoxy resin, an acrylic resin, an imide resin, or a combination thereof. For example, a build-up layer material such as Ajinomoto's ABF (Ajinomoto Build-up Film) may be used as the above insulating resin film, but is not limited thereto.

[0126] In a state where an insulating resin film is laminated on a glass substrate (110), the insulating resin film can be heat-treated to cure and dry. For example, the curing and drying conditions may be 80°C to 250°C, but are not limited thereto.

[0127] In one embodiment, the insulating layer (206) may be formed through a solution process rather than a lamination method. As an example of a solution process, an insulating organic resin may be applied in a liquid state to the surface of a glass substrate (110) using a method such as spin coating, slot-die coating, dipping, or inkjet printing, and then the insulating layer (206) may be formed through a curing and drying process.

[0128] The package substrate may include an insulating resin that fills the remaining space of the internal space of the through hole (120), excluding the space filled by the via electrode. For example, the insulating resin may be filled into the internal space of the through hole (120) during the process of forming an insulating layer (206) on a glass substrate (110).

[0129] The package substrate may further include a redistribution layer (208) disposed on an insulating layer (206).

[0130] The redistribution layer (208) can be electrically connected to a via electrode (130) formed in a through hole (120) by contacting a via pad (140) disposed on a glass substrate (110) through an internal via (209) formed in an insulating layer (206).

[0131] The internal via (209) is a via wiring embedded in the insulating layer (206) and may be referred to, for example, as a blind via. The internal via (209) can be formed by filling a conductive material into a via hole formed by etching the insulating layer (206). The etching method may include dry etching such as laser etching or plasma etching, or wet etching using a masking layer and an etching solution.

[0132] The redistribution layer (208) can be formed by proceeding with a plating process after forming internal vias (209) in the insulating layer (206).

[0133] In one embodiment, the insulating layer (206) and the redistribution layer (208) can be alternately and repeatedly formed and stacked on the glass substrate (110).

[0134] In one embodiment, a plurality of via pads (140) may be arranged in the width direction (WD) on a first surface and a second surface of a glass substrate (110). The via pads (140) adjacent in the width direction may be physically spaced apart from each other. Additionally, the via pads (140) adjacent in the width direction may be physically connected to each other.

[0135] FIG. 7 is a schematic cross-sectional view of a package substrate according to some embodiments.

[0136] Referring to FIG. 7, the package substrate includes a glass core (100). The glass core (100) may include a glass substrate (110), a through hole (120), a via electrode (130), and a via pad (140). The through hole (120) and the via electrode (130) may be referred to as a TGV (through glass via).

[0137] The glass core (100) can serve as an intermediate or intermediary connecting the upper and lower parts of the package substrate within the package substrate. For example, the via electrode (130) of the glass core (100) can function as a passage for transmitting electrical signals between the upper and lower parts within the package substrate.

[0138] The above package substrate may include an upper layer (200) disposed on one side of a glass core (100).

[0139] The upper layer (200) may include an upper insulating layer (210) covering one side of the glass core (100). For example, the upper insulating layer (210) may cover a first side (112) of the glass substrate (110).

[0140] The upper insulating layer (210) may include insulating organic resins such as epoxy resin, acrylic resin, and imide resin, but is not limited thereto, and any material that functions as an insulator for a semiconductor device or package substrate may be applied as the upper insulating layer (210).

[0141] For example, the upper insulating layer (210) can be formed using a build-up layer material such as EMC (Epoxy Molding Compound), ABF (Ajinomoto Build-up Film), MPI (Modified Polyimide), or an undercoat material.

[0142] The upper layer (200) may further include an upper redistribution layer (220) that is at least partially embedded in the upper insulating layer (210). The upper redistribution layer (220) may be electrically connected to a via electrode (130).

[0143] The upper redistribution layer (220) may be composed of a plurality of layers along the thickness direction of the package substrate. For example, the upper redistribution layer (220) may have a 2-layer structure, a 3-layer structure, a 4-layer structure, a 5-layer structure, or a multilayer structure of 6 layers or more.

[0144] For example, in the case of a four-layer structure, the upper redistribution layer (220) may include a first upper redistribution layer (220a), a second upper redistribution layer (220b), a third upper redistribution layer (220c), and a fourth upper redistribution layer (220d) that are sequentially stacked and connected from one side of the glass core (100).

[0145] In FIG. 7, the upper insulating layer (210) is depicted as a single layer, but the upper insulating layer (210) may be composed of multiple layers. When the upper insulating layer (210) is composed of multiple layers, multiple upper redistribution layers (220) may be disposed on at least one of the upper and lower surfaces of each layer of the upper insulating layer (210).

[0146] The outermost upper redistribution layer (220) in the thickness direction of the package substrate may be exposed from the upper surface of the upper layer (200). The outermost upper redistribution layer (220) may function as a connection electrode connected to a connection terminal of a semiconductor device, etc.

[0147] In one embodiment, the upper layer (200) may further include an upper cover layer (230). The upper cover layer (230) may protect the surface circuit of the package substrate from the external environment. The upper cover layer (230) may include an opening that exposes the outermost upper redistribution layer (220). Through the opening, the outermost upper redistribution layer (220) and a connection terminal of an external component may be connected.

[0148] The upper cover layer (230) may include an insulating film such as a solder resist or a polyimide film (PI).

[0149] The above package substrate may further include a lower layer (300) disposed on the other side of the glass core (100).

[0150] The lower layer (300) may include a lower insulating layer (310) covering the other side of the glass core (100). For example, the lower insulating layer (310) may cover the second side (114) of the glass substrate (110).

[0151] The lower insulating layer (310) may include insulating organic resins such as epoxy resin, acrylic resin, and imide resin, but is not limited thereto, and may be applied as the upper insulating layer (210) as long as it functions as an insulator for a semiconductor device or a package substrate.

[0152] For example, the lower insulating layer (310) can be formed using a build-up layer material such as EMC (Epoxy Molding Compound), ABF (Ajinomoto Build-up Film), MPI (Modified Polyimide), or an undercoat material.

[0153] The lower layer (300) may further include a lower redistribution layer (320) that is at least partially embedded in the lower insulating layer (310). The lower redistribution layer (320) may be electrically connected to the via electrode (130).

[0154] The lower redistribution layer (320) may be composed of a plurality of layers along the thickness direction of the package substrate. For example, the lower redistribution layer (320) may have a 2-layer structure, a 3-layer structure, a 4-layer structure, a 5-layer structure, or a multilayer structure of 6 layers or more.

[0155] For example, in the case of a two-layer structure, the lower redistribution layer (320) may include a first lower redistribution layer (320a) and a second lower redistribution layer (320b) that are sequentially stacked and connected from the other side of the glass core (100).

[0156] In FIG. 7, the lower insulating layer (310) is depicted as a single layer, but the lower insulating layer (310) may be composed of multiple layers. When the lower insulating layer (310) is composed of multiple layers, multiple lower redistribution layers (320) may be disposed on at least one of the upper and lower surfaces of each layer of the lower insulating layer (310).

[0157] The outermost lower redistribution layer (320) in the thickness direction of the package substrate may be exposed to the outside from the lower surface of the lower layer (300). The outermost lower redistribution layer (320) may function as a connection electrode connected to a connection terminal of a semiconductor device, etc.

[0158] In one embodiment, the lower layer (200) may further include a lower cover layer (330). The lower cover layer (330) may protect the surface circuit of the package substrate from the external environment. The lower cover layer (330) may include an opening that exposes the outermost lower redistribution layer (320). Through the opening, the outermost lower redistribution layer (320) and a connection terminal of an external component may be connected.

[0159] The lower cover layer (330) may include an insulating film such as a solder resist or a polyimide film.

[0160] A semiconductor package according to embodiments of the present invention comprises a package substrate according to the embodiments described above; and a semiconductor device mounted on the package substrate.

[0161] In one embodiment, a device may be mounted on the upper layer (200) and / or lower layer (300) of the package substrate. The device may be electrically connected to the package substrate. Examples of the device include a capacitor, a transistor, an impedance, a semiconductor, etc., but are not limited to any device mounted or applied to a semiconductor device.

[0162] In one embodiment, the semiconductor package may further include a motherboard connected to the other side of the package substrate. For example, when the semiconductor device is mounted on the upper layer (200) of the package substrate, the motherboard may be connected to the lower layer (300). For example, when the semiconductor device is mounted on the lower layer (300) of the package substrate, the motherboard may be connected to the upper layer (200).

[0163] In some embodiments, the glass substrate (110) may further include a cavity formed by being recessed inward. For example, the cavity may be formed by recessing inward a portion of the first surface (112) side in the thickness direction of the glass substrate (110), or by recessing inward a portion of the second surface (114) side. Additionally, the cavity may have a shape that penetrates the glass substrate (110) in the thickness direction.

[0164] A device may be mounted in the above cavity. The device may be electrically connected to a package substrate. Examples of devices mounted in the above cavity include various devices that can be used or applied to semiconductor devices, such as capacitor devices, transistor devices, impedance devices, and semiconductor devices.

[0165] The above semiconductor device may be a central processing unit (CPU) chip, a graphic processing unit (GPU) chip, an application processor (AP) chip, or a memory chip.

[0167] The above contents are explained in more detail by the following examples. However, the following examples are merely for illustrating the present invention, and the scope of the present invention is not limited to these examples.

[0169] [Examples and Comparative Examples]

[0170] 1. Example 1

[0171] A glass substrate with a thickness of 0.53t (Corning SG7.8) having a first surface and a second surface facing each other in the thickness direction was prepared. Etching and ion beam treatment were sequentially performed on both sides of the glass substrate to form through holes penetrating the glass substrate in the thickness direction.

[0172] The above etching was performed on both sides of the glass substrate for 3 minutes, and was carried out by placing the glass substrate in a deionized water-based acidic etchant containing 2 M hydrofluoric acid (HF) and 1.1 M nitric acid (HNO3) and applying 80 Hz ultrasound.

[0173] The glass substrate was placed in an ion beam chamber and subjected to ion beam treatment for 3 minutes. The ion beam treatment was performed using an argon (Ar) source at room temperature with an acceleration voltage of 500 eV and an atmospheric pressure of 1×10⁻⁶. -3 It was performed under conditions of Torr, argon flow rate of 5 sccm, and source power of 200 W.

[0174] A glass substrate with through holes formed by the above-described method was used as the package substrate of Example 1.

[0176] 2. Comparative Example 1

[0177] A glass substrate that has not undergone etching and ion beam treatment (i.e., bare glass) was used as the package substrate of Comparative Example 1.

[0179] 3. Comparative Example 2

[0180] A glass substrate with a thickness of 0.53t (Corning SG7.8) was prepared. Both sides of the glass substrate were etched to form through holes penetrating the glass substrate in the thickness direction.

[0181] The above etching was performed on both sides of the glass substrate for 3 minutes, and was carried out by placing the glass substrate in a deionized water-based acidic etchant containing 2 M hydrofluoric acid (HF) and 1.1 M nitric acid (HNO3) and applying 80 Hz ultrasound.

[0182] A glass substrate with through holes formed by the above-described method was used as the package substrate of Comparative Example 2.

[0184] 4. Atomic Composition Analysis

[0185] For each of the first surface region (i.e., the region between depths 16 nm and 72 nm from the first surface toward the center) and the second surface region (i.e., the region between depths 16 nm and 72 nm from the second surface toward the center), the content of potassium, carbon, and oxygen elements was measured at 8 nm intervals.

[0186] Specifically, using the JEOL JAMP-9500F, a high-resolution Auger electron spectrometer, measurements were taken at a rate of 60 s / cycle and 8.0 nm / min using 2 keV Ar ions under conditions of acceleration voltage 10 keV, current 23.0 nA, M3 mode, and tilt 30°.

[0187] The content (atomic%) of potassium, carbon, and oxygen, respectively, was measured out of a total of 100 atomic% of potassium, carbon, and oxygen at each measurement point. The measurement results are shown in Tables 1 to 3 below, and the content of each element according to depth is shown as a graph in Figures 8 to 13.

[0189] Distinction (depth, nm) Example 1 First surface region Second surface region K (atomic %) C (atomic%) O(atomic%) K (atomic %) C (atomic%) O(atomic%) 16 11.18 69.82 19 8.57 82.05 9.38 24 9.61 70.82 19.57 9.85 77.33 12.82 32 11.67 75.66 12.67 9.3 78.08 12.62 40 8.6 80.07 11.33 11.52 70.86 17.62 48 12.58 71.19 16.24 9.5 71.75 18.75 56 10.24 74.25 15.51 7.56 74.33 18.11 64 10.15 79.02 10.83 9.7 71.64 18.66 72 13.21 65.84 20.95 11.91 70.43 17.66 average 10.91 73.33 15.76 9.74 74.56 15.7 K + avg 10.32

[0191] Distinction (depth, nm) Comparative Example 1 First surface region Second surface region K (atomic %) C (atomic%) O(atomic%) K (atomic %) C (atomic%) O(atomic%) 16 10.31 79.51 10.18 8.43 75.62 15.96 24 14.16 70.5 15.33 7.79 80.08 12.13 32 8.48 79.68 11.84 8.94 80.07 10.98 40 13.01 72.81 14.18 9.14 79.67 11.18 48 12.49 69.77 17.74 15.7 66.27 18.03 56 14.65 69.78 15.57 17.83 64.59 17.59 64 10.68 64.55 24.77 9.83 79.01 11.16 72 11.48 75.99 12.53 11.42 72.64 15.94 average 11.91 72.82 15.27 11.14 74.74 14.12 K + avg 11.52

[0193] Distinction (depth, nm) Comparative Example 2 First surface region Second surface region K (atomic %) C (atomic%) O(atomic%) K (atomic %) C (atomic%) O(atomic%) 16 8.18 64.41 27.41 9.78 74.69 15.53 24 13.66 64.55 21.79 10.51 64.68 24.81 32 10.72 74.57 14.71 11.04 72.43 16.54 40 11.77 68.45 19.78 14.02 68.22 17.76 48 8.28 76.41 15.31 9.06 76.96 13.98 56 9.65 70.05 20.3 8.61 71.06 20.33 64 10.08 74.15 15.77 16 68.26 15.73 72 12.48 69.57 17.94 12.49 76.24 11.27 average 10.60 70.27 19.13 11.44 71.57 16.99 K + avg 11.02

[0195] Referring to Tables 1 to 3 above, in the case of Example 1, K calculated by Equation 1 + avg ga was controlled to 11 atomic% or less, and the average value of potassium content in the first surface region (K avg1 ) and the average value of potassium content in the second surface region (K avg2 It was confirmed that all of ) were 11 atomic% or less.

[0196] However, in the case of Comparative Examples 1 and 2, K calculated by Equation 1 + avgGa exceeded 11 atomic%. In addition, in the case of Comparative Example 1, K in both the first surface region and the second surface region avg1 and K avg2 Ga exceeded 11 atomic%, and in the case of Comparative Example 2, K in the second surface region avg2 It was confirmed that it exceeded 11 atomic percent.

[0198] Potassium content at each measurement point ([K + Oxygen content ([O) for ]) 2- The ratio of ])([O 2- ] / [K + ]) was calculated and shown in Table 4 below.

[0199] FIGS. 14 and FIGS. 15 respectively show [O in the first surface region and the second surface region. 2- ] / [K + ] is a graph representing. Specifically, FIG. 14 is a graph showing the ratio of potassium and oxygen content according to depth in the surface area on the upper side of the package substrates of Example 1, Comparative Example 1, and Comparative Example 2. FIG. 15 is a graph showing the ratio of potassium and oxygen content according to depth in the surface area on the lower side of the package substrates of Example 1, Comparative Example 1, and Comparative Example 2.

[0201] Distinction (depth, nm) Example 1 Comparative Example 1 Comparative Example 2 First surface region Second surface region First surface region Second surface region First surface region Second surface region 16 1.699463 1.094515 0.1280342 0.211055 3.350855 1.587934 24 2.036420 1.301522 0.2174468 0.151473 1.595168 2.360608 32 1.085689 1.356989 0.1485943 0.137130 1.372201 1.498188 40 1.317441 1.529513 0.1947534 0.140328 1.680543 1.266761 48 1.290937 1.973684 0.2542640 0.272068 1.849033 1.543046 56 1.514648 2.395502 0.2231298 0.272333 2.103626 2.361207 64 1.066995 1.923711 0.3837335 0.141247 1.564484 0.983125 72 1.585919 1.482787 0.1648901 0.219438 1.4375 0.902321

[0203] Referring to Table 4, FIG. 14, and FIG. 15 above, the package substrate of Example 1 has a ratio of oxygen content to potassium content ([O₂) across the entire area of ​​the first surface region and the second surface region. 2- ] / [K + It was confirmed that ]) exceeds 1 and is 2.5 or less.

[0204] On the other hand, the package substrate of Comparative Example 1 [O in the first surface region 2- ] / [K + There existed a region where ] exceeded 2.5, and in the second surface region as well [O 2- ] / [K +It was confirmed that there exists an area where ] exceeds 2.5.

[0205] In addition, the package substrate of Comparative Example 2 [O in the first surface region 2- ] / [K + There existed a region where ] exceeded 2.5, and in the second surface region [O 2- ] / [K + It was confirmed that there exists a region where ] is 1 or less. Explanation of the symbols

[0207] 100: Glass core 110: Glass substrate 112: Page 1 114: Page 2 120: Through hole 130: via electrode 140: Via Pad 200: Upper layer 206: Insulation layer 208: Redistribution layer 209: Internal via 210: Upper insulation layer 220: Upper redistribution layer 230: Upper cover layer 300: Lower floor 310: Lower insulation layer 320: Lower redistribution layer 330: Lower cover layer SA1: First surface region SA2: Second surface region

Claims

Claim 1 A glass substrate having a first surface and a second surface facing each other; and a through hole penetrating the glass substrate from the first surface to the second surface, wherein the glass substrate comprises a first surface region located from a depth of 16 nm to a depth of 72 nm from the first surface toward the second surface, and a second surface region located from a depth of 16 nm to a depth of 72 nm from the second surface toward the first surface, and K calculated by the following Equation 1. + avg A package substrate in which α is 11 atomic% or less, and in the entire area of ​​the first surface region and the second surface region, the oxygen content is 25 atomic% or less of the total 100 atomic% of oxygen, carbon, and potassium, and the carbon content is 60 atomic% or more of the total 100 atomic% of oxygen, carbon, and potassium: [Equation 1]K + avg = (K avg1 +K avg2 ) / 2 In the above Equation 1, K avg1 is the average of the potassium content values ​​measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point when the content of oxygen, carbon, and potassium, respectively, is measured at 8 nm depth intervals in the first surface region, and K avg2 is the average of the potassium content values ​​measured based on a total of 100 atomic% of oxygen, carbon, and potassium at each measurement point when the content of oxygen, carbon, and potassium, respectively, is measured at intervals of 8 nm depth in the second surface region. Claim 2 In claim 1, K calculated by the above Equation 1 + avg A package substrate having 5 atomic percent to 11 atomic percent or less. Claim 3 In claim 1, K in the above Formula 1 avg1 and K avg2 Package substrates, each having 12 atomic percent or less. Claim 4 A package substrate according to claim 1, wherein the potassium content in the first surface region and the second surface region is smaller than the carbon content. Claim 5 A package substrate according to claim 1, wherein the potassium content in the first surface region and the second surface region is smaller than the oxygen content. Claim 6 delete Claim 7 A package substrate according to claim 1, wherein the potassium content in the entire area of ​​the first surface region and the second surface region is 7 to 14 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium. Claim 8 A package substrate according to claim 1, wherein the oxygen content in the entire area of ​​the first surface region and the second surface region is 8 to 25 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium. Claim 9 A package substrate according to claim 1, wherein the carbon content in the entire area of ​​the first surface region and the second surface region is 65 to 85 atomic percent of the total 100 atomic percent of oxygen, carbon, and potassium. Claim 10 A package substrate according to claim 1, wherein the ratio of the oxygen content to the potassium content in the entire area of ​​the first surface region and the second surface region is greater than 1 and less than or equal to 2.

5. Claim 11 A package substrate according to claim 1, further comprising a via electrode disposed along the inner wall of the through hole, filling at least a portion of the interior of the through hole. Claim 12 A package substrate according to claim 11, further comprising a via pad electrically connected to the via electrode and disposed on at least one surface of the glass substrate. Claim 13 A package substrate according to claim 11, further comprising an upper layer including an upper insulating layer covering the upper surface of the glass substrate, and an upper redistribution layer embedded in the upper insulating layer and electrically connected to the via electrode. Claim 14 A package substrate according to claim 13, further comprising a lower insulating layer covering the lower surface of the glass substrate, and a lower redistribution layer embedded in the lower insulating layer and electrically connected to the via electrode. Claim 15 A semiconductor package comprising: a package substrate according to claim 1; and a semiconductor element disposed on at least one surface of the package substrate.

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