Silicone pad for fixing glass circuit board and method for manufacturing glass circuit board using the silicone pad
Patent Information
- Application Number
- KR1020250001364
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-01-06
- Publication Date
- 2026-09-21
- Estimated Expiration
- 2045-01-06
Smart Images

Figure 112025001300599-PAT00001_ABST
Abstract
Description
Technology Field
[0001] The present invention relates to a method for manufacturing a glass circuit board, wherein a silicon pad having a tacky surface with a surface facing a glass core is temporarily attached to the lower side of an FR4 core, and the glass core is mounted in the mounting space of the FR4 core to fix the glass core with the tacky surface of the silicon pad, thereby manufacturing a glass circuit board, and a silicon pad for fixing a glass circuit board and a method for manufacturing a glass circuit board using said silicon pad. Background Technology
[0003] In recent years, following the trend of miniaturization and multifunctionality in electronic devices, electronic components are becoming more high-functional and smaller.
[0004] With the advancement of digital networks, portable information terminals such as mobile phones and portable computers are becoming high-performance, multi-functional, and high-capacity, and various functions are being integrated and combined into a single device.
[0005] As such, with the miniaturization of electronic devices, there is a demand to reduce the thickness of printed circuit boards.
[0006] As the thickness of printed circuit boards decreases, the problem of warpage of the substrate being processed during the manufacturing of printed circuit boards continues to emerge.
[0007] The aforementioned warping problem causes breakage of the original plate or process defects, leading to a decrease in yield, so a method to overcome this is required.
[0008] For this reason, a glass circuit board with a core made of glass (glass) is provided, as in Public Patent No. 10-2017-0067236 (June 16, 2017).
[0009] Conventionally, during the manufacturing process of the glass circuit board, a glass core is fixed to the mounting area using a carrier film or adhesive tape. However, when the carrier film or tape fixing the glass core is removed, organic materials such as silicone or acrylic remain on the surface of the glass core due to the heat and pressure generated during the process (residue phenomenon), and if they are not completely removed during the process, defects may occur, which can affect the reliability of the product. The problem to be solved
[0011] The present invention aims to provide a silicone pad for fixing a glass circuit board that prevents the occurrence of residue caused by an adhesive by fixing a glass core in the mounting space of an FR4 core using a silicone pad, and a method for manufacturing a glass circuit board using said silicone pad. means of solving the problem
[0013] A silicon pad for fixing a glass circuit board according to the present invention comprises a stiffener layer; and an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on the upper surface.
[0014] In addition, the silicon pad for fixing a glass circuit board according to the present invention may further include a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer.
[0015] At this time, the lower surface of the lower layer according to the present invention can have embossed patterns formed at regular intervals along the width.
[0016] In addition, the lower surface of the lower layer according to the present invention may have protrusions formed at regular intervals along the width.
[0017] A method for manufacturing a glass circuit board using a silicon pad according to the present invention comprises: a) a step of preparing a glass core; b) a step of fixing the prepared glass core to an FR4 core with a silicon pad and laminating an ABF film containing a release film; and c) a step of building up a circuit pattern on the surface of the glass core.
[0018] At this time, the silicone pad according to the present invention includes a stiffener layer and an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on the upper surface.
[0019] In addition, the silicone pad according to the present invention may further include a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer.
[0020] And in step b) according to the present invention, the prepared glass core is fixed to the FR4 core with a silicone pad and an ABF film is laminated, the silicone pad is temporarily attached to the lower side of the FR4 core with a tacky surface formed on the upper side, and the glass core mounted in the mounting space of the FR4 core can be fixed with the tacky surface of the silicone pad.
[0021] In addition, according to the present invention, in the step of c) building up a circuit pattern on the surface of the glass core, the method comprises: curing an ABF film bonded to the glass core; drilling an ABF film at a via location formed on the glass core to expose the via to the outside; adjusting the surface roughness of the ABF film by a Desmear process after peeling off the release liner from the ABF film; forming a seed layer on the surface of the ABF film with adjusted surface roughness; laminating a dry film onto the seed layer formed on the surface of the ABF film; developing an image pattern corresponding to the circuit pattern using a photolithography process on the dry film; forming a circuit pattern by copper plating the seed layer and via exposed to the outside, excluding the portion where the image pattern is formed on the dry film, by electrolytic copper plating; and after peeling off and removing the dry film, insulation between conductive patterns by flash etching It includes a step to make it happen.
[0022] In addition, the method for manufacturing a glass circuit board using a silicon pad according to the present invention comprises: a) a step of preparing a glass core; b) a step of fixing the prepared glass core to an FR4 core with a silicon pad and laminating an ABF film including a copper foil layer; and c) a step of building up a circuit pattern on the surface of the glass core.
[0023] At this time, c) in the step of building up a circuit pattern on the surface of the glass core according to the present invention, the method comprises: curing an ABF film bonded to the glass core; drilling the ABF film and the copper foil layer at the via location formed on the glass core among the ABF film to expose the via to the outside; after exposing the via by drilling, adjusting the surface roughness of the copper foil layer by a Desmear process; forming a seed layer on the surface of the copper foil layer with adjusted surface roughness; laminating a dry film on the seed layer formed on the surface of the copper foil layer; developing an image pattern corresponding to the circuit pattern using a photolithography process on the dry film; forming a circuit pattern by copper plating the seed layer and via exposed to the outside, excluding the portion where the image pattern of the dry film is formed, by electrolytic copper plating; and after peeling off and removing the dry film, insulation between the conductive patterns is achieved by flash etching.
[0024] Here, the glass circuit board according to the present invention can be laminated in 2 to 30 layers to form a multilayer glass circuit board.
[0025] In addition, it may be an interposer or flip-chip ball grid array (FC-BGA) product that connects a chip and a substrate using the glass circuit board according to the present invention. Effects of the invention
[0027] The effects exhibited by the silicon pad for fixing a glass circuit board according to the present invention and the method for manufacturing a glass circuit board using the silicon pad are as follows.
[0028] By using a silicone pad to fix the glass core into the mounting space of the FR4 core, it has the effect of preventing residue caused by the adhesive.
[0029] The lower surface of the silicone pad can be formed with an embossed or protruding shape to minimize adhesion to the lead film, facilitate detachment from the lead film, and reduce the leakage of the silicone pad. Brief explanation of the drawing
[0031] FIG. 1 is an illustrative diagram showing an example of use of a silicon pad for fixing a glass circuit board, comprising a stiffener layer and an upper layer, according to an embodiment of the present invention. FIG. 2 is an illustrative diagram showing an example of use of a silicon pad for fixing a glass circuit board, further including a lower layer according to an embodiment of the present invention. FIG. 3 is an exemplary diagram showing the process of preparing a glass core step by step in a method for manufacturing a glass circuit board using a silicon pad according to the first embodiment of the present invention. FIG. 4 is an exemplary diagram showing stepwise the process of fixing a prepared glass core to an FR4 core with a silicon pad and laminating an ABF film including a release film in the method of manufacturing a glass circuit board using a silicon pad according to the first embodiment of the present invention. FIGS. 5 and 6 are exemplary diagrams showing, in step-by-step, the process of building up a circuit pattern on the surface of a glass core in a method for manufacturing a glass circuit board using a silicon pad according to the first embodiment of the present invention. FIG. 7 is an exemplary diagram showing the process of preparing a glass core step by step in a method for manufacturing a glass circuit board using a silicon pad according to a second embodiment of the present invention. FIG. 8 is an exemplary diagram showing stepwise the process of fixing a prepared glass core to an FR4 core with a silicon pad and laminating an ABF film including a copper foil layer in a method for manufacturing a glass circuit board using a silicon pad according to the second embodiment of the present invention. FIGS. 9 and 10 are exemplary diagrams showing, in step-by-step, the process of building up a circuit pattern on the surface of a glass core in a method for manufacturing a glass circuit board using a silicon pad according to a second embodiment of the present invention. Specific details for implementing the invention
[0032] Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the attached drawings. Prior to this, terms and words used in this specification and claims should not be interpreted as being limited to their ordinary or dictionary meanings, and based on the principle that the inventor can appropriately define the concepts of the terms to best describe his invention, they should be interpreted in a meaning and concept consistent with the technical spirit of the present invention.
[0033] Therefore, the embodiments described in this specification and the configurations illustrated in the drawings are merely the most preferred embodiments of the present invention and do not represent all of the technical ideas of the present invention; thus, it should be understood that there may be equivalent variations that can replace them at the time of filing this application.
[0034] When carrying out a glass circuit board manufacturing process using a jig with a cavity, there are limitations to the materials that can fix the glass core. Although it can be fixed using a general carrier film or low-adhesion tape, when the fixing film or tape is removed during the process, organic materials such as silicon or acrylic remain on the surface of the glass core due to heat and pressure.
[0035] As described above, if residue is not completely removed from the surface of the glass core during the process, it may affect the reliability of the product.
[0036] The present invention relates to a silicone pad for fixing a glass circuit board and a method for manufacturing a glass circuit board using said silicone pad, wherein a silicone pad having a sticky tacky surface facing the glass core is temporarily attached to the lower side of an FR4 core, the glass core is mounted in the mounting space of the FR4 core, and the glass core is fixed with the tacky surface of said silicone pad to manufacture the glass circuit board. Referring to the drawings, the invention is as follows.
[0037] A silicone pad (10) for fixing a glass circuit board according to an embodiment of the present invention with reference to FIG. 1 is a pad that is temporarily attached to the lower surface of a glass core (100) to fix the glass core (100) so as to control its movement. The thickness of the silicone pad (10) must match the thickness of the glass core (100) in a 1:1 ratio, and it is preferable that the thickness be within 0.2 to 3.0 mm. A stiffener layer (11) is located in the center, and an upper layer (12) is formed on the upper side of the stiffener layer (11).
[0038] At this time, the upper layer (12) is formed with a tacky surface (14) on its upper surface, and the glass core (100) that is seated on the upper surface of the silicone pad (10) is fixed to the tacky surface (14) to control the flow of the glass core (100).
[0039] The above tacky surface (14) has an adhesive strength of 5 to 200 gf / in, and fixes the glass substrate so that it does not flow with its sticky surface, and prevents the occurrence of residue (adhesive residue or adhesive marks remaining on the surface of the glass substrate) when peeled off from the glass substrate after the process is completed.
[0040] Here, if the adhesive strength of the tacky surface (14) is less than 5 gf / in, the glass core (100) cannot be perfectly fixed, causing the glass core (100) to detach and the fixed position to shift during process movement, and if it is 200 gf / in or more, there is a problem that the glass core (100) breaks or does not detach easily from the glass core (100) when detached from the glass core (100).
[0041] And with reference to FIG. 2, the silicon pad (10) for fixing a glass circuit board according to an embodiment of the present invention may further have a lower layer (13) formed on the lower side of the stiffener layer (11).
[0042] The lower layer (13) has a relatively lower degree of tackiness than the upper layer (12), and the lower surface of the lower layer (13) can form embosses (15) at regular intervals along the width.
[0043] Accordingly, an embossing (15) is formed on the lower layer (13) of the silicone pad (10) to minimize the adhesion with the lead film (20) that is adhered to the glass circuit board during the manufacturing process, thereby facilitating the peeling of the lead film (20) later and reducing the warping of the silicone pad (10).
[0044] The above emboss (15) is not limited to any one shape and can be formed in various shapes such as square, circle, ellipse, triangle, etc.
[0045] In addition, instead of the embossing (15), protrusions (16) can be formed at regular intervals along the width on the lower surface of the lower layer (13). Here, the protrusions (16) also have the same function as the embossing (15).
[0046] Accordingly, the silicone pad according to the embodiment of the present invention suppresses the residue of organic matter during the manufacturing process of a glass circuit board, and while the principle is to discard fixed films after a single use, the silicone pad according to the present invention can be reused if there is no problem with the adhesive strength of the tack surface.
[0047] In addition, during the vacuum lamination process of the insulating layer, the cushioning (elasticity) of the silicone pad can suppress the occurrence of breakage (crack) of the glass core during the process.
[0048] The method for manufacturing a glass circuit board using the above-mentioned silicon pad is as follows.
[0049] < First embodiment Yes (SAP (Semi-Additive Process) process)>
[0050] A method for manufacturing a glass circuit board using a silicon pad according to an embodiment of the present invention with reference to FIGS. 3 to 6 involves preparing a glass core, fixing the prepared glass core to an FR4 core with a silicon pad, laminating an ABF film containing a release film, and building up a circuit pattern on the surface of the glass core. The above-described process is examined in more detail step by step as follows.
[0051] First, in step a), prepare a glass core (100).
[0052] At this time, vias are formed to electrically connect the circuit patterns on the upper and lower surfaces of the prepared glass core (100), and the process is as follows.
[0053] The above glass core (100) has a relatively lower coefficient of thermal expansion than a conventional insulating layer, high electrical insulation, high flatness, and heat resistance, making it suitable for forming fine circuit patterns, and is currently in the spotlight as a basic material for circuit boards.
[0054] A micro-hole (101) penetrating the upper and lower parts of the glass core (100) is formed by drilling with a laser at each point where a via (105) is to be formed in the glass core (100) having the corresponding size (width).
[0055] When a microhole (101) is formed in the glass core (100) as described above, an etching solution is injected into the microhole (101) to form a through-hole (102) by wet etching.
[0056] Accordingly, when an etching solution is injected into the microhole (101), the inner surface of the microhole (101) is etched by the etching solution, and a through hole (102) having the corresponding diameter is formed.
[0057] And when a through hole (102) is formed in the glass core (100) as described above, a first seed layer (103) is formed in the glass core (100) and the through hole (102).
[0058] The first seed layer (103) is formed by a first electroless copper plating process. By performing a first electroless copper plating process on the glass core (100) and the through hole (102), a first seed layer (103) with a thickness of several μm is formed along the surface of the glass core (100) and the inner circumference of the through hole (102).
[0059] When a first seed layer (103) is formed along the surface of the glass core (100) and the inner circumference of the through hole (102) by the first electroless copper plating as described above, the next step is to perform first electrolytic copper plating on the surface of the glass core (100) and the inner circumference of the through hole (102) to form a first copper plating layer (104) that is thicker than the first seed layer (103) on the surface of the glass core (100) and the inner circumference of the through hole (102).
[0060] At this time, the through hole (102) is filled with copper plating to form a via (105).
[0061] As described above, when the through hole (102) formed in the glass core (100) is filled with copper plating to form a via (105), the surface of the glass core (100) is polished.
[0062] At this time, the surface polishing of the glass core (100) is performed by chemical mechanical planarization (CMP), and as the surface of the glass core (100) is polished, the first seed layer (103) and the first copper plating layer (104) formed on the surface of the glass core (100) are removed, thereby forming a uniformly flat surface on the surface of the glass core (100).
[0063] When the glass core (100) is prepared through the process described above, the next step is step b), in which the glass core (100) prepared with the silicone pad (10) is fixed to the FR4 core (200), and an ABF (Ajinomoto Build-up Film) film (111, 121) containing a release film (112, 122) is laminated.
[0064] At this time, the FR4 core (200) is made of glass fiber reinforced epoxy resin material, and it is preferable that a mounting space (201) open at the top and bottom is formed in the area of the FR4 core (200) where the glass core (100) is placed so that the glass core (100) can be mounted.
[0065] The above FR4 core (200) can be separated from the glass core when an ABF film is bonded to the glass core or when a seed layer or a copper plating layer is formed during the glass circuit board manufacturing process.
[0066] And the above silicone pad (10) is temporarily attached to the lower surface of the FR4 core (200) by a lead film (20) on the lower side of the mounting space (201) of the FR4 core (200).
[0067] At this time, the lead film (20) is temporarily attached to the lower surface of the silicone pad (10) to protect the silicone pad (10) from the external environment, and when the silicone pad (10) is temporarily attached to the lower surface of the FR4 core (200), it is peeled off and removed from the silicone pad (10).
[0068] And the upper surface of the above silicone pad (10) is made of a sticky tacky surface (14) and is easily attached to the lower surface of the above FR4 core (200).
[0069] As described above, when the silicone pad (10) is temporarily attached to the lower side of the mounting space (201) of the FR4 core (200), the glass core (100) having vias (105) formed by step a) is mounted inside the mounting space (201).
[0070] At this time, the glass core (100) mounted inside the mounting space (201) of the FR4 core (200) is placed on the tack surface (14) of the silicone pad (10) which is temporarily attached to the lower surface of the FR4 core (200), and the movement (detachment) of the glass core (100) is prevented from moving on the sticky tack surface (14) of the silicone pad (10) during the process.
[0071] Here, it is preferable that the thickness of the FR4 core (200) be matched 1:1 with the thickness of the glass core (100) to be mounted. If the thickness of the FR4 core (200) and the thickness of the glass core (100) do not match each other, there is a high possibility of producing defective products due to the occurrence of voids and inability to accurately receive applied pressure during the mounting / stacking process.
[0072] In addition, the tolerance between the periphery of the glass core (100) and the mounting space (201) is +30㎛ on one side of the glass core (100). If the tolerance is 30㎛ or less on one side, mounting of the glass core (100) may be impossible, and if it is 30㎛ or more on one side, problems such as detachment of the glass core (100) during the process and voids occurring when laminating ABF films (111, 121) occurred.
[0073] And when the glass core (100) is mounted inside the mounting space (201) of the FR4 core (200) as described above, a first ABF (Ajinomoto Build-up Film) film (111) is bonded to the upper surface of the FR4 core (200).
[0074] At this time, it is preferable that the first ABF film (111) be in a semi-cured state (B-stage), and the first release film (112) is included on the upper surface of the first ABF film (111) and is bonded to the upper surface of the FR4 core (200) by a roll-to-roll vacuum lamination method.
[0075] And when the first ABF film (111) is bonded to the upper surface of the FR4 core (200) as described above, the silicone pad (10) temporarily bonded to the lower surface of the FR4 core (200) is separated and removed, and then the second ABF film (121) is bonded to the lower surface of the FR4 core (200).
[0076] At this time, even if the silicone pad (10) attached to the lower surface of the FR4 core (200) is separated, the glass core (100) mounted inside the mounting space (201) of the FR4 core (200) is fixed by the first ABF film (111) in a semi-cured state (B-stage), and the movement (detachment) of the glass core (100) is controlled.
[0077] Here, the second ABF film (121) is also preferably in a semi-cured state (B-stage), and the lower surface of the second ABF film (121) includes a second release film (122) and is bonded to the lower surface of the FR4 core (200) by a roll-to-roll vacuum lamination method.
[0078] After fixing the glass core (100) prepared as a silicone pad (10) to the FR4 core (200) in the above process and laminating the ABF (Ajinomoto Build-up Film) films (111, 121), the next step is to build up a circuit pattern (107) on the surface of the glass core (100) in step c).
[0079] Looking at the process of building up a circuit pattern (300) on the surface of the glass core (100), first, heat or pressure is applied to the first ABF film (111) and the second ABF film (121) bonded to the upper and lower surfaces of the glass core (100) respectively, based on the glass core (100), so that the first ABF film (111) and the second ABF film (121) are fully cured (C-stage), thereby securing adhesion to the upper and lower surfaces of the glass core (100) respectively.
[0080] When the first ABF film (111) and the second ABF film (121) are fully cured, the via (105) formed in the glass core (100) is opened to the outside.
[0081] At this time, the opening of the via (105) is achieved by laser drilling, and the via (105) is drilled with a laser (UV) at the point where it is located among the first ABF film (111) and the second ABF film (121), so that the upper and lower ends of the via (105) are exposed to the outside.
[0082] When the via (105) is opened in the first ABF film (111) and the second ABF film (121) bonded to the glass core (100) as described above, the first release film (112) and the second release film (122) attached to the first ABF film (111) and the second ABF film (121), respectively, are peeled off and removed.
[0083] Then, desmearing is performed on the surface of the first ABF film (111) and the second ABF film (121) from which the first release film (112) and the second release film (122) have been removed, thereby adjusting the surface roughness of the first ABF film (111) and the second ABF film (121).
[0084] When the surface roughness of the first ABF film (111) and the second ABF film (121) is adjusted as described above, a second seed layer (106) of a certain thickness is formed on the glass core (100) bonded with the first ABF film (111) and the second ABF film (121).
[0085] At this time, it is preferable that the second seed layer (106) be formed by a second electroless copper plating, and a second seed layer (106) with a thickness of several μm is formed on the upper and lower surfaces of the first ABF film (111) and the second ABF film (121) and the via (105) exposed to the outside.
[0086] As described above, when a second seed layer (106) is formed on the surface of the first ABF film (111) and the second ABF film (121) and on the upper and lower sides of the via (105), a dry film (130) is laminated onto the second seed layer (106) of each of the first ABF film (111) and the second ABF film (121).
[0087] A Direct Image (DI) exposure process is performed by outputting laser light in a form corresponding to a circuit pattern to the dry film (130) above, and reacting the dry film (130), which is a monomer, into a polymer by the light energy of the laser to perform an exposure operation that reproduces the required pattern image.
[0088] Then, a development process is performed to remove the parts that were not converted into a polymer during the exposure process using sodium carbonate, and an image pattern corresponding to the circuit pattern (107) is formed on the dry film (130).
[0089] When the portion excluding the image pattern portion of the dry film (130) is removed through the development process, a second electrolytic copper plating is performed on the exposed portion of the second seed layer (106), excluding the portion where the image pattern of the dry film (130) is formed.
[0090] Copper plating is performed on the exposed portion of the second seed layer (106), excluding the portion where the image pattern of the dry film (130) is formed by the above-mentioned second electrolytic copper plating, and a circuit pattern (107) is formed on the surface of the second seed layer (106).
[0091] Then, when a circuit pattern (107) is formed on the second seed layer (106) by the second electrolytic copper plating described above, the dry film (130) is peeled off and removed, and then the second seed layer (106) on which the second electrolytic copper plating layer is not formed is removed by flash etching by the image pattern of the dry film (130) so that insulation between the conductive patterns is achieved.
[0092] Accordingly, circuit patterns (107) are formed on the upper and lower surfaces of the glass core (100) respectively through the above process, and the circuit patterns (107) on the upper and lower surfaces of the glass core (100) are electrically connected by vias (105) formed in the glass core (100) to complete the glass circuit board.
[0093] The glass circuit board manufactured by the above process can be stacked in 2 to 30 layers to form a multilayer circuit board.
[0094] In addition, it may be an interposer or flip-chip ball grid array (FC-BGA) product that connects the chip and the substrate using the glass circuit board.
[0095] <Je Example 2 ( mSAP (Modified Semi-Additive Process)>
[0096] A method for manufacturing a glass circuit board using a silicon pad according to an embodiment of the present invention with reference to FIGS. 7 to 10 involves preparing a glass core, fixing the prepared glass core to an FR4 core with a silicon pad, laminating an ABF film containing a copper foil layer, and building up a circuit pattern on the surface of the glass core. The above-described process is examined in more detail step by step as follows.
[0097] First, in step a), prepare a glass core (100).
[0098] At this time, vias are formed to electrically connect the circuit patterns on the upper and lower surfaces of the prepared glass core (100), and the process is as follows.
[0099] The above glass core (100) has a relatively lower coefficient of thermal expansion than a conventional insulating layer, high electrical insulation, high flatness, and heat resistance, making it suitable for forming fine circuit patterns, and is currently in the spotlight as a basic material for circuit boards.
[0100] A micro-hole (101) penetrating the upper and lower parts of the glass core (100) is formed by drilling with a laser at each point where a via (105) is to be formed in the glass core (100) having the corresponding size (width).
[0101] When a microhole (101) is formed in the glass core (100) as described above, an etching solution is injected into the microhole (101) to form a through-hole (102) by wet etching.
[0102] Accordingly, when an etching solution is injected into the microhole (101), the inner surface of the microhole (101) is etched by the etching solution, and a through hole (102) having the corresponding diameter is formed.
[0103] And when a through hole (102) is formed in the glass core (100) as described above, a first seed layer (103) is formed in the glass core (100) and the through hole (102).
[0104] The first seed layer (103) is formed by a first electroless copper plating process. By performing a first electroless copper plating process on the glass core (100) and the through hole (102), a first seed layer (103) with a thickness of several μm is formed along the surface of the glass core (100) and the inner circumference of the through hole (102).
[0105] When a first seed layer (103) is formed along the surface of the glass core (100) and the inner circumference of the through hole (102) by the first electroless copper plating as described above, the next step is to perform first electrolytic copper plating on the surface of the glass core (100) and the inner circumference of the through hole (102) to form a first copper plating layer (104) that is thicker than the first seed layer (103) on the surface of the glass core (100) and the inner circumference of the through hole (102).
[0106] At this time, the through hole (102) is filled with copper plating to form a via (105).
[0107] As described above, when the through hole (102) formed in the glass core (100) is filled with copper plating to form a via (105), the surface of the glass core (100) is polished.
[0108] At this time, the surface polishing of the glass core (100) is performed by chemical mechanical planarization (CMP), and as the surface of the glass core (100) is polished, the first seed layer (103) and the first copper plating layer (104) formed on the surface of the glass core (100) are removed, thereby forming a uniformly flat surface on the surface of the glass core (100).
[0109] When the glass core (100) is prepared through the process described above, the next step is step b), in which the glass core (100) prepared as a silicon pad (10) is fixed to the FR4 core (200) and an ABF (Ajinomoto Build-up Film) film (111, 121) containing a copper foil layer (113, 123) is laminated.
[0110] At this time, the FR4 core (200) is made of glass fiber reinforced epoxy resin material, and it is preferable that a mounting space (201) open at the top and bottom is formed in the area of the FR4 core (200) where the glass core (100) is placed so that the glass core (100) can be mounted.
[0111] The above FR4 core (200) can be separated from the glass core when an ABF film is bonded to the glass core or when a seed layer or a copper plating layer is formed during the glass circuit board manufacturing process.
[0112] And the above silicone pad (10) is temporarily attached to the lower surface of the FR4 core (200) by a lead film (20) on the lower side of the mounting space (201) of the FR4 core (200).
[0113] At this time, the lead film (20) is temporarily attached to the lower surface of the silicone pad (10) to protect the silicone pad (10) from the external environment, and when the silicone pad (10) is temporarily attached to the lower surface of the FR4 core (200), it is peeled off and removed from the silicone pad (10).
[0114] And the upper surface of the above silicone pad (10) is made of a sticky tacky surface (14) and is easily attached to the lower surface of the above FR4 core (200).
[0115] As described above, when the silicone pad (10) is temporarily attached to the lower side of the mounting space (201) of the FR4 core (200), the glass core (100) having vias (105) formed by step a) is mounted inside the mounting space (201).
[0116] At this time, the glass core (100) mounted inside the mounting space (201) of the FR4 core (200) is placed on the tack surface (14) of the silicone pad (10) which is temporarily attached to the lower surface of the FR4 core (200), and the movement (detachment) of the glass core (100) is prevented from moving on the sticky tack surface (14) of the silicone pad (10) during the process.
[0117] Here, it is preferable that the thickness of the FR4 core (200) be matched 1:1 with the thickness of the glass core (100) to be mounted. If the thickness of the FR4 core (200) and the thickness of the glass core (100) do not match each other, there is a high possibility of producing defective products due to the occurrence of voids and inability to accurately receive applied pressure during the mounting / stacking process.
[0118] In addition, the tolerance between the periphery of the glass core (100) and the mounting space (201) is +30㎛ on one side of the glass core (100). If the tolerance is 30㎛ or less on one side, mounting of the glass core (100) may be impossible, and if it is 30㎛ or more on one side, problems such as detachment of the glass core (100) during the process and voids occurring when laminating ABF films (111, 121) occurred.
[0119] And when the glass core (100) is mounted inside the mounting space (201) of the FR4 core (200) as described above, a first ABF (Ajinomoto Build-up Film) film (111) is bonded to the upper surface of the FR4 core (200).
[0120] At this time, it is preferable that the first ABF film (111) be in a semi-cured state (B-stage), and the upper surface of the first ABF film (111) includes a first copper foil layer (113) and is bonded to the upper surface of the FR4 core (200) by a roll-to-roll vacuum lamination method.
[0121] And when the first ABF film (111) is bonded to the upper surface of the FR4 core (200) as described above, the silicone pad (10) temporarily bonded to the lower surface of the FR4 core (200) is separated and removed, and then the second ABF film (121) is bonded to the lower surface of the FR4 core (200).
[0122] At this time, even if the silicone pad (10) attached to the lower surface of the FR4 core (200) is separated, the glass core (100) mounted inside the mounting space (201) of the FR4 core (200) is fixed by the first ABF film (111) in a semi-cured state (B-stage), and the movement (detachment) of the glass core (100) is controlled.
[0123] Here, the second ABF film (121) is also preferably in a semi-cured state (B-stage), and the lower surface of the second ABF film (121) includes a second copper foil layer (123) and is bonded to the lower surface of the FR4 core (200) by a roll-to-roll vacuum lamination method.
[0124] After fixing the glass core (100) prepared as a silicone pad (10) to the FR4 core (200) in the above process and laminating the ABF (Ajinomoto Build-up Film) films (111, 121), the next step is to build up a circuit pattern (107) on the surface of the glass core (100) in step c).
[0125] Looking at the process of building up a circuit pattern (300) on the surface of the glass core (100), first, heat or pressure is applied to the first ABF film (111) and the second ABF film (121) bonded to the upper and lower surfaces of the glass core (100) respectively, based on the glass core (100), so that the first ABF film (111) and the second ABF film (121) are fully cured (C-stage), thereby securing adhesion to the upper and lower surfaces of the glass core (100) respectively.
[0126] When the first ABF film (111) and the second ABF film (121) are fully cured, the via (105) formed in the glass core (100) is opened to the outside.
[0127] At this time, the opening of the via (105) is achieved by laser drilling, and the via (105) is drilled with a laser (UV) at the point where it is located among the first ABF film (111) and the second ABF film (121), so that the upper and lower ends of the via (105) are exposed to the outside.
[0128] When a via (105) is opened in the first ABF film (111) and the second ABF film (121) bonded to the glass core (100) as described above, a desmear is performed on the surface of the first copper foil layer (113) and the second copper foil layer (123) to adjust the surface roughness of the first copper foil layer (113) and the second copper foil layer (123).
[0129] As described above, when the surface roughness of the first copper foil layer (113) and the second copper foil layer (123) is adjusted, a second seed layer (106) of a certain thickness is formed on the surface of the first copper foil layer (113) and the second copper foil layer (123).
[0130] At this time, it is preferable that the second seed layer (106) be formed by a second electroless copper plating, and a second seed layer (106) with a thickness of several μm is formed on the surface of the first copper foil layer (113) and the second copper foil layer (123) and on the upper and lower sides of the via (105) exposed to the outside.
[0131] As described above, when a second seed layer (106) is formed on the surface of the first copper foil layer (113) and the second copper foil layer (123) and on the upper and lower sides of the via (105), a dry film (130) is laminated onto the second seed layer (106) of each of the first copper foil layer (113) and the second copper foil layer (123).
[0132] A Direct Image (DI) exposure process is performed by outputting laser light in a form corresponding to a circuit pattern to the dry film (130) above, and reacting the dry film (130), which is a monomer, into a polymer by the light energy of the laser to perform an exposure operation that reproduces the required pattern image.
[0133] Then, a development process is performed to remove the parts that were not converted into a polymer during the exposure process using sodium carbonate, and an image pattern corresponding to the circuit pattern (107) is formed on the dry film (130).
[0134] When the portion excluding the image pattern portion of the dry film (130) is removed through the development process, a second electrolytic copper plating is performed on the exposed portion of the second seed layer (106), excluding the portion where the image pattern of the dry film (130) is formed.
[0135] Copper plating is performed on the exposed portion of the second seed layer (106), excluding the portion where the image pattern of the dry film (130) is formed by the above-mentioned second electrolytic copper plating, and a circuit pattern (107) is formed on the surface of the second seed layer (106).
[0136] Then, when a circuit pattern (107) is formed on the second seed layer (106) by the second electrolytic copper plating described above, the dry film (130) is peeled off and removed, and then the second seed layer (106) on which the second electrolytic copper plating layer is not formed is removed by flash etching by the image pattern of the dry film (130) so that insulation between the conductive patterns is achieved.
[0137] Accordingly, circuit patterns (107) are formed on the upper and lower surfaces of the glass core (100) respectively through the above process, and the circuit patterns (107) on the upper and lower surfaces of the glass core (100) are electrically connected by vias (105) formed in the glass core (100) to complete the glass circuit board.
[0138] The glass circuit board manufactured by the above process can be stacked in 2 to 30 layers to form a multilayer circuit board.
[0139] In addition, it may be an interposer or flip-chip ball grid array (FC-BGA) product that connects the chip and the substrate using the glass circuit board.
[0140] A method for manufacturing a glass circuit board using a silicone pad according to an embodiment of the present invention prevents the occurrence of residue due to adhesive by fixing the glass core in the mounting space of the FR4 core using the silicone pad, and forms the lower surface of the silicone pad with an embossed or protruding surface to minimize adhesion with the lead film, facilitate detachment from the lead film, and reduce the piping of the silicone pad.
[0141] Since individual components (PCS) are installed within the mounting space of FR4, the risk of damage during processing and movement between processes is reduced compared to glass substrates, and in the event of damage to the glass circuit board, individual components (PCS) can be selected and removed, thereby reducing the cost associated with defects.
[0142] The present invention has been described with reference to the embodiments illustrated in the drawings, but this is merely illustrative, and those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims. Explanation of the symbols
[0144] 10: Silicone pad 11: Stiffener layer 12: Upper layer 13: Lower layer 14: Tacky 15: Embossed 16: Protrusion 20: Lead film 100: Glass core 101: Microholes 102: Through Hole 103: 1st Seed Floor 104: First copper plating layer 105: Via 106: Second seed layer 107: Circuit pattern 111: 1st ABF film 112: 1st release film 113: First copper foil layer 121: 2nd ABF Film 122: 2nd Release Film 123: Second copper foil layer 130: Dry film 200: FR4 core 201: Manager's Space
Claims
Claim 1 A silicone pad for fixing a glass circuit board, which is temporarily attached to the lower surface of a glass substrate to control the flow of the glass substrate, comprising: a stiffener layer; an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on its upper surface; and a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer; wherein the lower surface of the lower layer has embossed patterns formed at regular intervals along its width. Claim 2 delete Claim 3 delete Claim 4 A silicone pad for fixing a glass circuit board, which is temporarily attached to the lower surface of a glass substrate to control the flow of the glass substrate, comprising: a stiffener layer; an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on its upper surface; and a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer; wherein the lower surface of the lower layer has protrusions formed at regular intervals along its width. Claim 5 a) a step of preparing a glass core; b) a step of fixing the prepared glass core to an FR4 core with a silicon pad and laminating an ABF film containing a release film; and c) a step of building up a circuit pattern on the surface of the glass core; wherein the silicon pad comprises a stiffener layer, an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on the upper surface, and a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer, and wherein the lower surface of the lower layer has embossing formed at regular intervals along the width. Claim 6 a) a step of preparing a glass core; b) a step of fixing the prepared glass core to an FR4 core with a silicon pad and laminating an ABF film including a copper foil layer; and c) a step of building up a circuit pattern on the surface of the glass core; wherein the silicon pad comprises a stiffener layer, an upper layer formed on the upper side of the stiffener layer and having a sticky tacky surface formed on the upper surface, and a lower layer formed on the lower side of the stiffener layer and having a relatively lower degree of tackiness than the upper layer, and wherein the lower surface of the lower layer has protrusions formed at regular intervals along its width. Claim 7 delete Claim 8 delete Claim 9 delete Claim 10 delete Claim 11 A method for manufacturing a glass circuit board using a silicon pad, wherein, in either claim 5 or claim 6, in the step b) of fixing a prepared glass core to an FR4 core with a silicon pad and laminating an ABF film, the silicon pad is temporarily attached to the lower side of the FR4 core with a tacky surface formed on its upper side, and the glass core mounted in the mounting space of the FR4 core is fixed with the tacky surface of the silicon pad. Claim 12 In claim 5, in the step of c) building up a circuit pattern on the surface of the glass core, the method comprises: curing an ABF film bonded to the glass core; drilling an ABF film at a via location formed on the glass core to expose the via to the outside; adjusting the surface roughness of the ABF film by a Desmear process after peeling off the release liner from the ABF film; forming a seed layer on the surface of the ABF film with adjusted surface roughness; laminating a dry film onto the seed layer formed on the surface of the ABF film; developing an image pattern corresponding to the circuit pattern using a photolithography process on the dry film; forming a circuit pattern by copper plating the seed layer and via exposed to the outside, excluding the portion where the image pattern is formed on the dry film, by electrolytic copper plating; and after peeling off and removing the dry film, between the conductive patterns by flash etching A method for manufacturing a glass circuit board using a silicon pad, comprising a step of providing insulation. Claim 13 In claim 6, the step of c) building up a circuit pattern on the surface of the glass core comprises: curing an ABF film bonded to the glass core; drilling the ABF film and the copper foil layer at the via location formed on the glass core to expose the via to the outside; adjusting the surface roughness of the copper foil layer by a Desmear process after exposing the via by drilling; forming a seed layer on the surface of the copper foil layer with adjusted surface roughness; laminating a dry film on the seed layer formed on the surface of the copper foil layer; developing an image pattern corresponding to the circuit pattern using a photolithography process on the dry film; forming a circuit pattern by copper plating the seed layer and via exposed to the outside, excluding the portion of the dry film where the image pattern is formed, by electrolytic copper plating; and, after peeling off and removing the dry film, ensuring insulation between conductive patterns by flash etching. A method for manufacturing a glass circuit board using a silicon pad including. Claim 14 A method for manufacturing a glass circuit board using silicon pads that form a multilayer circuit board, wherein the glass circuit board is laminated in 2 to 30 layers according to either claim 5 or claim 6. Claim 15 A method for manufacturing a glass circuit board using a silicon pad, characterized in that, in either claim 5 or claim 6, the product is an interposer or flip-chip ball grid array (FC-BGA) that connects a chip and a substrate using the glass circuit board.
Citation Information
Patent Citations
Manufacturing method of printed circuit board havingelectronic components within
KR1020070029930A
A printed circuit board and a method for manufacturing
KR1020150037801A
Glass Circuit Board and method of manufacturing the same
KR1020170067236A