Ferroelectric-based memory devices and their manufacturing methods

KR103024397B1Active Publication Date: 2026-09-29IND FOUND OF CHONNAM NAT UNIV +1
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Application Number
KR1020250009632
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-01-22
Publication Date
2026-09-29
Estimated Expiration
2045-01-22

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Abstract

A ferroelectric-based memory device according to one embodiment of the present invention is a memory device comprising a metal-ferroelectric-metal (MFM) stacked structure, wherein the metal-ferroelectric-metal (MFM) stacked structure comprises a lower metal electrode, an interface layer formed on the surface of the lower metal electrode through an H2O pretreatment process, a hafnia-zirconia solid solution thin film formed on the interface layer, and an upper metal electrode formed on the solid solution thin film.
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Description

Technology Field

[0001] The present invention relates to a ferroelectric-based memory device and a method for manufacturing the same, and more specifically, to a ferroelectric-based memory device comprising a metal-ferroelectric-metal (MFM) stacked structure in which an interface layer is formed by oxidizing a lower metal electrode, and a method for manufacturing the same. Background Technology

[0003] Recently, continuous technological development is being carried out on memory devices to meet various demands, such as high-speed processing, high integration, and low power consumption. Among these, memory devices utilizing ferroelectric materials are attracting attention as non-volatile memories, and various application devices employing ferroelectricity are being researched.

[0004] Ferroelectricity refers to the property in which electric polarization occurs due to an external electric field and is maintained even after the electric field is removed. Due to this property, ferroelectric materials are suitable for realizing the non-volatile characteristics of memory devices, and representative ferroelectric materials used are solid solutions based on hafnia (HfO2) and zirconia (ZrO2).

[0005] Ferroelectric-based memory devices can be implemented in the form of FERAM (Ferroelectric Random Access Memory), FEFET (Ferroelectric Field-Effect Transistor), FTJ (Ferroelectric Tunnel Junction), etc.

[0006] FERAM (Ferroelectric Random Access Memory) is a non-volatile memory device that uses ferroelectric capacitors as memory cells. It has a structure similar to conventional DRAM but has the characteristic of not requiring power for data storage. Data is retained even when the power is turned off by utilizing the non-volatile properties of ferroelectrics.

[0007] A Ferroelectric Field-Effect Transistor (FEFET) is a field-effect transistor in which a ferroelectric material is used as the gate insulating layer, enabling data storage by utilizing hysteresis characteristics based on ferroelectricity. While FEFETs have a structure similar to conventional MOSFETs, they can function as non-volatile memory devices. A Ferroelectric Tunnel Junction (FTJ) is a structure in which a ferroelectric material is used as the tunneling insulating layer, storing data by utilizing the characteristic that the tunneling current changes depending on the polarization direction of the ferroelectric material. FTJs are attracting attention for their potential as high-density memory devices due to their ability to have very small cell sizes.

[0008] Ferroelectric-based memory devices possess both high speed and non-volatility characteristics, and are considered a next-generation memory technology capable of replacing existing flash memory or DRAM. However, high-temperature heat treatment processes for crystallizing ferroelectric materials and securing their properties are being raised as a critical factor in the manufacturing process. Prior art literature

[0010] Korean Published Patent No. 10-2004-0084286 (October 6, 2004) The problem to be solved

[0011] One embodiment of the present invention aims to propose a ferroelectric-based memory device and a method for manufacturing the same by providing a method to secure high ferroelectricity even with low-temperature heat treatment in the manufacturing process of a ferroelectric-based memory device, thereby reducing manufacturing costs and energy consumption while exhibiting excellent ferroelectric properties. means of solving the problem

[0013] Among the embodiments, the ferroelectric-based memory device comprises a metal-ferroelectric-metal (MFM) stacked structure, wherein the metal-ferroelectric-metal (MFM) stacked structure comprises a lower metal electrode, an interface layer formed on the surface of the lower metal electrode through an H2O pretreatment process, a hafnia-zirconia solid solution thin film formed on the interface layer, and an upper metal electrode formed on the solid solution thin film.

[0014] The lower metal electrode and the upper metal electrode are each formed with a molybdenum (Mo) metal layer having a thickness of 40 to 60 nm and are characterized by being deposited through DC sputtering.

[0015] The above interface layer is characterized by being formed by adsorbing the hydroxyl group (-OH) of H2O onto the surface of the lower metal electrode during the H2O pretreatment process.

[0016] The above interface layer is molybdenum oxide (MoO₂) formed when H₂O molecules react with the surface of the molybdenum metal layer of the lower metal electrode during the H₂O pretreatment process. x It is characterized by being composed of layers.

[0017] The above hafnia-zirconia solid solution thin film is deposited in-situ via a TALD (Thermal ALD) process, and Hf has an Hf:Zr ratio of 1:1. 0.5 Zr 0.5 It is characterized by including an O2 dielectric thin film.

[0018] Among the embodiments, a method for manufacturing a ferroelectric-based memory device comprises, in a method for manufacturing a memory device including a metal-ferroelectric-metal (MFM) stacked structure, a step of forming a lower metal electrode by depositing a metal layer on a substrate; a step of forming an interface layer through a pretreatment process of supplying H2O to the surface of the lower metal electrode; a step of depositing a hafnia-zirconia (Hf,Zr)O2 solid solution thin film on the interface layer; and a step of forming an upper metal electrode by depositing a metal layer on the solid solution thin film.

[0019] The lower metal electrode and the upper metal electrode are each characterized by being formed by depositing a molybdenum (Mo) metal layer.

[0020] The formation of the lower metal electrode above is characterized by using a DC sputtering method, with a DC power of 130 to 170 W, an argon (Ar) gas flow rate of 8 to 13 sccm, and a working pressure of 0.8 to 1.2 mTorr.

[0021] The above H2O pretreatment process is characterized by being performed for 5 to 10 seconds.

[0022] The step of forming the above interface layer involves H2O molecules reacting with the surface of the molybdenum metal layer during the H2O pretreatment process to form molybdenum oxide (MoO x It is characterized by the formation of an interface layer including a ) layer.

[0023] The step of forming the above interface layer is characterized by the fact that -OH (hydroxyl group) groups are adsorbed onto the surface of the lower metal electrode during the H2O pretreatment process, thereby forming an interface layer that promotes the densification of the hafnia-zirconia solid solution thin film.

[0024] The above hafnia-zirconia solid solution thin film deposition is characterized by using a TEMA series precursor as a raw material and reacting with ozone (O3) for 2 to 5 seconds.

[0025] After the step of forming the upper metal electrode, a heat treatment process may be further performed, and the heat treatment is characterized by performing a Rapid Thermal Process (RTP) at 350-400°C for 30 seconds in a nitrogen (N2) atmosphere. Effects of the invention

[0027] The disclosed technology may have the following effects. However, this does not mean that a specific embodiment must include all of the following effects or only the following effects; therefore, the scope of the rights of the disclosed technology should not be understood as being limited by this.

[0028] A ferroelectric-based memory device and a method for manufacturing the same according to one embodiment of the present invention have the effect of improving the ferroelectric properties of the device through the formation of an interface layer by an H2O pretreatment process, increasing the efficiency of the manufacturing process, and providing a memory device that exhibits excellent performance at a low heat treatment temperature. Brief explanation of the drawing

[0030] FIG. 1 is a cross-sectional view illustrating a ferroelectric-based memory device according to one embodiment of the present invention. FIG. 2 is a flowchart illustrating a method for manufacturing a ferroelectric-based memory device according to an embodiment of the present invention. FIGS. 3a to 3d are cross-sectional views illustrating a method for manufacturing a ferroelectric-based memory device according to an embodiment of the present invention. Figures 4a to 4c are graphs illustrating the relationship between H2O pretreatment time, heat treatment temperature, and ferroelectric properties. Figure 5 is a graph illustrating the relationship between H2O pretreatment time, heat treatment temperature, and crystallinity. Specific details for implementing the invention

[0031] The description of the present invention is merely an example for structural or functional explanation, and therefore the scope of the present invention should not be interpreted as being limited by the examples described in the text. That is, since the examples are subject to various modifications and may take various forms, the scope of the present invention should be understood to include equivalents capable of realizing the technical concept. Furthermore, the objectives or effects presented in the present invention do not imply that a specific example must include all of them or only such effects; therefore, the scope of the present invention should not be understood as being limited by them.

[0032] Meanwhile, the meaning of the terms described in this application should be understood as follows.

[0033] Terms such as "first," "second," etc., are intended to distinguish one component from another, and the scope of rights shall not be limited by these terms. For example, the first component may be named the second component, and similarly, the second component may be named the first component.

[0034] When it is stated that one component is "connected" to another component, it should be understood that it may be directly connected to that other component, or that there may be other components in between. Conversely, when it is stated that one component is "directly connected" to another component, it should be understood that there are no other components in between. Meanwhile, other expressions describing the relationships between components, such as "between" and "exactly between," or "adjacent to" and "directly adjacent to," should be interpreted in the same way.

[0035] A singular expression should be understood to include a plural expression unless the context clearly indicates otherwise, and terms such as "include" or "have" are intended to specify the existence of the implemented features, numbers, steps, actions, components, parts, or combinations thereof, and should be understood not to preclude the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof.

[0036] In each step, identifiers (e.g., a, b, c, etc.) are used for convenience of explanation and do not describe the order of the steps; the steps may occur differently from the specified order unless a specific order is clearly indicated in the context. That is, the steps may occur in the same order as specified, may be performed substantially simultaneously, or may be performed in the reverse order.

[0037] Unless otherwise defined, all terms used herein have the same meaning as generally understood by those skilled in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having meanings consistent with the context of the relevant technology and should not be interpreted as having an ideal or overly formal meaning unless explicitly defined in this application.

[0038] Preferred embodiments of the present invention will be described in more detail below with reference to the attached drawings. Identical components in the drawings are denoted by the same reference numerals, and redundant descriptions of identical components are omitted.

[0040] FIG. 1 is a cross-sectional view illustrating a ferroelectric-based memory device according to one embodiment of the present invention.

[0041] Referring to FIG. 1, the metal-ferroelectric-metal (MFM) stacked structure of the memory device may be composed of a substrate (100), a lower metal electrode (110), an interface layer (120), a solid solution thin film (130), and an upper metal electrode (140).

[0042] First, the lower metal electrode (100) may be composed of a metal layer containing molybdenum (Mo). Molybdenum has high electrical conductivity and heat resistance and plays a role in stably maintaining current flow in a ferroelectric device. The lower metal electrode (110) may be deposited to a thickness of 40 to 60 nm through a DC sputtering process.

[0043] The interface layer (120) can be formed on the surface of the lower metal electrode (110) through an H2O pretreatment process. In the pretreatment process, as H2O is supplied to the surface of the lower metal electrode (110), an oxide layer (MoO₂) is formed on the molybdenum surface. x An interfacial layer may be formed by the formation of ) or by the adsorption of the hydroxyl group (-OH) of H2O onto the molybdenum surface. MoO x The layer has electrical insulation properties, promotes the crystallization of the ferroelectric thin film, improves interfacial bonding strength with the ferroelectric thin film, and plays a role in helping the crystallization of the thin film, especially at low heat treatment temperatures.

[0044] In addition, the formation of the interface layer (120) can improve the electrical stability of the ferroelectric-based memory device and contribute to maintaining the performance of the device even during long-term use.

[0045] A solid solution thin film (130) is deposited on an interface layer (120) formed on a lower metal electrode (110), and has an Hf:Zr ratio of 1:1. 0.5 Zr 0.5 It can be composed of an O2 high-dielectric thin film. This provides excellent ferroelectric properties and plays a role in maximizing data storage capabilities in memory devices.

[0046] The solid solution thin film (130) is formed to a thickness of about 9 nm through a TALD (Thermal Atomic Layer Deposition) process, and a uniform thin film can be formed through this method. In the TALD process, TEMA series precursors and O3 reactants are used, and the thin film can be deposited at a temperature of about 280 ℃.

[0047] The upper metal electrode (140) is deposited on the solid solution thin film (130) and may be composed of molybdenum (Mo) or other metal electrodes. At this time, the upper metal electrode (140) may be formed in a pattern shape. The upper metal electrode (140) may also be deposited to a thickness of 40 to 60 nm through a DC sputtering process. The upper metal electrode (140) serves to control the current flow of the device and activate the electrical operation of the ferroelectric thin film. In addition, the upper metal electrode provides electrical contact to the active region of the device and can form a close electrical coupling with the ferroelectric thin film.

[0049] FIGS. 2, FIGS. 3a to 3d are cross-sectional views illustrating a method for manufacturing a ferroelectric-based memory device according to an embodiment of the present invention.

[0050] Referring to FIGS. 2 and FIGS. 3a to 3d, a method for manufacturing a semiconductor device including a metal-ferroelectric-metal (MFM) stacked structure is described as follows.

[0051] First, FIG. 3a performs the step of forming a lower metal electrode (310) by depositing a metal layer containing molybdenum (Mo) on top of a substrate (300) ('S200' in FIG. 2). A lower metal electrode (310) with a thickness of 40 to 60 nm is deposited through a DC sputtering process, and molybdenum can be deposited under conditions of DC power of 130 to 170 W, argon (Ar) gas flow rate of 8 to 13 sccm, and working pressure of 0.8 to 1.2 mTorr, more preferably DC power of 150 W, argon (Ar) gas flow rate of 11 sccm, and working pressure of 1 mTorr. This step is a step for forming a basic structure to form an electrical coupling with a ferroelectric thin film, as molybdenum provides excellent conductivity and heat resistance.

[0052] Referring to FIG. 3b, a step of forming an interface layer (320) is performed through a pretreatment process of supplying H2O to the surface of a lower metal electrode (310) ('S210' in FIG. 2).

[0053] The above pretreatment process is a step of supplying H2O to the surface of the lower metal electrode for 5 to 10 seconds, wherein in this process, molybdenum oxide (MoO₂), which is an interface layer (320) on the molybdenum surface, x A ) layer may be formed. More specifically, the H2O pretreatment process is a step of injecting water (H2O) into the surface of a molybdenum (Mo) lower metal electrode; during this process, water molecules react with the molybdenum surface to form a molybdenum oxide (MoOx) layer. As H2O reacts with the molybdenum surface, Mo-O bonds are formed, resulting in the formation of a molybdenum oxide (MoOx) layer on the surface. This oxide layer may primarily be molybdenum oxide in a high oxidation state, such as MoO3. x The layer plays an important role in the MFM (Metal-Ferroelectric-Metal) structure and can improve device performance through interaction with the ferroelectric thin film (Hf,Zr)O2.

[0054] In addition, the above pretreatment process is a step of supplying H2O to the surface of the lower metal electrode for 5 to 10 seconds, so that the hydroxyl group (-OH) of the H2O is adsorbed onto the molybdenum surface to form an interface layer (320).

[0055] To explain in more detail, H2O molecules from the above pretreatment process reach the molybdenum surface and temporarily attach to it due to weak van der Waals forces. Subsequently, the H2O molecules decompose into -OH and H while forming chemical bonds on the surface, and the decomposed -OH groups strongly bind to the molybdenum surface, allowing them to finally be stably fixed to the surface.

[0056] Referring to FIG. 3c, a step of depositing a hafnia-zirconia (Hf,Zr)O2 solid solution thin film (330) on an interface layer (320) formed on top of a lower metal electrode (310) is performed ('S220' in FIG. 2). The step of depositing the solid solution thin film (330) involves using a TALD (Thermal Atomic Layer Deposition) process to deposit a solid solution thin film with a thickness of approximately 9 nm, thereby forming a solid solution with a ratio of Hf to Zr of 1:1. In the TALD process, a TEMA series precursor and an ozone (O3) reactant are used to form the solid solution thin film at 280 °C, thereby ensuring a uniform thin film thickness and excellent ferroelectric properties. The solid solution thin film crystallizes during low-temperature heat treatment and can provide a non-volatile storage function for the memory device by exhibiting a ferroelectric effect through an electric field.

[0057] Referring to FIG. 3d, the step of depositing an upper metal electrode (340) on a solid solution thin film (330) is carried out (step 'S230' of FIG. 2). At this time, the upper metal electrode (340) can be formed in a pattern shape.

[0058] The upper metal electrode (340) can be deposited in the same way as the lower metal electrode (310). For example, the upper metal electrode (340) can have a molybdenum metal layer with a thickness of 40 to 60 nm deposited by a DC sputtering process with a DC power of 130 to 170 W, an argon (Ar) gas flow rate of 8 to 13 sccm, and a working pressure of 0.8 to 1.2 mTorr, more preferably with a DC power of 150 W, an argon (Ar) gas flow rate of 11 sccm, and a working pressure of 1 mTorr. The active area of ​​the upper metal electrode (340) can be approximately 40,000 μm². The upper metal electrode activates the electrical operation of the ferroelectric thin film and serves to control the current flow of the memory device.

[0059] Afterwards, 350 ~ 400 A step to crystallize the ferroelectric thin film can be further performed by conducting a Rapid Thermal Process (RTP) in a nitrogen (N2) atmosphere for 30 seconds at the temperature (step 'S240' in Fig. 2). The heat treatment process is a high-temperature treatment process that promotes the crystallization of the hafnia-zirconia solid solution thin film (Hf,Zr)O2. Through heat treatment, the hafnia-zirconia solid solution thin film crystallizes from an amorphous state, which plays an important role in enhancing ferroelectric properties such as high dielectric constant. At this time, the interfacial layer interacts with the hafnia-zirconia solid solution thin film during heat treatment to assist in the crystallization process of the thin film, and in particular MoO x The layer helps increase the density and structural stability of the hafnia-zirconia solid solution thin film and can further enhance the ferroelectric properties.

[0060] Therefore, the interface layer formed in the H2O pretreatment process of one embodiment of the present invention plays an important role in improving ferroelectric properties by assisting in the crystallization of the hafnia-zirconia solid solution thin film during heat treatment.

[0062] Figures 4a to 4c are graphs illustrating the relationship between H2O pretreatment time, heat treatment temperature, and ferroelectric properties, showing the PE hysteresis curves of samples subjected to rapid heat treatment (RTP) at 350 ℃, 380 ℃, and 400 ℃, respectively.

[0063] First, heat treatment at 350 ℃ does not sufficiently form ferroelectric properties, so the hysteresis loop remains closed (see Fig. 4a). As the heat treatment temperature increases to 380 ℃, the hysteresis loop opens, and the ferroelectric properties are enhanced (see Fig. 4b). At 400 ℃, a further increase in temperature leads to the observation of an even more open hysteresis loop (see Fig. 4c), indicating that the ferroelectric saturation is approaching. Through this, it can be confirmed that a crystallization boundary exists in the range of 350 to 400 ℃, and that a rapid change in ferroelectric properties occurs particularly between 380 ℃ and 400 ℃. Here, the hysteresis loop is a curve representing the nonlinear relationship between the electric field and polarization (P), which is used to evaluate the properties of a ferroelectric material; if this loop is open, it signifies the presence of ferroelectricity, while if the loop is closed, it indicates that ferroelectricity is weak or absent. In other words, the more the hysteresis loop opens, the more the ferroelectric properties are strengthened.

[0065] Referring to Fig. 4b, this is a graph illustrating the relationship between the H2O pretreatment time and ferroelectric properties of samples heat-treated at 380°C for 30 seconds.

[0066] In samples without pretreatment, the hysteresis loop is almost closed, resulting in very weak ferroelectricity. When an H2O pretreatment time of 5 seconds is applied, the loop opens slightly and the ferroelectric properties increase. When the H2O pretreatment time is increased to 10 seconds, ferroelectricity improves even more significantly despite heat treatment at 380°C, and it can be observed that the hysteresis loop is more open. In other words, it can be seen that ferroelectric properties at low temperatures improve as the H2O pretreatment time increases.

[0067] Referring to Figure 4c, the effect of H2O pretreatment time on the ferroelectric properties of samples heat-treated at 400°C for 30 seconds is shown. It can be seen that the sample without pretreatment at 400°C exhibits basic ferroelectricity, but the hysteresis loop is not fully open.

[0068] Meanwhile, the sample pretreated with H2O for 5 seconds shows improved ferroelectricity with a more open loop, and the sample pretreated with H2O for 10 seconds also shows increased ferroelectricity with a more open hysteresis loop. In other words, it can be seen that ferroelectric properties increase as the H2O pretreatment time increases.

[0070] Figure 5 is a graph illustrating the relationship between H2O pretreatment time, heat treatment temperature, and crystallinity.

[0071] Figure 5 shows the GIXRD (Grazing Incidence X-ray Diffraction) results. Comparing the H2O pretreatment time with 5 seconds (red) and 10 seconds (blue), it can be confirmed that the H2O pretreatment time of 10 seconds exhibits higher intensity regardless of the heat treatment temperature. Here, the intensity of the graph is one of the factors used to determine the crystallinity of the ferroelectric thin film, indicating that crystallization occurs more effectively as the pretreatment time increases. The graph peak appearing around 30.5° represents the planar orthorhombic or tetragonal phase, and a higher graph intensity at that location predicts higher ferroelectricity in the hysteresis loop. Since the results in Figure 4 showed higher ferroelectricity as the H2O pretreatment time increased, it can be seen that the structural analysis results and the electrical analysis results are consistent.

[0073] Although the present invention has been described above with reference to preferred embodiments, those skilled in the art will understand that various modifications and changes can be made to the invention without departing from the spirit and scope of the invention as described in the following claims.

[0075] National R&D project that supported this invention

[0076] [Project No.] 2021RIS-002

[0077] [Ministry Name] Ministry of Education

[0078] [Project Management Agency Name] National Research Foundation of Korea

[0079] [Research Project Name] Gwangju-Jeonnam Regional Innovation Platform Future Transportation Equipment Project (Jeonnam National University)

[0080] [Research Project Title] Development of Semiconductor Material Technology for Autonomous Vehicles

[0081] [Name of Project Performing Organization] Chonnam National University

[0082] [Research Period] 2024.04.01 ~ 2025.02.28

[0084] [Project No.] 2024Hydrogen Industry-005

[0085] [Ministry Name] Ministry of Trade, Industry and Energy

[0086] [Project Management Organization Name: Hydrogen Convergence Alliance

[0087] [Research Project Name] University Innovation Support (Training for Inter-Ministerial Collaboration)

[0088] [Research Project Title] Regionally Linked Hydrogen Industry Innovation Talent Development Project (Jeonnam National University)

[0089] [Name of Project Performing Organization] Chonnam National University

[0090] [Research Period] 2024.03.01 ~ 2025.02.28

[0092] [Project No.] RS-2024-00399394

[0093] [Ministry Name] Ministry of Science and ICT

[0094] [Project Management Agency Name] Korea Institute of Information and Communications Technology Planning and Evaluation

[0095] [Research Project Name] Development of Core Technologies for PIM AI Semiconductors

[0096] [Project Title] Development of Novel Device-CMOS Integrated PDK for PIM and Fabrication Verification of MPW Chip Using Joint Integration Process Platform

[0097] [Name of Project Performing Organization] Seoul National University

[0098] [Research Period] April 1, 2024 ~ December 31, 2028 Explanation of the symbols

[0100] 100, 300: Substrate 110, 310: Lower metal electrode 120, 320: Interface layer 130, 330: Solid solution thin film 140, 340: Upper metal electrode

Claims

Claim 1 A memory device comprising a metal-ferroelectric-metal (MFM) stacked structure, wherein the metal-ferroelectric-metal (MFM) stacked structure comprises: a lower metal electrode comprising molybdenum (Mo); a molybdenum oxide (MoOx) layer formed on the surface of the lower metal electrode through an H2O pretreatment process, wherein H2O molecules react with the surface of the lower metal electrode during the H2O pretreatment process and / or an interface layer formed by adsorbing hydroxyl groups (-OH) of H2O onto the surface of the lower metal electrode; a hafnia-zirconia (Hf,Zr)O2 solid solution thin film formed on the interface layer, wherein the Hf:Zr ratio is 1:1 and the Hf0.5Zr0.5O2 thin film is formed; and an upper metal electrode formed on the solid solution thin film. Claim 2 A ferroelectric-based memory device according to claim 1, wherein the lower metal electrode and the upper metal electrode are each formed as molybdenum (Mo) metal layers with a thickness of 40 to 60 nm and are deposited through DC sputtering. Claim 3 A ferroelectric-based memory device according to claim 1, wherein the interface layer is formed by adsorbing a hydroxyl group (-OH) of H2O onto the surface of the lower metal electrode during the H2O pretreatment process. Claim 4 In claim 2, the interface layer is molybdenum oxide (MoO₂) formed when H₂O molecules react with the surface of the molybdenum metal layer of the lower metal electrode during the H₂O pretreatment process. x A ferroelectric-based memory device characterized by being composed of layers. Claim 5 In claim 1, the hafnia-zirconia solid solution thin film is deposited in-situ via a TALD (Thermal ALD) process, and Hf has an Hf:Zr ratio of 1:

1. 0.5 Zr 0.5 A ferroelectric-based memory device characterized by including an O2 dielectric thin film. Claim 6 A method for manufacturing a memory device comprising a metal-ferroelectric-metal (MFM) stacked structure, comprising: a step of forming a lower metal electrode by depositing a metal layer on a substrate; a step of forming an interface layer through a pretreatment process of supplying H2O to the surface of the lower metal electrode; a step of depositing a hafnia-zirconia (Hf,Zr)O2 solid solution thin film on the interface layer; and a step of forming an upper metal electrode by depositing a metal layer on the solid solution thin film. Claim 7 A method for manufacturing a ferroelectric-based memory device according to claim 6, wherein the lower metal electrode and the upper metal electrode are each formed by depositing a molybdenum (Mo) metal layer. Claim 8 A method for manufacturing a ferroelectric-based memory device according to claim 6, wherein the lower metal electrode is formed using a DC sputtering method, the DC power is 130 to 170 W, the argon (Ar) gas flow rate is 8 to 13 sccm, and the working pressure is 0.8 to 1.2 mTorr. Claim 9 A method for manufacturing a ferroelectric-based memory device according to claim 6, characterized in that the H2O pretreatment process is performed for 5 to 10 seconds. Claim 10 In claim 7, the step of forming the interface layer involves H2O molecules reacting with the surface of the molybdenum metal layer during the H2O pretreatment process to form molybdenum oxide (MoO x A method for manufacturing a ferroelectric-based memory device characterized by forming an interface layer including a ) layer. Claim 11 A method for manufacturing a ferroelectric-based memory device according to claim 6, wherein the step of forming the interface layer is characterized by the formation of an interface layer that promotes the densification of the hafnia-zirconia solid solution thin film by adsorbing -OH (hydroxyl group) groups onto the surface of the lower metal electrode during the H2O pretreatment process. Claim 12 A method for manufacturing a ferroelectric-based memory device according to claim 6, characterized in that a TEMA series precursor is used as a raw material when depositing the hafnia-zirconia solid solution thin film, and the reaction is performed using ozone (O3) for 2 to 5 seconds. Claim 13 A method for manufacturing a ferroelectric-based memory device according to claim 6, wherein, after the step of forming the upper metal electrode, a heat treatment process may be further performed, and the heat treatment is characterized by performing a Rapid Thermal Process (RTP) at 350-400°C for 30 seconds in a nitrogen (N2) atmosphere.

Citation Information

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