Liquid crystal display device

Abstract

The present invention aims to miniaturize the input / output device. It provides a highly reliable input / output device. An input / output device having a first pixel electrode, a second pixel electrode, a first common electrode, a second common electrode, a liquid crystal, a first insulating film, a second insulating film, and a transistor. The first common electrode functions as an electrode on one side of a detection element. The second common electrode functions as an electrode on the other side of a detection element. The transistor has a first gate, a second gate, and a semiconductor layer. The pixel electrode, the common electrode, and the second gate are each located on different surfaces. The second gate includes one or more types of metal elements included in the semiconductor layer. Preferably, the second gate, the pixel electrode, and the common electrode include one or more types of metal elements included in the semiconductor layer.

Description

Technology Field

[0001] One embodiment of the present invention relates to an input / output device and an electronic device.

[0002] Furthermore, one embodiment of the present invention is not limited to the technical field described above. Examples of the technical field of one embodiment of the invention described in this specification, etc. include semiconductor devices, display devices, light-emitting devices, capacitor devices, memory devices, electronic devices, lighting devices, input devices (e.g., touch sensors, etc.), output devices, input / output devices (e.g., touch panels, etc.), methods for driving the same, or methods for manufacturing the same. Background Technology

[0003] Transistors used in most flat panel displays, such as liquid crystal displays or light-emitting displays, are composed of silicon semiconductors, such as amorphous silicon, single-crystal silicon, or polycrystalline silicon, formed on a glass substrate. Furthermore, transistors using the above silicon semiconductors are also utilized as integrated circuits (ICs).

[0004] In recent years, technology using metal oxides exhibiting semiconductor properties in transistors as a substitute for silicon semiconductors has been attracting attention. Furthermore, in this specification, metal oxides exhibiting semiconductor properties will be referred to as oxide semiconductors. For example, Patent Document 1 and Patent Document 2 describe a technology for fabricating a transistor using zinc oxide or an In-Ga-Zn-based oxide as an oxide semiconductor and using the transistor as a switching element for a pixel of a display device.

[0005] In addition, there is a demand for a touch panel that adds a function of inputting by touching the screen with a finger or the like as a user interface to the display device.

[0006] A display device or display module equipped with a touch sensor is referred to as a touch panel or touch screen. Additionally, a device that possesses a touch sensor but lacks a display element is sometimes called a touch panel. Therefore, a display device or display module equipped with a touch sensor is sometimes referred to as a display device containing a touch sensor, a display device containing a touch panel, a touch sensor containing a display device, or a touch panel containing a display device. Furthermore, hereinafter, a display device equipped with a touch sensor will be referred to as a touch panel.

[0007] For example, Patent Documents 3 to 6 describe a touch panel using a liquid crystal element as a display element. Prior art literature

[0008] Japanese Patent Application No. 2007-123861, Japanese Patent Application No. 2007-96055, Japanese Patent Application No. 2011-197685, Japanese Patent Application No. 2014-44537, Japanese Patent Application No. 2014-178847, and U.S. Patent Application Publication No. 2008 / 0158183 Specification The problem to be solved

[0009] One embodiment of the present invention has as one of its objectives to make the input / output device thin. Alternatively, one embodiment of the present invention has as one of its objectives to make the input / output device lightweight. Alternatively, one embodiment of the present invention has as one of its objectives to provide an input / output device with a low number of parts.

[0010] Alternatively, one embodiment of the present invention has as its objective to provide a highly reliable input / output device. Alternatively, one embodiment of the present invention has as its objective to provide an input / output device with high detection sensitivity. Alternatively, one embodiment of the present invention has as its objective to provide a novel input / output device, etc.

[0011] Furthermore, the description of these problems does not interfere with the existence of other problems. Also, one embodiment of the present invention is not required to solve all of these problems. Additionally, problems other than these may be derived from the description in the specification, drawings, claims, etc. means of solving the problem

[0012] One embodiment of the present invention is an input / output device having a first pixel electrode, a second pixel electrode, a first common electrode, a second common electrode, a liquid crystal, a first insulating film, a second insulating film, and a transistor. The first common electrode can function as an electrode on one side of a detection element. The second common electrode can function as an electrode on the other side of a detection element. The transistor has a first gate, a second gate, and a semiconductor layer. The semiconductor layer has an oxide semiconductor in a channel forming region. The second gate has an oxide conductor. The oxide conductor has one or more metal elements included in the oxide semiconductor. An input / output device according to one embodiment of the present invention has a semiconductor layer on the first gate, a second gate on the semiconductor layer, a first insulating film on the second gate, and a first pixel electrode, a second pixel electrode, a first common electrode, and a second common electrode on the first insulating film. The first pixel electrode and the first common electrode have overlapping portions with respect to each other through a second insulating film. The second pixel electrode and the second common electrode have overlapping portions with respect to a second insulating film. A liquid crystal is provided on the first pixel electrode, the second pixel electrode, the first common electrode, and the second common electrode. The first pixel electrode and the second pixel electrode are spaced apart on the same plane. The first common electrode and the second common electrode are spaced apart on the same plane.

[0013] At least one of the display unit and the driving circuit unit has the transistor. For example, an input / output device according to one embodiment of the present invention may have two transistors, and one of the two transistors may have a source or drain electrically connected to a first pixel electrode, and the other may have a source or drain electrically connected to a second pixel electrode. Alternatively, the transistor may be located in the driving circuit unit.

[0014] Alternatively, in each of the above configurations, the second gate may be electrically connected to the first gate.

[0015] Alternatively, in each of the above configurations, a second insulating film may be provided on the first pixel electrode and the second pixel electrode, and a first common electrode and a second common electrode may be provided on the second insulating film. Alternatively, in each of the above configurations, a second insulating film may be provided on the first common electrode and the second common electrode, and a first pixel electrode and a second pixel electrode may be provided on the second insulating film.

[0016] Alternatively, in each of the above configurations, the first pixel electrode and the second pixel electrode may each have at least one metal element included in the oxide semiconductor. In addition, the first common electrode and the second common electrode may each have at least one metal element included in the oxide semiconductor.

[0017] Alternatively, in each of the above configurations, the oxide semiconductor and the oxide conductor may each have an oxide containing indium. In addition, the first pixel electrode and the second pixel electrode may each have an oxide containing indium. In addition, the first common electrode and the second common electrode may each have an oxide containing indium.

[0018] Alternatively, in each of the above configurations, the oxide semiconductor and the oxide conductor may each have an In-M1-Zn oxide (where M1 is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Sn, or Hf). In addition, the first pixel electrode and the second pixel electrode may each have the In-M1-Zn oxide. In addition, the first common electrode and the second common electrode may each have the In-M1-Zn oxide.

[0019] Alternatively, in each of the above configurations, the first pixel electrode, the second pixel electrode, the first common electrode, and the second common electrode may each have the function of transmitting visible light.

[0020] Alternatively, in each of the above configurations, a first conductive film may be provided between a first insulating film and a first common electrode, the resistivity of the first conductive film may be lower than the resistivity of the first common electrode, and the first conductive film may be electrically connected to the first common electrode. In addition, a second conductive film may be provided between a first insulating film and a second common electrode, the resistivity of the second conductive film may be lower than the resistivity of the second common electrode, the second conductive film may be electrically connected to the second common electrode, and the first conductive film and the second conductive film may be spaced apart on the same plane.

[0021] Alternatively, each of the above configurations may have a light-shielding film, and the light-shielding film may have a portion that overlaps with at least one of the first conductive film and the second conductive film through a liquid crystal.

[0022] In addition, one embodiment of the present invention is a module in which a connector such as an FPC (Flexible Printed Circuit) or TCP (Tape Carrier Package) is mounted on the input / output device, or a module in which an IC is mounted by means of a COG (Chip on Glass) method, a COF (Chip on Film) method, etc.

[0023] Alternatively, one embodiment of the present invention is an electronic device having at least one of the above module, an antenna, a battery, a housing, a speaker, a microphone, an operating switch, and an operating button. Effects of the invention

[0024] According to one embodiment of the present invention, it is possible to make the input / output device thin. Alternatively, according to one embodiment of the present invention, it is possible to make the input / output device lightweight. Alternatively, according to one embodiment of the present invention, an input / output device with a small number of parts can be provided.

[0025] Alternatively, a highly reliable input / output device may be provided according to one embodiment of the present invention. Alternatively, an input / output device with high detection sensitivity may be provided according to one embodiment of the present invention. Alternatively, a novel input / output device, etc., may be provided according to one embodiment of the present invention.

[0026] Furthermore, the description regarding these effects does not interfere with the existence of other effects. Also, one embodiment of the present invention does not necessarily have all of these effects. Additionally, effects other than these can be derived from the description in the specification, drawings, claims, etc. Brief explanation of the drawing

[0027] FIG. 1 is a top view and a cross-sectional view illustrating an example of an input / output device. FIG. 2 is a cross-sectional view illustrating an example of an input / output device. FIG. 3 is a cross-sectional view illustrating an example of an input / output device. FIG. 4 is a cross-sectional view illustrating an example of an input / output device. FIG. 5 is a cross-sectional view illustrating an example of an input / output device. FIG. 6 is a cross-sectional view illustrating an example of an input / output device. FIG. 7 is a drawing illustrating an example of a detection element and a pixel. FIG. 8 is a diagram illustrating an example of the operation of a detection element and a pixel. FIG. 9 is a top view illustrating an example of a detection element and a pixel. FIG. 10 is a top view illustrating an example of a detection element. FIG. 11 is a top view illustrating an example of a detection element. FIG. 12 is a top view illustrating an example of an input / output device. FIG. 13 is a top view illustrating an example of an input / output device. FIG. 14 is a top view illustrating an example of an input / output device. FIG. 15 is a block diagram illustrating an example of a touch panel module. FIG. 16 is a drawing illustrating an example of a touch panel module. FIG. 17 is a cross-sectional view illustrating an example of a method for manufacturing transistors, etc. FIG. 18 is a cross-sectional view illustrating an example of a method for manufacturing transistors, etc. FIG. 19 is a cross-sectional view illustrating an example of a method for manufacturing transistors, etc. FIG. 20 is a cross-sectional view illustrating an example of a method for manufacturing a transistor, etc. FIG. 21 is a cross-sectional view illustrating an example of a transistor. FIG. 22 is a top view and a cross-sectional view illustrating an example of a transistor. FIG. 23 is a cross-sectional view illustrating an example of a transistor. Figure 24 is a drawing illustrating a band structure. FIG. 25 is a cross-sectional view illustrating an example of a transistor. FIG. 26 is a diagram illustrating the structural analysis of CAAC-OS and a single-crystal oxide semiconductor by XRD, and a diagram showing the limited field electron diffraction pattern of CAAC-OS. FIG. 27 shows the cross-sectional TEM image, planar TEM image, and image analysis image of CAAC-OS. FIG. 28 shows the electron diffraction pattern of nc-OS, and a cross-sectional TEM image of nc-OS. Fig. 29 is a cross-sectional TEM image of an a-like OS. FIG. 30 is a diagram illustrating the change in the crystal portion of In-Ga-Zn oxide due to electron irradiation. FIG. 31 is a drawing illustrating an example of a touch panel module. FIG. 32 is a drawing illustrating an example of an electronic device. FIG. 33 is a drawing illustrating an example of an electronic device. FIG. 34 is a cross-sectional view illustrating an example of an input / output device. FIG. 35 is a photograph showing the input / output device of the embodiment. Specific details for implementing the invention

[0028] Embodiments are described in detail using the drawings. However, the present invention is not limited to the description below, and those skilled in the art will readily understand that various changes to the form and details can be made without departing from the spirit and scope of the present invention. Accordingly, the present invention is not to be interpreted as being limited to the contents of the embodiments described below.

[0029] Furthermore, in the configuration of the invention described below, the same reference numerals are commonly used across different drawings for identical parts or parts having the same function, and their repeated description is omitted. Additionally, when referring to parts having the same function, the hatch pattern may be identical, and a specific reference numeral may not be assigned.

[0030] Furthermore, the actual location, size, and range of each component depicted in drawings, etc., may not be accurately illustrated to facilitate understanding. Therefore, the presented invention is not necessarily limited to the location, size, and range depicted in drawings, etc.

[0031] Furthermore, the terms 'film' and 'layer' can be interchanged depending on the case or situation. For example, there are cases where the term 'conductive film' can be replaced with 'conductive layer.' Or, for instance, there are cases where the term 'insulating layer' can be replaced with 'insulating film.'

[0032] In addition, in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or greater and 10° or less. Accordingly, cases of -5° or greater and 5° or less are included. In addition, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -30° or greater and 30° or less. In addition, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or greater and 100° or less. Accordingly, cases of 85° or greater and 95° or less are included. In addition, "substantially perpendicular" refers to a state in which two straight lines are arranged at an angle of 60° or greater and 120° or less.

[0033] Additionally, in this specification, the trigonal and rhombohedral crystal systems are included in the hexagonal crystal system.

[0034] (Embodiment 1)

[0035] In this embodiment, an input / output device according to one form of the present invention will be described using FIGS. 1 to 16.

[0036] An input / output device according to one embodiment of the present invention is an in-cell type touch panel having a function of displaying an image and a function as a touch sensor.

[0037] There are no limitations on the display elements of the input / output device according to one embodiment of the present invention. Various elements such as liquid crystal elements, optical elements using MEMS (Micro Electro Mechanical Systems), light-emitting elements such as organic EL (Electro Luminescence) elements or light-emitting diodes (LEDs), and electrophoretic elements can be applied as display elements.

[0038] In this embodiment, a transmissive liquid crystal display device using a transverse electric field type liquid crystal element is described as an example.

[0039] There are no limitations on the detection element (also referred to as a sensor element) having an input / output device according to one embodiment of the present invention. Various sensors capable of detecting approach or contact by a subject to detection, such as a finger or a stylus, can be applied as the detection element.

[0040] For example, various methods can be used as sensor types, such as capacitive, resistive, surface acoustic wave, infrared, optical, and pressure-sensitive methods.

[0041] In this embodiment, an input / output device having a capacitive detection element is described as an example.

[0042] Capacitive methods include surface capacitance and projected capacitance. Additionally, projected capacitance methods include magnetic capacitance and mutual capacitance. Using the mutual capacitance method is desirable because it allows for the simultaneous detection of multiple points.

[0043] An input / output device according to one embodiment of the present invention is configured such that electrodes forming a detection element are provided only on a substrate supporting a display element. An input / output device according to one embodiment of the present invention may be described as a full-in-cell type touch panel. As an in-cell type touch panel, in addition to the above, there is a configuration in which electrodes forming a detection element are provided on both the substrate supporting the display element and the opposing substrate, or only on the opposing substrate. Compared to these configurations, a full-in-cell type touch panel is preferable because it can simplify the configuration of the opposing substrate.

[0044] An input / output device according to one embodiment of the present invention is desirable because, since the electrode constituting the display element also serves as the electrode constituting the detection element, the manufacturing process can be simplified and the manufacturing cost can also be reduced.

[0045] By applying one embodiment of the present invention, compared to a configuration in which a separately manufactured display panel and a detection element are joined, or a configuration in which a detection element is manufactured on the opposing substrate side, the input / output device can be made thinner or lighter, or the number of components of the input / output device can be reduced.

[0046] An input / output device according to one embodiment of the present invention places both an FPC that supplies a signal for driving a pixel and an FPC that supplies a signal for driving a detection element on one side of a substrate. Accordingly, it can be easily provided to an electronic device and the number of components can be reduced. In addition, the signal for driving a pixel and the signal for driving a detection element may be supplied by a single FPC.

[0047] Hereinafter, the configuration of an input / output device according to one embodiment of the present invention will be described.

[0048] [Example of Cross-sectional Configuration of Input / Output Device 1]

[0049] Figure 1 (A) shows a top view of an input / output device (300), and Figure 1 (B) shows a cross-sectional view taken along the dotted line AB and the dotted line CD in Figure 1 (A).

[0050] As illustrated in (A) of FIG. 1, the input / output device (300) has a display unit (301) and a scan line driving circuit (302). The display unit (301) has a plurality of pixels (303), a plurality of signal lines, and a plurality of scan lines, and has the function of displaying an image. Additionally, the display unit (301) is also an input unit. That is, the display unit (301) has a plurality of detection elements that detect contact or approach to the input / output device (300) of the object being detected, and has the function of a touch sensor. The scan line driving circuit (302) has the function of outputting a scan signal to the scan lines of the display unit (301). The pixel (303) has a plurality of subpixels. Although FIG. 1 (A) illustrates an example in which the pixel (303) has three subpixels, one embodiment of the present invention is not limited thereto.

[0051] Although an example is shown in FIG. 1 (A) where the input / output device (300) has a scan line driving circuit, one embodiment of the present invention is not limited thereto. The input / output device (300) does not have to have all of the scan line driving circuit, the signal line driving circuit, and the sensor driving circuit, and may have one or more of them.

[0052] In the input / output device (300), the IC (268) is mounted on the substrate (211) using a mounting method such as the COG method. The IC (268) has, for example, one or more of a signal line driving circuit, a scan line driving circuit, and a sensor driving circuit.

[0053] Additionally, an FPC (269) is electrically connected to the input / output device (300). Signals are supplied from the outside to the IC (268) and the scan line driving circuit through the FPC (269). Additionally, signals can be output from the IC (268) to the outside through the FPC (269).

[0054] An IC may be mounted on the FPC (269). For example, an IC having one or more of a signal line driving circuit, a scan line driving circuit, and a sensor driving circuit may be mounted on the FPC (269). For example, the IC may be mounted on the FPC (269) using a mounting method such as COF or TAB (Tape Automated Bonding).

[0055] For example, the IC (268) may have a signal line driving circuit and a sensor driving circuit. Alternatively, for example, the IC (268) may have a signal line driving circuit, and the IC mounted on the FPC (269) may have a sensor driving circuit.

[0056] As shown in (B) of FIG. 1, the input / output device (300) has a transistor (201a), a transistor (203a), a connection part (205a), and a liquid crystal element (207a), etc. on a substrate (211).

[0057] In FIG. 1 (B), a cross-section of a single subpixel is shown as an example of a display unit (301). For example, by configuring a single pixel with a subpixel representing red, a subpixel representing green, and a subpixel representing blue, the display unit (301) can perform full-color display. Additionally, the colors represented by the subpixels are not limited to red, green, and blue. For example, subpixels representing colors such as white, yellow, magenta, or cyan may be used for the pixel.

[0058] The transistor (201a) and the transistor (203a) have a gate electrode (221), an insulating film (213), an oxide semiconductor film (223), a source electrode (225a), and a drain electrode (225b). The transistor (201a) further has a conductive film (226), an insulating film (215), and an oxide conductive film (227). Additionally, the insulating film (215) may be considered as a component of the transistor (203a).

[0059] The gate electrode (221) and the oxide conductive film (227) can each function as a gate. The transistor (201a) is configured to enclose the oxide semiconductor film, where a channel is formed, with two gates. The gate electrode (221) and the oxide conductive film (227) are electrically connected via a conductive film (226). A transistor having a configuration in which two gates are electrically connected in this way can increase field-effect mobility and increase on-current compared to other transistors. As a result, a circuit capable of high-speed operation can be manufactured. In addition, the occupied area of ​​the circuit can be reduced. By applying a transistor with a large on-current, even if the number of wires increases by making the input / output device larger or more precise, signal delay in each wire can be reduced and non-uniformity in display can be suppressed. In addition, by applying such a configuration, a transistor with high reliability can be realized.

[0060] The transistor (201a) and the transistor (203a) may have the same structure or different structures. That is, the transistor in the driving circuit and the transistor in the display section may have the same structure or different structures. Additionally, the driving circuit may have a transistor with multiple structures, and the display section may have a transistor with multiple structures. For example, it is preferable to use a transistor configured such that two gates are electrically connected to one or more of the shift register circuit, buffer circuit, and protection circuit in the scan line driving circuit.

[0061] The transistor (201a) and the transistor (203a) are covered with an insulating film (217) and an insulating film (219). Additionally, in addition to the insulating film (217), the insulating film (219) may be considered as a component of the transistor (201a) and the transistor (203a). It is desirable for the insulating film (217) to have the effect of suppressing the diffusion of impurities into the semiconductor constituting the transistor. For example, it is desirable to use a material for the insulating film (217) that does not easily allow impurities such as water or hydrogen to diffuse. For the insulating film (219), it is desirable to select an insulating film having a flattening function to reduce surface irregularities caused by the transistor.

[0062] The transistor (201a) is configured to use an oxide semiconductor film (223) as a semiconductor layer and an oxide conductive film (227) as a gate. At this time, it is preferable to form the oxide semiconductor film (223) and the oxide conductive film (227) using an oxide semiconductor.

[0063] Oxide semiconductors can be preferably used as materials for semiconductor films and conductive films because their resistivity can be easily controlled during the fabrication process of an input / output device. In particular, by using oxide semiconductors having the same metal element in two or more layers among the layers constituting the input / output device, it becomes possible to use fabrication equipment (e.g., film deposition equipment, processing equipment, etc.) in common across two or more processes, thereby reducing manufacturing costs.

[0064] In addition, since oxide semiconductors are materials that transmit visible light, they can be preferably used as visible light transmitting devices.

[0065] In addition, manufacturing costs can be reduced by forming the oxide semiconductor film (223) and the oxide conductive film (227) with the same metal element. For example, manufacturing costs can be reduced by using a metal oxide target having the same metal composition. In addition, by using a metal oxide target having the same metal composition, the etching gas or etching solution used to process the oxide semiconductor film can be used in common. However, even if the oxide semiconductor film (223) and the oxide conductive film (227) have the same metal element, their compositions may differ. For example, the metal composition may differ as the metal element within the film is removed during the manufacturing process of the input / output device.

[0066] It is preferable that the transistors (201a) and (203a) have an oxide semiconductor film (223) that is purified and suppresses the formation of oxygen vacancies. This allows the current value (off-current value) in the off state of the transistor to be lowered. Accordingly, the retention time of electrical signals such as image signals can be extended, and the recording interval in the power-on state can also be set to be long. As a result, the frequency of refresh operations can be reduced, thereby exhibiting the effect of suppressing power consumption.

[0067] In addition, the transistor (201a) and the transistor (203a) can achieve relatively high field-effect mobility, enabling high-speed driving. By using such a high-speed driving transistor in the input / output device, the transistors of the display unit and the driving circuit unit can be formed on the same substrate. That is, there is no need to use a separate semiconductor device formed from a silicon wafer or the like as a driving circuit, thereby reducing the number of components in the input / output device. Furthermore, by using a high-speed driving transistor in the display unit as well, high-quality images can be provided.

[0068] The liquid crystal element (207a) is a liquid crystal element to which FFS (Fringe Field Switching) mode is applied. The liquid crystal element (207a) has a conductive film (251), a conductive film (252), and a liquid crystal (249). The orientation of the liquid crystal (249) can be controlled by the electric field generated between the conductive film (251) and the conductive film (252). The conductive film (251) can function as a pixel electrode. The conductive film (252) can function as a common electrode.

[0069] By using a conductive material that transmits visible light in the conductive film (251) and the conductive film (252), the input / output device (300) can be made to function as a transparent liquid crystal display device. Additionally, by using a conductive material that reflects visible light in the conductive film (251) and a conductive material that transmits visible light in the conductive film (252), the input / output device (300) can be made to function as a reflective liquid crystal display device.

[0070] As a conductive material that transmits visible light, it is preferable to use a material containing one selected from indium (In), zinc (Zn), and tin (Sn). Specifically, examples include indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide with silicon oxide added, zinc oxide, and zinc oxide with gallium added. In addition, a film containing graphene may be used. A film containing graphene can be formed, for example, by reducing a film containing graphene oxide formed in a film shape.

[0071] It is preferable to use an oxide conductive film for the conductive film (251). Additionally, it is preferable to use an oxide conductive film for the conductive film (252). It is preferable that the oxide conductive film has one or more metal elements included in the oxide semiconductor film (223). For example, it is preferable that the conductive film (251) contains indium, and more preferable that it is an In-M-Zn oxide film (where M is Al, Ti, Ga, Ge, Y, Zr, La, Ce, Sn, Mg, Nd, or Hf). Likewise, it is preferable that the conductive film (252) contains indium, and more preferable that it is an In-M-Zn oxide film.

[0072] In addition, at least one of the conductive film (251) and the conductive film (252) may be formed using an oxide semiconductor. As described above, by using an oxide semiconductor having the same metal element in two or more layers among the layers constituting the input / output device, it becomes possible to use the manufacturing device (e.g., film deposition device, processing device, etc.) in common with two or more processes, thereby reducing manufacturing costs.

[0073] For example, if a silicon nitride film containing hydrogen is used in the insulating film (253) and an oxide semiconductor is used in the conductive film (251), the conductivity of the oxide semiconductor can be increased by the hydrogen supplied from the insulating film (253).

[0074] Examples of conductive materials that reflect visible light include aluminum, silver, or alloys containing these metal materials.

[0075] A conductive film (251) functioning as a pixel electrode is electrically connected to the source or drain of a transistor (203a). Here, an example is shown in which the conductive film (251) is electrically connected to the drain electrode (225b).

[0076] The conductive film (252) has a comb-shaped upper surface (also referred to as a flat surface) or an upper surface with a slit provided therein. An insulating film (253) is provided between the conductive film (251) and the conductive film (252). The conductive film (251) has a portion that overlaps with the conductive film (252) through the insulating film (253). Additionally, in the area where the conductive film (251) and the colored film (241) overlap, there is a portion where the conductive film (252) is not placed on the conductive film (251).

[0077] A conductive film (255) is provided on the insulating film (253). The conductive film (255) is electrically connected to the conductive film (252) and can function as an auxiliary wiring for the conductive film (252). By providing an auxiliary wiring that is electrically connected to the common electrode, the voltage drop caused by the resistance of the common electrode can be suppressed. In addition, in this case, when forming a stacked structure of a conductive film containing a metal oxide and a conductive film containing a metal, it is preferable to form it using a patterning technique with a half-tone mask so that the process can be simplified.

[0078] The conductive film (255) is a film with a lower resistance value than the conductive film (252). The conductive film (255) can be formed as a single layer or a stack using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, silver, neodymium, scandium, etc., or an alloy material containing these elements.

[0079] It is preferable that the conductive film (255) be provided in a position overlapping with the light-blocking film (243) and the like so that it is not visible to the user of the input / output device.

[0080] The connection part (205a) is electrically connected to an external input terminal that transmits a signal (video signal, clock signal, start signal, or reset signal, etc.) or potential from the outside to the scan line driving circuit (302). Here, an example is shown in which an FPC (269) is provided as the external input terminal.

[0081] The connection portion (205a) has a conductive film (231) on an insulating film (213), a conductive film (233) on the conductive film (231), and a conductive film (235) on the conductive film (233). The conductive film (231) is electrically connected to the conductive film (235) via the conductive film (233). Additionally, the conductive film (235) is electrically connected to the FPC (269) via a connector (267).

[0082] The conductive film (231) can be formed using the same material and process as the source electrode (225a) and drain electrode (225b) of the transistor (201a) and transistor (203a). The conductive film (233) can be formed using the same material and process as the conductive film (251) of the liquid crystal element (207a). The conductive film (235) can be formed using the same material and process as the conductive film (252) of the liquid crystal element (207a). In this way, it is desirable to manufacture the conductive film constituting the connection part (205a) using the same material and process as the electrode or wiring used in the display part or driving circuit part, as this prevents an increase in the number of processes.

[0083] A substrate (261) is provided with a coloring film (241), a light-blocking film (243), and an insulating film (245). In (B) of FIG. 1, an example is shown in which the thickness of the substrate (261) is thinner than the thickness of the substrate (211), but one embodiment of the present invention is not limited thereto. One side of the substrate (261) and the substrate (211) may be thinner than the other, or they may have the same thickness. It is desirable to make the substrate on the display side (the side closer to the object to be detected) thinner so that the detection sensitivity of the detection element can be increased.

[0084] The coloring film (241) has a portion that overlaps with the liquid crystal element (207a). The light-blocking film (243) has a portion that overlaps with at least one of the transistor (201a) and the transistor (203a).

[0085] It is preferable that the insulating film (245) functions as an overcoat to prevent impurities contained in the coloring film (241) or light-blocking film (243), etc., from diffusing into the liquid crystal (249). If the insulating film (245) is not necessary, it may not be provided.

[0086] Additionally, an alignment layer in contact with the liquid crystal (249) may be provided. The alignment layer can control the alignment of the liquid crystal (249). For example, in (B) of FIG. 1, an alignment layer covering the conductive film (252) may be formed. Also, in (B) of FIG. 1, an alignment layer may be provided between the insulating film (245) and the liquid crystal (249). Additionally, the insulating film (245) may have both the function of an alignment layer and the function of an overcoat.

[0087] Additionally, the input / output device (300) has a spacer (247). The spacer (247) has the function of preventing the distance between the substrate (211) and the substrate (261) from becoming closer than a certain distance.

[0088] In FIG. 1 (B), an example is shown in which a spacer (247) is provided on an insulating film (253) and a conductive film (252), but one embodiment of the present invention is not limited thereto. The spacer (247) may be provided on the substrate (211) side or on the substrate (261) side. For example, the spacer (247) may be formed on an insulating film (245). In addition, although FIG. 1 (B) shows an example in which the spacer (247) is in contact with the insulating film (253) and the insulating film (245), it does not have to be in contact with a structure provided on either the substrate (211) side or the substrate (261) side.

[0089] Particle-shaped spacers may be used as spacers (247). Materials such as silica may be used as particle-shaped spacers, but it is preferable to use materials with elasticity such as resin or rubber. In this case, the particle-shaped spacers may have a shape that is compressed in the vertical direction.

[0090] The substrate (211) and the substrate (261) are bonded by an adhesive layer (265). A liquid crystal (249) is sealed in an area surrounded by the substrate (211), the substrate (261), and the adhesive layer (265).

[0091] Additionally, when the input / output device (300) functions as a transmissive liquid crystal display device, two polarizing plates are arranged to interpose a display section. Light from a backlight positioned outside the polarizing plates is incident through the polarizing plates. At this time, the orientation of the liquid crystal (249) and the optical modulation of the light can be controlled by the voltage supplied between the conductive film (251) and the conductive film (252). That is, the intensity of the light emitted through the polarizing plates can be controlled. Furthermore, since the incident light is absorbed by the coloring film (241) in a wavelength range other than a specific wavelength range, the emitted light becomes light that exhibits, for example, red, blue, or green.

[0092] In addition, a circular polarizer can be used in addition to the polarizer, for example. As a circular polarizer, for example, a laminated linear polarizer and a quarter-wavelength phase difference plate can be used. By using a circular polarizer, the dependence of the display of the input / output device on the viewing angle can be reduced.

[0093] In addition, although an FFS mode is applied as the liquid crystal element (207a) used here, it is not limited to this, and a liquid crystal element with various modes applied can be used. For example, a liquid crystal element with a VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode, ASM (Axially Symmetric Aligned Micro-cell) mode, OCB (Optically Compensated Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, etc., can be used.

[0094] In addition, a normally black liquid crystal display device, for example, a transparent liquid crystal display device employing a vertical alignment (VA) mode, may be applied to the input / output device (300). As for the vertical alignment mode, an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV mode, etc., may be used.

[0095] Furthermore, a liquid crystal device is a device that controls the transmission or non-transmission of light through the optical modulation action of a liquid crystal. Additionally, the optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including electric fields in the horizontal, vertical, or oblique directions). Moreover, liquid crystals used in liquid crystal devices may include thermotropic liquid crystals, low-molecular-weight liquid crystals, high-molecular-weight liquid crystals, polymer-dispersed liquid crystals (PDLC), ferroelectric liquid crystals, and antiferroelectric liquid crystals. Depending on the conditions, these liquid crystal materials exhibit cholesteric, smectic, cubic, chiral-nematic, isotropic, and other phases.

[0096] In addition, either positive liquid crystal or negative liquid crystal may be used as the liquid crystal material, and the optimal liquid crystal material can be used depending on the applied mode and design.

[0097] In addition, when adopting a transverse electric field method, a liquid crystal exhibiting a blue phase that does not use an alignment layer may be used. The blue phase is one of the liquid crystal phases, and it is a phase that appears just before transitioning from the cholesteric phase to the isotropic phase when the cholesteric liquid crystal is continuously heated. Since the blue phase appears only within a narrow temperature range, a liquid crystal composition containing 5% by weight or more of a chiral agent is used in the liquid crystal (249) to improve the temperature range. The liquid crystal composition containing the liquid crystal exhibiting a blue phase and the chiral agent has a short response speed and optical isotropy. In addition, the liquid crystal composition containing the liquid crystal exhibiting a blue phase and the chiral agent does not require alignment treatment and has low dependence on the viewing angle. Furthermore, since there is no need to provide an alignment layer, rubbing treatment is also unnecessary, which can prevent electrostatic breakdown caused by rubbing treatment and reduce defects or damage to the liquid crystal display device during the manufacturing process.

[0098] Here, a substrate may be provided above the substrate (261) to which a test object, such as a finger or a stylus, is in direct contact. Additionally, it is preferable to provide a polarizing plate or a circular polarizing plate between the substrate (261) and the substrate. In this case, it is preferable to provide a protective layer (such as a ceramic coat) on the substrate. The protective layer may use inorganic insulating materials such as silicon oxide, aluminum oxide, yttrium oxide, or yttria-stabilized zirconia (YSZ). Additionally, tempered glass may be used on the substrate. Tempered glass may be used in which physical or chemical treatment is performed by means of an ion exchange method or an air cooling method, and compressive stress is applied to its surface.

[0099] Additionally, a cross-sectional view of two adjacent pixels is shown in (A) of FIG. 2. The two subpixels shown in (A) of FIG. 2 are subpixels of different pixels.

[0100] In the input / output device illustrated in (A) of FIG. 2, proximity or contact of a detection object can be detected by utilizing the capacitance formed between the conductive film (252) of the left subpixel and the conductive film (252) of the right subpixel. That is, in the input / output device according to one embodiment of the present invention, the conductive film (252) serves as both the common electrode of the liquid crystal element and the electrode of the detection element.

[0101] As such, in an input / output device according to one embodiment of the present invention, since the electrode constituting the liquid crystal element also serves as the electrode constituting the detection element, the manufacturing process can be simplified and the manufacturing cost can be reduced. In addition, the input / output device can be made thinner and lighter.

[0102] The conductive film (252) is electrically connected to the conductive film (255) which functions as auxiliary wiring. By providing the conductive film (255), the resistance of the electrode of the detection element can be reduced. As the resistance of the electrode of the detection element is reduced, the time constant of the electrode of the detection element can be reduced. The smaller the time constant of the electrode of the detection element, the higher the detection sensitivity can be, and the higher the precision of detection can be.

[0103] In addition, if the capacitance between the electrode of the detection element and the signal line is excessively large, the time constant of the electrode of the detection element may become large. Therefore, it is desirable to provide an insulating film having a flattening function between the transistor and the electrode of the detection element to reduce the capacitance between the electrode of the detection element and the signal line. For example, in (A) of FIG. 2, an insulating film (219) is provided as an insulating film having a flattening function. By providing the insulating film (219), the capacitance between the conductive film (252) and the signal line can be reduced. Accordingly, the time constant of the electrode of the detection element can be reduced. As described above, the smaller the time constant of the electrode of the detection element, the higher the detection sensitivity can be, and the higher the precision of detection can be.

[0104] For example, the time constant of the electrode of the detection element is greater than 0 seconds and 1×10 -4 seconds or less, preferably greater than 0 seconds and 5×10⁻⁶ -5 seconds or less, more preferably greater than 0 seconds and 5×10⁻⁶ -6 seconds or less, more preferably greater than 0 seconds and 5×10 -7 seconds or less, particularly preferably greater than 0 seconds and 2×10⁻⁶ -7 It is preferable if it is less than a second. In particular, the time constant is 1 × 10⁻⁶ -6 By keeping it under 2 seconds, high detection sensitivity can be achieved while suppressing the influence of noise.

[0105] [Example of Cross-sectional Configuration of Input / Output Device 2]

[0106] In FIG. 2 (B), a cross-sectional view of two adjacent pixels is shown, which is different from FIG. 2 (A). The two subpixels shown in FIG. 2 (B) are subpixels of different pixels. Also, in FIG. 3 (A), a cross-sectional view is shown cut along the dotted lines AB and CD in FIG. 1 (A) in this case.

[0107] Configuration Example 2 shown in FIG. 2 (B) and FIG. 3 (A) differs from Configuration Example 1 shown in FIG. 1 (B) and FIG. 2 (A) in that the stacking order of the conductive film (251), conductive film (252), insulating film (253), and conductive film (255) is different. Additionally, regarding the parts of Configuration Example 2 that are the same as those of Configuration Example 1, the above description may be referred to.

[0108] Specifically, Example 2 has a conductive film (255) on an insulating film (219), a conductive film (252) on the conductive film (255), an insulating film (253) on the conductive film (252), and a conductive film (251) on the insulating film (253).

[0109] As shown in the liquid crystal element (207b) of FIG. 2 (B), a conductive film (251) provided on the upper layer and having a comb-shaped or slit-shaped upper surface shape may be used as a pixel electrode, and a conductive film (252) provided on the lower layer may be used as a common electrode. The conductive film (251) is electrically connected to the source or drain of the transistor (203a).

[0110] In Fig. 2 (B), proximity or contact of a subject to detection can be detected by utilizing the capacitance formed between the conductive film (252) of the left subpixel and the conductive film (252) of the right subpixel. That is, in an input / output device according to one embodiment of the present invention, the conductive film (252) serves as both the common electrode of the liquid crystal element and the electrode of the detection element.

[0111] In addition, in Configuration Example 1 (B of FIG. 1, A of FIG. 2), the conductive film (252), which serves as both the electrode of the detection element and the common electrode, is located on the display surface side (the side closer to the object to be detected) than the conductive film (251) which functions as the pixel electrode. Therefore, the detection sensitivity may be improved in Configuration Example 1 compared to Configuration Example 2, where the conductive film (251) is located on the display surface side rather than the conductive film (252).

[0112] In addition, since the stacking order of the conductive film (251), conductive film (252), insulating film (253), and conductive film (255) in Configuration Example 2 is different from Configuration Example 1, the configuration of the connection part is also different from Configuration Example 1.

[0113] The connection portion (205b) illustrated in (A) of FIG. 3 has a conductive film (231) on an insulating film (213), a conductive film (233) on the conductive film (231), and a conductive film (235) on the conductive film (233). The conductive film (233) can be formed using the same material and the same process as the conductive film (252) of the liquid crystal element (207b). The conductive film (235) can be formed using the same material and the same process as the conductive film (251) of the liquid crystal element (207b).

[0114] In addition, other configuration examples of a transistor having an input / output device according to one embodiment of the present invention are illustrated in FIG. 3 (B) and (C). As illustrated in FIG. 3 (B), in a transistor having two gates, the two gates do not need to be electrically connected. Also, as illustrated in FIG. 3 (C), a top gate transistor may be provided in at least one of the driving circuit and the display section.

[0115] In addition, other configurations of the liquid crystal element having an input / output device according to one embodiment of the present invention are illustrated in (D) to (F) of FIG. 3. Both the conductive film (251) and the conductive film (252) may have a comb-shaped upper surface (also referred to as a flat surface) or an upper surface with a slit provided therein.

[0116] For example, when viewed from the top surface, the slit end of one conductive film and the slit end of the other conductive film may overlap. A cross-sectional view in this case is shown in (D) of FIG. 3.

[0117] Alternatively, when viewed from the top surface, there may be a portion where both the conductive film (251) and the conductive film (252) are not provided. A cross-sectional view in this case is shown in (E) of FIG. 3.

[0118] Alternatively, when viewed from the top surface, the conductive film (251) and the conductive film (252) may have an overlapping portion. A cross-sectional view in this case is shown in (F) of FIG. 3.

[0119] [Example of Cross-sectional Configuration of Input / Output Device 3]

[0120] In FIG. 4, a cross-sectional view is shown along the dotted line AB and the dotted line CD in FIG. 1 (A), which is different from FIG. 1 (B) and FIG. 3 (A).

[0121] Configuration Example 3 shown in FIG. 4 is different in that the configuration of the transistor of the display unit (301) and the transistor of the scan line driving circuit (302) is different from Configuration Example 1 shown in FIG. 1 (B) and FIG. 2 (A), respectively. In addition, regarding the parts of Configuration Example 3 that are the same as those of Configuration Example 1, the above description may be referred to.

[0122] The transistor (201b) is configured to enclose an oxide semiconductor film in which a channel is formed with two gates. The transistor (201b) differs from the transistor (201a) in that the gate electrode (221) and the oxide conductive film (227) are in direct contact. In this way, the two gates may be electrically connected without interposing another layer.

[0123] The transistor (203b) is configured such that, like the transistor (201b), the oxide semiconductor film (223) in which the channel is formed is clamped by two gates. In this way, a transistor having two gates can be applied to the display unit in addition to the driving circuit. Also, although not shown, it is preferable that the gate electrode (221) and the oxide conductive film (227) are electrically connected in the transistor (203b).

[0124] In addition, the closer the distance between the oxide conductive film (227) and the electrode of the detection element, the more likely it is that the potential of the electrode of the detection element will change due to the influence of the oxide conductive film (227). In one embodiment of the present invention, since the oxide conductive film (227) and the electrode of the detection element are provided on different layers, it is preferable that the electrode of the detection element is not easily affected by the oxide conductive film (227).

[0125] [Example of Cross-sectional Configuration of Input / Output Device 4]

[0126] In Fig. 5, a cross-sectional view is shown cut along the dotted line AB and the dotted line CD in Fig. 1 (A), which is different from Fig. 1 (B), Fig. 3 (A), and Fig. 4.

[0127] Configuration Example 4 shown in FIG. 5 is different from Configuration Example 1 shown in FIG. 1 (B) and FIG. 2 (A) in that the configuration of the transistors in the scan line driving circuit (302) and the substrate provided with the spacer (247) are different. Also, regarding the parts of Configuration Example 4 that are the same as those in Configuration Example 1, the above description may be referred to.

[0128] The transistor (201c) is configured to have two gates that enclose an oxide semiconductor film in which a channel is formed. The formation location of the oxide conductive film (227) in the transistor (201c) is different from that of the transistor (201a). Specifically, it has an insulating film (217) on an insulating film (215), an insulating film (218) having a flattening function on the insulating film (217), and an oxide conductive film (227) on the insulating film (218). In this way, the oxide conductive film (227) may be provided on the insulating film having a flattening function. The transistor (201c) is covered with an insulating film (219) having a flattening function. Additionally, in FIG. 5, an example is shown in which the oxide conductive film (227) is electrically connected to the gate electrode (221) through the conductive film (226), but as shown in FIG. 4, the oxide conductive film (227) and the gate electrode (221) may be directly connected.

[0129] Additionally, FIG. 5 illustrates an example in which a spacer (247) is provided on an insulating film (245). In this way, the spacer (247) may be placed on the substrate (261) side.

[0130] [Example of Cross-sectional Configuration of Input / Output Device 5]

[0131] In FIG. 6, a cross-sectional view is shown along the dotted line AB and the dotted line CD in FIG. 1 (A), which is different from FIG. 1 (B), FIG. 3 (A), FIG. 4, and FIG. 5.

[0132] In Configuration Example 5 shown in FIG. 6, the formation location of the colored film (241) is different from Configuration Example 1 shown in FIG. 1 (B) and FIG. 2 (A). Additionally, regarding the parts of Configuration Example 5 that are the same as those in Configuration Example 1, the above description may be referred to.

[0133] The colored film (241) is not limited to being formed on the opposite substrate (substrate (261)). As shown in FIG. 6, it may be formed on the substrate (211) on which the transistor, etc. is formed. Accordingly, the decrease in yield and the decrease in display quality caused by the decrease in alignment precision between the substrate (211) and the substrate (261) due to the high-resolution display of the input / output device can be suppressed.

[0134] [Example of Cross-sectional Configuration of Input / Output Device 6]

[0135] FIG. 34 shows a cross-sectional view of an input / output device different from each of the above configuration examples. An input / output device according to one embodiment of the present invention is not limited to a touch panel (full-in-cell type) in which electrodes constituting a detection element are provided only on a substrate supporting a display element. As with the input / output device shown in FIG. 34, electrodes constituting a detection element may be provided on the opposite substrate side.

[0136] FIG. 34 illustrates an example in which a conductive film (254) is formed on a surface of a substrate (261) facing the surface on which a colored film (241), etc., is formed. An FPC (259) is electrically connected to the conductive film (254) via a connector (257). In the input / output device (300) illustrated in FIG. 34, proximity or contact of a detection object can be detected by utilizing the capacitance formed between the conductive film (252) and the conductive film (254). That is, in the input / output device according to one embodiment of the present invention, the conductive film (252) serves as both the common electrode of the liquid crystal element and the electrode of one side of the detection element. Thus, the common electrode of the liquid crystal element may serve as the electrode of one side of the detection element, or may serve as a pair of electrodes of the detection element.

[0137] Additionally, FIG. 34 illustrates an example having a conductive film (255) on top of a conductive film (252). It does not matter which side is positioned on top of the electrode of the liquid crystal element and the conductive film that can function as an auxiliary wiring for the electrode.

[0138] Next, details regarding materials and the like that can be used for each component of the input / output device of the present embodiment will be described. Additionally, descriptions of components that have already been explained may be omitted. Furthermore, the following materials may be appropriately used for the input / output device and its components described in subsequent embodiments.

[0139] ≪Circuit Board≫

[0140] There are no major restrictions on the material of the substrate of the input / output device (300), but it is necessary to have heat resistance sufficient to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, and a sapphire substrate may be used. In addition, a single-crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc. may be applied, and a semiconductor device provided on these substrates may be used as a substrate. In addition, when a glass substrate is used as a substrate, a large-area substrate such as the 6th generation (1500mm × 1850mm), 7th generation (1870mm × 2200mm), 8th generation (2200mm × 2400mm), 9th generation (2400mm × 2800mm), and 10th generation (2950mm × 3400mm) can be used to manufacture a large-sized display device. In addition, a flexible substrate may be used as the substrate (211), and transistors, capacitive elements, etc. may be formed directly on the flexible substrate.

[0141] By using a thin substrate, the input / output device can be made lighter and thinner. In addition, by using a substrate with a thickness sufficient to be flexible, a flexible input / output device can be realized.

[0142] In addition to these, a transistor can be formed using various substrates as the substrate (211) and substrate (261). The type of substrate is not limited to a specific one. Examples of such substrates include plastic substrates, metal substrates, stainless steel substrates, substrates having stainless steel foil, tungsten substrates, substrates having tungsten foil, flexible substrates, bonding films, paper containing fibrous materials, or base films. Examples of glass substrates include barium borosilicate glass, aluminoborosilicate glass, or soda-lime glass. Examples of flexible substrates include plastics represented by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polyethersulfone (PES), or flexible synthetic resins such as acrylic. Examples of bonding films include polypropylene, polyester, polyvinyl fluoride, or polyvinyl chloride. Examples of substrate films include polyester, polyamide, polyimide, inorganic deposition films, or paper. In particular, by fabricating transistors using semiconductor substrates, single-crystal substrates, or SOI substrates, it is possible to produce transistors with low non-uniformity in characteristics, size, or shape, high current capability, and small size. By constructing circuits using such transistors, it is possible to achieve low power consumption or high integration of the circuit.

[0143] In addition, after forming a transistor using a certain substrate, the transistor may be placed on another substrate by transferring the transistor to another substrate. Examples of substrates on which the transistor is transferred include, in addition to the substrate capable of forming the transistor described above, paper substrates, cellophane substrates, stone substrates, wood substrates, cloth substrates (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupro, rayon, recycled polyester), leather substrates, or rubber substrates. By using these substrates, it is possible to form transistors with good characteristics, form transistors with low power consumption, manufacture devices that are difficult to destroy, impart heat resistance, achieve weight reduction, or achieve thinning.

[0144] Transistor

[0145] The structure of the transistor in the input / output device according to one embodiment of the present invention is not particularly limited. For example, it may be a planar type transistor, a stagger type transistor, or an inverse stagger type transistor. In addition, it may be a top-gate type or a bottom-gate type transistor structure. Alternatively, gate electrodes may be provided at the top and bottom of the channel. The semiconductor material used for the transistor is not particularly limited, and examples include oxide semiconductors, silicon, germanium, etc.

[0146] The crystallinity of the semiconductor material used in the transistor is not particularly limited, and any of the following may be used: amorphous semiconductors or crystalline semiconductors (microcrystalline semiconductors, polycrystalline semiconductors, single-crystal semiconductors, or semiconductors having crystalline regions in some parts). Using a crystalline semiconductor is desirable as it can suppress the degradation of transistor characteristics.

[0147] In addition, as semiconductor materials used in transistors, for example, elements of Group 14, compound semiconductors, or oxide semiconductors can be used in the semiconductor layer. Representative examples include semiconductors containing silicon, semiconductors containing gallium arsenide, or oxide semiconductors containing indium.

[0148] In particular, it is desirable to apply an oxide semiconductor to the semiconductor where the transistor channel is formed. In particular, it is desirable to apply an oxide semiconductor with a larger band gap than silicon. Using a semiconductor material that has a larger band gap than silicon and also has a lower carrier density is desirable because it can reduce the current in the off state of the transistor.

[0149] For example, it is preferable that the oxide semiconductor comprises at least indium (In) or zinc (Zn). More preferably, it comprises an oxide denoted as In-M-Zn oxide (where M is a metal such as Al, Ti, Ga, Ge, Y, Zr, La, Ce, Sn, Mg, Nd, or Hf).

[0150] In particular, it is preferable to use an oxide semiconductor film having a plurality of crystal portions as a semiconductor layer, wherein the c-axis of the crystal portions is oriented substantially perpendicularly to the surface to be formed of the semiconductor layer or the upper surface of the semiconductor layer, and furthermore, there are no grain boundaries between adjacent crystal portions.

[0151] Since such oxide semiconductors do not have crystal grain boundaries, cracks in the oxide semiconductor film are suppressed due to stress when the display panel is bent. Therefore, such oxide semiconductors can be preferably used in input / output devices that are flexible and can be bent.

[0152] In addition, by using such an oxide semiconductor as a semiconductor layer, fluctuations in electrical characteristics are suppressed, making it possible to realize a highly reliable transistor.

[0153] Furthermore, due to its low off-current, the charge accumulated in the capacitive element via the transistor can be maintained for a long time. By applying such a transistor to the pixel, the gradation of the image displayed in each display area can be maintained, and the driving circuit can be stopped. As a result, a display device with extremely reduced power consumption can be realized.

[0154] Oxide Semiconductor Film

[0155] The oxide semiconductor film (223) preferably comprises a film represented as an In-M-Zn oxide comprising at least indium (In), zinc (Zn), and M (metals such as Al, Ti, Ga, Ge, Y, Zr, La, Ce, Sn, Mg, Nd, or Hf). Additionally, in order to reduce non-uniformity in the electrical characteristics of a transistor using the oxide semiconductor, it is preferable to include a stabilizer together with these.

[0156] As a stabilizer, in addition to the metal described as M above, examples include gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al), or zirconium (Zr). In addition, other examples of stabilizers include lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu).

[0157] As an oxide semiconductor constituting the oxide semiconductor film (223), for example, an In-Ga-Zn oxide, an In-Al-Zn oxide, an In-Sn-Zn oxide, an In-Hf-Zn oxide, an In-La-Zn oxide, an In-Ce-Zn oxide, an In-Pr-Zn oxide, an In-Nd-Zn oxide, an In-Sm-Zn oxide, an In-Eu-Zn oxide, an In-Gd-Zn oxide, an In-Tb-Zn oxide, an In-Dy-Zn oxide, an In-Ho-Zn oxide, an In-Er-Zn oxide, an In-Tm-Zn oxide, an In-Yb-Zn oxide, an In-Lu-Zn ​​oxide, an In-Sn-Ga-Zn oxide, an In-Hf-Ga-Zn oxide, an In-Al-Ga-Zn oxide, an In-Sn-Al-Zn oxide, an In-Sn-Al-Zn oxide, In-Sn-Hf-Zn oxides and In-Hf-Al-Zn oxides can be used.

[0158] Furthermore, the term In-Ga-Zn oxide here refers to an oxide having In, Ga, and Zn as main components, and the ratio of In, Ga, and Zn is irrelevant. Additionally, metal elements other than In, Ga, and Zn may be included.

[0159] In addition, when the oxide semiconductor film (223) is an In-M-Zn oxide, when the sum of In and M is 100 atomic%, preferably In is higher than 25 atomic% and M is less than 75 atomic%, more preferably In is higher than 34 atomic% and M is less than 66 atomic%.

[0160] The oxide semiconductor film (223) has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. In this way, by using an oxide semiconductor with a large energy gap, the off-current of the transistor can be reduced.

[0161] The thickness of the oxide semiconductor film (223) is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, more preferably 3 nm or more and 50 nm or less.

[0162] When the oxide semiconductor film (223) is an In-M-Zn oxide (where M is Al, Ti, Ga, Ge, Y, Zr, La, Ce, Sn, Mg, Nd, or Hf), it is preferable that the metal element of the sputtering target used to deposit the In-M-Zn oxide satisfies In ≥ M and Zn ≥ M [atomic ratio]. Examples of such atomic ratios of the metal element of the sputtering target include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 3:1:2, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, etc. Additionally, the atomic ratio of the oxide semiconductor film (223) formed includes an error variation of ±40% of the atomic ratio of the metal element included in the sputtering target.

[0163] As for the oxide semiconductor film (223), an oxide semiconductor film with a low carrier density is used. For example, the oxide semiconductor film (223) has a carrier density of 1×10 17 Pieces / cm 3 Below, preferably 1×10 15 Pieces / cm 3 Below, more preferably 1×10 13 Pieces / cm 3 Below, more preferably 1×10 11 Pieces / cm 3 The following oxide semiconductor film is used.

[0164] In addition, not limited to these, a composition having an appropriate composition may be used depending on the required semiconductor characteristics and electrical characteristics (field-effect mobility, threshold voltage, etc.) of the transistor. Furthermore, in order to obtain the required semiconductor characteristics of the transistor, it is desirable to make the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. of the oxide semiconductor film (223) appropriate.

[0165] In the oxide semiconductor film (223), if silicon or carbon, which is one of the Group 14 elements, is included, the oxygen deficiency in the oxide semiconductor film (223) increases, and it may become n-type. Therefore, the concentration of silicon or carbon in the oxide semiconductor film (223) (concentration obtained by Secondary Ion Mass Spectrometry (SIMS)) is 2×10 18 atoms / cm 3 Below, preferably 2×10 17 atoms / cm 3 The following applies.

[0166] In addition, in the oxide semiconductor film (223), the concentration of alkali metal or alkaline earth metal obtained by SIMS is 1×10 18 atoms / cm 3 Below, preferably 2×10 16 atoms / cm 3 The following applies. When alkali metals and alkaline earth metals combine with oxide semiconductors, carriers may be generated, and the off-current of the transistor may increase. Therefore, it is desirable to reduce the concentration of alkali metals or alkaline earth metals in the oxide semiconductor film (223).

[0167] In addition, if nitrogen is included in the oxide semiconductor film (223), electrons acting as carriers are generated, and since the carrier density increases, it is easy to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen is prone to normal-on characteristics. Therefore, in the oxide semiconductor film, it is desirable to reduce the nitrogen as much as possible. For example, the nitrogen concentration obtained by SIMS is 5×10 18 atoms / cm 3 It is desirable to do it below.

[0168] Additionally, the oxide semiconductor film (223) may have, for example, a single-crystal structure. The single-crystal structure includes, for example, the CAAC-OS (C Axis Aligned-Crystalline Oxide Semiconductor) described later, a polycrystalline structure, the microcrystalline structure described later, or an amorphous structure. In the single-crystal structure, the amorphous structure has the highest defect level density, and the CAAC-OS has the lowest defect level density.

[0169] The oxide semiconductor film (223) may have, for example, an amorphous structure. The oxide semiconductor film of the amorphous structure, for example, has a disordered atomic arrangement and does not have crystalline components. Or, the oxide film of the amorphous structure, for example, has a completely amorphous structure and does not have crystalline parts.

[0170] Additionally, the oxide semiconductor film (223) may be a mixed film having two or more of the amorphous structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, and single-crystal structure region. For example, the mixed film may have a single-layer structure of two or more of the amorphous structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, and single-crystal structure region. Additionally, the mixed film may have a stacked structure of two or more of the amorphous structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, and single-crystal structure region.

[0171] Alternatively, it is preferable to use silicon for the semiconductor in which the transistor channel is formed. While amorphous silicon may be used as silicon, it is particularly preferable to use crystalline silicon. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, or single-crystal silicon. In particular, polycrystalline silicon can be formed at a lower temperature compared to single-crystal silicon and possesses higher field-effect mobility and higher reliability compared to amorphous silicon. By applying such a polycrystalline semiconductor to pixels, the aperture ratio of the pixels can be improved. Even when manufacturing extremely high-precision I / O devices, the gate driving circuit and source driving circuit can be formed on the same substrate as the pixel, thereby reducing the number of components constituting the electronic device.

[0172] Method for Controlling the Resistivity of Oxide Semiconductors

[0173] Oxide semiconductors are semiconductor materials whose resistance can be controlled by oxygen vacancies and / or the concentration of impurities, such as hydrogen and water, within the film. Therefore, the resistivity of an oxide conductive film can be controlled by selecting a treatment that increases oxygen vacancies and / or the impurity concentration, or a treatment that reduces oxygen vacancies and / or the impurity concentration, for the oxide semiconductor film.

[0174] In addition, an oxide conductive film formed using such an oxide semiconductor film may be described as an oxide semiconductor film with high carrier density and low resistance, an oxide semiconductor film having conductivity, or an oxide semiconductor film with high conductivity.

[0175] Specifically, an oxide semiconductor film that functions as an oxide conductive film (227) can be made into an oxide semiconductor film with high carrier density and low resistance by performing plasma treatment on the oxide semiconductor film, thereby increasing the oxygen vacancy within the oxide semiconductor film or / and increasing impurities such as hydrogen and water within the oxide semiconductor film. Additionally, an insulating film (217) containing hydrogen can be formed to contact the oxide semiconductor film, and hydrogen can be diffused from the insulating film (217) containing hydrogen to the oxide semiconductor film, thereby making the oxide semiconductor film into an oxide semiconductor film with high carrier density and low resistance.

[0176] Meanwhile, an insulating film (215) is provided on the oxide semiconductor film (223) so that the oxide semiconductor film (223) is not exposed to the plasma treatment. Additionally, by providing the insulating film (215), the oxide semiconductor film (223) is configured so that it does not come into contact with an insulating film (217) containing hydrogen. As the insulating film (215), oxygen can be supplied to the oxide semiconductor film (223) by using an insulating film capable of releasing oxygen. The oxide semiconductor film (223) supplied with oxygen has reduced oxygen deficiency within the film or at the interface, becoming a high-resistance oxide semiconductor. Furthermore, as an insulating film capable of releasing oxygen, for example, a silicon oxide film or a silicon nitride film can be used.

[0177] In addition, to obtain an oxide semiconductor film with low resistivity, hydrogen, boron, phosphorus, or nitrogen may be injected into the oxide semiconductor film using an ion implantation method, an ion doping method, a plasma infiltration ion implantation method, etc.

[0178] In addition, plasma treatment performed on the oxide conductive film (227) can be typically described as plasma treatment using a gas containing one selected from noble gases (He, Ne, Ar, Kr, Xe), phosphorus, boron, hydrogen, and nitrogen. More specifically, plasma treatment under an Ar atmosphere, plasma treatment under a mixed gas atmosphere of Ar and hydrogen, plasma treatment under an ammonia atmosphere, plasma treatment under a mixed gas atmosphere of Ar and ammonia, or plasma treatment under a nitrogen atmosphere.

[0179] Through the above plasma treatment, oxygen vacancies are formed in the oxide conductive film (227) in the lattice (or portion where oxygen is removed) from which oxygen has been removed. These oxygen vacancies may be a factor in generating carriers. Additionally, hydrogen may be supplied from an insulating film in the vicinity of the oxide conductive film (227), more specifically, in contact with the lower or upper side of the oxide conductive film (227), and when hydrogen enters the oxygen vacancies, electrons acting as carriers may be generated. Therefore, the oxide conductive film (227), in which oxygen vacancies are increased by the plasma treatment, has a higher carrier density than the oxide semiconductor film (223).

[0180] Meanwhile, the oxide semiconductor film (223) with reduced oxygen deficiency and reduced hydrogen concentration can be described as an oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic. Here, substantially intrinsic means that the carrier density of the oxide semiconductor is 1×10 17 / cm 3 Less than, preferably 1×10 15 / cm 3 Less than, more preferably 1×10 13 / cm 3It refers to something less than. Alternatively, a substance with a low impurity concentration and a low defect level density (low oxygen vacancy) is called high-purity intrinsic or substantially high-purity intrinsic. An oxide semiconductor that is high-purity intrinsic or substantially high-purity intrinsic can have a low carrier density because it has few carrier generation sources. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film is prone to having an electrical characteristic where the threshold voltage is positive (also called a normally-off characteristic). In addition, an oxide semiconductor film (223) that is high-purity intrinsic or substantially high-purity intrinsic can reduce the trap level density because it has a low defect level density.

[0181] In addition, the oxide semiconductor film (223), which is of high purity intrinsic or substantially high purity intrinsic, has a significantly small off-current and a channel width of 1×10 6 Even for a device with a size of μm and a channel length of 10 μm, if the voltage between the source and drain electrodes (drain voltage) is in the range of 1 V to 10 V, and the off-current is below the measurement limit of the semiconductor parameter analyzer, i.e., 1 × 10⁻⁶ -13 A characteristic of A or less can be obtained. Therefore, a transistor in which a channel region is formed in an oxide semiconductor film (223) becomes a transistor with low variation in electrical characteristics and high reliability.

[0182] Hydrogen can be supplied to the oxide conductive film (227) by using, for example, an insulating film containing hydrogen, that is to say, an insulating film capable of releasing hydrogen, typically a silicon nitride film, as the insulating film (217). The insulating film capable of releasing hydrogen has a hydrogen concentration contained within the film of 1×10 22 atoms / cm 3Ideally, the above is desirable. By forming such an insulating film in contact with the oxide conductive film (227), hydrogen can be effectively incorporated into the oxide conductive film (227). In this way, the resistance of the oxide semiconductor film (or oxide conductive film) can be arbitrarily adjusted by adjusting the composition of the insulating film in contact with the oxide semiconductor film (or oxide conductive film) together with the plasma treatment described above.

[0183] Hydrogen contained in the oxide conductive film (227) reacts with oxygen bonded to metal atoms to form water, and at the same time forms oxygen vacancies in the lattice (or portions where oxygen has been removed) from which oxygen has been removed. In some cases, electrons acting as carriers are generated as hydrogen enters the oxygen vacancies. Additionally, electrons acting as carriers are generated as some of the hydrogen bonds with oxygen bonded to metal atoms. Therefore, the oxide conductive film (227) containing hydrogen has a higher carrier density than the oxide semiconductor film (223).

[0184] It is desirable that the oxide semiconductor film (223) in which the channel region of the transistor is formed has hydrogen reduced as much as possible. Specifically, in the oxide semiconductor film (223), the hydrogen concentration obtained by SIMS is 2×10 20 atoms / cm 3 Below, preferably 5×10 19 atoms / cm 3 Below, more preferably 1×10 19 atoms / cm 3 Below, more preferably 5×10 18 atoms / cm 3 Below, more preferably 1×10 18 atoms / cm 3 Below, more preferably 5×10 17 atoms / cm 3 Below, more preferably 1×10 16 atoms / cm 3 The following applies.

[0185] Meanwhile, the oxide conductive film (227) functioning as a gate has a higher hydrogen concentration or / and oxygen deficiency than the oxide semiconductor film (223), thereby lowering the resistance.

[0186] In the oxide conductive film (227), materials that can be used for the oxide semiconductor film (223) and a method for forming the oxide semiconductor film (223) can be applied. Additionally, the oxide semiconductor film (223) and the oxide conductive film (227) have light transparency.

[0187] In addition, the materials that can be used for the oxide conductive film (227) and the method of forming the oxide conductive film (227) can also be applied to the conductive film (251) and the conductive film (252), respectively.

[0188] ≪Insulating film≫

[0189] Organic insulating materials or inorganic insulating materials may be used as insulating materials that can be used for each insulating film, overcoat, spacer, etc. of the input / output device. Examples of resins include acrylic resin, epoxy resin, polyimide resin, polyamide resin, polyamideimide resin, siloxane resin, benzocyclobutene-based resin, phenolic resin, etc. Examples of inorganic insulating films include silicon oxide film, silicon nitride film, silicon nitride film, silicon nitride film, aluminum oxide film, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film.

[0190] ≪Challenge Section≫

[0191] In addition to the gate, source, and drain of the transistor, various wirings and electrodes of the input / output device may use metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys having these as main components, as a single layer or a multilayer structure. For example, there are two-layer structures in which a titanium film is laminated on an aluminum film, two-layer structures in which a titanium film is laminated on a tungsten film, two-layer structures in which a copper film is laminated on a molybdenum film, two-layer structures in which a copper film is laminated on an alloy film containing molybdenum and tungsten, two-layer structures in which a copper film is laminated on a copper-magnesium-aluminum alloy film, three-layer structures in which a titanium film or a titanium nitride film is laminated and an aluminum film or a copper film is laminated and superimposed on the titanium film or titanium nitride film, and a titanium film or a titanium nitride film is formed thereon, and three-layer structures in which a molybdenum film or a molybdenum nitride film is laminated and an aluminum film or a copper film is laminated and superimposed on the molybdenum film or molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is formed thereon, etc. For example, when the source electrode (225a) and drain electrode (225b) have a three-layer structure, it is preferable to form a film made of titanium, titanium nitride, molybdenum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium, or molybdenum nitride as the first and third layers, and to form a film made of a low-resistance material such as copper, aluminum, gold or silver, or an alloy of copper and manganese as the second layer. Additionally, a conductive material having light transparency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide with added silicon oxide may be used.

[0192] In addition, a conductive film may be formed using the method for controlling the resistivity of the oxide semiconductor described above.

[0193] ≪Adhesive Layer≫

[0194] As the adhesive layer (265), a curable resin such as a thermosetting resin, a photosetting resin, or a two-component mixed type curable resin may be used. For example, an acrylic resin, a urethane resin, an epoxy resin, or a resin having siloxane bonds may be used.

[0195] ≪Conjunction≫

[0196] As a connector, for example, an anisotropic conductive film (ACF) or anisotropic conductive paste (ACP) can be used.

[0197] ≪Coloration film≫

[0198] A colored film is a colored layer that transmits light in a specific wavelength band. Materials that can be used for colored films include metal materials, resin materials, and resin materials containing pigments or dyes.

[0199] ≪Shade Net≫

[0200] A light-blocking film is provided between adjacent colored films. As the light-blocking film, a black matrix can be formed using, for example, a metal material or a resin material containing a pigment or dye. In addition, it is preferable to provide the light-blocking film in areas other than the display section, such as a driving circuit section, as this can suppress unintended light leakage caused by waveguided light.

[0201] [Example of operation method of input / output device]

[0202] Next, examples of the operation method of an input / output device according to one embodiment of the present invention are shown.

[0203] Figure 7 (A) is an equivalent circuit diagram of a part of a pixel circuit provided in a display unit of an input / output device according to one embodiment of the present invention.

[0204] A single pixel has at least a transistor (3503) and a liquid crystal element (3504). A wire (3501) is electrically connected to the gate of the transistor (3503). Additionally, a wire (3502) is electrically connected to one of the source and drain of the transistor (3503).

[0205] The pixel circuit has a plurality of wires extending in the X direction (e.g., wire (3510_1), wire (3510_2)) and a plurality of wires extending in the Y direction (e.g., wire (3511_1)), which are provided intersecting each other and a capacitance is formed between them.

[0206] In addition, among the pixels provided to the pixel circuit, some adjacent multiple pixels are electrically connected to one electrode of the liquid crystal element provided to each, forming a block. The block is classified into two types: an island-shaped block (e.g., block (3515_1), block (3515_2)) and a line-shaped block extending in the X direction or Y direction (e.g., a block (3516) extending in the Y direction). Also, although only a part of the pixel circuit is shown in FIG. 7 (A), in reality, these two types of blocks are repeatedly arranged in the X direction and Y direction. Here, one electrode of the liquid crystal element may be, for example, a common electrode. Meanwhile, the other electrode of the liquid crystal element may be, for example, a pixel electrode.

[0207] A wiring (3510_1) (or wiring (3510_2)) extending in the X direction is electrically connected to an island-shaped block (3515_1) (or block (3515_2)). Additionally, although not illustrated, a wiring (3510_1) extending in the X direction electrically connects a plurality of island-shaped blocks (3515_1) that are discontinuously arranged along the X direction via a line-shaped block. Additionally, a wiring (3511_1) extending in the Y direction is electrically connected to a line-shaped block (3516).

[0208] FIG. 7 (B) is an equivalent circuit diagram illustrating the connection configuration of a plurality of wires extending in the X direction (wires (3510_1) to wires (3510_6), collectively referred to as wires (3510)) and a plurality of wires extending in the Y direction (wires (3511_1) to wires (3511_6), collectively referred to as wires (3511)). A common potential can be input to each of the wires (3510) extending in the X direction and to each of the wires (3511) extending in the Y direction. Additionally, a pulse voltage can be input to each of the wires (3510) extending in the X direction from a pulse voltage output circuit. Additionally, each of the wires (3511) extending in the Y direction can be electrically connected to a detection circuit. Furthermore, the wires (3510) and the wires (3511) can be swapped.

[0209] Using (A) and (B) of FIG. 8, an example of the operation method of an input / output device according to one embodiment of the present invention will be described.

[0210] Here, the frame period is divided into a recording period and a detection period. The recording period is the period for recording image data in pixels, and the wiring (3501) (also called a gate line or scan line) is selected sequentially. Meanwhile, the detection period is the period for sensing by a detection element.

[0211] Figure 8 (A) is an equivalent circuit diagram during the recording period. During the recording period, a common potential is input to both the wiring (3510) extending in the X direction and the wiring (3511) extending in the Y direction.

[0212] Figure 8 (B) is an equivalent circuit diagram in the detection period. Each wiring (3511) extending in the Y direction in the detection period is electrically connected to the detection circuit. Additionally, a pulse voltage from the pulse voltage output circuit is input to the wiring (3510) extending in the X direction.

[0213] Figure 8 (C) is an example of a timing chart of input / output waveforms in a mutual capacitance type detection element.

[0214] In FIG. 8 (C), the object to be examined in each matrix is ​​detected during a frame period. In addition, FIG. 8 (C) illustrates two cases: when the object to be examined is not detected during the detection period (non-touch), and when the object to be examined is detected (touch).

[0215] Wiring (3510_1) to wiring (3510_6) is wiring to which pulse voltage is supplied from a pulse voltage output circuit. When pulse voltage is applied to wiring (3510_1) to wiring (3510_6), an electric field is generated between a pair of electrodes forming a capacitive element, and current flows through the capacitive element. The electric field generated between these electrodes changes due to shielding caused by touch, such as a finger or a pen. That is, the capacitance value of the capacitive element changes due to touch, etc. By utilizing this, proximity or contact of a test object can be detected.

[0216] Wiring (3511_1) to wiring (3511_6) is connected to a detection circuit for detecting a change in current in wiring (3511_1) to wiring (3511_6) due to a change in the capacitance value of a capacitance element. In wiring (3511_1) to wiring (3511_6), if there is no proximity or contact with the object to be detected, there is no change in the detected current value; however, if the capacitance value decreases due to proximity or contact with the object to be detected, the current value decreases. Additionally, the current may be detected by detecting the total sum of the current amounts. In that case, it is preferable to detect using an integration circuit, etc. Alternatively, the peak value of the current may be detected. In that case, the current may be converted into voltage and the peak value of the voltage may be detected.

[0217] In addition, in FIG. 8 (C), a waveform is shown with a voltage value corresponding to the detected current value for wiring (3511_1) to wiring (3511_6). Also, as shown in FIG. 8 (C), it is preferable that the timing of the display operation and the timing of the detection operation operate in synchronization.

[0218] The waveform in wiring (3511_1) to wiring (3511_6) changes according to the pulse voltage supplied to wiring (3510_1) to wiring (3510_6). When there is no proximity or contact with the object to be tested, the waveform in wiring (3511_1) to wiring (3511_6) changes uniformly according to the change in voltage in wiring (3510_1) to wiring (3510_6). On the other hand, in the part where the object to be tested is in proximity or contact, the current value decreases, so the waveform of the corresponding voltage value also changes.

[0219] In this way, proximity or contact of the object to be tested can be detected by detecting a change in the capacitance value. Additionally, there are cases where a signal is detected even when the object to be tested, such as a finger or a pen, is in close proximity without touching the input / output device.

[0220] Additionally, (C) of FIG. 8 illustrates an example in which the common potential supplied during the recording period and the low potential supplied during the detection period are the same in the wiring (3510), but one embodiment of the present invention is not limited thereto, and the common potential and the low potential may be different.

[0221] In addition, it is preferable that the pulse voltage output circuit and the detection circuit be formed, for example, within a single IC. It is preferable that the IC be mounted, for example, on an input / output device or on a substrate within the housing of an electronic device. Furthermore, when using a flexible input / output device, since parasitic capacitance increases in the curved portion and there is a risk of increased noise influence, it is preferable to use an IC with a driving method that is not easily affected by noise. For example, it is preferable to use an IC with a driving method that increases the signal-to-noise ratio (S / N ratio).

[0222] In this way, it is desirable to provide the image recording period and the sensing period by the detection element independently. Accordingly, the decrease in sensitivity of the detection element caused by noise during pixel recording can be suppressed.

[0223] In one embodiment of the present invention, as shown in FIG. 8 (D), there is one recording period and one detection period in one frame period. Alternatively, as shown in FIG. 8 (E), there may be two detection periods in one frame period. By providing multiple detection periods in one frame period, the detection sensitivity can be further increased. For example, there may be two or more and four or fewer detection periods in one frame period.

[0224] [Example of upper surface configuration of detection element]

[0225] Next, an example of the upper surface configuration of a detection element having an input / output device according to one embodiment of the present invention will be explained using FIGS. 9 to 11.

[0226] Figure 9 (A) shows a top view of a detection element. The detection element has a conductive film (56a) and a conductive film (56b). The conductive film (56a) functions as an electrode on one side of the detection element, and the conductive film (56b) functions as an electrode on the other side of the detection element. The detection element can detect proximity or contact of a detection object by utilizing the capacitance formed between the conductive film (56a) and the conductive film (56b). Additionally, the conductive film (56a) and the conductive film (56b) may have a comb-shaped top surface or a top surface with a slit, but this is omitted here.

[0227] In one embodiment of the present invention, the conductive film (56a) and the conductive film (56b) also function as a common electrode of a liquid crystal element.

[0228] Multiple conductive films (56a) arranged in the Y direction are each provided extending in the X direction. Additionally, multiple conductive films (56b) arranged in the Y direction are electrically connected by a conductive film (58) provided extending in the Y direction. An example having m conductive films (56a) and n conductive films (58) is shown in FIG. 9 (A).

[0229] Additionally, the conductive film (56a) may be arranged in multiple positions in the X direction, and in this case, may be provided by extending in the Y direction. Additionally, the conductive film (56b) arranged in multiple positions in the X direction may be electrically connected by the conductive film (58) provided by extending in the X direction.

[0230] As illustrated in FIG. 9 (B), a conductive film (56) functioning as an electrode of a detection element is provided across a plurality of pixels (60). The conductive film (56) corresponds to the conductive film (56a) and the conductive film (56b) illustrated in FIG. 9 (A), respectively. The pixel (60) is composed of a plurality of subpixels that exhibit different colors. FIG. 9 (B) illustrates an example in which the pixel (60) is composed of three subpixels (60a), a subpixel (60b), and a subpixel (60c).

[0231] Additionally, it is preferable that a pair of electrodes having a detection element are each electrically connected to an auxiliary wiring. FIG. 10 illustrates an example in which a conductive film (56a) is electrically connected to an auxiliary wiring (57a) and a conductive film (56b) is electrically connected to an auxiliary wiring (57b). FIG. 10 also illustrates an example in which an auxiliary wiring is superimposed on a conductive film, but a conductive film may be superimposed on an auxiliary wiring.

[0232] The resistance of a conductive film that transmits visible light can be relatively high. Therefore, it is desirable to reduce the resistance of each of the pair of electrodes of the detection element by electrically connecting them to auxiliary wiring.

[0233] By reducing the resistance of a pair of electrodes of a detection element, the time constant of each pair of electrodes can be reduced. Therefore, the detection sensitivity of the detection element can be improved, and the detection precision of the detection element can also be improved.

[0234] During the recording period, as shown in (A) of FIG. 11, a common potential VCOM is input to both the conductive film (56a) extending in the X direction and the conductive film (58) extending in the Y direction (and the conductive film (56b) electrically connected to the conductive film (58)). Meanwhile, during the detection period, as shown in (B) of FIG. 11, each of the conductive film (58) extending in the Y direction (and the conductive film (56b) electrically connected to the conductive film (58)) is electrically connected to a detection circuit. Additionally, the conductive film (56a) extending in the X direction is electrically connected to a pulse voltage output circuit, and a pulse voltage is input.

[0235] [Example of pixel surface configuration]

[0236] Next, an example of the upper surface configuration of a pixel having an input / output device according to one embodiment of the present invention will be explained using FIGS. 12 to 14.

[0237] FIG. 12 is a top view of a pixel, and FIG. 13 is a drawing in which the conductive film (252) in FIG. 12 is shown as a dotted line. Additionally, the stacking order of each layer can also be referenced in cross-sectional configuration example 1 ((A) of FIG. 1 and (A) of FIG. 2).

[0238] A plurality of conductive films (251) each have an island-shaped upper surface and are arranged in a matrix. The conductive films (251) are electrically connected to the source or drain of the transistor (203a).

[0239] The conductive film (252) is arranged to overlap with a plurality of conductive films (251). A slit is provided in the conductive film (252). Additionally, the conductive film (252) has an opening at a position that overlaps with the transistor (203a).

[0240] Here, the conductive film (251) functions as a pixel electrode of the liquid crystal element, and the conductive film (252) functions as a common electrode of the liquid crystal element. Additionally, FIGS. 12 and 13 show an example where the upper conductive film (252) is the common electrode and the lower conductive film (251) is the pixel electrode, but the upper conductive film may be the pixel electrode and the lower conductive film may be the common electrode.

[0241] The conductive film (252) functions as an electrode of the detection element.

[0242] In the area (277) indicated by the dashed line, the conductive film (275) and the conductive film (255) are electrically connected. The conductive film (255) functions as an auxiliary wiring for the conductive film (252) and is electrically connected to the conductive film (252). The conductive film (275) can be formed using the same material and the same process as the source and drain of the transistor (203a).

[0243] The conductive film (252) arranged in multiple directions in the Y direction corresponds to the conductive film (56b) in (A) of FIG. 9, etc. Additionally, the conductive film (275) provided extending in the Y direction corresponds to the conductive film (58) in (A) of FIG. 9, etc. The conductive film (252) arranged in multiple directions in the Y direction is electrically connected to the conductive film (275) through the conductive film (255) provided extending in the Y direction. At this time, when an oxide conductive film is used for the conductive film (252), it is preferable to connect the conductive film (255) formed of metal or alloy, etc., to the conductive film (275) rather than directly connecting the conductive film (252) to the conductive film (275), and to electrically connect the conductive film (252) to the conductive film (275) through the conductive film (255), as this can reduce contact resistance.

[0244] Although an example in FIGS. 12 and 13 is shown in which the pixel (273) has three subpixels, one embodiment of the present invention is not limited thereto.

[0245] In addition, examples of the upper surface shape of the electrode of the liquid crystal element are shown in (A) and (B) of FIG. 14.

[0246] The pixel electrode and the common electrode of the liquid crystal element (207) are not limited to a flat shape, but may have various opening patterns (also called slits), or may have a shape including a curved portion or a branched comb shape.

[0247] The liquid crystal element (207) shown in (A) and (B) of FIG. 14 has a conductive film (251) that can function as a pixel electrode and a conductive film (252) that can function as a common electrode.

[0248] The transistor (203) shown in (A) and (B) of FIG. 14 has a gate electrode (221), an oxide semiconductor film (223), a source electrode (225a), and a drain electrode (225b). The conductive film (251) is electrically connected to the drain electrode (225b).

[0249] In FIG. 14 (A), an example is shown in which the conductive film (251) has a slit, and in FIG. 14 (B), an example is shown in which the conductive film (251) has a shape including a comb shape. Additionally, in FIG. 14 (A) and (B), an example is shown in which the conductive film (251) is positioned above the conductive film (252), but the conductive film (252) may be positioned above the conductive film (251).

[0250] [Touch Panel Module]

[0251] Next, a touch panel module having an input / output device and an IC according to one embodiment of the present invention will be described using FIGS. 15 and 16.

[0252] FIG. 15 shows a block diagram of a touch panel module (6500). The touch panel module (6500) has a touch panel (6510) and an IC (6520). An input / output device according to one embodiment of the present invention may be applied to the touch panel (6510).

[0253] The touch panel (6510) has a display unit (6511), an input unit (6512), and a scan line driving circuit (6513). The display unit (6511) has a plurality of pixels, a plurality of signal lines, and a plurality of scan lines, and has the function of displaying an image. The input unit (6512) has a plurality of detection elements that detect contact or proximity of a subject to be detected to the touch panel (6510), and has the function of a touch sensor. The scan line driving circuit (6513) has the function of outputting a scan signal to the scan lines of the display unit (6511).

[0254] Here, for ease of explanation, the display unit (6511) and the input unit (6512) are specified separately as components of the touch panel (6510), but it is preferable to use a so-called in-cell type touch panel that has both the function of displaying an image and the function of a touch sensor. Since the input / output device according to one embodiment of the present invention is an in-cell type touch panel, it is preferable.

[0255] It is preferable that the display unit (6511) has an extremely high resolution such as HD (pixels 1280×720), FHD (pixels 1920×1080), WQHD (pixels 2560×1440), WQXGA (pixels 2560×1600), 4K (pixels 3840×2160), and 8K (pixels 7680×4320). In particular, it is preferable to have a resolution of 4K, 8K, or higher. In addition, it is preferable that the pixel density (precision) of the pixels provided to the display unit (6511) is 300 ppi or higher, preferably 500 ppi or higher, more preferably 800 ppi or higher, more preferably 1000 ppi or higher, and even more preferably 1200 ppi or higher. With a display unit (6511) having such high resolution and high precision, the sense of presence and sense of depth can be further enhanced for personal use, such as portable or home use.

[0256] The IC (6520) has a circuit unit (6501), a signal line driving circuit (6502), a sensor driving circuit (6503), and a detection circuit (6504). The circuit unit (6501) has a timing controller (6505) and an image processing circuit (6506), etc.

[0257] The signal line driving circuit (6502) has the function of outputting an analog image signal (also called a video signal) to the signal line of the display unit (6511). For example, the signal line driving circuit (6502) may have a configuration combining a shift register circuit and a buffer circuit. Additionally, the touch panel (6510) may have a demultiplexer circuit connected to the signal line.

[0258] The sensor driving circuit (6503) has the function of outputting a signal that drives a detection element having an input unit (6512). As the sensor driving circuit (6503), for example, a configuration combining a shift register circuit and a buffer circuit can be used.

[0259] The detection circuit (6504) has the function of outputting an output signal from a detection element of the input unit (6512) to the circuit unit (6501). For example, a configuration having an amplification circuit and an analog-to-digital converter (ADC) can be used as the detection circuit (6504). In this case, the detection circuit (6504) converts the analog signal output from the input unit (6512) into a digital signal and outputs it to the circuit unit (6501).

[0260] The image processing circuit (6506) of the circuit unit (6501) has the function of generating and outputting a signal to drive the display unit (6511) of the touch panel (6510), the function of generating and outputting a signal to drive the input unit (6512), and the function of interpreting the signal output from the input unit (6512) and outputting it to the CPU (6540).

[0261] As a more specific example, the image processing circuit (6506) has the function of generating an image signal according to a command from the CPU (6540). Additionally, the image processing circuit (6506) has the function of performing signal processing on the image signal according to the specifications of the display unit (6511), converting it into an analog image signal, and supplying it to the signal line driving circuit (6502). Additionally, the image processing circuit (6506) has the function of generating a driving signal that is output to the sensor driving circuit (6503) according to a command from the CPU (6540). Additionally, the image processing circuit (6506) has the function of interpreting a signal input from the detection circuit (6504) and outputting it to the CPU (6540) as position information.

[0262] Additionally, the timing controller (6505) has the function of generating signals such as a clock signal and a start pulse signal based on a synchronization signal included in an image signal processed by the image processing circuit (6506), and outputting signals to the scan line driving circuit (6513) and the sensor driving circuit (6503). Additionally, the timing controller (6505) may have the function of generating and outputting a signal that defines the timing at which the detection circuit (6504) outputs a signal. Here, it is preferable for the timing controller (6505) to output signals that are synchronized with the signal output to the scan line driving circuit (6513) and the signal output to the sensor driving circuit (6503), respectively. In particular, it is preferable to distinguish between the period for rewriting pixel data of the display unit (6511) and the period for sensing at the input unit (6512). For example, the touch panel (6510) can be driven by dividing the 1 frame period into the period for rewriting pixel data and the period for sensing. In addition, detection sensitivity and detection precision can be increased by, for example, providing two or more sensing periods during one frame period.

[0263] As for the image processing circuit (6506), it may be configured to have a processor, for example. For example, a microprocessor such as a DSP (Digital Signal Processor) or a GPU (Graphics Processing Unit) may be used. In addition, it may be configured to realize these microprocessors using a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) or FPAA (Field Programmable Analog Array). By interpreting and executing instructions from various programs through the processor, various data processing and program control are performed. Programs that can be executed by the processor may be stored in a memory area of ​​the processor or may be stored in a separately provided storage device.

[0264] Additionally, in the display unit (6511) or scan line driving circuit (6513) of the touch panel (6510), the circuit unit (6501), signal line driving circuit (6502), sensor driving circuit (6503), or detection circuit (6504) of the IC (6520), or the CPU (6540) provided externally, an oxide semiconductor may be used in the channel forming region and a transistor with an extremely low off-current may be used. Since the off-current of the transistor is extremely low, by using the transistor as a switch to maintain the charge (data) flowing into the capacitive element functioning as a memory element, the data retention period can be secured over a long period. For example, by using this characteristic in at least one of the registers and cache memory of the image processing circuit (6506), the image processing circuit (6506) is operated only when necessary, and in other cases, the information of the previous processing is saved to the memory element, thereby enabling normal off-computing and allowing for low power consumption of the touch panel module (6500) and the electronic device in which it is installed.

[0265] Additionally, although the circuit unit (6501) is configured here to have a timing controller (6505) and an image processing circuit (6506), the image processing circuit (6506) itself, or a circuit having the function of a part of the image processing circuit (6506), may be provided externally. Alternatively, the CPU (6540) may perform the function of the image processing circuit (6506) or a part of its function. For example, the circuit unit (6501) may be configured to have a signal line driving circuit (6502), a sensor driving circuit (6503), a detection circuit (6504), and a timing controller (6505).

[0266] Additionally, although an example has been described here in which the IC (6520) includes a circuit unit (6501), the circuit unit (6501) may be configured not to be included in the IC (6520). In this case, the IC (6520) may be configured to have a signal line driving circuit (6502), a sensor driving circuit (6503), and a detection circuit (6504). For example, when mounting multiple ICs on a touch panel module (6500), the circuit unit (6501) may be provided outside the touch panel module (6500), and multiple ICs (6520) that do not have the circuit unit (6501) may be arranged, or an IC (6520) having only the signal line driving circuit (6502) may be arranged in combination.

[0267] In this way, by configuring the function of driving the display unit (6511) of the touch panel (6510) and the function of driving the input unit (6512) to be provided in a single IC, the number of ICs mounted on the touch panel module (6500) can be reduced, thereby reducing costs.

[0268] (A), (B) and (C) of FIG. 16 are schematic diagrams of a touch panel module (6500) with an IC (6520) mounted thereon.

[0269] In FIG. 16 (A), the touch panel module (6500) has a substrate (6531), a counter substrate (6532), a plurality of FPCs (6533), ICs (6520), ICs (6530), etc. Additionally, between the substrate (6531) and the counter substrate (6532), there is a display unit (6511), an input unit (6512), and a scan line driving circuit (6513). The ICs (6520) and ICs (6530) are mounted on the substrate (6531) by a mounting method such as the COG method.

[0270] IC (6530) is an IC having only the signal line driving circuit (6502) or the signal line driving circuit (6502) and the circuit unit (6501) in the IC (6520) described above. Signals are supplied from the outside to IC (6520) and IC (6530) via FPC (6533). Additionally, signals can be output to the outside from at least one of IC (6520) and IC (6530) via FPC (6533).

[0271] An example of a configuration is shown in FIG. 16 (A) in which two scan line driving circuits (6513) are provided to accommodate a display unit (6511). Additionally, a configuration having an IC (6530) in addition to an IC (6520) is shown. Such a configuration can be preferably used for extremely high resolution as the display unit (6511).

[0272] In FIG. 16 (B), an example is shown in which one IC (6520) and one FPC (6533) are mounted. In this way, it is desirable to reduce the number of components by consolidating functions into one IC (6520). Additionally, FIG. 16 (B) shows an example in which a scan line driving circuit (6513) is arranged along the side closer to the FPC (6533) among the two short sides of the display unit (6511).

[0273] (C) of FIG. 16 illustrates an example of a configuration having a PCB (Printed Circuit Board) (6534) on which an image processing circuit (6506), etc., is mounted. The IC (6520) and IC (6530) on the substrate (6531) and the PCB (6534) are electrically connected by an FPC (6533). Here, a configuration in which the IC (6520) does not have the image processing circuit (6506) described above can be applied.

[0274] Additionally, in each drawing of FIG. 16, the IC (6520) and IC (6530) may be mounted on an FPC (6533) rather than on a substrate (6531). For example, the IC (6520) and IC (6530) may be mounted on the FPC (6533) by a mounting method such as the COF method or the TAB method.

[0275] As shown in (A) and (B) of FIG. 16, a configuration in which an FPC (6533) and an IC (6520) (and IC (6530)), etc. are placed on the short side of the display unit (6511) can be made narrower, so it can be preferably used in electronic devices such as smartphones, mobile phones, or tablet terminals. In addition, a configuration using a PCB (6534) as shown in (C) of FIG. 16 can be preferably used in devices such as television devices, monitor devices, tablet terminals, or laptop-type personal computers.

[0276] This embodiment can be appropriately combined with other embodiments.

[0277] (Embodiment 2)

[0278] In this embodiment, a method for manufacturing an input / output device according to one form of the present invention is described using FIGS. 17 to 21. In this embodiment, a method for manufacturing a transistor is mainly described. In addition, regarding the materials for each layer, reference may be made to the description of Embodiment 1.

[0279] First, a gate electrode (221) is formed on a substrate (211). Then, an insulating film (213) including an insulating film (106) and an insulating film (107) is formed on the substrate (211) and the gate electrode (221) (see (A) of FIG. 17).

[0280] In this embodiment, a glass substrate is used as the substrate (211), a tungsten film is used as the gate electrode (221), a silicon nitride film capable of emitting hydrogen is used as the insulating film (106), and a silicon oxide film capable of emitting oxygen is used as the insulating film (107).

[0281] The insulating film (106) functions as a blocking film that inhibits the permeation of oxygen. For example, when an excess of oxygen is supplied to at least one of the insulating film (107), insulating film (215), insulating film (217), and oxide semiconductor film (223), the insulating film (106) can inhibit the permeation of oxygen.

[0282] Additionally, the insulating film (107) in contact with the oxide semiconductor film (223) that functions as the channel region of the transistor is preferably an oxide insulating film, and it is more preferable to have a region (oxygen excess region) containing excess oxygen compared to the stoichiometric composition. In other words, the insulating film (107) is an insulating film capable of releasing oxygen. Furthermore, to provide an oxygen excess region in the insulating film (107), the insulating film (107) may be formed, for example, under an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film (107) after deposition to form an oxygen excess region. As a method for introducing oxygen, ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, etc., may be used.

[0283] In addition, when hafnium oxide is used on one or both of the insulating film (106) and insulating film (107), the following effects are exhibited. Hafnium oxide has a higher dielectric constant compared to silicon oxide or silicon nitride. Therefore, compared to the case where silicon oxide is used, the film thickness of one or both of the insulating film (106) and insulating film (107) can be increased, thereby reducing the leakage current caused by tunnel current. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystalline structure has a higher dielectric constant compared to hafnium oxide having an amorphous structure. Therefore, in order to make a transistor with a small off-current, it is desirable to use hafnium oxide having a crystalline structure. Examples of crystalline structures include monoclinic and cubic systems. However, one embodiment of the present invention is not limited to these.

[0284] In addition, in this embodiment, a silicon nitride film is formed as an insulating film (106), and a silicon oxide film is formed as an insulating film (107). Compared to a silicon oxide film, the silicon nitride film has a higher dielectric constant, and the film thickness required to obtain a capacitance of the same degree as that of a silicon oxide film is large. By including a silicon nitride film as an insulating film (213) that functions as a gate insulating film of a transistor, the insulating film can be physically made thicker. Accordingly, the decrease in the dielectric breakdown voltage of the transistor can be suppressed, and the dielectric breakdown voltage can be improved, thereby suppressing electrostatic breakdown of the transistor.

[0285] The gate electrode (221) can be formed by forming a conductive film on a substrate (211), patterning the conductive film so that a desired area remains, and then etching the unnecessary area.

[0286] Next, an oxide semiconductor film (223) is formed at a position overlapping with the gate electrode (221) on the insulating film (213) (see (B) of FIG. 17).

[0287] In this embodiment, an In-Ga-Zn oxide film (In:Ga:Zn=1:1:1.2)[atomic ratio] metal oxide target is used as the oxide semiconductor film (223).

[0288] Additionally, the oxide semiconductor film (223) can be formed by forming an oxide semiconductor film on an insulating film (213), then patterning the oxide semiconductor film so that a desired area remains, and then etching the unnecessary area.

[0289] After forming the oxide semiconductor film (223), it is preferable to perform a heat treatment. The heat treatment may be performed at a temperature of 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, more preferably 350°C or higher and 450°C or lower, in an inert gas atmosphere, an atmosphere containing 10 ppm or more of an oxidizing gas, or a reduced pressure atmosphere. Additionally, the atmosphere of the heat treatment may be performed in an atmosphere containing 10 ppm or more of an oxidizing gas to preserve oxygen that has escaped from the oxide semiconductor film (223) after the heat treatment is performed in an inert gas atmosphere. Through this heat treatment, impurities such as hydrogen or water can be removed from at least one of the insulating film (106), the insulating film (107), and the oxide semiconductor film (223). Additionally, the heat treatment may be performed before processing the oxide semiconductor film (223) into an island shape.

[0290] In addition, in order to provide stable electrical characteristics to a transistor having an oxide semiconductor film (223) as a channel region, it is effective to reduce impurities in the oxide semiconductor film (223) and make the oxide semiconductor film (223) intrinsic or substantially intrinsic.

[0291] Next, a conductive film is formed on the insulating film (213) and the oxide semiconductor film (223), patterned so that a desired area of ​​the conductive film remains, and then an unnecessary area is etched to form a source electrode (225a) and a drain electrode (225b) on the insulating film (213) and the oxide semiconductor film (223) (see (C) in FIG. 17).

[0292] In this embodiment, a three-layer laminated structure of a tungsten film, an aluminum film, and a titanium film is used as the source electrode (225a) and the drain electrode (225b).

[0293] Additionally, the surface of the oxide semiconductor film (223) may be cleaned after forming the source electrode (225a) and the drain electrode (225b). As a cleaning method, for example, cleaning using a chemical solution such as phosphoric acid may be used. By cleaning using a chemical solution such as phosphoric acid, impurities attached to the surface of the oxide semiconductor film (223) (for example, elements contained in the source electrode (225a) and the drain electrode (225b), etc.) can be removed. Furthermore, it is not necessary to perform the above cleaning, and in some cases, cleaning may not be performed.

[0294] Additionally, in either or both of the process of forming the source electrode (225a) and the drain electrode (225b) and the cleaning process, the area exposed from the source electrode (225a) and the drain electrode (225b) of the oxide semiconductor film (223) may be thinned.

[0295] Next, an insulating film (215) comprising an insulating film (114) and an insulating film (116) is formed on an insulating film (213), an oxide semiconductor film (223), a source electrode (225a), and a drain electrode (225b). Then, an opening (141) is formed by patterning so that a desired area of ​​the insulating film (215) remains, and then etching an unnecessary area (see (D) in FIG. 17).

[0296] Additionally, it is preferable to form an insulating film (116) continuously without exposing it to the atmosphere after forming the insulating film (114). By forming the insulating film (116) continuously without exposing it to the atmosphere after forming the insulating film (114) and adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas, the concentration of impurities originating from atmospheric components at the interface between the insulating film (114) and the insulating film (116) can be reduced, and at the same time, oxygen contained in the insulating film (114) and the insulating film (116) can be moved to the oxide semiconductor film (223), thereby reducing the amount of oxygen deficiency in the oxide semiconductor film (223).

[0297] In addition, in the process of forming the insulating film (116), the insulating film (114) serves as a protective film for the oxide semiconductor film (223). Therefore, the insulating film (116) can be formed using high-frequency power with high power density while reducing damage to the oxide semiconductor film (223).

[0298] In this embodiment, an oxidized silicon film capable of releasing oxygen is used as an insulating film (114) and an insulating film (116).

[0299] The insulating film (114) in contact with the oxide semiconductor film (223) that functions as the channel region of the transistor is preferably an oxide insulating film, and an insulating film capable of releasing oxygen is used. In other words, an insulating film capable of releasing oxygen is an insulating film having a region (oxygen excess region) that contains oxygen in excess of the stoichiometric composition. Furthermore, to provide an oxygen excess region in the insulating film (114), the insulating film (114) may be formed, for example, under an oxygen atmosphere. Alternatively, oxygen may be introduced into the insulating film (114) after deposition to form an oxygen excess region. As a method for introducing oxygen, ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, etc., may be used.

[0300] By using an insulating film capable of releasing oxygen as the insulating film (114), oxygen is transferred to the oxide semiconductor film (223) that functions as the channel region of the transistor, thereby making it possible to reduce the amount of oxygen deficiency in the oxide semiconductor film (223). For example, the amount of oxygen molecules released in the range of the film surface temperature being 100°C or higher and 700°C or 100°C or higher and 500°C or lower, as measured by thermal desorption gas analysis (hereinafter referred to as TDS (Thermal Desorption Spectroscopy) analysis), is 1.0 × 10⁻¹⁰. 18 molecule / cm 3 By using an insulating film of the above, the amount of oxygen deficiency in the oxide semiconductor film (223) can be reduced.

[0301] In addition, it is desirable that the insulating film (114) has a small amount of defects, and typically, the spin density of the signal appearing at g=2.001 originating from the silicon dangling bond by ESR measurement is 3×10 17 spins / cm 3 It is preferable that it be less than or equal to this. This is because if the defect density contained in the insulating film (114) is high, oxygen binds to the defects, and the amount of oxygen permeable to the insulating film (114) decreases. In addition, it is preferable that the amount of defects at the interface between the insulating film (114) and the oxide semiconductor film (223) is small, and typically, the spin density of the signal in which the g value originating from the defects of the oxide semiconductor film (223) appears as 1.89 or higher and 1.96 or lower by ESR measurement is 1×10 17 spins / cm 3 Below, it is also desirable that it be below the detection lower limit.

[0302] Additionally, in the insulating film (114), there are cases where all the oxygen that has entered the insulating film (114) from the outside moves to the outside of the insulating film (114). Alternatively, there are cases where some of the oxygen that has entered the insulating film (114) from the outside remains in the insulating film (114). Also, as oxygen enters the insulating film (114) from the outside, oxygen contained in the insulating film (114) moves to the outside of the insulating film (114), thereby causing oxygen movement in the insulating film (114). If an oxide insulating film capable of permeating oxygen is formed as the insulating film (114), oxygen that escapes from the insulating film (116) provided on the insulating film (114) can be moved to the oxide semiconductor film (223) via the insulating film (114).

[0303] Additionally, the insulating film (114) can be formed using an oxide insulating film with a low level density attributable to nitrogen oxide. Additionally, the level density attributable to nitrogen oxide is the energy (E at the top of the valence band of the oxide semiconductor film). v_os ) and the energy at the bottom of the conduction band of the oxide semiconductor film (E c_os There are cases where it can be formed between ). As the oxide insulating film, a silicon nitride film with low nitrogen oxide emission or an aluminum nitride film with low nitrogen oxide emission can be used.

[0304] Furthermore, silicon oxynitride films with low nitrogen oxide emissions are films in which the emission of ammonia is higher than the emission of nitrogen oxides in TDS analysis, and typically, the emission amount of ammonia molecules is 1×10 18 molecule / cm 3 At least 5×10 19 molecule / cm 3 The amount of ammonia released is as follows. In addition, the amount of ammonia released is the amount released by heat treatment at a surface temperature of the membrane of 50°C or higher and 650°C or lower, preferably 50°C or higher and 550°C or lower.

[0305] Nitrogen oxides (NO₂) x, where x is greater than 0 and less than or equal to 2, preferably between 1 and 2), typically NO2 or NO forms a level in the insulating film (114), etc. The level is located within the energy gap of the oxide semiconductor film (223). Thus, when nitrogen oxide diffuses to the interface between the insulating film (114) and the oxide semiconductor film (223), the level may trap electrons on the insulating film (114) side. As a result, since the trapped electrons remain near the interface between the insulating film (114) and the oxide semiconductor film (223), the threshold voltage of the transistor shifts in the positive direction.

[0306] Additionally, nitrogen oxide reacts with ammonia and oxygen during heat treatment. Since the nitrogen oxide contained in the insulating film (114) reacts with the ammonia contained in the insulating film (116) during heat treatment, the nitrogen oxide contained in the insulating film (114) is reduced. Therefore, at the interface between the insulating film (114) and the oxide semiconductor film (223), it is difficult for electrons to be trapped.

[0307] By using the oxide insulating film as the insulating film (114), the shift of the threshold voltage of the transistor can be reduced and the variation in the electrical characteristics of the transistor can be reduced.

[0308] In addition, by heat treatment of the transistor fabrication process, typically at less than 400°C or less than 375°C (preferably at 340°C or more and 360°C or less), the insulating film (114) is measured at an ESR of 100K or less, and in the spectrum obtained, a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less are observed. In addition, the split width of the first signal and the second signal, and the split width of the second signal and the third signal are about 5 mT in the ESR measurement of the X band. In addition, the spin densities of the first signal with a g value of 2.037 or higher and 2.039 or lower, the second signal with a g value of 2.001 or higher and 2.003 or lower, and the third signal with a g value of 1.964 or higher and 1.966 or lower are summed up to 1×10 18 spins / cm 3 It is less than, typically 1×10 17 spins / cm 3 1×10 18 spins / cm 3 It is less than.

[0309] In addition, in the ESR spectrum below 100K, the first signal with a g value of 2.037 or higher and 2.039 or lower, the second signal with a g value of 2.001 or higher and 2.003 or lower, and the third signal with a g value of 1.964 or higher and 1.966 or lower are nitrogen oxides (NO x , x corresponds to a signal attributable to a value greater than 0 and less than or equal to 2, preferably greater than or equal to 1 and less than or equal to 2. Representative examples of nitrogen oxides include nitric oxide and nitrogen dioxide. That is, the smaller the total spin density of the first signal with a g value of 2.037 or more and 2.039 or less, the second signal with a g value of 2.001 or more and 2.003 or less, and the third signal with a g value of 1.964 or more and 1.966 or less, the lower the content of nitrogen oxide contained in the oxide insulating film.

[0310] In addition, the above oxide insulating film has a nitrogen concentration of 6×10 as measured by SIMS. 20 atoms / cm 3 It is as follows.

[0311] A dense and high-hardness film can be formed by forming the oxide insulating film using a PECVD method with silane and nitrous oxide, where the substrate temperature is 220°C or higher and 350°C or lower.

[0312] The insulating film (116) formed to be in contact with the insulating film (114) is formed using an oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition. In the oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition, some of the oxygen is released upon heating. In the oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition, the amount of oxygen released, converted into oxygen atoms by TDS analysis, is 1.0 × 10⁻⁶ 19 atoms / cm 3 Ideally, 3.0×10 20 atoms / cm 3 The above is an oxide insulating film. In addition, the surface temperature of the film in the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower.

[0313] In addition, it is desirable that the insulating film (116) has a low defect amount, and typically, the spin density of the signal appearing at g=2.001 originating from silicon dangling bonds in ESR measurement is 1.5×10 18 spins / cm 3 Less than, also, 1×10 18 spins / cm 3 It is preferable that it be less than or equal to. Additionally, since the insulating film (116) is separated from the oxide semiconductor film (223) compared to the insulating film (114), it may have a higher defect density than the insulating film (114).

[0314] The thickness of the insulating film (114) can be 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less, preferably 10 nm or more and 30 nm or less. The thickness of the insulating film (116) can be 30 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less.

[0315] In addition, since insulating films of the same type of material can be used for insulating film (114) and insulating film (116), there may be cases where the interface between insulating film (114) and insulating film (116) cannot be clearly identified. Therefore, in this embodiment, the interface between insulating film (114) and insulating film (116) is indicated by a dashed line. Also, in this embodiment, a two-layer structure of insulating film (114) and insulating film (116) has been described, but it is not limited thereto, and for example, a single-layer structure of insulating film (114), a single-layer structure of insulating film (116), or a stacked structure of three or more layers may be used.

[0316] In addition, it is preferable to perform a heat treatment (hereinafter referred to as the first heat treatment) after forming the insulating film (114) and the insulating film (116). By the first heat treatment, the nitrogen oxide contained in the insulating film (114) and the insulating film (116) can be reduced. Alternatively, by the first heat treatment, some of the oxygen contained in the insulating film (114) and the insulating film (116) can be moved to the oxide semiconductor film (223), thereby reducing the amount of oxygen deficiency contained in the oxide semiconductor film (223).

[0317] The temperature of the first heat treatment is typically less than 400°C, preferably less than 375°C, and more preferably between 150°C and 350°C. The first heat treatment may be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air (air with a water content of 20 ppm or less, preferably 1 ppm or less, more preferably 10 ppb or less), or a noble gas (argon, helium, etc.). In addition, it is preferable that the nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. For the heat treatment, an electric furnace, RTA (Rapid Thermal Anneal), etc. may be used.

[0318] As for the opening (141), it is formed so that the drain electrode (225b) is exposed. As a method for forming the opening (141), for example, a dry etching method may be used. However, the method for forming the opening (141) is not limited to this, and a wet etching method or a method combining a dry etching method and a wet etching method may also be used. In addition, the film thickness of the drain electrode (225b) may be reduced by the etching process for forming the opening (141).

[0319] Next, an oxide semiconductor film is formed on the insulating film (116) to cover the opening (141), which later becomes an oxide conductive film (227) (see (A) and (B) of FIG. 18).

[0320] Additionally, FIG. 18 (A) is a schematic cross-sectional view of the inside of a film deposition apparatus when forming an oxide semiconductor film on an insulating film (116). In FIG. 18 (A), a sputtering apparatus is used as the film deposition apparatus, and a target (193) installed inside the sputtering apparatus and a plasma (194) formed below the target (193) are schematically illustrated.

[0321] First, when forming an oxide semiconductor film, plasma is discharged in an atmosphere containing a third oxygen gas. At that time, oxygen is added to the insulating film (116) which serves as the surface to be formed for the oxide semiconductor film. Additionally, when forming the oxide semiconductor film, an inert gas (e.g., helium gas, argon gas, xenon gas, etc.) may be mixed in addition to the third oxygen gas. For example, it is preferable to use argon gas and the third oxygen gas, and to increase the flow rate of the third oxygen gas more than the flow rate of the argon gas. By increasing the flow rate of the third oxygen gas, oxygen can be added to the insulating film (116) in a desirable manner. As an example, as a condition for forming the oxide semiconductor film, the proportion of the third oxygen gas in the total film-forming gas can be set to 50% or more and 100% or less, preferably 80% or more and 100% or less.

[0322] In addition, in Fig. 18 (A), oxygen or excess oxygen added to the insulating film (116) is schematically shown by a dashed arrow.

[0323] In addition, the substrate temperature when forming the oxide semiconductor film is above room temperature and below 340°C, preferably above room temperature and below 300°C, more preferably above 100°C and below 250°C, and even more preferably above 100°C and below 200°C. By forming the oxide semiconductor film by heating, the crystallinity of the oxide semiconductor film can be increased. On the other hand, when a large glass substrate (e.g., 6th generation to 10th generation) is used as the substrate (211), if the substrate temperature when forming the oxide semiconductor film is above 150°C and below 340°C, the substrate (211) may deform (be distorted or bent). Therefore, when using a large glass substrate, the deformation of the glass substrate can be suppressed by setting the substrate temperature when forming the oxide semiconductor film to above 100°C and below 150°C.

[0324] In this embodiment, an oxide semiconductor film is formed by sputtering using an In-Ga-Zn metal oxide target (In:Ga:Zn=1:3:6 [atomic ratio]).

[0325] Next, an island-shaped oxide semiconductor film (227a) is formed by processing the oxide semiconductor film into a desired shape (see (C) in FIG. 18).

[0326] The oxide semiconductor film (227a) can be formed by forming an oxide semiconductor film on an insulating film (116), then patterning so that a desired area of ​​the oxide semiconductor film remains, and then etching an unnecessary area.

[0327] Next, an insulating film (217) is formed on the insulating film (116) and the oxide semiconductor film (227a) (see (A) in FIG. 19).

[0328] The insulating film (217) has the function of blocking oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film (217), it is possible to prevent the diffusion of oxygen from the oxide semiconductor film (223) to the outside, the diffusion of oxygen contained in the insulating film (215) to the outside, and the entry of hydrogen, water, alkali metals, alkaline earth metals, etc. into the oxide semiconductor film (223) from the outside.

[0329] It is preferable that the insulating film (217) has either or both of hydrogen and nitrogen. For example, it is preferable to use a silicon nitride film as the insulating film (217). Additionally, the insulating film (217) can be formed using, for example, a sputtering method or a PECVD method. For example, when the insulating film (217) is formed by the PECVD method, the substrate temperature is less than 400°C, preferably less than 375°C, and more preferably between 180°C and 350°C. It is preferable to form a dense film by setting the substrate temperature when forming the insulating film (217) to the above-described range. Furthermore, by setting the substrate temperature when forming the insulating film (217) to the above-described range, oxygen or excess oxygen within the insulating film (114) and the insulating film (116) can be transferred to the oxide semiconductor film (223).

[0330] In addition, instead of a nitride insulating film having a blocking effect of oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc., an oxide insulating film having a blocking effect of oxygen, hydrogen, water, etc. may be provided. Examples of oxide insulating films having a blocking effect of oxygen, hydrogen, water, etc. include aluminum oxide, aluminum nitride oxide, gallium oxide, gallium nitride oxide, yttrium oxide, yttrium nitride oxide, hafnium oxide, hafnium nitride oxide, etc.

[0331] In addition, after forming the insulating film (217), a heat treatment such as the first heat treatment described above (hereinafter referred to as the second heat treatment) may be performed. In this way, when forming an oxide semiconductor film that becomes an oxide conductive film (227), after adding oxygen to the insulating film (116), a heat treatment is performed at a temperature of less than 400°C, preferably less than 375°C, and more preferably between 180°C and 350°C, thereby moving oxygen or excess oxygen within the insulating film (116) into the oxide semiconductor film (223), thereby preserving the oxygen deficiency within the oxide semiconductor film (223).

[0332] Here, oxygen moving into the oxide semiconductor film (223) is explained using FIG. 20. FIG. 20 is a model diagram illustrating oxygen moving into the oxide semiconductor film (223) due to a substrate temperature (typically less than 375°C) when forming the insulating film (217) or a second heat treatment (typically less than 375°C) after forming the insulating film (217). In FIG. 20, oxygen (oxygen radical, oxygen atom, or oxygen molecule) moving into the oxide semiconductor film (223) is illustrated by dashed arrows. FIG. 20 is also a cross-sectional view of the vicinity of the transistor after forming the insulating film (217).

[0333] The oxide semiconductor film (223) illustrated in FIG. 20 has its oxygen deficiency preserved by oxygen moving from the film (here, insulating film (107) and insulating film (114)) in contact with the oxide semiconductor film (223). In particular, in an input / output device according to one embodiment of the present invention, when oxygen gas is used during the sputtering deposition of the oxide semiconductor film (223) and oxygen is added to the insulating film (107), the insulating film (107) has an excess oxygen region. Additionally, when oxygen gas is used during the sputtering deposition of the oxide semiconductor film (227) and oxygen is added to the insulating film (116), the insulating film (116) has an excess oxygen region. Therefore, the oxide semiconductor film (223) located between the insulating films having the excess oxygen region has its oxygen deficiency preserved in a desirable way.

[0334] Additionally, an insulating film (106) is provided below the insulating film (107), and an insulating film (217) is provided above the insulating film (114) and the insulating film (116). By forming the insulating film (106) and the insulating film (217) with a material having low oxygen permeability, such as silicon nitride, the oxygen contained within the insulating film (107), the insulating film (114), and the insulating film (116) can be trapped on the side of the oxide semiconductor film (223), thereby allowing oxygen to be preferably moved to the oxide semiconductor film (223).

[0335] In addition, it is desirable that the insulating film (217) has the function of lowering the resistivity of the oxide conductive film (227).

[0336] By forming an insulating film (217) having either or both of hydrogen and nitrogen, an oxide semiconductor film (227a) in contact with the insulating film (217) has either or both of hydrogen and nitrogen added to it. Accordingly, the oxide semiconductor film (227a) has a higher carrier density and can function as an oxide conductive film.

[0337] Additionally, from (A) of FIG. 19, the oxide semiconductor film (227a) is shown as an oxide conductive film (227) as the resistivity decreases.

[0338] The resistivity of the oxide conductive film (227) is at least lower than that of the oxide semiconductor film (223), and preferably 1×10 -3 Ωcm or more 1×10 4 Less than Ωcm, more preferably, 1×10⁻⁶ -3 Ωcm or more 1×10 -1 It is good if it is less than Ωcm.

[0339] Next, an insulating film (219) is formed on the insulating film (217), patterned so that the desired areas of the insulating film (217) and the insulating film (219) remain, and then an opening (142) is formed by etching the unnecessary areas (see (B) of FIG. 19).

[0340] In this embodiment, acrylic resin is used as the insulating film (219).

[0341] As for the opening (142), it is formed so that the drain electrode (225b) is exposed. For example, a dry etching method may be used as a method for forming the opening (142). However, the method for forming the opening (142) is not limited to this, and a wet etching method or a method combining a dry etching method and a wet etching method may also be used. In addition, the film thickness of the drain electrode (225b) may be reduced by the etching process for forming the opening (142).

[0342] In addition, in the process of forming the opening (142) without performing the process of forming the opening (141) described above, the opening may be formed continuously in the insulating film (114), insulating film (116), insulating film (217), and insulating film (219). By performing such a process, the manufacturing process of the input / output device according to one embodiment of the present invention can be reduced, thereby suppressing manufacturing costs.

[0343] Next, a conductive film (251) is formed by forming a conductive film on an insulating film (219) to cover an opening (142), patterning the conductive film so that a desired area remains, and then etching the unnecessary area. Additionally, an insulating film (253) is formed on the conductive film (251). Next, a conductive film (255) is formed by forming a conductive film on an insulating film (253), patterning the conductive film so that a desired area remains, and then etching the unnecessary area. Then, a conductive film (252) is formed by forming a conductive film on an insulating film (253) and a conductive film (255), patterning the conductive film so that a desired area remains, and then etching the unnecessary area (see (C) in FIG. 19).

[0344] In this embodiment, an ITO film is used as the conductive film (251) and conductive film (252), a silicon nitride film is used as the insulating film (253), and an alloy of silver, palladium, and copper (Ag-Pd-Cu, also called APC) is used as the conductive film (255).

[0345] The order of formation of the conductive film (252) and the conductive film (255) is irrelevant, but it is preferable to form the conductive film (255) before the conductive film (252). This can prevent damage to the conductive film (252) caused by etching of the conductive film (255).

[0346] In addition, the conductive film (251) may be formed using an oxide semiconductor film in the same way as the oxide conductive film (227). At this time, the insulating film (253) formed on the conductive film (251) may be made of a material that can be used for the insulating film (217). In addition, the conductive film (252) may be formed by forming an oxide semiconductor film and performing a treatment to reduce the resistivity of the oxide semiconductor film.

[0347] With the above process, a pair of electrodes of the transistor (203b) and liquid crystal element shown in FIG. 4 can be fabricated.

[0348] Additionally, although (C) of FIG. 19 is illustrated as having an insulating film (219), it may be configured without an insulating film (219) (see FIG. 21).

[0349] This embodiment can be appropriately combined with other embodiments.

[0350] (Embodiment 3)

[0351] In this embodiment, a transistor that can be used in an input / output device according to one form of the present invention is described using FIGS. 22 to 25. In addition, regarding the material of each layer, reference may be made to the description of Embodiment 1.

[0352] <Transistor Configuration Example 1>

[0353] FIG. 22 (A) is a top view of a transistor (270), FIG. 22 (B) is a cross-sectional view taken along the dotted line A1-A2 shown in FIG. 22 (A), and FIG. 22 (C) is a cross-sectional view taken along the dotted line B1-B2. Additionally, the dotted line A1-A2 direction is sometimes referred to as the channel length direction, and the dotted line B1-B2 direction as the channel width direction.

[0354] A transistor (270) has a conductive film (504) functioning as a first gate electrode on a substrate (502), an insulating film (506) on the substrate (502) and the conductive film (504), an insulating film (507) on the insulating film (506), an oxide semiconductor film (508) on the insulating film (507), a conductive film (512a) functioning as a source electrode electrically connected to the oxide semiconductor film (508), a conductive film (512b) functioning as a drain electrode electrically connected to the oxide semiconductor film (508), an insulating film (514) and an insulating film (516) on the oxide semiconductor film (508), the conductive film (512a), and the conductive film (512b), and an oxide conductive film (511b) on the insulating film (516). Additionally, an insulating film (518) is provided on the oxide conductive film (511b).

[0355] In the transistor (270), the insulating film (514) and the insulating film (516) function as the second gate insulating film of the transistor (270). Additionally, the oxide semiconductor film (511a) is connected to the conductive film (512b) via an opening (552c) provided in the insulating film (514) and the insulating film (516). The oxide semiconductor film (511a) functions, for example, as a pixel electrode of a display element. Additionally, in the transistor (270), the oxide conductive film (511b) functions as the second gate electrode (also called the back gate electrode).

[0356] Additionally, as shown in (C) of FIG. 22, the oxide conductive film (511b) is connected to the conductive film (504) which functions as a first gate electrode in the openings (552a) and (552b) provided in the insulating film (506), insulating film (507), insulating film (514), and insulating film (516). Thus, the same potential is supplied to the conductive film (504) and the oxide conductive film (511b).

[0357] Additionally, in this embodiment, an opening (552a) and an opening (552b) are provided, and a configuration connecting the oxide conductive film (511b) and the conductive film (504) is exemplified, but is not limited thereto. For example, only one of the openings (552a) and (552b) may be formed and the oxide conductive film (511b) and the conductive film (504) may be connected, or the openings (552a) and (552b) may not be provided and the oxide conductive film (511b) and the conductive film (504) may not be connected. Furthermore, in the case of a configuration in which the oxide conductive film (511b) and the conductive film (504) are not connected, different potentials may be supplied to the oxide conductive film (511b) and the conductive film (504), respectively.

[0358] Additionally, as shown in (B) of FIG. 22, the oxide semiconductor film (508) is positioned to face each of the conductive film (504) functioning as a first gate electrode and the oxide conductive film (511b) functioning as a second gate electrode, and is fitted into the two conductive films functioning as gate electrodes. The length in the channel length direction and the length in the channel width direction of the oxide conductive film (511b) functioning as a second gate electrode are each longer than the length in the channel length direction and the length in the channel width direction of the oxide semiconductor film (508), and the entire oxide semiconductor film (508) is covered by the oxide conductive film (511b) with the insulating film (514) and the insulating film (516) interposed therebetween. Additionally, since the oxide conductive film (511b) functioning as a second gate electrode and the conductive film (504) functioning as a first gate electrode are connected at the openings (552a) and (552b) provided in the insulating film (506), insulating film (507), insulating film (514), and insulating film (516), the side of the oxide semiconductor film (508) in the channel width direction faces the oxide conductive film (511b) functioning as a second gate electrode through the insulating film (514) and insulating film (516).

[0359] In other words, in the channel width direction of the transistor (270), the conductive film (504) functioning as a first gate electrode and the oxide conductive film (511b) functioning as a second gate electrode are connected at an opening provided in the insulating film (506) functioning as a gate insulating film, the insulating film (507) functioning as a second gate insulating film, and the insulating film (514) and insulating film (516) functioning as a second gate insulating film, and together they surround the oxide semiconductor film (508) by interposing the insulating film (506) and insulating film (507) functioning as a gate insulating film, and the insulating film (514) and insulating film (516) functioning as a second gate insulating film.

[0360] By having such a configuration, the oxide semiconductor film (508) included in the transistor (270) can be electrically surrounded by the electric field of the conductive film (504) functioning as the first gate electrode and the oxide conductive film (511b) functioning as the second gate electrode. A device structure of a transistor that electrically surrounds the oxide semiconductor film, in which a channel region is formed by the electric field of the first gate electrode and the second gate electrode, as in the transistor (270), can be called a surrounded channel (s-channel) structure.

[0361] Since the transistor (270) has an s-channel structure, the electric field for inducing a channel can be effectively applied to the oxide semiconductor film (508) by the conductive film (504) which functions as the first gate electrode, thereby improving the current driving capability of the transistor (270) and enabling high on-current characteristics to be obtained. In addition, since it is possible to increase the on-current, it is possible to miniaturize the transistor (270). Furthermore, since the transistor (270) has a structure surrounded by the conductive film (504) which functions as the first gate electrode and the oxide conductive film (511b) which functions as the second gate electrode, the mechanical strength of the transistor (270) can be increased.

[0362] <Transistor Configuration Example 2>

[0363] Figures 23 (A) and (B) are cross-sectional views of variations of the transistor (270) shown in Figures 22 (B) and (C). Additionally, Figures 23 (C) and (D) are cross-sectional views of variations of the transistor (270) shown in Figures 22 (B) and (C).

[0364] The transistor (270A) shown in (A) and (B) of FIG. 23 has an oxide semiconductor film (508) having a three-layer stacked structure as shown in (B) and (C) of FIG. 22. More specifically, the oxide semiconductor film (508) having the transistor (270A) has an oxide semiconductor film (508a), an oxide semiconductor film (508b), and an oxide semiconductor film (508c).

[0365] The transistor (270B) shown in (C) and (D) of FIG. 23 has an oxide semiconductor film (508) of the transistor (270) shown in (B) and (C) of FIG. 22 formed into a two-layer stacked structure. More specifically, the oxide semiconductor film (508) of the transistor (270B) has an oxide semiconductor film (508b) and an oxide semiconductor film (508c).

[0366] Here, the band structure of the oxide semiconductor film (508) and the insulating film in contact with the oxide semiconductor film (508) is explained using FIG. 24.

[0367] FIG. 24 (A) is an example of a band structure in the film thickness direction of a stacked structure having an insulating film (507), an oxide semiconductor film (508a), an oxide semiconductor film (508b), an oxide semiconductor film (508c), and an insulating film (514). FIG. 24 (B) is also an example of a band structure in the film thickness direction of a stacked structure having an insulating film (507), an oxide semiconductor film (508b), an oxide semiconductor film (508c), and an insulating film (514). Additionally, for ease of understanding, the band structure represents the energy level (Ec) at the bottom of the conduction band of the insulating film (507), the oxide semiconductor film (508a), the oxide semiconductor film (508b), the oxide semiconductor film (508c), and the insulating film (514).

[0368] Additionally, (A) of FIG. 24 is a band diagram of a configuration in which silicon oxide film is used as an insulating film (507) and an insulating film (514), an oxide semiconductor film formed using a metal oxide target in which the metal element is In:Ga:Zn=1:1:1.2[atomic ratio] as an oxide semiconductor film (508a), an oxide semiconductor film formed using a metal oxide target in which the metal element is In:Ga:Zn=4:2:4.1[atomic ratio] as an oxide semiconductor film (508b), and an oxide semiconductor film formed using a metal oxide target in which the metal element is In:Ga:Zn=1:1:1.2[atomic ratio] as an oxide semiconductor film (508c).

[0369] Additionally, (B) of FIG. 24 is a band diagram of a configuration in which silicon oxide films are used as insulating films (507) and insulating films (514), an oxide semiconductor film formed using a metal oxide target in which the metal elements are In:Ga:Zn=4:2:4.1 [atomic ratio] as the oxide semiconductor film (508b), and an oxide semiconductor film formed using a metal oxide target in which the metal elements are In:Ga:Zn=1:1:1.2 [atomic ratio] as the oxide semiconductor film (508c).

[0370] As illustrated in (A) and (B) of FIG. 24, the energy levels at the bottom of the conduction band in the oxide semiconductor film (508a), oxide semiconductor film (508b), and oxide semiconductor film (508c) change gradually. In other words, it can be said to change continuously or be a continuous junction. In order to have such a band structure, there are no impurities that form defect levels, such as trap centers or recombination centers, at the interface between the oxide semiconductor film (508a) and the oxide semiconductor film (508b), or at the interface between the oxide semiconductor film (508b) and the oxide semiconductor film (508c).

[0371] In order to form a continuous junction on the oxide semiconductor film (508a), oxide semiconductor film (508b), and oxide semiconductor film (508c), it is necessary to continuously stack each film without exposing it to the atmosphere by using a multi-chamber type film deposition device (sputtering device) equipped with a load lock chamber.

[0372] By making the configuration shown in (A) and (B) of FIG. 24, it can be seen that the oxide semiconductor film (508b) becomes a well, and in the transistor using the stacked structure, the channel region is formed in the oxide semiconductor film (508b).

[0373] Additionally, by providing oxide semiconductor films (508a) and oxide semiconductor films (508c), trap levels that may be formed in oxide semiconductor films (508b) can be moved away from oxide semiconductor films (508b).

[0374] Additionally, the trap level can be further from the vacuum level than the energy level (Ec) at the bottom of the conduction band of the oxide semiconductor film (508b) that functions as a channel region, making it easier for electrons to accumulate in the trap level. As electrons accumulate in the trap level, they become a negative fixed charge, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is desirable to configure the trap level so that it is closer to the vacuum level than the energy level (Ec) at the bottom of the conduction band of the oxide semiconductor film (508b). By doing so, it becomes difficult for electrons to accumulate in the trap level, making it possible to increase the on-current of the transistor and, at the same time, increase the field-effect mobility.

[0375] Additionally, the oxide semiconductor film (508a) and the oxide semiconductor film (508c) have energy levels at the bottom of the conduction band that are closer to the vacuum level than the oxide semiconductor film (508b), and typically, the difference between the energy level at the bottom of the conduction band of the oxide semiconductor film (508b) and the energy level at the bottom of the conduction band of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) is 0.15 eV or more, or 0.5 eV or more, or 2 eV or less, or 1 eV or less. That is, the difference between the electron affinity of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) and the electron affinity of the oxide semiconductor film (508b) is 0.15 eV or more, or 0.5 eV or more, or 2 eV or less, or 1 eV or less.

[0376] By having such a configuration, the oxide semiconductor film (508b) becomes the main current path. That is, the oxide semiconductor film (508b) functions as a channel region, and the oxide semiconductor film (508a) and the oxide semiconductor film (508c) function as oxide insulating films. Furthermore, since the oxide semiconductor film (508a) and the oxide semiconductor film (508c) are oxide semiconductor films composed of one or more metal elements constituting the oxide semiconductor film (508b) in which the channel region is formed, interfacial scattering is difficult to occur at the interface between the oxide semiconductor film (508a) and the oxide semiconductor film (508b), or at the interface between the oxide semiconductor film (508b) and the oxide semiconductor film (508c). Therefore, since the movement of carriers is not hindered at the interface, the field-effect mobility of the transistor is increased.

[0377] In addition, the oxide semiconductor film (508a) and the oxide semiconductor film (508c) are made of materials with sufficiently low conductivity to prevent them from functioning as part of the channel region. Thus, the oxide semiconductor film (508a) and the oxide semiconductor film (508c) may each be called an oxide insulating film due to their physical properties and / or functions. Furthermore, the oxide semiconductor film (508a) and the oxide semiconductor film (508c) are made of materials in which the electron affinity (the difference between the vacuum level and the energy level at the bottom of the conduction band) is smaller than that of the oxide semiconductor film (508b), and the energy level at the bottom of the conduction band has a difference (band offset) from the energy level at the bottom of the conduction band of the oxide semiconductor film (508b). In addition, to suppress the occurrence of a difference in threshold voltage depending on the magnitude of the drain voltage, it is desirable that the energy level at the bottom of the conduction band of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) be closer to the vacuum level than the energy level at the bottom of the conduction band of the oxide semiconductor film (508b). For example, it is desirable that the difference between the energy level at the bottom of the conduction band of the oxide semiconductor film (508b) and the energy level at the bottom of the conduction band of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) be 0.2 eV or more, preferably 0.5 eV or more.

[0378] Additionally, it is preferable that the oxide semiconductor film (508a) and the oxide semiconductor film (508c) do not contain a spinel-type crystal structure within the film. If the oxide semiconductor film (508a) and the oxide semiconductor film (508c) contain a spinel-type crystal structure within the film, constituent elements of the conductive film (512a) and the conductive film (512b) may diffuse into the oxide semiconductor film (508b) at the interface between the spinel-type crystal structure and other regions. Furthermore, if the oxide semiconductor film (508a) and the oxide semiconductor film (508c) are CAAC-OS, it is preferable that the blocking properties of constituent elements of the conductive film (512a) and the conductive film (512b), for example, copper elements, are increased.

[0379] The film thickness of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) is greater than the film thickness that can suppress the diffusion of constituent elements of the conductive film (512a) and the conductive film (512b) into the oxide semiconductor film (508b), and less than the film thickness that suppresses the supply of oxygen from the insulating film (514) to the oxide semiconductor film (508b). For example, if the film thickness of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) is 10 nm or more, the diffusion of constituent elements of the conductive film (512a) and the conductive film (512b) into the oxide semiconductor film (508b) can be suppressed. In addition, if the film thickness of the oxide semiconductor film (508a) and the oxide semiconductor film (508c) is 100 nm or less, oxygen can be effectively supplied from the insulating film (514) to the oxide semiconductor film (508b).

[0380] In addition, in this embodiment, although an oxide semiconductor film is used as the oxide semiconductor film (508a) and oxide semiconductor film (508c), the configuration is exemplified using a metal oxide target in which the metal elements are In:Ga:Zn = 1:1:1.2 [atomic ratio], but is not limited thereto. For example, as the oxide semiconductor film (508a) and oxide semiconductor film (508c), an oxide semiconductor film may be used that is formed using a metal oxide target in which the elements are In:Ga:Zn = 1:1:1 [atomic ratio], In:Ga:Zn = 1:3:2 [atomic ratio], In:Ga:Zn = 1:3:4 [atomic ratio], or In:Ga:Zn = 1:3:6 [atomic ratio].

[0381] Additionally, when a metal oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 is used as the oxide semiconductor film (508a) and oxide semiconductor film (508c), the oxide semiconductor film (508a) and oxide semiconductor film (508c) may have an atomic ratio of In:Ga:Zn = 1:β1 (0 < β1 ≤ 2):β2 (0 < β2 ≤ 3). Additionally, when a metal oxide target with an atomic ratio of In:Ga:Zn = 1:3:4 is used as the oxide semiconductor film (508a) and oxide semiconductor film (508c), the oxide semiconductor film (508a) and oxide semiconductor film (508c) may have an atomic ratio of In:Ga:Zn = 1:β3 (1 ≤ β3 ≤ 5):β4 (2 ≤ β4 ≤ 6). Additionally, when using a metal oxide target of In:Ga:Zn=1:3:6 [atomic ratio] as the oxide semiconductor film (508a) and oxide semiconductor film (508c), the oxide semiconductor film (508a) and oxide semiconductor film (508c) may have In:Ga:Zn=1:β5 (1≤β5≤5):β6 (4≤β6≤8).

[0382] In addition, regarding the oxide semiconductor film (508) of the transistor (270) and the oxide semiconductor film (508c) of the transistor (270A) and the transistor (270B), the oxide semiconductor film in the region not overlapping with the conductive film (512a) and the conductive film (512b) is thinned in the drawings; in other words, a part of the oxide semiconductor film has a concave shape. However, one embodiment of the present invention is not limited thereto, and the oxide semiconductor film in the region not overlapping with the conductive film (512a) and the conductive film (512b) does not have a concave shape. An example of this case is shown in FIG. 25 (A) and (B). FIG. 25 (A) and (B) are cross-sectional views showing an example of a transistor. Also, FIG. 25 (A) and (B) are structures in which the oxide semiconductor film (508) of the previously illustrated transistor (270B) does not have a concave shape.

[0383] Additionally, as shown in (C) and (D) of FIG. 25, the thickness of the oxide semiconductor film (508c) may be formed thinner than that of the oxide semiconductor film (508b) in advance, and an insulating film (519) may be formed on the oxide semiconductor film (508c) and the insulating film (507). In this case, an opening is formed in the insulating film (519) for contact between the oxide semiconductor film (508c), the conductive film (512a), and the conductive film (512b). The insulating film (519) can be formed by the same material and forming method as the insulating film (514).

[0384] In addition, the transistor according to the present embodiment can freely combine each of the above structures.

[0385] This embodiment can be appropriately combined with other embodiments.

[0386] (Embodiment 4)

[0387] In this embodiment, oxide semiconductors are explained using FIGS. 26 to 30.

[0388] Structure of Oxide Semiconductors

[0389] The structure of oxide semiconductors is described below.

[0390] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors include c-axis-aligned crystalline oxide semiconductors (CAAC-OS), polycrystalline oxide semiconductors, nanocrystalline oxide semiconductors (nc-OS), amorphous-like oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0391] In addition, from another perspective, oxide semiconductors are divided into amorphous oxide semiconductors and other crystalline oxide semiconductors. Crystalline oxide semiconductors include single-crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and nc-OS.

[0392] There are views that amorphous structures are generally isotropic and do not possess heterogeneous structures, are in a metastable state where atomic arrangements are not fixed, have flexibility in bond angles, and possess short-range order but not long-range order.

[0393] In other words, a stable oxide semiconductor cannot be called a completely amorphous oxide semiconductor. Furthermore, an oxide semiconductor that is not isotropic (e.g., having a periodic structure in a minute region) cannot be called a completely amorphous oxide semiconductor. On the other hand, an a-like OS is an unstable structure that is not isotropic but has cavities (also called voids). In terms of instability, an a-like OS is physically close to an amorphous oxide semiconductor.

[0394] <caac-os>

[0395] First, I will explain CAAC-OS.

[0396] CAAC-OS is a type of oxide semiconductor having multiple c-axis oriented crystal regions (also called pellets).

[0397] The case in which CAAC-OS is analyzed by X-ray diffraction (XRD) is described. For example, when structural analysis is performed by the out-of-plane method on a CAAC-OS having a crystal of InGaZnO4 classified as space group R-3m, a peak appears near the diffraction angle (2θ) of 31° as shown in (A) of FIG. 26. This peak is attributed to the (009) plane of the InGaZnO4 crystal, and it can be confirmed that in CAAC-OS, the crystal has c-axis orientation, and the c-axis is directed substantially perpendicularly to the plane forming the film of CAAC-OS (also called the surface to be formed) or the upper plane. In addition, in addition to the peak near 2θ of 31°, a peak may also appear near 2θ of 36°. The peak near 2θ of 36° is attributed to a crystal structure classified as space group Fd-3m. Therefore, it is desirable that CAAC-OS does not exhibit the above peak.

[0398] Meanwhile, when structural analysis is performed on CAAC-OS using the in-plane method, where X-rays are incident from a direction parallel to the surface to be formed, a peak appears near 2θ of 56°. This peak is attributed to the (110) plane of the InGaZnO4 crystal. Furthermore, even when 2θ is fixed near 56° and analysis (φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis), no clear peak appears, as shown in (B) of FIG. 26. On the other hand, when φ scan is performed on a single crystal InGaZnO4 with 2θ fixed near 56°, six peaks are observed that are attributed to a crystal plane equivalent to the (110) plane, as shown in (C) of FIG. 26. Therefore, from structural analysis using XRD, it can be confirmed that the orientation of CAAC-OS along the a-axis and b-axis is irregular.

[0399] Next, the CAAC-OS analyzed by electron diffraction will be described. For example, regarding a CAAC-OS having an InGaZnO4 crystal, if an electron beam with a probe diameter of 300 nm is incident parallel to the surface to be formed of the CAAC-OS, a diffraction pattern such as (D) in FIG. 26 (also called a limited-field electron diffraction pattern) may appear. This diffraction pattern includes spots attributed to the (009) plane of the InGaZnO4 crystal. Therefore, it can be seen through electron diffraction that the pellet contained in the CAAC-OS has c-axis orientation, and that the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface. Meanwhile, the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident from a direction perpendicular to the surface of the sample for the same sample is shown in FIG. 26 (E). Looking at FIG. 26 (E), a ring-shaped diffraction pattern is confirmed. Therefore, it can be seen that the a-axis and b-axis of the pellet included in the CAAC-OS do not have orientation even by electron diffraction using an electron beam with a probe diameter of 300 nm. In addition, the first ring in (E) of FIG. 26 is thought to be due to the (010) plane and (100) plane, etc. of the crystal of InGaZnO4. In addition, the second ring in (E) of FIG. 26 is thought to be due to the (110) plane, etc.

[0400] In addition, when observing the combined image of the bright-field image and diffraction pattern of CAAC-OS (also called the high-resolution TEM image) using a transmission electron microscope (TEM), multiple pellets can be identified. On the other hand, there are cases where the boundaries between pellets, i.e., grain boundaries (also called grain boundaries), cannot be clearly identified even in the high-resolution TEM image. Therefore, it can be said that the decrease in electron mobility caused by grain boundaries is unlikely to occur in CAAC-OS.

[0401] Figure 27 (A) is a high-resolution TEM image of a cross-section of the CAAC-OS observed from a direction substantially parallel to the sample plane. A spherical aberration corrector function was used for observing the high-resolution TEM image. A high-resolution TEM image using the spherical aberration corrector function is specifically called a Cs-corrected high-resolution TEM image. The Cs-corrected high-resolution TEM image can be observed, for example, by an atomic resolution analysis electron microscope (JEM-ARM200F, manufactured by Nippon Electronics Co., Ltd.).

[0402] From (A) of FIG. 27, a pellet, which is a region where metal atoms are arranged in a layered shape, can be identified. It can be seen that the size of a single pellet is 1 nm or larger, or 3 nm or larger. Therefore, the pellet may be called a nanocrystal (nc). Additionally, CAAC-OS may be referred to as an oxide semiconductor having CANC (C-Axis Aligned nanocrystals). The pellet reflects the irregularities of the surface to be formed or the top surface of CAAC-OS and becomes parallel to the surface to be formed or the top surface of CAAC-OS.

[0403] In addition, Figures 27 (B) and (C) show Cs-corrected high-resolution TEM images of the CAAC-OS plane observed from a direction substantially perpendicular to the sample plane. Figures 27 (D) and (E) are image-processed images of Figures 27 (B) and (C), respectively. The image processing method is described below. An FFT image is acquired by performing a Fast Fourier Transform (FFT) on Figure 27 (B). Next, on the acquired FFT image, 2.8 nm relative to the origin -1 at 5.0nm -1 Mask processing is performed so that the range between is left. Subsequently, an image processed is obtained by performing an Inverse Fast Fourier Transform (IFFT) on the masked FFT image. The image obtained in this way is called the FFT filtered image. The FFT filtered image is an image obtained by extracting periodic components from the Cs-corrected high-resolution TEM image and represents the grid array.

[0404] In Fig. 27 (D), the areas where the grid arrangement is disrupted are shown as dashed lines. The area enclosed by the dashed lines is a single pellet. Also, the parts indicated by the dashed lines are the connections between pellets. Since the dashed lines are hexagonal, it can be seen that the pellets are hexagonal. Furthermore, the shape of the pellets is not limited to a regular hexagon, and they are often non-regular hexagonal.

[0405] In Figure 27 (E), the area between a region with an aligned lattice arrangement and a region with a different aligned lattice arrangement is shown by a dotted line. Even near the dotted line, no clear grain boundaries can be observed. When the surrounding lattice points are connected to the center of the lattice point near the dotted line, distorted hexagons, pentagons, and / or heptagons are formed. In other words, it can be seen that the formation of grain boundaries is suppressed by deforming the lattice arrangement. This is thought to be because the CAAC-OS allows for deformation due to factors such as the atomic arrangement not being dense in the ab plane direction or the change in bond distance between atoms caused by the substitution of metal elements.

[0406] As described above, CAAC-OS has c-axis orientation, and multiple pellets (nanocrystals) are connected in the ab-plane direction, resulting in a deformed crystal structure. Therefore, CAAC-OS can be described as an oxide semiconductor having a CAA crystal (c-axis-aligned ab-plane-anchored crystal).

[0407] CAAC-OS is a highly crystalline oxide semiconductor. Since the crystallinity of oxide semiconductors can be degraded by the incorporation of impurities or the generation of defects, CAAC-OS can also be described as an oxide semiconductor with low levels of impurities or defects (such as oxygen vacancies).

[0408] Furthermore, impurities are elements other than the main components of oxide semiconductors, such as hydrogen, carbon, silicon, and transition metal elements. For example, elements such as silicon, which have a stronger bonding affinity with oxygen than the metal elements constituting the oxide semiconductor, disrupt the atomic arrangement of the oxide semiconductor by depriving it of oxygen, thereby becoming a factor that lowers crystallinity. Additionally, heavy metals such as iron and nickel, as well as argon and carbon dioxide, have large atomic radii (or molecular radii), which disrupt the atomic arrangement of the oxide semiconductor and thus reduce crystallinity.

[0409] When oxide semiconductors contain impurities or defects, their properties may change due to light or heat. For example, impurities contained in oxide semiconductors may act as carrier traps or as carrier sources. For example, oxygen vacancies in oxide semiconductors may act as carrier traps or as carrier sources by capturing hydrogen.

[0410] CAAC-OS, which has low impurity and oxygen vacancies, is an oxide semiconductor with low carrier density. Specifically, the carrier density is 8×10 11 pieces / cm 3 Less than, preferably 1×10 11 pieces / cm 3 Less than, more preferably 1×10 10 pieces / cm 3 Less than and 1×10 -9 pieces / cm 3 It can be an oxide semiconductor with such characteristics. Such an oxide semiconductor is called a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low defect level density. In other words, it can be described as an oxide semiconductor with stable characteristics.

[0411] <nc-os>

[0412] Next, nc-OS will be explained.

[0413] The case of analyzing nc-OS by XRD is explained. For example, when structural analysis is performed on nc-OS using the out-of-plane method, no peaks indicating orientation appear. In other words, the crystals of nc-OS do not possess orientation.

[0414] In addition, for example, when an nc-OS having an InGaZnO4 crystal is thinned and an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed over a region with a thickness of 34 nm, a ring-shaped diffraction pattern (nano-beam electron diffraction pattern) as shown in FIG. 28 (A) is observed. Also, the diffraction pattern (nano-beam electron diffraction pattern) when an electron beam with a probe diameter of 1 nm is incident on the same sample is shown in FIG. 28 (B). In FIG. 28 (B), multiple spots are observed within the ring-shaped region. Therefore, although the orderliness of the nc-OS is not confirmed when an electron beam with a probe diameter of 50 nm is incident, orderliness is confirmed when an electron beam with a probe diameter of 1 nm is incident.

[0415] In addition, when an electron beam with a probe diameter of 1 nm is incident on a region with a thickness of less than 10 nm, an electron diffraction pattern in which the spots are substantially arranged in a regular hexagon is observed, as shown in (C) of FIG. 28. Therefore, it can be seen that in the range with a thickness of less than 10 nm, the nc-OS has a highly ordered region, that is, a crystal. In addition, there are regions where a regular electron diffraction pattern is not observed because the crystals are oriented in various directions.

[0416] Figure 28 (D) shows a Cs-corrected high-resolution TEM image of a cross-section of an nc-OS observed from a direction substantially parallel to the surface to be formed. In the high-resolution TEM image, the nc-OS has regions where crystallized regions can be identified and regions where clear crystallized regions cannot be identified, such as the parts indicated by auxiliary lines. The crystallized regions included in the nc-OS have a size of 1 nm or more and 10 nm or less, and in particular, they are often 1 nm or more and 3 nm or less. In addition, oxide semiconductors with crystallized regions larger than 10 nm and 100 nm or less are sometimes referred to as microcrystalline oxide semiconductors. In the case of nc-OS, for example, in the high-resolution TEM image, grain boundaries may not be clearly identified. Furthermore, nanocrystals may share the same origin as the pellets in CAAC-OS. For this reason, the crystallized regions of the nc-OS are sometimes referred to as pellets below.

[0417] As such, nc-OS exhibits periodicity in the atomic arrangement in minute regions (e.g., regions from 1 nm to 10 nm, particularly from 1 nm to 3 nm). Additionally, nc-OS does not show regularity in crystal orientation between different pellets. Consequently, orientation is not confirmed throughout the film. Therefore, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or amorphous oxide semiconductors.

[0418] In addition, since no regularity is observed in the crystal orientation among the pellets (nanocrystals), nc-OS may also be referred to as an oxide semiconductor containing RANC (Random Aligned nanocrystals) or an oxide semiconductor containing NANC (Non-Aligned nanocrystals).

[0419] nc-OS is an oxide semiconductor with higher regularity than amorphous oxide semiconductors. As a result, nc-OS has a lower defect level density than a-like OS or amorphous oxide semiconductors. However, nc-OS does not show regularity in crystal orientation between different pellets. As a result, nc-OS has a higher defect level density compared to CAAC-OS.

[0420] <a-like OS>

[0421] a-like OS is an oxide semiconductor that has a structure between that of nc-OS and amorphous oxide semiconductors.

[0422] Fig. 29 shows a high-resolution cross-sectional TEM image of an a-like OS. Here, Fig. 29 (A) is a high-resolution cross-sectional TEM image of the a-like OS at the start of electron irradiation. Fig. 29 (B) is 4.3×10 8 e - / nm 2 electrons (e - This is a high-resolution cross-sectional TEM image of an a-like OS after irradiation. From (A) and (B) of Fig. 29, it can be seen that a bright region with a striped shape extending in the longitudinal direction is observed in the a-like OS from the start of electron irradiation. Additionally, it can be seen that the shape of the bright region changes after electron irradiation. Furthermore, it is presumed that the bright region is a cavity or a low-density region.

[0423] Because it has a cavity, the a-like OS is an unstable structure. Below, to show that the a-like OS is an unstable structure compared to CAAC-OS and nc-OS, changes in the structure due to electron irradiation are shown.

[0424] a-like OS, nc-OS, and CAAC-OS are prepared as samples. All samples are In-Ga-Zn oxide.

[0425] First, high-resolution cross-sectional TEM images of each sample are acquired. Looking at the high-resolution cross-sectional TEM images, it can be seen that all of these samples have crystalline regions.

[0426] In addition, it is known that the unit cell of the InGaZnO4 crystal has a structure in which a total of 9 layers, consisting of 3 In-O layers and 6 Ga-Zn-O layers, are layered and superimposed in the c-axis direction. The spacing between these adjacent layers is approximately equal to the lattice plane spacing (also called the d value) of the (009) plane, and this value is calculated to be 0.29 nm by crystal structure analysis. Therefore, below, the region where the spacing of the lattice stripes is 0.28 nm or greater and 0.30 nm or less is considered to be the crystal region of InGaZnO4. Furthermore, the lattice stripes correspond to the ab plane of the InGaZnO4 crystal.

[0427] Figure 30 is an example of investigating the average size of the crystal regions (22 to 30 locations) of each sample. Additionally, the length of the aforementioned lattice stripes is considered as the size of the crystal regions. From Figure 30, it can be seen that for a-like OS, the crystal regions become larger as the cumulative electron irradiation amount from TEM acquisition, etc. increases. From Figure 30, the crystal regions (also called initial nuclei), which were approximately 1.2 nm in size at the beginning of observation by TEM, [are] electrons (e - The cumulative irradiation amount of ) is 4.2×10 8 e - / nm 2 It can be seen that it is growing to a size of approximately 1.9 nm. Meanwhile, for nc-OS and CAAC-OS, the cumulative electron irradiation dose from the start of electron irradiation is 4.2 × 10⁻⁶ 8 e - / nm 2 It can be seen that the size of the crystal region does not change within the range up to [value]. From Fig. 30, it can be seen that regardless of the cumulative electron irradiation dose, the crystal region sizes of nc-OS and CAAC-OS are approximately 1.3 nm and 1.8 nm, respectively. In addition, a Hitachi transmission electron microscope H-9000NAR was used for electron beam irradiation and TEM observation. The electron beam irradiation conditions were an acceleration voltage of 300 kV and a current density of 6.7 × 10⁻⁶. 5 e - / (nm 2 ·s), the diameter of the irradiation area was set to 230 nm.

[0428] As such, in a-like OS, growth of crystal regions is sometimes observed upon electron irradiation. On the other hand, growth of crystal regions upon electron irradiation is rarely observed in nc-OS and CAAC-OS. In other words, it can be seen that a-like OS has an unstable structure compared to nc-OS and CAAC-OS.

[0429] Furthermore, because a-like OS contains cavities, it has a structure with lower density compared to nc-OS and CAAC-OS. Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single-crystal oxide semiconductor of the same composition. Additionally, the densities of nc-OS and CAAC-OS are 92.3% or more and less than 100% of the density of a single-crystal oxide semiconductor of the same composition. For oxide semiconductors with a density of less than 78% of the single-crystal oxide semiconductor density, film deposition itself is difficult.

[0430] For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a single-crystal InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm³ 3 Therefore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of the a-like OS is 5.0 g / cm³ 3 Above 5.9 g / cm² 3 It is less than. In addition, for example, in oxide semiconductors satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the densities of nc-OS and CAAC-OS are 5.9 g / cm³ 3 Above 6.3g / cm² 3 It is less than.

[0431] In addition, if single crystals of the same composition do not exist, a density equivalent to that of a single crystal with a desired composition can be estimated by combining single crystals of different compositions in arbitrary proportions. The density equivalent to that of a single crystal with a desired composition is best estimated by using a weighted average of the ratios in which single crystals of different compositions are combined. However, it is preferable to estimate the density by combining as few types of single crystals as possible.

[0432] As described above, oxide semiconductors can have various structures, and each has various characteristics. In addition, the oxide semiconductor may be a stacked film having two or more of, for example, amorphous oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

[0433] This embodiment can be appropriately combined with other embodiments.

[0434] (Embodiment 5)

[0435] In this embodiment, a touch panel module and an electronic device having an input / output device according to one embodiment of the present invention will be described using FIGS. 31 to 33.

[0436] The touch panel module (8000) illustrated in FIG. 31 has a touch panel (8004) connected to an FPC (8003), a frame (8009), a printed circuit board (8010), and a battery (8011) between an upper cover (8001) and a lower cover (8002).

[0437] An input / output device according to one embodiment of the present invention can be used, for example, in a touch panel (8004).

[0438] The shape or dimensions of the upper cover (8001) and the lower cover (8002) can be appropriately changed according to the size of the touch panel (8004).

[0439] In addition, when a transmissive liquid crystal element is used, a backlight (8007) may be provided as shown in FIG. 31. The backlight (8007) has a light source (8008). In FIG. 31, a configuration in which the light source (8008) is placed above the backlight (8007) is exemplified, but is not limited thereto. For example, a configuration in which the light source (8008) is placed at the end of the backlight (8007) and a light diffuser plate is used may be used. In addition, when a self-emissive light-emitting element such as an organic EL element is used, or in the case of a reflective panel, a configuration in which a backlight (8007) is not provided may be used.

[0440] In addition to the protective function of the touch panel (8004), the frame (8009) functions as an electronic shield to block electromagnetic waves generated by the operation of the printed circuit board (8010). Additionally, the frame (8009) may function as a heat sink.

[0441] The printed circuit board (8010) has a power circuit, a video signal, and a signal processing circuit for outputting a clock signal. As the power source supplying power to the power circuit, it may be an external commercial power source or a power source from a separately formed battery (8011). If a commercial power source is used, the battery (8011) may be omitted.

[0442] Additionally, the touch panel (8004) may be provided with additional components such as a polarizing plate, a phase difference plate, and a prism sheet.

[0443] Figures 32 (A) to (H) and Figure 33 are drawings showing electronic devices. These electronic devices may include a housing (5000), a display unit (5001), a speaker (5003), an LED lamp (5004), an operation key (5005) (including a power switch or an operation switch), a connection terminal (5006), a sensor (5007) (including a function to measure force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, longitude, electric field, current, voltage, power, radiation, flow rate, humidity, inclination, vibration, smell, or infrared radiation), a microphone (5008), etc.

[0444] Figure 32 (A) is a mobile computer and, in addition to the above, may have a switch (5009), an infrared port (5010), etc. Figure 32 (B) shows a portable image playback device (e.g., a DVD player) equipped with a recording medium and, in addition to the above, may include a second display unit (5002), a recording medium reader (5011), etc. Figure 32 (C) is a television device and, in addition to the above, may have a stand (5012), etc. Furthermore, the television device can be operated by an operation switch provided by the housing (5000) or by a separately provided remote controller (5013). By using the operation keys provided by the remote controller (5013), the channel or volume can be operated, and the image displayed on the display unit (5001) can be operated. Additionally, the remote controller (5013) may be configured to provide a display unit that displays information output from the remote controller (5013). (D) of FIG. 32 is a portable game console and, in addition to the above, may have a recording medium reader (5011), etc. (E) of FIG. 32 is a digital camera equipped with a television receiving function and, in addition to the above, may have an antenna (5014), a shutter button (5015), a receiving unit (5016), etc. (F) of FIG. 32 is a portable game console and, in addition to the above, may have a second display unit (5002), a recording medium reader (5011), etc. (G) of FIG. 32 is a portable television receiver and, in addition to the above, may have a charger (5017), etc., capable of transmitting and receiving signals. (H) of FIG. 32 is a wristwatch-type information terminal and may have a band (5018), a buckle (5019), etc. in addition to the above. A display unit (5001) mounted on a housing (5000) that also serves as a bezel portion has a non-rectangular display area. The display unit (5001) may display an icon (5020) indicating the time, other icons (5021), etc.(A) of FIG. 33 is digital signage. (B) of FIG. 33 is digital signage mounted on a cylindrical column.

[0445] The electronic device illustrated in FIGS. 32 (A) to (H) and FIG. 33 may have various functions. For example, it may have a function to display various information (still images, video, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to control processing by various software (programs), a wireless communication function, a function to connect to various computer networks using the wireless communication function, a function to transmit or receive various data using the wireless communication function, and a function to read programs or data recorded on a recording medium and display them on a display unit. In addition, in the case of an electronic device having multiple display units, it may have a function to display image information mainly on one display unit and display text information mainly on another display unit, or a function to display a three-dimensional image by displaying an image with parallax considerations on multiple display units. In addition, an electronic device having a receiving unit may have a function for capturing still images, a function for capturing video, a function for automatically or manually correcting captured images, a function for saving captured images to a recording medium (external or built into the camera), and a function for displaying captured images on a display unit. Furthermore, the functions that the electronic device illustrated in FIGS. 32 (A) to (H) and FIG. 33 may have are not limited to these, and may have various functions.

[0446] The electronic device described in this embodiment is characterized by having a display unit for displaying certain information. An input / output device according to one form of the present invention may be applied to the display unit.

[0447] This embodiment can be appropriately combined with other embodiments.

[0448] [Example]

[0449] In this embodiment, an input / output device according to one embodiment of the present invention is described.

[0450] First, the specifications of the input / output device of this embodiment will be described. The size is 4.3 inches diagonally. The effective pixel count is set to 1080(H)×1920(V) FHD (Full High Definition). In addition, the pixel size is set to 49.5μm(H)×49.5μm(V). The external dimensions of the panel are 69.76mm(H)×141.4mm(V). The display area and sensor area are each 53.46mm(H)×95.04mm(V). The resolution is set to 513ppi. For the transistor, a channel-etched (CE) type transistor having an oxide semiconductor in the channel forming area is used.

[0451] The input / output device of this embodiment can function as a transmissive liquid crystal display device. As a display element, a liquid crystal element in FFS mode is used. As a colorization method, a CF (color filter) method was used. In addition, the aperture ratio was set to 48.0%. In addition, the driving frequency was set to 60Hz. In addition, analog linear sequence was used as the video signal format.

[0452] In addition, a gate driver is built-in. Also, a COF is used as the source driver.

[0453] In addition, the detection element was configured as a projected capacitance type (mutual capacitance type). The common electrode of the liquid crystal element was configured to serve as the electrode of the detection element. The number of sensor units was set to 18 (H) × 32 (V). Specifically, there are 32 conductive films (56a) shown in FIG. 9 (A) and 18 conductive films (58). The size of one sensor unit is 2.970 mm × 2.970 mm. In FIG. 9 (A), one conductive film (56b) has a size of 30 × 60 pixels, and one conductive film (56a) has a size of 30 × 1080 pixels.

[0454] The frame period shown in (E) of Fig. 8 is 16.667 ms, the recording period is 8.333 ms, and the two detection periods are each 4.167 ms.

[0455] A cross-sectional schematic diagram of the input / output device of this embodiment corresponds to (B) of FIG. 1, and details can be referenced to Embodiment 1.

[0456] A glass substrate with a thickness of approximately 0.7 mm was used for the substrate (211). A glass substrate with a thickness of approximately 0.1 mm, approximately 0.2 mm, or approximately 0.3 mm was used for the substrate (261). The gate electrode (221) was formed as a stacked structure of a tungsten nitride film and a copper film. The insulating film (213) was formed as a stacked structure of a silicon nitride film and a silicon oxynitride film. For the oxide semiconductor film (223), CAAC-IGZO, which is one of CAAC-OS, was used. The oxide semiconductor film (223) was formed as a two-layer structure using sputtering targets with different atomic ratios of metal elements, and the combined thickness of the two layers was set to approximately 25 nm. The oxide semiconductor film (223) and the oxide conductive film (227) were formed using In-Ga-Zn oxide. The oxide conductive film (227) was formed as a single layer structure, and its thickness was set to approximately 100 nm. The source electrode (225a) and drain electrode (225b) were formed as a stacked structure of a tungsten film, an aluminum film, and a titanium film. A silicon nitride film was used for the insulating film (215). A silicon nitride film was used for the insulating film (217). An acrylic film was used for the insulating film (219). For the conductive film (251) and the conductive film (252), an indium tin oxide film containing silicon with a thickness of about 100 nm was used, respectively. A silicon nitride film was used for the insulating film (253). A negative liquid crystal was used for the liquid crystal (249). Additionally, a polarizing film with a thickness of about 200 μm was bonded to the surface of the substrate (261). In this embodiment, two types of input / output devices were fabricated: one using an APC with a thickness of about 100 nm for the conductive film (255), and the other using a Ti with a thickness of about 200 nm.

[0457] FIG. 35 is a photograph showing the display state of the input / output device of the present embodiment. In FIG. 35, an FPC is connected to the right and upper side (not shown) of the display area, respectively. In the input / output device illustrated in FIG. 35, a glass substrate with a thickness of about 0.3 mm is used for the substrate (261). Additionally, an APC with a thickness of about 100 nm is used for the conductive film (255). By applying one embodiment of the present invention as illustrated in FIG. 35, it was possible to manufacture an input / output device capable of good display. Furthermore, the input / output device illustrated in FIG. 35 has good detection sensitivity of the touch sensor and can detect multiple points simultaneously.

[0458] It was observed that the striped shape was not uniform at intervals roughly equal to the width of the conductive film (56a) (length in the y-direction shown in (A) of FIG. 9). Therefore, the widths of the conductive film (56a) and the conductive film (56b) were changed so that the parasitic capacitances of the conductive film (56a) and the conductive film (56b) matched. After the change, one conductive film (56b) was 21×60 pixels in size, and one conductive film (56a) was 39×1080 pixels in size. Accordingly, the resistance value of the conductive film (56b) increased from 1.66kΩ to 1.19kΩ, and the capacitance of the conductive film (56b) increased from 534pF to 674pF. The resistance value of the conductive film (56a) increased from 0.86kΩ to 1.35kΩ, and the capacitance of the conductive film (56a) increased from 930pF to 684pF. As the parasitic capacitances of the conductive film (56a) and the conductive film (56b) matched, the non-uniformity of the display was reduced, allowing for a better display. Additionally, compared to the case where the touch sensing signal is input to the conductive film (56b), the case where the signal is input alternately to the conductive film (56a) and the conductive film (56b) allowed for a better display with reduced non-uniformity of the display. Explanation of the symbols

[0459] 56: Challenge Match 56a: Challenge Memories 56b: Challenge Screen 57a: Auxiliary wiring 57b: Auxiliary wiring 58: Challenge Match 60: Pixels 60a: Subpixel 60b: subpixel 60c: subpixel 106: Insulating film 107: Insulating film 114: Insulating film 116: Insulating film 141: Opening 142: Frog 193: Target 194: Plasma 201a: Transistor 201b: Transistor 201c: Transistor 203: Transistor 203a: Transistor 203b: Transistor 205a: Connection part 205b: Connection part 207: Liquid crystal element 207a: Liquid crystal element 207b: Liquid crystal element 211: Board 213: Insulating film 215: Insulating film 217: Insulating film 218: Insulating film 219: Insulating film 221: Gate electrode 223: Oxide semiconductor film 225a: Source electrode 225b: Drain electrode 226: Challenge Match 227: Oxide conductive film 227a: Oxide semiconductor film 231: Challenge 233: Challenge 235: Challenge 241: Color film 243: Shade 245: Insulating film 247: Spacer 249: LCD 251: Challenge Match 252: Challenge Mark 253: Insulating film 254: Challenge 255: Challenge Mark 257: Conjunction 259: FPC 261: Substrate 265: Adhesive layer 267: Conjunction 268: IC 269: FPC 270: Transistor 270A: Transistor 270B: Transistor 273: Pixel 275: Challenge Mark 277: Area 300: Input / Output Device 301: Display unit 302: Scan line driving circuit 303: Pixel 502: Board 504: Challenge 506: Insulating film 507: Insulating film 508: Oxide semiconductor film 508a: Oxide semiconductor film 508b: Oxide semiconductor film 508c: Oxide semiconductor film 511a: Oxide semiconductor film 511b: Oxide conductive film 512a: Challenge membrane 512b: Challenge Screen 514: Insulating film 516: Insulating film 518: Insulating film 519: Insulating film 552a: Opening 552b: opening 552c: opening 3501: Wiring 3502: Wiring 3503: Transistor 3504: Liquid crystal element 3510: Wiring 3510_1: Wiring 3510_2: Wiring 3511: Wiring 3515_1: Block 3515_2: Block 3516: Block 5000: Housing 5001: Display unit 5002: Display unit 5003: Speaker 5004: LED lamp 5005: Control Keys 5006: Connection terminal 5007: Sensor 5008: Microphone 5009: Switch 5010: Infrared port 5011: Recording medium reader 5012: Stand 5013: Remote controller 5014: Antenna 5015: Shutter button 5016: Awards Division 5017: Charger 5018: Band 5019: Buckle 5020: Icon 5021: Icon 6500: Touch panel module 6501: Circuit unit 6502: Signal line driving circuit 6503: Sensor driving circuit 6504: Detector circuit 6505: Timing Controller 6506: Image processing circuit 6510: Touch panel 6511: Display unit 6512: Input section 6513: Scan line driving circuit 6520: IC 6530: IC 6531: Board 6532: Opposing substrate 6533: FPC 6534: PCB 6540: CPU 8000: Touch panel module 8001: Top cover 8002: Bottom cover 8003: FPC 8004: Touch panel 8007: Backlight 8008: Light source 8009: Frame 8010: Printed circuit board 8011: Battery

Claims

Claim 1 A liquid crystal display device comprising: a transistor; a first insulating film including a region disposed above the gate electrode of the transistor; a first conductive film including a region disposed above the first insulating film and a region stretched in one direction; a second insulating film including a region disposed above the first conductive film; a first common electrode, a second common electrode, and a third common electrode including a region disposed above the second insulating film; a second conductive film including a region in contact with the upper surface of the first common electrode; a third conductive film including a region in contact with the upper surface of the second common electrode; a fourth conductive film including a region in contact with the upper surface of the third common electrode; a first pixel electrode including a region disposed above the first common electrode; and a second pixel electrode including a region disposed above the second common electrode.and includes a third pixel electrode comprising a region disposed on the third common electrode, wherein the second conductive film has a grid-like shape in a region overlapping with the first common electrode, the third conductive film has a grid-like shape in a region overlapping with the second common electrode, the fourth conductive film has a grid-like shape in a region overlapping with the third common electrode, in a planar view, the second common electrode is disposed adjacent to the first common electrode, in a planar view, the second common electrode is disposed adjacent to the third common electrode, in a planar view, the second common electrode includes a region disposed between the first common electrode and the third common electrode, the first common electrode and the third common electrode are connected through the first conductive film, the first conductive film has an overlap with each of the first common electrode, the second common electrode and the third common electrode, and the A liquid crystal display device wherein 1. A common electrode and the third common electrode function as electrodes on one side of a detection element, and the second common electrode functions as electrodes on the other side of the detection element.; Claim 2 A liquid crystal display device comprising: a transistor; a first insulating film including a region disposed above the gate electrode of the transistor; a first conductive film including a region disposed above the first insulating film and a region stretched in one direction; a second insulating film including a region disposed above the first conductive film; a first common electrode, a second common electrode, and a third common electrode including a region disposed above the second insulating film; a second conductive film always conducting with the first common electrode; a third conductive film always conducting with the second common electrode; a fourth conductive film always conducting with the third common electrode; a first pixel electrode including a region disposed above the first common electrode; and a second pixel electrode including a region disposed above the second common electrode. and includes a third pixel electrode comprising an area disposed on the third common electrode, wherein the second conductive film has a grid-like shape in an area overlapping with the first common electrode, the third conductive film has a grid-like shape in an area overlapping with the second common electrode, the fourth conductive film has a grid-like shape in an area overlapping with the third common electrode, in a planar view, the second common electrode is disposed adjacent to the first common electrode, in a planar view, the second common electrode is disposed adjacent to the third common electrode, in a planar view, the second common electrode includes an area disposed between the first common electrode and the third common electrode, the first common electrode and the third common electrode are always conductive through the first conductive film, and the first conductive film overlaps with each of the first common electrode, the second common electrode and the third common electrode A liquid crystal display device having, wherein the first common electrode and the third common electrode function as electrodes on one side of a detection element, and the second common electrode functions as electrodes on the other side of the detection element. Claim 3 A liquid crystal display device according to claim 1 or 2, wherein the first conductive film comprises aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten. Claim 4 A liquid crystal display device according to claim 1 or 2, wherein each of the second conductive film, the third conductive film, and the fourth conductive film comprises molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, silver, neodymium, or scandium. Claim 5 delete Claim 6 delete

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