Display device

KR103024848B1Active Publication Date: 2026-09-29SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
KR1020220025276
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-02-25
Publication Date
2026-09-29
Estimated Expiration
2042-02-25

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  • Figure 112022021728233-PAT00004_ABST
    Figure 112022021728233-PAT00004_ABST
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Abstract

A display device is provided. The display device includes a plurality of pixels arranged along a plurality of rows and columns and a display driving unit for driving the plurality of pixels, wherein each of the plurality of pixels includes a plurality of light-emitting elements, a first transistor that supplies a driving current to the plurality of light-emitting elements, a second transistor that supplies a data voltage to a first node which is the gate electrode of the first transistor, a third transistor that electrically connects a second node which is the first electrode of the plurality of light-emitting elements and a sensing line, and a fourth transistor that electrically connects a third node which is the second electrode of the plurality of light-emitting elements and the sensing line, and the display driving unit senses the voltages of the second node and the third node to calculate a driving voltage across the plurality of light-emitting elements, and compensates the data voltage when the driving voltage exceeds a reference voltage.
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Description

Technology Field

[0001] The present invention relates to a display device. Background Technology

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms. For example, display devices are being applied to a wide range of electronic devices, such as smartphones, digital cameras, laptop computers, navigation systems, and smart televisions. Display devices may be flat panel display devices, such as Liquid Crystal Display Devices, Field Emission Display Devices, and Organic Light Emitting Display Devices. Among these flat panel display devices, light-emitting display devices include light-emitting elements in which each pixel of the display panel can emit light independently, thereby enabling the display of images without a backlight unit that provides light to the display panel.

[0003] Each of the multiple pixels of a display panel may include multiple light-emitting elements. The multiple light-emitting elements may emit light by a driving current supplied from the pixel circuit of the pixel. If some of the multiple light-emitting elements are not conducting, the driving current may be concentrated on the remaining light-emitting elements, and a hot spot phenomenon or degradation may occur in the remaining light-emitting elements. The problem to be solved

[0004] The problem that the present invention aims to solve is to provide a display device that can prevent the hot spot phenomenon of a light-emitting element and prevent the degradation of a light-emitting element by preventing overcurrent from flowing in the light-emitting element.

[0005] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0006] A display device of one embodiment for solving the above problem includes a plurality of pixels arranged along a plurality of rows and columns and a display driving unit for driving the plurality of pixels, wherein each of the plurality of pixels includes a plurality of light-emitting elements, a first transistor that supplies a driving current to the plurality of light-emitting elements, a second transistor that supplies a data voltage to a first node which is the gate electrode of the first transistor, a third transistor that electrically connects a second node which is the first electrode of the plurality of light-emitting elements and a sensing line, and a fourth transistor that electrically connects a third node which is the second electrode of the plurality of light-emitting elements and the sensing line, and the display driving unit senses the voltages of the second node and the third node to calculate a driving voltage across the plurality of light-emitting elements, and compensates the data voltage when the driving voltage exceeds a reference voltage.

[0007] The above-described display driving unit can determine compensation data based on a preset lookup table when the driving voltage exceeds the reference voltage.

[0008] The above display driving unit can receive digital video data and generate the data voltage, and the above display driving unit can apply the compensation data to the digital video data to generate a compensated data voltage.

[0009] The above compensated data voltage may be lower than the data voltage before compensation.

[0010] The plurality of light-emitting elements are connected in parallel between the second node and the third node, and as the number of light-emitting elements capable of flowing current among the plurality of light-emitting elements decreases, the magnitude of the current flowing through one light-emitting element can increase.

[0011] The display driving unit drives the plurality of pixels based on a vertical synchronization signal having a low level and a high level during a frame period, and the display driving unit can calculate the driving voltage of pixels placed in some rows among the plurality of pixels during a rest period when the vertical synchronization signal has a low level.

[0012] The second transistor receives a gate high level scan write signal during the first period of the rest period, the third transistor receives a gate high level first scan sensing signal during the first period of the rest period and the second period after the first period, and the fourth transistor can receive a gate high level second scan sensing signal during the third period after the second period of the rest period.

[0013] Each of the plurality of light-emitting elements may include a first portion extending in a first direction and a second portion branched from the first portion and extending in a second direction intersecting the first direction, and each of the plurality of light-emitting elements may include a first portion extending in the first direction, a second portion branched from one side of the first portion and extending to one side of the second portion of the first electrode, and a third portion branched from the other side of the first portion and extending to the other side of the second portion of the first electrode.

[0014] The plurality of light-emitting elements comprises a first semiconductor layer comprising at least one semiconductor material doped with a p-type and a second semiconductor layer comprising at least one semiconductor material doped with an n-type, wherein the first semiconductor layer is electrically connected to a second portion of the first electrode and the second semiconductor layer can be electrically connected to a second portion and a third portion of the second electrode.

[0015] The above driving current is supplied to the second part of the first electrode and can be divided among the plurality of light-emitting elements to flow to the second part and the third part of the second electrode.

[0016] A display device of one embodiment for solving the above problem comprises a plurality of pixels arranged along a plurality of rows and columns, and a display driving unit for driving the plurality of pixels, wherein each of the plurality of pixels comprises a plurality of light-emitting elements, a first transistor that supplies a driving current to the plurality of light-emitting elements, a second transistor that supplies a data voltage to a first node which is the gate electrode of the first transistor, a third transistor that electrically connects a second node which is the source electrode of the first transistor and a sensing line, a fourth transistor that electrically connects a third node which is serially connected to the second node and a sensing line, and a fifth transistor that electrically connects a fourth node which is serially connected to the third node and a sensing line, and wherein the display driving unit senses the voltages of the second to fourth nodes, calculates a first driving voltage between the second and third nodes, and calculates a second driving voltage between the third and fourth nodes, thereby compensating the data voltage when at least one of the first and second driving voltages exceeds a reference voltage.

[0017] The above-described display driving unit can determine compensation data based on a preset lookup table when at least one of the first and second driving voltages exceeds a reference voltage.

[0018] The above display driving unit can receive digital video data and generate the data voltage, and the above display driving unit can apply the compensation data to the digital video data to generate a compensated data voltage.

[0019] The above compensated data voltage may be lower than the data voltage before compensation.

[0020] Some of the plurality of light-emitting elements are connected in parallel between the second and third nodes, and other parts of the plurality of light-emitting elements are connected in parallel between the third and fourth nodes, and as the number of light-emitting elements capable of flowing current among the plurality of light-emitting elements decreases, the magnitude of the current flowing through one light-emitting element may increase.

[0021] The display driving unit drives the plurality of pixels based on a vertical synchronization signal having a low level and a high level during a frame period, and the display driving unit can calculate the first and second driving voltages of pixels placed in some rows among the plurality of pixels during a rest period when the vertical synchronization signal has a low level.

[0022] The second transistor receives a gate high level scan write signal during the first period of the rest period, the third transistor receives a gate high level first scan sensing signal during the first period of the rest period and the second period after the first period, the fourth transistor receives a gate high level second scan sensing signal during the third period after the second period of the rest period, and the fifth transistor receives a gate high level third scan sensing signal during the fourth period after the third period of the rest period.

[0023] Each of the plurality of light-emitting elements may include a first portion extending in a first direction and a second portion branched from the first portion and extending in a second direction intersecting the first direction, and each of the plurality of light-emitting elements may include a first portion extending in the first direction, a second portion branched from one side of the first portion and extending to one side of the second portion of the first electrode, and a third portion branched from the other side of the first portion and extending to the other side of the second portion of the first electrode.

[0024] The plurality of light-emitting elements comprises a first semiconductor layer comprising at least one semiconductor material doped with a p-type, and a second semiconductor layer comprising at least one semiconductor material doped with an n-type, wherein the first semiconductor layer is electrically connected to a second portion of the first electrode, and the second semiconductor layer may be electrically connected to a second portion and a third portion of the second electrode.

[0025] The above driving current is supplied to the second part of the first electrode and can be divided among the plurality of light-emitting elements to flow to the second part and the third part of the second electrode.

[0026] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0027] According to the display device of the embodiments, by calculating the driving voltage across the light-emitting element and compensating the data voltage when the driving voltage exceeds a reference voltage, the magnitude of the driving current flowing through the light-emitting element is reduced, thereby preventing the hot spot phenomenon of the light-emitting element and preventing the degradation of the light-emitting element.

[0028] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0029] FIG. 1 is a perspective view showing a display device according to one embodiment. FIG. 2 is an exploded perspective view showing a display device according to one embodiment. FIG. 3 is a plan view showing a display panel according to one embodiment. FIG. 4 is a circuit diagram showing a pixel of a display device according to one embodiment. FIG. 5 is a timing diagram showing the signal and voltage of a display device according to one embodiment. FIG. 6 is a timing diagram showing the signal and voltage of some pixels during a rest period in a display device according to one embodiment. FIG. 7 is a plan view showing a plurality of light-emitting elements of a display device according to one embodiment. FIG. 8 is a perspective view showing a light-emitting element of a display device according to one embodiment. FIG. 9 is a plan view showing an example of current flowing through a plurality of light-emitting elements in a display device according to one embodiment. Figure 10 is a circuit diagram showing the display device of Figure 9. FIG. 11 is a plan view showing another example of current flowing through a plurality of light-emitting elements in a display device according to one embodiment. Figure 12 is a circuit diagram showing the display device of Figure 11. FIG. 13 is a flowchart illustrating the current compensation process of a display device according to one embodiment. FIG. 14 is a circuit diagram showing a pixel of a display device according to another embodiment. FIG. 15 is a timing diagram showing the signal and voltage of some pixels during a rest period in a display device according to another embodiment. FIG. 16 is a flowchart illustrating the current compensation process of a display device according to another embodiment. Specific details for implementing the invention

[0030] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0031] When elements or layers are referred to as being "on" another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and therefore the invention is not limited to the depicted details.

[0032] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0033] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0034] Specific embodiments will be described below with reference to the attached drawings.

[0035] FIG. 1 is a perspective view showing a display device according to one embodiment, and FIG. 2 is an exploded perspective view showing a display device according to one embodiment.

[0036] Referring to FIGS. 1 and 2, the display device (10) includes a cover window (100), a display panel (300), a bracket (600), a main circuit board (700), and a lower cover (900).

[0037] In this specification, "top," "top," and "top surface" refer to the upward direction, i.e., the Z-axis direction, with respect to the display device (10), and "bottom," "bottom," and "bottom surface" refer to the downward direction, i.e., the opposite direction of the Z-axis direction, with respect to the display device (10). Additionally, "left," "right," "up," and "down" refer to the direction when viewing the display device (10) from a plane. For example, "left" refers to the opposite direction of the X-axis direction, "right" refers to the X-axis direction, "up" refers to the Y-axis direction, and "down" refers to the opposite direction of the Y-axis direction.

[0038] The display device (10) is a device for displaying video or still images and can be used as a display screen for various products such as televisions, laptops, monitors, billboards, and the Internet of Things (IOT), as well as portable electronic devices such as mobile phones, smartphones, tablet personal computers, smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, PMPs (Portable Multimedia Players), navigation systems, and UMPCs (Ultra Mobile PCs).

[0039] The display device (10) may be formed in a rectangular shape on a plane. For example, the display device (10) may have a rectangular planar shape having a short side in the first direction (X-axis direction) and a long side in the second direction (Y-axis direction). The corner where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) meet may be formed rounded to have a predetermined curvature or formed at a right angle. The planar shape of the display device (10) is not limited to a rectangle and may be formed in other polygons, circles, or ellipses.

[0040] The cover window (100) is positioned on the upper part of the display panel (300) and can cover the upper surface of the display panel (300). The cover window (100) can protect the upper surface of the display panel (300).

[0041] The cover window (100) may include a transparent area (TA) corresponding to a display area (DA) of the display panel (300) and a non-transparent area (NTA) corresponding to a non-display area (NDA) of the display panel (300). For example, the non-transparent area (NTA) may be formed to be opaque. As another example, the non-transparent area (NTA) may be formed as a decorative layer having a pattern that can be shown to the user when an image is not being displayed.

[0042] The display panel (300) can be positioned at the bottom of the cover window (100). Accordingly, the image displayed by the display panel (300) can be seen on the upper surface of the display device (10) through the cover window (100).

[0043] The display panel (300) may be a light-emitting display panel including a light-emitting element. For example, the display panel (300) may be an organic light-emitting display panel using an organic light-emitting diode including an organic light-emitting layer, a quantum dot light-emitting display panel using a quantum dot light-emitting diode including a quantum dot light-emitting layer, an inorganic light-emitting display panel using an inorganic light-emitting element including an inorganic semiconductor, or a micro light-emitting diode display panel using a micro LED.

[0044] The display panel (300) may include a display area (DA), a non-display area (NDA), and a sub-area (SBA). The display area (DA) may overlap with the transparent area (TA) of the cover window (100). The display area (DA) may include a plurality of pixels that display an image, and the non-display area (NDA) may be a surrounding area of ​​the display area (DA) and may not display an image. For example, the non-display area (NDA) may surround the display area (DA), but is not limited thereto. The display area (DA) may occupy most of the area of ​​the display panel (300).

[0045] A sub-region (SBA) may extend from one side of a non-display area (NDA). The sub-region (SBA) may include a flexible material capable of bending, folding, rolling, etc. For example, when the sub-region (SBA) is bent, the sub-region (SBA) may overlap with the display area (DA) in the thickness direction (Z-axis direction). The sub-region (SBA) may include a pad portion electrically connected to a display driving unit (310) and a circuit board (320). Optionally, the sub-region (SBA) may be omitted, and the display driving unit (310) and the pad portion may be placed in the non-display area (NDA).

[0046] For example, the display panel (300) may include a touch sensor layer capable of detecting an object such as a person's finger or a pen. The touch sensor layer may include a plurality of touch electrodes and may be disposed on a display layer on which a plurality of pixels are disposed.

[0047] The display panel (300) may include a display driving unit (310), a circuit board (320), a power supply unit (330), and a touch driving unit (340).

[0048] The display driver (310) can output signals and voltages for driving the display panel (300). For example, the display driver (310) can supply a data voltage to a data line. The display driver (310) can supply a power voltage to a power line and supply a gate control signal to a gate driver. Here, the power voltage may be at least one of a high potential voltage, an initialization voltage, a reference voltage, and a low potential voltage.

[0049] The circuit board (320) can be attached to the pad portion using an anisotropic conductive film (ACF). The lead lines of the circuit board (320) can be electrically connected to the pad portion of the display panel (300). For example, the circuit board (320) may be a flexible film such as a flexible printed circuit board (FPCB), a printed circuit board (PCB), or a chip on film (COF).

[0050] The power supply unit (330) is positioned on the circuit board (320) and can supply power voltage to the display driving unit (310) and the display panel (300). The power supply unit (330) can generate a high potential voltage and supply it to the high potential line, and can generate a common voltage and supply it to the low potential line. The power supply unit (330) can generate an initialization voltage and supply it to the initialization voltage line, and can generate a reference voltage and supply it to the display driving unit (310).

[0051] The touch driving unit (340) is positioned on the circuit board (320) and can measure the capacitance of the touch electrodes. For example, the touch driving unit (340) can determine whether a user has touched and the location of the user's touch based on the change in capacitance of the touch electrodes. Here, a user's touch refers to an object, such as a user's finger or a pen, contacting or approaching one surface of the display device (10) on the touch sensor layer. The touch driving unit (340) can determine the touch location by distinguishing between the part where a touch has occurred and the part where no touch has occurred among a plurality of touch electrodes.

[0052] A bracket (600) may be placed on the lower part of a display panel (300). The bracket (600) may be made of plastic, metal, or a combination thereof. For example, the bracket (600) may include a first camera hole (CMH1) into which a first camera sensor (720) is inserted, a battery hole (BH) into which a battery is placed, and a cable hole (CAH) through which a cable (415) connected to a display driver (310) or circuit board (320) passes.

[0053] The main circuit board (700) and the battery (790) can be placed on the lower part of the bracket (600). The main circuit board (700) may be a printed circuit board or a flexible printed circuit board.

[0054] The main circuit board (700) may include a main processor (710), a first camera sensor (720), and a main connector (730). The first camera sensor (720) may be placed on both the upper and lower surfaces of the main circuit board (700), the main processor (710) may be placed on the upper surface of the main circuit board (700), and the main connector (730) may be placed on the upper surface of the main circuit board (700).

[0055] The main processor (710) can control all functions of the display device (10). For example, the main processor (710) can supply digital video data to the display driver (310) so that the display panel (300) displays an image. The main processor (710) can receive touch data from the touch driver (340), determine the user's touch coordinates, and then execute an application indicated by an icon displayed at the user's touch coordinates.

[0056] The main processor (710) converts the first image data input from the first camera sensor (720) into digital video data and outputs it to the display driving unit (310) through the circuit board (320), thereby enabling the image captured by the first camera sensor (720) to be displayed on the display panel (300).

[0057] The first camera sensor (720) can process image frames, such as still images or video, obtained by the image sensor and output them to the main processor (710). For example, the first camera sensor (720) may be a CMOS image sensor or a CCD sensor, but is not limited thereto. The first camera sensor (720) may be exposed to the lower surface of the lower cover (900) through the second camera hole (CMH2) and may capture an object or background placed at the bottom of the display device (10).

[0058] The main connector (730) can be connected to a cable (415) that passes through the cable hole (CAH) of the bracket (600). Thus, the main circuit board (700) can be electrically connected to the display driver (310) or the circuit board (320).

[0059] The battery (790) may not overlap with the main circuit board (700) in the third direction (Z-axis direction). The battery (790) may overlap with the battery hole (BH) of the bracket (600).

[0060] The main circuit board (700) may further include a mobile communication module capable of transmitting and receiving wireless signals with at least one of a base station, an external terminal, and a server on a mobile communication network. The wireless signals may include voice signals, video call signals, or various forms of data resulting from the transmission and reception of text / multimedia messages.

[0061] The lower cover (900) may be placed on the lower side of the main circuit board (700) and the battery (790). The lower cover (900) may be secured by being fastened to a bracket (600). The lower cover (900) may form the lower surface of the display device (10). The lower cover (900) may be made of plastic, metal, or a combination thereof.

[0062] The lower cover (900) may include a second camera hole (CMH2) in which the lower surface of the first camera sensor (720) is exposed. The position of the first camera sensor (720) and the positions of the first and second camera holes (CMH1, CMH2) corresponding to the first camera sensor (720) are not limited to the embodiment shown in FIG. 2.

[0063] FIG. 3 is a plan view showing a display panel according to one embodiment.

[0064] Referring to FIG. 3, the display panel (300) may include a display area (DA), a non-display area (NDA), and a sub-area (SBA).

[0065] The display area (DA) is an area for displaying images and can be defined as the central area of ​​the display panel (300). The display area (DA) may include a plurality of pixels (SP), a plurality of gate lines (GL), a plurality of data lines (DL), and a plurality of power lines (VL). Each of the plurality of pixels (SP) can be defined as a minimum unit that outputs light.

[0066] A plurality of gate lines (GL) can supply gate signals received from a gate driver (350) to a plurality of pixels (SP). The plurality of gate lines (GL) can be extended in a first direction (X-axis direction) and can be spaced apart from each other in a second direction (Y-axis direction) that intersects the first direction (X-axis direction).

[0067] A plurality of data lines (DL) can supply data voltage received from a display driving unit (310) to a plurality of pixels (SP). The plurality of data lines (DL) can be extended in a second direction (Y-axis direction) and can be spaced apart from each other in a first direction (X-axis direction).

[0068] A plurality of power lines (VL) can supply power voltage received from a display driving unit (310) or a power supply unit (330) to a plurality of pixels (SP). Here, the power voltage may be at least one of a high potential voltage, an initialization voltage, a reference voltage, and a low potential voltage. A plurality of power lines (VL) may be extended in a second direction (Y-axis direction) and may be spaced apart from each other in a first direction (X-axis direction).

[0069] A non-display area (NDA) may surround a display area (DA). The non-display area (NDA) may include a gate driver (350), fan-out lines (FOL), and gate control lines (GCL). The gate driver (350) may generate a plurality of gate signals based on a gate control signal and may sequentially supply the plurality of gate signals to a plurality of gate lines (GL) according to a set order.

[0070] Fan-out lines (FOL) can extend from the display driver (310) to the display area (DA). Fan-out lines (FOL) can supply data voltage received from the display driver (310) to a plurality of data lines (DL).

[0071] The gate control line (GCL) can extend from the display driver (310) to the gate driver (350). The gate control line (GCL) can supply a gate control signal received from the display driver (310) to the gate driver (350).

[0072] The sub-region (SBA) may include a display driver (310) and a plurality of pad portions (DP). The display driver (310) may output a signal and voltage to drive the display panel (300) to the fan-out lines (FOL). The display driver (310) may supply a data voltage to the data line (DL) through the fan-out lines (FOL). The data voltage may be supplied to a plurality of pixels (SP) and may determine the brightness of the plurality of pixels (SP). The display driver (310) may supply a gate control signal to the gate driver (350) through the gate control line (GCL).

[0073] Multiple pad portions (DP) may be placed at the edge of the sub-region (SBA). The pad portions (DP) may be electrically connected to the circuit board (320) using a low-resistance, high-reliability material such as an anisotropic conductive film or SAP (Self Assembly Anisotropic Conductive Paste). The pad portions (DP) may be connected to a graphics system through the circuit board (320). The pad portions (DP) may be electrically connected to the circuit board (320) to receive digital video data and supply digital video data to the display driving unit (310).

[0074] FIG. 4 is a circuit diagram showing a pixel of a display device according to one embodiment.

[0075] Referring to FIG. 4, the display panel (300) may include a plurality of pixels (SP). Each of the plurality of pixels (SP) may be connected to a scan writing line (GWL), a first scan sensing line (GSL1), a second scan sensing line (GSL2), a data line (DL), a sensing line (SL), a high potential line (VDDL), and a low potential line (VSSL).

[0076] The pixel (SP) may include first to fourth transistors (ST1, ST2, ST3, ST4), a first capacitor (C1), and a plurality of light-emitting elements (ED).

[0077] The first transistor (ST1) may include a gate electrode, a drain electrode, and a source electrode. The gate electrode of the first transistor (ST1) may be connected to a first node (N1), the drain electrode may be connected to a high potential line (VDDL), and the source electrode may be connected to a second node (N2). The first transistor (T1) may be a driving transistor that adjusts the current flowing from the high potential line (VDDL) to the light-emitting element (ED) according to the voltage difference between the gate electrode and the source electrode. The first transistor (ST1) may control the drain-source current (or driving current) based on the data voltage applied to the gate electrode.

[0078] A plurality of light-emitting elements (EDs) can receive a driving current and emit light. A plurality of light-emitting elements (EDs) may be connected in parallel between a second node (N2) and a third node (N3), but are not limited thereto. The amount of light emitted or brightness of the light-emitting elements (EDs) may be proportional to the magnitude of the driving current. The light-emitting elements (EDs) may include at least one of an organic light-emitting diode (OLED) including an organic light-emitting layer, a quantum dot LED including a quantum dot light-emitting layer, an inorganic LED including an inorganic semiconductor, and a micro LED, but are not limited thereto.

[0079] The first electrode of the light-emitting element (ED) can be connected to the second node (N2). The first electrode of the light-emitting element (ED) can be connected through the second node (N2) to the source electrode of the first transistor (ST1), the drain electrode of the third transistor (ST3), and the second capacitor electrode of the first capacitor (C1). The second electrode of the light-emitting element (ED) can be connected to the third node (N3), which is the low potential line (VSSL).

[0080] The second transistor (ST2) can be turned on by a scan write signal from the scan write line (GWL) to electrically connect the data line (DL) and the first node (N1), which is the gate electrode of the first transistor (ST1). By turning on based on the scan write signal, the second transistor (ST2) can supply a data voltage to the first node (N1). The gate electrode of the second transistor (ST2) can be connected to the scan write line (GWL), the drain electrode can be connected to the data line (DL), and the source electrode can be connected to the first node (N1). The source electrode of the second transistor (ST2) can be connected to the gate electrode of the first transistor (ST1) and the first capacitor electrode of the first capacitor (C1) through the first node (N1).

[0081] The third transistor (ST3) can be turned on by the first scan sensing signal of the first scan sensing line (GSL1) to electrically connect the second node (N2), which is the source electrode of the first transistor (ST1), and the sensing line (SL). By turning on the third transistor (ST3) based on the first scan sensing signal, it can supply an initialization voltage to the second node (N2). By turning on the third transistor (ST3) based on the first scan sensing signal, it can supply the voltage of the second node (N2) to the sensing line (SL). The gate electrode of the third transistor (ST3) can be connected to the first scan sensing line (GSL1), the drain electrode can be connected to the second node (N2), and the source electrode can be connected to the sensing line (SL). The drain electrode of the third transistor (ST3) can be connected to the source electrode of the first transistor (ST1), the second capacitor electrode of the first capacitor (C1), and the first electrode of the light-emitting element (ED) through the second node (N2).

[0082] The fourth transistor (ST4) can be turned on by the second scan sensing signal of the second scan sensing line (GSL2) to electrically connect the third node (N3), which is the second electrode of the light-emitting element (ED), and the sensing line (SL). By turning on the fourth transistor (ST4) based on the second scan sensing signal, the voltage of the third node (N3) can be supplied to the sensing line (SL). The gate electrode of the fourth transistor (ST4) can be connected to the second scan sensing line (GSL2), the drain electrode can be connected to the third node (N3), and the source electrode can be connected to the sensing line (SL). The drain electrode of the fourth transistor (ST4) can be connected to the second electrode of the light-emitting element (ED) and the low potential line (VSSL) through the third node (N3).

[0083] The drain electrode and source electrode of each of the first to fourth transistors (ST1, ST2, ST3, ST4) are not limited to the descriptions above and may be formed opposite to each other. For example, each of the first to fourth transistors (ST1, ST2, ST3, ST4) may be an N-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but is not limited thereto.

[0084] FIG. 5 is a timing diagram showing the signal and voltage of a display device according to one embodiment.

[0085] Referring to FIG. 5, a display driver (310) and a gate driver (350) can drive a plurality of pixels (SP) based on a vertical synchronization signal (Vsync). The vertical synchronization signal (Vsync) may have one low level and one high level during one frame period. The vertical synchronization signal (Vsync) may have a low level during a rest period (VBP) and a high level during an active period (ACT). A plurality of pixels (SP) may emit light during the active period (ACT). Pixels (SP) placed in some rows among the plurality of pixels (SP) may be sensed by the display driver (310) during the rest period (VBP), and pixels (SP) placed in other rows among the plurality of pixels (SP) may maintain the brightness they had during the previous active period (ACT) during the rest period (VBP).

[0086] The display driving unit (310) can receive first and second digital video data (DATA1, DATA2) from a graphics system. The display driving unit (310) can output a data voltage (Vdata) generated based on the first digital video data (DATA1) during a first frame period (FR1). The display driving unit (310) can output a data voltage (Vdata) generated based on the second digital video data (DATA2) during a second frame period (FR2).

[0087] The first period (t1) of the first and second frame periods (FR1, FR2) may be a data addressing period that supplies data voltage to a plurality of pixels (SP). The second period (t2) of the first and second frame periods (FR1, FR2) may be a blank period that does not supply data voltage to a plurality of pixels (SP).

[0088] The scan write signal (GW) may have a gate high level during the first period (t1), and the display driver (310) may supply a data voltage (Vdata) to the second transistor (ST2) of the pixel (SP). The first scan sensing signal (GS1) may have a gate high level during the first period (t1), and the display driver (310) may supply an initialization voltage to the third transistor (ST3) of the pixel (SP). The pixel (SP) may emit light having a brightness according to the data voltage (Vdata) during the second period (t2).

[0089] The second scan sensing signal (GS2) may have a gate low level during the first and second periods (t1, t2). The second scan sensing signal (GS2) may be supplied to sense the voltage of the third node (N3) of the pixels (SP) placed in some rows during the rest period (VBP).

[0090] FIG. 6 is a timing diagram showing the signal and voltage of some pixels during a rest period in a display device according to one embodiment.

[0091] Referring to FIG. 6, pixels (SP) placed in some rows among a plurality of pixels (SP) can be sensed by the display driver (310) during a rest period (VBP). Pixels (SP) placed in other rows among a plurality of pixels (SP) can maintain the brightness they had during the previous active period (ACT) during the rest period (VBP). The display driver (310) can sense the voltage of the second node (N2) and the third node (N3) during the rest period (VBP).

[0092] The pixel (SP) can receive a gate high-level scan write signal (GW) and a gate high-level first scan sensing signal (GS1) during the third period (t3) of the rest period (VBP). The data line (DL) can supply a data voltage (Vdata) corresponding to the sensing data (SDATA) to the pixel (SP) during the third period (t3). The second transistor (ST2) can be turned on during the third period (t3) to supply the data voltage (Vdata) to the first node (N1), which is the gate electrode of the first transistor (ST1). The third transistor (ST3) can be turned on during the third period (t3) to supply an initialization voltage to the second node (N2), which is the source electrode of the first transistor (ST1).

[0093] The pixel (SP) can receive a first scan sensing signal (GS1) at a gate high level during the fourth period (t4) of the rest period (VBP). The third transistor (ST3) can be turned on during the fourth period (t4) to supply the voltage of the second node (N2) to the sensing line (SL). Thus, the display driver (310) can sense the voltage of the second node (N2).

[0094] The pixel (SP) can receive a second scan sensing signal (GS2) at a gate high level during the fifth period (t5) of the rest period (VBP). The fourth transistor (ST4) can be turned on during the fifth period (t5) to supply the voltage of the third node (N3) to the sensing line (SL). Thus, the display driver (310) can sense the voltage of the third node (N3).

[0095] FIG. 7 is a plan view showing a plurality of light-emitting elements of a display device according to one embodiment, and FIG. 8 is a perspective view showing a light-emitting element of a display device according to one embodiment. FIG. 9 is a plan view showing an example of a current flowing through a plurality of light-emitting elements in a display device according to one embodiment, and FIG. 10 is a circuit diagram showing the display device of FIG. 9.

[0096] Referring to FIGS. 7 to 10, the pixel (SP) may include a first electrode (AE), a second electrode (CE), and a plurality of light-emitting elements (ED).

[0097] The first electrode (AE) may be a pixel electrode separated for each of the plurality of pixels (SP). The first electrode (AE) may include a first part (AE1) extending in a first direction (X-axis direction) and a second part (AE2) branched from the first part (AE1). The first part (AE1) of the first electrode (AE) may be electrically connected to a second node (N2) shown in FIG. 4.

[0098] The second part (AE2) of the first electrode (AE) may branch off from the first part (AE1) and extend in the opposite direction of the second direction (Y-axis direction). The second part (AE2) of the first electrode (AE) may be positioned between the second part (CE2) and the third part (CE3) of the second electrode (CE). The second part (AE2) of the first electrode (AE) may be positioned parallel to the second part (CE2) and the third part (CE3) of the second electrode (CE), and may be spaced apart from each other.

[0099] Each of the first electrodes (AE) of the plurality of pixels (SP) can receive different signals and can be driven independently. The first electrode (AE) can receive a driving current (Itot) from the pixel circuit of the pixel (SP), and the driving current (Itot) can be divided and flow to the plurality of light-emitting elements (ED). The plurality of light-emitting elements (ED) can emit light of a specific wavelength range and can have brightness proportional to the magnitude of the current.

[0100] The second electrode (CE) may include a first part (CE1) extending in a first direction (X-axis direction), a second part (CE2) branched from one side of the first part (CE1), and a third part (CE3) branched from the other side of the first part (CE1). The first part (CE1) of the second electrode (CE) may be electrically connected to the third node (N3) shown in FIG. 4.

[0101] The second part (CE2) of the second electrode (CE) may be branched from one side of the first part (CE1) and extended in the second direction (Y-axis direction). The third part (CE3) of the second electrode (CE) may be branched from the other side of the first part (CE1) and extended parallel to the second part (CE2) of the second electrode (CE).

[0102] A plurality of light-emitting elements (EDs) can be aligned by an electric field formed between the first and second electrodes (AE, CE). A plurality of light-emitting elements (EDs) can be aligned between the second part (AE2) of the first electrode (AE) and the second part (CE2) of the second electrode (CE), or between the second part (AE2) of the first electrode (AE) and the third part (CE3) of the second electrode (CE). A plurality of light-emitting elements (EDs) may share the first electrode (AE). Some of the light-emitting elements (EDs) may be arranged adjacently, some of the light-emitting elements (EDs) may be spaced apart at a certain distance, and some of the light-emitting elements (EDs) may be aligned in a specific direction with non-uniform density. For example, some light-emitting elements (ED) may be arranged along a first direction (X-axis direction), and other light-emitting elements (ED) may be arranged along a diagonal direction between the first direction (X-axis direction) and the second direction (Y-axis direction).

[0103] A plurality of light-emitting elements (EDs) may include an active layer having the same material and emit light of the same wavelength or light of the same color. A plurality of pixels (SPs) may emit light of the same color. For example, a plurality of light-emitting elements (EDs) may emit light having a peak wavelength in the range of 440 nm to 480 nm or blue light. Accordingly, the light-emitting element layer of the display device (10) may emit blue light. As another example, each of a plurality of pixels (SPs) may include a light-emitting element (ED) having a different active layer and emit light of a different color.

[0104] The light-emitting element (ED) may include a first semiconductor part (EDa), a second semiconductor part (EDb), an active layer (EDc), an electrode layer (EDd), and an insulating film (EDe).

[0105] The first semiconductor part (EDa) may be disposed on the active layer (EDc). The first semiconductor part (EDa) may be electrically connected to the first electrode (AE) through the electrode layer (EDd). For example, when the light-emitting element (ED) emits blue or green light, the first semiconductor part (EDa) may include a semiconductor material having the chemical formula AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the first semiconductor part (EDa) may include at least one semiconductor material among p-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The first semiconductor part (EDa) may be doped with a p-type dopant such as Mg, Zn, Ca, Se, or Ba. The first semiconductor part (EDa) may be p-GaN doped with p-type Mg. The length of the first semiconductor part (EDa) may be in the range of 0.05 μm to 0.10 μm, but is not limited thereto.

[0106] The second semiconductor part (EDb) may be electrically connected to the second electrode (CE). The second semiconductor part (EDb) may be an n-type semiconductor. For example, when the light-emitting element (ED) emits blue light, the second semiconductor part (EDb) may include a semiconductor material having the chemical formula AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). The second semiconductor part (EDb) may include at least one semiconductor material among n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The second semiconductor part (EDb) may be doped with an n-type dopant such as Si, Ge, or Sn. The second semiconductor part (EDb) may be n-GaN doped with n-type Si. The length of the second semiconductor part (EDb) may be in the range of 1.5 μm to 5 μm, but is not limited thereto.

[0107] Each of the first and second semiconductor parts (EDa, EDb) may be composed of a single layer, but is not limited thereto. For example, each of the first and second semiconductor parts (EDa, EDb) may have multiple layers, including a clad layer or a TSBR (Tensile Strain Barrier Reducing) layer.

[0108] An active layer (EDc) may be disposed between the first and second semiconductor parts (EDa, EDb). The active layer (EDc) may include a material having a single or multiple quantum well structure. If the active layer (EDc) includes a material having a multiple quantum well structure, a quantum layer and a well layer may be stacked alternately in multiple numbers. The active layer (EDc) may emit light through the coupling of electron-hole pairs according to an electrical signal applied through the first and second semiconductor parts (EDa, EDb). For example, if the active layer (EDc) includes a material such as AlGaN or AlGaInN, the active layer (EDc) may emit blue light. If the active layer (EDc) is a multiple quantum well structure in which quantum layers and well layers are stacked alternately, the quantum layer may include a material such as AlGaN or AlGaInN, and the well layer may include a material such as GaN or AlInN. The active layer (EDc) can emit blue light by including a quantum layer made of AlGaInN and a well layer made of AlInN.

[0109] As another example, the active layer (EDc) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, and may include Group 3 to Group 5 semiconductor materials depending on the wavelength range of the emitted light. The light emitted by the active layer (EDc) is not limited to blue light and may emit red or green light depending on the case. The length of the active layer (EDc) may have a range of 0.05 μm to 0.10 μm, but is not limited thereto.

[0110] The light emitted from the active layer (EDc) can be emitted along the length of the light-emitting element (ED) and also on both sides. The directionality of the light emitted from the active layer (EDc) may not be limited.

[0111] The electrode layer (EDd) may be an ohmic contact electrode. As another example, the electrode layer (EDd) may be a Schottky contact electrode. The light-emitting element (ED) may include at least one electrode layer (EDd). The electrode layer (EDd) may include a conductive metal. For example, the electrode layer (EDd) may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and ITZO (Indium Tin-Zinc Oxide). The electrode layer (EDd) may include an n-type or p-type doped semiconductor material.

[0112] The insulating film (EDe) can surround the outer surfaces of the first and second semiconductor parts (EDa, EDb), the active layer (EDc), and the electrode layer (EDd). The insulating film (EDe) can protect the light-emitting element (ED). For example, the insulating film (EDe) can surround the sides of the light-emitting element (ED) and expose both ends of the light-emitting element (ED) in the longitudinal direction.

[0113] The insulating film (EDe) may include materials having insulating properties, such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), aluminum nitride (AlN), aluminum oxide (Al2O3), etc. Accordingly, the insulating film (EDe) can prevent an electrical short circuit that may occur when the active layer (EDc) comes into direct contact with the electrode through which an electrical signal is transmitted to the light-emitting element (ED). In addition, the insulating film (EDe) can prevent a decrease in luminous efficiency by protecting the outer surface of the light-emitting element (ED), including the active layer (EDc).

[0114] The outer surface of the insulating film (EDe) can be surface-treated. When manufacturing the display panel (300), the light-emitting element (ED) can be sprayed onto the electrode in a dispersed state within a predetermined ink and aligned. By treating the surface of the insulating film (EDe) as hydrophobic or hydrophilic, the light-emitting element (ED) can remain dispersed within the ink without aggregating with adjacent light-emitting elements (ED).

[0115] The light-emitting element (ED) may include first to fourth light-emitting elements (ED1, ED2, ED3, ED4). The first semiconductor portion (EDa) of the first to third light-emitting elements (ED1, ED2, ED3) may be electrically connected to the first electrode (AE), and the second semiconductor portion (EDb) of the first to third light-emitting elements (ED1, ED2, ED3) may be electrically connected to the second electrode (CE). The first to third light-emitting elements (ED1, ED2, ED3) may be normally aligned between the first and second electrodes (AE, CE), and current may flow according to the potential difference between the second and third nodes (N2, N3).

[0116] A plurality of fourth light-emitting elements (ED4) may fail to align and thus no current may flow. In FIG. 9, the first semiconductor part (EDa) of the fourth light-emitting element (ED4) may be electrically connected to the second electrode (CE), and the second semiconductor part (EDb) of the fourth light-emitting element (ED4) may be electrically connected to the first electrode (AE), thereby causing the fourth light-emitting element (ED4) to fail to align, but is not limited thereto. In another example, the fourth light-emitting element (ED4) may fail to align by the first semiconductor part (EDa) being electrically insulated from the first electrode (AE) or the second semiconductor part (EDb) being electrically insulated from the second electrode (CE).

[0117] The driving current (Itot) can be divided and flow through the first to third light-emitting elements (ED1, ED2, ED3). The driving current (Itot) can be divided into the first to third currents (I1, I2, I3). The first current (I1) can flow through the first light-emitting element (ED1), the second current (I2) can flow through the second light-emitting element (ED2), and the third current (I3) can flow through the third light-emitting element (ED3). The magnitude of each of the first to third currents (I1, I2, I3) may vary depending on the current-voltage characteristics of each of the first to third light-emitting elements (ED1, ED2, ED3). The first to third currents (I1, I2, I3) can flow through the first to third light-emitting elements (ED1, ED2, ED3), and the first driving voltage (Vf1) can be applied between the second and third nodes (N2, N3). As the number of light-emitting elements (EDs) through which current can flow increases among the plurality of light-emitting elements (EDs), the magnitude of the current flowing through a single light-emitting element (ED) can decrease.

[0118] FIG. 11 is a plan view showing another example of current flowing through a plurality of light-emitting elements in a display device according to one embodiment, and FIG. 12 is a circuit diagram showing the display device of FIG. 11. The display device of FIG. 11 and FIG. 12 refers to the case in the display device of FIG. 9 and FIG. 10 where current does not flow through the second light-emitting element (ED2) for a predetermined reason as time passes.

[0119] Referring to FIGS. 11 and 12, the light-emitting element (ED) may include first to fourth light-emitting elements (ED1, ED2, ED3, ED4). Current may flow through the first and third light-emitting elements (ED1, ED3) depending on the potential difference between the second and third nodes (N2, N3). Current may not flow through the second light-emitting element (ED2) due to reasons such as degradation or exhaustion of its lifespan. Current may not flow through the plurality of fourth light-emitting elements (ED4) due to a failure in alignment.

[0120] The driving current (Itot) can be divided and flow through the first and third light-emitting elements (ED1, ED3). The driving current (Itot) can be divided into the first and third currents (I1, I3). The first current (I1) can flow through the first light-emitting element (ED1), and the third current (I3) can flow through the third light-emitting element (ED3). The magnitude of each of the first and third currents (I1, I3) may differ depending on the current-voltage characteristics of each of the first and third light-emitting elements (ED1, ED3). As the number of light-emitting elements (ED) through which current can flow decreases among the plurality of light-emitting elements (ED), the magnitude of the current flowing through a single light-emitting element (ED) may increase. The first and third currents (I1, I3) can flow through the first and third light-emitting elements (ED1, ED3), and the second driving voltage (Vf2) can be applied between the second and third nodes (N2, N3).

[0121] The magnitude of the driving current (Itot) in FIGS. 9 and 10 and the magnitude of the driving current (Itot) in FIGS. 11 and 12 may be the same. In FIGS. 9 and 10, the driving current (Itot) is divided into first to third currents (I1, I2, I3), but in FIGS. 11 and 12, the driving current (Itot) is divided into first and third currents (I1, I3), so the magnitude of each of the first and third currents (I1, I3) may increase. Accordingly, the magnitude of the second driving voltage (Vf2) in FIG. 12 may be greater than the magnitude of the first driving voltage (Vf1) in FIG. 10.

[0122] FIG. 13 is a flowchart illustrating the current compensation process of a display device according to one embodiment.

[0123] Referring to FIG. 13, the display driving unit (310) can sense pixels (SP) placed in some rows of a plurality of pixels (SP) during a rest period (VBP).

[0124] The display driver (310) can sense the voltage of the second node (N2) (step S110). The third transistor (ST3) can be turned on by receiving the first scan sensing signal (GS1) at the gate high level. The third transistor (ST3) can be turned on to supply the voltage of the second node (N2) to the sensing line (SL).

[0125] The display driver (310) can sense the voltage of the third node (N3) (step S120). The fourth transistor (ST4) can be turned on by receiving a second scan sensing signal (GS2) at the gate high level. The fourth transistor (ST4) can be turned on to supply the voltage of the third node (N3) to the sensing line (SL).

[0126] The display driving unit (310) can calculate the driving voltage by calculating the potential difference between the second and third nodes (N2, N3) (step S130).

[0127] In FIGS. 9 and 10, the display driving unit (310) can determine whether the first driving voltage (Vf1) exceeds the reference voltage (step S140). If the first driving voltage (Vf1) is less than or equal to the reference voltage, the current compensation process can be terminated, and the display driving unit (310) can drive the light-emitting element (ED) in the same way as before.

[0128] In FIGS. 11 and 12, the display driving unit (310) can determine whether the second driving voltage (Vf2) exceeds the reference voltage (step S140). Here, the second driving voltage (Vf2) exceeding the reference voltage means that a hot spot may occur or the degradation of the light-emitting element (ED) may be accelerated.

[0129] If the second driving voltage (Vf2) exceeds the reference voltage, the display driving unit (310) can determine compensation data based on the magnitude of the second driving voltage (Vf2) (step S150). For example, the display driving unit (310) can determine compensation data based on a pre-set lookup table, but is not limited thereto.

[0130] The display driving unit (310) can compensate the data voltage when the second driving voltage (Vf2) exceeds the reference voltage. The display driving unit (310) can generate a compensated data voltage by applying compensation data to digital video data (DATA) received from the graphics system. The display driving unit (310) can supply the compensated data voltage to the sensed pixel (SP) (step S160).

[0131] The display driving unit (310) can drive a plurality of light-emitting elements (ED) by supplying a compensated data voltage (step S170). The compensated data voltage may be lower than the data voltage before compensation, and the magnitude of the driving current (Itot) may be reduced. Accordingly, the magnitude of the first and third currents (I1, I3) flowing through the first and third light-emitting elements (ED1, ED3) may be reduced, and hot spots or degradation of the first and third light-emitting elements (ED1, ED3) may be prevented.

[0132] FIG. 14 is a circuit diagram showing a pixel of a display device according to another embodiment, and FIG. 15 is a timing diagram showing the signal and voltage of some pixels during a rest period in a display device according to another embodiment.

[0133] Referring to FIGS. 14 and 15, the display panel (300) may include a plurality of pixels (SP). Each of the plurality of pixels (SP) may be connected to a scan writing line (GWL), a first to kth scan sensing line (GSL1, GSL2, GSL3, ..., GSLk, where k is an integer greater than or equal to 4), a data line (DL), a sensing line (SL), a high potential line (VDDL), and a low potential line (VSSL).

[0134] The pixel (SP) may include the first to k+2 transistors (ST1, ST2, ST3, ST4, ST5, ..., STk+2), the first capacitor (C1), and a plurality of light-emitting elements (ED).

[0135] The first transistor (ST1) may include a gate electrode, a drain electrode, and a source electrode. The gate electrode of the first transistor (ST1) may be connected to a first node (N1), the drain electrode may be connected to a high potential line (VDDL), and the source electrode may be connected to a second node (N2). The first transistor (T1) may be a driving transistor that adjusts the current flowing from the high potential line (VDDL) to the light-emitting element (ED) according to the voltage difference between the gate electrode and the source electrode. The first transistor (ST1) may control the drain-source current (or driving current) based on the data voltage applied to the gate electrode.

[0136] A plurality of light-emitting elements (EDs) can receive a driving current and emit light. Some of the plurality of light-emitting elements (EDs) may be connected in parallel between the second and third nodes (N2, N3). Other parts of the plurality of light-emitting elements (EDs) may be connected in parallel between the third and fourth nodes (N3, N4). Yet another part of the plurality of light-emitting elements (EDs) may be connected in parallel between the k-th and k+1-th nodes (Nk, Nk+1). The amount of light emitted or the brightness of the light-emitting elements (EDs) may be proportional to the magnitude of the driving current.

[0137] The second transistor (ST2) can receive a gate high level scan write signal (GW) during the third period (t3) of the rest period (VBP). The second transistor (ST2) can be turned on during the third period (t3) to electrically connect the data line (DL) and the first node (N1), which is the gate electrode of the first transistor (ST1). The second transistor (ST2) can supply a data voltage (Vdata) corresponding to the sensing data (SDATA) to the first node (N1) during the third period (t3). The gate electrode of the second transistor (ST2) can be connected to the scan write line (GWL), the drain electrode can be connected to the data line (DL), and the source electrode can be connected to the first node (N1).

[0138] The third transistor (ST3) can receive a first scan sensing signal (GS1) at a gate high level during the third and fourth periods (t3, t4) of the rest period (VBP). The third transistor (ST3) can electrically connect the second node (N2), which is the source electrode of the first transistor (ST1), and the sensing line (SL) during the third and fourth periods (t3, t4). The third transistor (ST3) can supply an initialization voltage to the second node (N2) during the third period (t3). The third transistor (ST3) can supply the voltage of the second node (N2) to the sensing line (SL) during the fourth period (t4). The gate electrode of the third transistor (ST3) can be connected to the first scan sensing line (GSL1), the drain electrode can be connected to the second node (N2), and the source electrode can be connected to the sensing line (SL).

[0139] The fourth transistor (ST4) can receive a second scan sensing signal (GS2) at a gate high level during the fifth period (t5) of the rest period (VBP). The fourth transistor (ST4) can be turned on during the fifth period (t5) to electrically connect the third node (N3) and the sensing line (SL). The fourth transistor (ST4) can supply the voltage of the third node (N3) to the sensing line (SL) during the fifth period (t5). The gate electrode of the fourth transistor (ST4) can be connected to the second scan sensing line (GSL2), the drain electrode can be connected to the third node (N3), and the source electrode can be connected to the sensing line (SL).

[0140] The fifth transistor (ST5) can receive a third scan sensing signal (GS3) at a gate high level during the sixth period (t6) of the rest period (VBP). The fifth transistor (ST5) can be turned on during the sixth period (t6) to electrically connect the fourth node (N4) and the sensing line (SL). The fifth transistor (ST5) can supply the voltage of the fourth node (N4) to the sensing line (SL) during the sixth period (t6). The gate electrode of the fifth transistor (ST5) can be connected to the third scan sensing line (GSL3), the drain electrode can be connected to the fourth node (N4), and the source electrode can be connected to the sensing line (SL).

[0141] The k+2 transistor (STk+2) can receive the k-th scan sensing signal (GSk) at a gate high level during the k+3 period (tk+3) of the rest period (VBP). The k+2 transistor (STk+2) can be turned on during the k+3 period (tk+3) to electrically connect the k+1 node (Nk+1) and the sensing line (SL). The k+2 transistor (STk+2) can supply the voltage of the k+1 node (Nk+1) to the sensing line (SL) during the k+3 period (tk+3). The gate electrode of the k+2 transistor (STk+2) can be connected to the k-th scan sensing line (GSLk), the drain electrode can be connected to the k+1 node (Nk+1), and the source electrode can be connected to the sensing line (SL). The k+1 node (Nk+1) can be connected to the low-level line (VSSL).

[0142] FIG. 16 is a flowchart illustrating the current compensation process of a display device according to another embodiment.

[0143] Referring to FIG. 16, the display driving unit (310) can sense pixels (SP) placed in some rows of a plurality of pixels (SP) during a rest period (VBP).

[0144] The display driver (310) can sense the voltage of the second to k+1 nodes (N2, N3, N4, ..., Nk+1) (step S210). The third transistor (ST3) can be turned on by receiving the first scan sensing signal (GS1) at the gate high level and can supply the voltage of the second node (N2) to the sensing line (SL). The fourth transistor (ST4) can be turned on by receiving the second scan sensing signal (GS2) at the gate high level and can supply the voltage of the third node (N3) to the sensing line (SL). The fifth transistor (ST5) can be turned on by receiving the third scan sensing signal (GS3) at the gate high level and can supply the voltage of the fourth node (N4) to the sensing line (SL). The k+2 transistor (STk+2) can be turned on by receiving the k-th scan sensing signal (GSk) at the gate high level and can supply the voltage of the k+1 node (Nk+1) to the sensing line (SL).

[0145] The display driving unit (310) can calculate the first to k-1 driving voltages (Vf1, Vf2, ..., Vfk-1) by calculating the potential difference between the second to k+1 nodes (N2, N3, N4, ..., Nk+1) (step S220). The display driving unit (310) can calculate the first driving voltage (Vf1) by calculating the potential difference between the second and third nodes (N2, N3). The display driving unit (310) can calculate the second driving voltage (Vf2) by calculating the potential difference between the third and fourth nodes (N3, N4). The display driving unit (310) can calculate the k-1 driving voltage (Vfk-1) by calculating the potential difference between the k and k+1 nodes (Nk, Nk+1).

[0146] The display driving unit (310) can determine whether at least one of the first to k-1 driving voltages (Vf1, Vf2, ..., Vfk-1) exceeds a reference voltage (step S230). If at least one driving voltage is less than or equal to the reference voltage, the current compensation process can be terminated, and the display driving unit (310) can drive the light-emitting element (ED) in the same manner as before. Here, the driving voltage exceeding the reference voltage means that a hot spot may occur or the degradation of the light-emitting element (ED) may be accelerated.

[0147] When at least one of the first to k-1 driving voltages (Vf1, Vf2, ..., Vfk-1) exceeds a reference voltage, the display driving unit (310) can determine compensation data based on the magnitude of at least one driving voltage (step S240). For example, the display driving unit (310) can determine compensation data based on a pre-set lookup table, but is not limited thereto.

[0148] The display driving unit (310) can compensate the data voltage when at least one of the first to k-1 driving voltages (Vf1, Vf2, ..., Vfk-1) exceeds the reference voltage. The display driving unit (310) can generate a compensated data voltage by applying compensation data to digital video data (DATA) received from a graphics system. The display driving unit (310) can supply the compensated data voltage to a sensed pixel (SP) (step S250).

[0149] The display driving unit (310) can drive a plurality of light-emitting elements (ED) by supplying a compensated data voltage (step S260). The compensated data voltage may be lower than the previous data voltage, and the magnitude of the driving current (Itot) may be reduced. Accordingly, the magnitude of the current flowing through at least one light-emitting element (ED) may be reduced, and a hot spot or degradation of the light-emitting element (ED) may be prevented.

[0150] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0151] 10: Display device 100: Cover window 300: Display panel 600: Bracket 700: Main circuit board 900: Bottom cover SP: Pixel C1: First capacitor DL: Data line SL: Sensing line VDDL: High potential line VSSL: Low potential line GWL: Scan entry line GSL1~GSLk: 1st to kth scan sensing lines ST1~STk+2: 1st to k+2nd transistors N1~Nk+1: 1st to k+1th nodes ED: Multiple light-emitting elements

Claims

Claim 1 A plurality of pixels arranged along a plurality of rows and columns; and a display driving unit for driving the plurality of pixels, wherein each of the plurality of pixels comprises: a plurality of light-emitting elements; a first transistor that supplies a driving current to the plurality of light-emitting elements; a second transistor that supplies a data voltage to a first node which is the gate electrode of the first transistor; and a third transistor that electrically connects a second node which is the first electrode of the plurality of light-emitting elements and a sensing line. and includes a third node, which is a second electrode of the plurality of light-emitting elements, and a fourth transistor that electrically connects the sensing line; the display driving unit senses the voltages of the second node and the third node to calculate a driving voltage across the plurality of light-emitting elements, and compensates the data voltage when the driving voltage exceeds a reference voltage; during a first period of resting time in which a vertical synchronization signal has a low level and a second period after the first period, the third transistor is turned on and the fourth transistor is turned off to sense the voltage of the second node through the sensing line, and during a third period after the second period of resting time, the fourth transistor is turned on and the third transistor is turned off to sense the voltage of the third node through the sensing line; the display driving unit calculates the driving voltage of pixels placed in some rows among the plurality of pixels during the resting period, and the second transistor receives a gate high level scan write signal during the first period of resting time, and the third A display device in which a transistor receives a first scan sensing signal of a gate high level during the first and second periods of the rest period, and a fourth transistor receives a second scan sensing signal of a gate high level during the third period of the rest period. Claim 2 In claim 1, the display driving unit determines compensation data based on a preset lookup table when the driving voltage exceeds a reference voltage. Claim 3 In claim 2, the display driving unit can receive digital video data and generate the data voltage, and the display driving unit can apply the compensation data to the digital video data to generate the compensated data voltage. Claim 4 In claim 3, the above-mentioned compensated data voltage is lower than the data voltage before compensation in the display device. Claim 5 A display device according to claim 1, wherein the plurality of light-emitting elements are connected in parallel between the second node and the third node, and the magnitude of the current flowing through one light-emitting element increases as the number of light-emitting elements capable of flowing current among the plurality of light-emitting elements decreases. Claim 6 delete Claim 7 delete Claim 8 A display device according to claim 1, wherein each of the plurality of light-emitting elements has a first electrode extending in a first direction; and a second electrode branched from the first portion and extending in a second direction intersecting the first direction, and each of the plurality of light-emitting elements has a second electrode extending in the first direction; a second portion branched from one side of the first portion and extending to one side of the second portion of the first electrode; and a third portion branched from the other side of the first portion and extending to the other side of the second portion of the first electrode. Claim 9 In claim 8, the plurality of light-emitting elements comprises: a first semiconductor layer comprising at least one semiconductor material doped in a p-type; and a second semiconductor layer comprising at least one semiconductor material doped in an n-type, wherein the first semiconductor layer is electrically connected to a second portion of the first electrode, and the second semiconductor layer is electrically connected to a second portion and a third portion of the second electrode. Claim 10 In claim 8, the driving current is supplied to the second part of the first electrode and divided among the plurality of light-emitting elements to flow to the second part and the third part of the second electrode. Claim 11 A display device comprising: a plurality of pixels arranged along a plurality of rows and columns; and a display driving unit for driving the plurality of pixels, wherein each of the plurality of pixels comprises: a plurality of light-emitting elements; a first transistor that supplies a driving current to the plurality of light-emitting elements; a second transistor that supplies a data voltage to a first node which is the gate electrode of the first transistor; a third transistor that electrically connects a second node which is the source electrode of the first transistor and a sensing line; a fourth transistor that electrically connects a third node which is serially connected to the second node and the sensing line; and a fifth transistor that electrically connects a fourth node which is serially connected to the third node and the sensing line, wherein the display driving unit senses the voltages of the second to fourth nodes, calculates a first driving voltage between the second and third nodes and calculates a second driving voltage between the third and fourth nodes, thereby compensating the data voltage when at least one of the first and second driving voltages exceeds a reference voltage. Claim 12 In claim 11, the display driving unit determines compensation data based on a preset lookup table when at least one of the first and second driving voltages exceeds a reference voltage. Claim 13 In claim 12, the display driving unit can receive digital video data and generate the data voltage, and the display driving unit can apply the compensation data to the digital video data to generate the compensated data voltage. Claim 14 In claim 13, the display device wherein the compensated data voltage is lower than the data voltage before compensation. Claim 15 A display device according to claim 11, wherein some of the plurality of light-emitting elements are connected in parallel between the second and third nodes, and other parts of the plurality of light-emitting elements are connected in parallel between the third and fourth nodes, and the magnitude of the current flowing through one light-emitting element increases as the number of light-emitting elements capable of flowing current among the plurality of light-emitting elements decreases. Claim 16 A display device according to claim 11, wherein the display driving unit drives the plurality of pixels based on a vertical synchronization signal having a low level and a high level during a frame period, and the display driving unit calculates first and second driving voltages of pixels arranged in some rows among the plurality of pixels during a rest period when the vertical synchronization signal has a low level. Claim 17 A display device according to claim 16, wherein the second transistor receives a gate high level scan writing signal during the first period of the rest period, the third transistor receives a gate high level first scan sensing signal during the first period of the rest period and the second period after the first period, the fourth transistor receives a gate high level second scan sensing signal during the third period after the second period of the rest period, and the fifth transistor receives a gate high level third scan sensing signal during the fourth period after the third period of the rest period. Claim 18 A display device according to claim 11, wherein each of the plurality of light-emitting elements has a first electrode extending in a first direction; and a second electrode branched from the first portion and extending in a second direction intersecting the first direction, and each of the plurality of light-emitting elements has a second electrode extending in the first direction; a second portion branched from one side of the first portion and extending to one side of the second portion of the first electrode; and a third portion branched from the other side of the first portion and extending to the other side of the second portion of the first electrode. Claim 19 In claim 18, the plurality of light-emitting elements comprises: a first semiconductor layer comprising at least one semiconductor material doped in a p-type; and a second semiconductor layer comprising at least one semiconductor material doped in an n-type, wherein the first semiconductor layer is electrically connected to a second portion of the first electrode, and the second semiconductor layer is electrically connected to a second portion and a third portion of the second electrode. Claim 20 In claim 18, the driving current is supplied to the second part of the first electrode and divided among the plurality of light-emitting elements to flow to the second part and the third part of the second electrode.

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