Display device and method of manufacturing the same

Abstract

A display device is provided. The display device comprises a base substrate, a conductive connection layer disposed on the base substrate, a partition disposed on the conductive connection layer, and a light-emitting element disposed on the conductive connection layer and disposed within a space enclosed by the partition in a planar manner. The conductive connection layer includes a first region that overlaps with the partition or the light-emitting element, and a second region that does not overlap with the partition and the light-emitting element, wherein the electrical conductivity of the first region is greater than the electrical conductivity of the second region.

Description

Technology Field

[0001] The present invention relates to a display device and a method for manufacturing a display device. Background Technology

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms. The display device may be a flat panel display device such as a Liquid Crystal Display, a Field Emission Display, or a Light Emitting Display. The light emitting display device may include an organic light emitting display device comprising an organic light emitting diode element as a light emitting element, an inorganic light emitting display device comprising an inorganic semiconductor element as a light emitting element, or a micro light emitting diode element (or micro light emitting diode element) as a light emitting element.

[0003] Recently, head-mounted displays (HMDs) including light-emitting display devices are being developed. A Head Mounted Display (HMD) is a glasses-type monitor device for Virtual Reality (VR) or Augmented Reality that is worn in the form of glasses or a helmet, with the focus formed close to the user's eyes.

[0004] A high-resolution ultra-small light-emitting diode display panel including ultra-small light-emitting diode elements is applied to the head-mounted display. The ultra-small light-emitting diode display panel may include a semiconductor circuit board, a light-emitting element layer, and a conductive connection layer disposed between the semiconductor circuit board and the light-emitting element layer. The problem to be solved

[0005] The problem that the present invention aims to solve is to provide a display panel that does not require etching of the conductive connection layer.

[0006] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0007] A display device according to one embodiment for solving the above problem comprises a base substrate, a conductive connection layer disposed on the base substrate, a partition disposed on the conductive connection layer, and a light-emitting element disposed on the conductive connection layer and disposed within a space enclosed by the partition in a planar manner, wherein the conductive connection layer includes a first region that overlaps with the partition or the light-emitting element, and a second region that does not overlap with the partition and the light-emitting element, and the electrical conductivity of the first region is greater than the electrical conductivity of the second region.

[0008] The device further includes a pixel electrode disposed between the base substrate and the light-emitting element, and a common electrode disposed on the light-emitting element and the conductive connection layer, wherein the pixel electrode is disposed in the first region, the common electrode is disposed across the first region and the second region, and the light-emitting element may be disposed between the pixel electrode and the common electrode.

[0009] The above common electrode can be in direct contact with the second region of the conductive connection layer.

[0010] The above common electrode can be in direct contact with the side of the above partition.

[0011] The first region overlapping with the light-emitting element may be placed in a space enclosed by the second region on a plane.

[0012] The second area above may be placed in a space surrounded by the first area that overlaps with the bulkhead.

[0013] The first region and the second region overlapping with the light-emitting element are each provided in multiple numbers, and the first region overlapping with the partition wall may be provided as a single unit.

[0014] The above conductive connection layer may include ITO (Indium Tin Oxide).

[0015] The oxygen content of the first region above may be smaller than the oxygen content of the second region above.

[0016] The surface roughness of the first region may be greater than the surface roughness of the second region.

[0017] The light-emitting element and the partition wall may include the same material.

[0018] The first region above is a conductive region, and the second region above may be a non-conductive region.

[0019] The wavelength conversion layer disposed on the light-emitting element is further included, wherein the wavelength conversion layer can fill the space surrounded by the partition wall.

[0020] A display device according to one embodiment for solving the above problem comprises a base substrate, a conductive connection layer disposed on the base substrate and including a first region and a second region surrounding the first region in a planar manner, and a light-emitting element disposed on the first region of the conductive connection layer, wherein the electrical resistance of the first region of the conductive connection layer is smaller than the electrical resistance of the second region of the conductive connection layer.

[0021] The device further includes a pixel electrode disposed between the base substrate and the light-emitting element, and a common electrode disposed on the light-emitting element and the conductive connection layer, wherein the pixel electrode is disposed in the first region, the common electrode is disposed across the first region and the second region, and the light-emitting element may be disposed between the pixel electrode and the common electrode.

[0022] The above common electrode can be in direct contact with the second region of the conductive connection layer.

[0023] The above conductive connection layer may include ITO (Indium Tin Oxide).

[0024] The oxygen content of the first region above may be smaller than the oxygen content of the second region above.

[0025] The surface roughness of the first region may be greater than the surface roughness of the second region.

[0026] A method for manufacturing a display device according to one embodiment for solving the above problem comprises the steps of: preparing a base substrate, a conductive connection layer disposed on the base substrate, and a light-emitting element disposed on the conductive connection layer; and treating the conductive connection layer with oxygen plasma to form a first region and a second region of the conductive connection layer having different electrical conductivity, wherein the first region overlaps with the light-emitting element and the second region does not overlap with the light-emitting element, and the electrical conductivity of the first region is greater than the electrical conductivity of the second region.

[0027] Specific details of other embodiments are included in the detailed description and drawings. Effects of the invention

[0028] According to a display device of one embodiment, etching of the conductive connection layer of the display panel is unnecessary. Accordingly, defects caused by by-products generated by etching in the display panel can be suppressed or prevented, and defects such as a reduction in the thickness of the barrier due to etching can be suppressed or prevented.

[0029] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0030] FIG. 1 is a plan view of a display device according to one embodiment. Figure 2 is an enlarged view showing area A of Figure 1 in detail. Figure 3 is an enlarged view of area B of Figure 2. Figure 4 is a cross-sectional view taken along IV-IV' of Figure 3. Figure 5 is an enlarged cross-sectional view showing one light-emitting element of Figure 4 in detail. Figure 6 is an enlarged cross-sectional view showing the bulkhead of Figure 4 in detail. FIGS. 7 to 17 are cross-sectional views illustrating a method for manufacturing a display device according to one embodiment. FIG. 18 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment. FIG. 19 is an exemplary drawing showing a smart device including a display device according to one embodiment. FIG. 20 is an exemplary drawing showing an automobile instrument panel and center fascia including a display device according to one embodiment. FIG. 21 is an exemplary drawing showing a transparent display device including a display device according to one embodiment. FIG. 22 is a cross-sectional view of a display device according to another embodiment. Specific details for implementing the invention

[0031] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0032] When elements or layers are referred to as being on another element or layer, this includes cases where another layer or element is interposed directly on or in the middle of another element. Throughout the specification, the same reference numerals refer to the same components.

[0033] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0034] Specific embodiments will be described below with reference to the attached drawings.

[0035] FIG. 1 is a plan view of a display device according to one embodiment. FIG. 2 is an enlarged view showing area A of FIG. 1 in detail. FIG. 3 is an enlarged view of area B of FIG. 2.

[0036] In FIGS. 1 to 3, the first direction (DR1) refers to the horizontal direction of the display panel (100), the second direction (DR2) refers to the vertical direction of the display panel (100), and the third direction (DR3) refers to the thickness direction of the display panel (100) or the thickness direction of the semiconductor circuit board (110). In this case, "left," "right," "up," and "down" indicate the direction when viewing the display panel (100) from a flat plane. For example, "right" indicates one side of the first direction (DR1), "left" indicates the other side of the first direction (DR1), "up" indicates one side of the second direction (DR2), and "down" indicates the other side of the second direction (DR2). Additionally, "up" indicates one side of the third direction (DR3), and "down" indicates the other side of the third direction (DR3).

[0037] Referring to FIGS. 1 to 3, the display device (10) is a device for displaying video or still images, and the display device (10) can be used as a display screen for various products such as televisions, laptops, monitors, billboards, the Internet of Things, and head-mounted displays, as well as portable electronic devices such as mobile phones, smartphones, tablet PCs (Personal Computers), smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-books, PMPs (Portable Multimedia Players), navigation systems, and UMPCs (Ultra Mobile PCs). However, the products to which the display device (10) can be applied are not limited thereto.

[0038] A display device (10) according to one embodiment may be formed in a substantially rectangular shape on a plane. The display device (10) may be a rectangle with vertical corners on a plane. However, it is not limited thereto, and the display device (10) may be a rectangular shape with rounded corners on a plane.

[0039] The display device (10) is described primarily as a micro-light-emitting diode display device (or micro-light-emitting diode display device) including a micro-light-emitting diode (or micro-light-emitting diode) as a light-emitting element, but the embodiments of the present specification are not limited thereto.

[0040] The display device (10) is described primarily as an LEDoS (Light Emitting Diode on Silicon) having light-emitting diode elements arranged on a semiconductor circuit board (110, see FIG. 4) formed using a semiconductor process, but the embodiments of the present specification are not limited thereto.

[0041] The display device (10) may include a display panel (100). The display panel (100) may have a rectangular planar shape having a long side in the first direction (DR1) and a short side in the second direction (DR2). However, the planar shape of the display panel (100) is not limited thereto and may have a polygonal, circular, elliptical, or irregular planar shape other than a rectangle.

[0042] The display panel (100) may include a display area (DA) where an image is displayed and a non-display area (NDA) where an image is not displayed. The planar shape of the display area (DA) may correspond to the planar shape of the display panel (100). The planar shape of the display area (DA) may include a rectangular shape, but is not limited thereto. The display area (DA) may be placed in the central area of ​​the display panel (100). The non-display area (NDA) may be placed around the display area (DA). The non-display area (NDA) may be placed to surround the display area (DA).

[0043] A plurality of pixels (PX) may be arranged within a display area (DA). A pixel (PX) may be defined as a minimum light-emitting unit capable of displaying white light. Each of the plurality of pixels (PX) may include a plurality of light-emitting regions (EA1, EA2, EA3) that emit light. In the embodiments of this specification, each of the plurality of pixels (PX) is exemplified as including three light-emitting regions (EA1, EA2, EA3), but is not limited thereto. For example, each of the plurality of pixels (PX) may include three light-emitting regions.

[0044] Each of the plurality of light-emitting regions (EA1, EA2, EA3) may include a light-emitting element (LE) that emits a first light. Although the light-emitting element (LE) has been exemplified as having a rectangular planar shape, the embodiments of this specification are not limited thereto. For example, the light-emitting element (LE) may have a polygonal, circular, elliptical, or irregular shape other than a rectangle.

[0045] Each of the first light-emitting regions (EA1) indicates a region that emits the first light. Each of the first light-emitting regions (EA1) may output the first light output from the light-emitting element (LE) as is. The first light may be light in the blue wavelength band. The blue wavelength band may be approximately 370 nm to 460 nm, but the embodiments of the present specification are not limited thereto.

[0046] Each of the second light-emitting regions (EA2) indicates a region that emits second light. Each of the second light-emitting regions (EA2) can convert a portion of the first light output from the light-emitting element (LE) into second light and output it. The second light may be light in the green wavelength band. The green wavelength band may be approximately 480 nm to 560 nm, but the embodiments of this specification are not limited thereto.

[0047] Each of the third light-emitting regions (EA3) indicates a region that emits third light. Each of the third light-emitting regions (EA2) can convert a portion of the first light output from the light-emitting element (LE) into third light and output it. The third light may be light in the red wavelength band. The red wavelength band may be approximately 600 nm to 750 nm, but the embodiments of this specification are not limited thereto.

[0048] The first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting regions (EA3) may be arranged alternately and repeatedly along the first direction (DR1). For example, the first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting regions (EA3) may be arranged in the order of the first light-emitting region (EA1), the second light-emitting region (EA2), and the third light-emitting region (EA3) in the first direction (DR1).

[0049] The first light-emitting regions (EA1) can be arranged in a second direction (DR2). The second light-emitting regions (EA2) can be arranged in a second direction (DR2). The third light-emitting regions (EA3) can be arranged in a second direction (DR2).

[0050] Multiple light-emitting regions (EA1, EA2, EA3) may be partitioned by a partition (PW). The partition (PW) may be positioned to surround the light-emitting element (LE). The partition (PW) may be positioned apart from the light-emitting element (LE). The partition (PW) may have a planar shape in the form of a mesh, a net, or a grid.

[0051] A plurality of light-emitting regions (EA1, EA2, EA3) may be defined by a partition (PW). Although each of the plurality of light-emitting regions (EA1, EA2, EA3) has been exemplified as having a rectangular planar shape, the embodiments of this specification are not limited thereto. For example, each of the plurality of light-emitting regions (EA1, EA2, EA3) may have a polygonal, circular, elliptical, or irregular shape other than a rectangle.

[0052] The non-display area (NDA) may include a first pad section (PDA1) and a second pad section (PDA2). The first pad section (PDA1) may be positioned on the upper side of the display panel (100). The first pad section (PDA1) may include first pads (PD1) connected to an external circuit board. The second pad section (PDA2) may be positioned on the lower side of the semiconductor circuit board (110). The second pad section (PDA2) may include second pads for connecting to an external circuit board. The second pad section (PDA2) may be omitted.

[0053] FIG. 4 is a cross-sectional view taken along IV-IV' of FIG. 3. FIG. 5 is an enlarged cross-sectional view showing one light-emitting element of FIG. 4 in detail. FIG. 6 is an enlarged cross-sectional view showing one partition wall of FIG. 4 in detail.

[0054] Referring to FIGS. 4 to 6, the display panel (100) may include a semiconductor circuit board (110), a light-emitting element layer (120), and a conductive connection layer (130) disposed between the semiconductor circuit board (110) and the light-emitting element layer (120).

[0055] The semiconductor circuit board (110) may include a base board (SUB), a plurality of pixel circuit sections (PXC), a plurality of pixel electrodes (111), and a first insulating film (INS1).

[0056] The base substrate (SUB) may be a silicon wafer substrate formed using a semiconductor process. The base substrate (SUB) may support other components placed on top of it.

[0057] Pixel circuits (PXCs) can be formed using a semiconductor process. Multiple pixel circuits (PXCs) can be placed in a display area (DA). The pixel circuits (PXCs) may be placed within a base substrate (SUB) and may not protrude from the base substrate (SUB), but are not limited thereto. Each of the multiple pixel circuits (PXCs) can be connected to a corresponding pixel electrode (111). That is, the multiple pixel circuits (PXCs) and the multiple pixel electrodes (111) can be connected in a one-to-one correspondence. Each of the multiple pixel circuits (PXCs) can overlap with a light-emitting element (LE) in a third direction (DR3).

[0058] Each of the plurality of pixel circuits (PXCs) may include at least one transistor formed by a semiconductor process. Additionally, each of the plurality of pixel circuits (PXCs) may further include at least one capacitor formed by a semiconductor process. Each of the plurality of pixel circuits (PXCs) may apply a pixel voltage or an anode voltage to a pixel electrode (111).

[0059] Each of the pixel electrodes (111) may be disposed on a corresponding pixel circuit (PXC). Each of the pixel electrodes (111) may be an exposed electrode exposed from the pixel circuit (PXC). That is, each of the pixel electrodes (111) may protrude from the upper surface of the pixel circuit (PXC). Each of the pixel electrodes (111) may be formed integrally with the pixel circuit (PXC). Each of the pixel electrodes (111) may receive a pixel voltage or an anode voltage from the pixel circuit (PXC). The pixel electrodes (111) may be formed of aluminum (Al).

[0060] The first insulating film (INS1) may be disposed on a base substrate (SUB). The first insulating film (INS1) may not overlap with the pixel circuit portion (PXC) and the pixel electrode (111). The first insulating film (INS1) may be disposed on the base substrate (SUB) in an area where the pixel electrode (111) is not disposed. The pixel electrode (111) may be disposed across the entire area where the pixel electrode (111) is not disposed. The upper surface of the first insulating film (INS1) and the upper surface of the pixel electrode (111) may be located substantially on the same plane. The first insulating film (INS1) may be a silicon oxide film (SiO2), an aluminum oxide film (Al2O3), or a hafnium oxide film (HfO2). x It can be formed into an inorganic membrane such as ).

[0061] The conductive connection layer (130) is disposed on the pixel electrode (111) and the first insulating film (INS1) and can be disposed over the entire area of ​​the base substrate (SUB). The conductive connection layer (130) can contact and be electrically connected to the pixel electrode (111), the common electrode (CE), and the light-emitting element (LE), respectively, in different areas. The pixel electrode (111) and the light-emitting element (LE) can be electrically connected by the conductive connection layer (130).

[0062] The conductive connection layer (130) may include a first region (CA) and a second region (NCA) having different electrical conductivity. The first region (CA) may have greater electrical conductivity than the second region (NCA). The first region (CA) may have less electrical resistance than the second region (NCA). The second region (NCA) may have more than several mega ohms (Ω). The first region (CA) is a conductive region, and the second region (NCA) may be substantially a non-conductive region. Hereinafter, the first region is referred to as the conductive region (CA) and the second region as the non-conductive region (NCA).

[0063] The conductive region (CA) may overlap with the light-emitting element (LE) and the barrier (PW) in the thickness direction (third direction (DR3)). Additionally, the conductive region (CA) may overlap with the pixel electrode (111). The conductive region (CA) may be in direct contact with the pixel electrode (111), the light-emitting element (LE), and the first barrier (PW1) of the barrier (PW). The pixel electrode (111) and the light-emitting element (LE) may be electrically connected to each other through the conductive region (CA) of the conductive connection layer (130). The conductive region (CA) is provided in multiple numbers, and each of the multiple conductive regions (CA) may be separated and spaced apart from each other. The conductive region (CA) may include a planar island shape. The conductive region (CA) may be separated by a non-conductive region (NCA). Each of the multiple conductive regions (CA) may be electrically insulated from each other by the non-conductive region (NCA).

[0064] The non-conductive region (NCA) may not overlap with the light-emitting element (LE) and the barrier (PW). The non-conductive region (NCA) may be in direct contact with the common electrode (CE). Even if the non-conductive region (NCA) is in contact with the common electrode (CE), the non-conductive region (NCA) has low electrical conductivity, so the common electrode (CE) and the conductive region (CA) can be electrically insulated from each other. The non-conductive region (NCA) may surround each of a plurality of planar conductive regions (CA). The non-conductive region (NCA) may surround a planar light-emitting element (LE). Multiple non-conductive regions (NCA) are provided, and the plurality of non-conductive regions (NCA) may be separated by conductive regions (CA).

[0065] A non-conductive region (NCA) may be surrounded by a conductive region (CA). In other words, a planar non-conductive region (NCA) may surround a conductive region (CA) in which a light-emitting element (LE) is placed, and may be surrounded by a conductive region (CA) in which a barrier (PW) is placed. A conductive region (CA) in which a light-emitting element (LE) is placed may be placed in an area surrounded by a planar non-conductive region (NCA), and a non-conductive region (NCA) and a conductive region (CA) in which a light-emitting element (LE) is placed may be placed in an area surrounded by a conductive region (CA) in which a barrier (PW) is placed. In this case, the conductive region (CA) in which the barrier (PW) is placed may be formed integrally over the entire area, but is not limited thereto.

[0066] The conductive connecting layer (130) may include a material whose electrical conductivity changes depending on the oxygen (Oxide, O) content. The conductive connecting layer (130) may include a material whose electrical conductivity decreases as the oxygen (Oxide, O) content increases. For example, the conductive connecting layer (130) may include ITO (Indium Tin Oxide). However, it is not limited thereto, and the conductive connecting layer (130) may include indium oxide (InO x It may also include ). In this specification, the conductive connection layer (130) is ITO (Indium Tin Oxide) and indium oxide (InO x It is described as including at least one of the following, but is not limited thereto, and the conductive connecting layer (130) may include at least one selected from a material whose electrical conductivity changes depending on the oxygen (Oxide, O) content.

[0067] The oxygen content of the conductive region (CA) may be lower than the oxygen content of the non-conductive region (NCA). As will be described later, the non-conductive region (NCA) may have a higher oxygen content than the conductive region (CA) due to oxygen plasma (O2 plasma). For example, the oxygen content of the conductive region (CA) may be in the range of 40 at% (atomic percent) or more and less than 47 at%, and the oxygen content of the non-conductive region (NCA) may be in the range of 47 at% or more and less than 55 at%, but is not limited thereto. The above oxygen content may be obtained by analysis using X-ray photoelectron spectroscopy (XPS), but is not limited thereto.

[0068] The surface roughness of the conductive region (CA) may be greater than the surface roughness of the non-conductive region (NCA). Although not limited thereto, the surface roughness of the conductive region (CA) may be within the range of 0.9 nm to 0.85 nm or 0.864 nm. The surface roughness of the non-conductive region (NCA) may be within the range of 0.85 nm to 0.70 nm or 0.821 nm or 0.805 nm. The surface roughness may be measured by atomic force microscopy (AFM) analysis, but is not limited thereto. Additionally, the measured surface roughness value may be a root mean square (RMS) value. The RMS value is the average of the absolute values ​​of the heights on both sides of the centerline, represented as the root mean square of the average value of the surface roughness curve.

[0069] When the conductive connection layer (130) includes ITO (Indium Tin Oxide), the thickness of the conductive connection layer (130) may be, for example, within the range of 50 nm to 300 nm, within the range of 100 nm to 200 nm, or 150 nm, but is not limited thereto. As will be described later, when the conductive connection layer (130) includes ITO (Indium Tin Oxide), a first sub-substrate (SB1, see FIG. 7) and a second sub-substrate (SB2, see FIG. 7), which are separated from each other by the conductive connection layer (130), may be bonded together, and the thickness of the conductive connection layer (130) may be within the above range. Accordingly, when the conductive connection layer (130) includes ITO (Indium Tin Oxide), the thickness of the display device (10, see FIG. 1) may be reduced, and the weight of the display device (10, see FIG. 1) may be reduced.

[0070] Since the electrical conductivity of the conductive connection layer (130) can vary depending on the oxygen content, a separate etching process for the conductive connection layer (130) may be unnecessary. Therefore, the conductive connection layer (130) may not include a step, and other components placed on top of the conductive connection layer (130) can be formed more easily. For example, when the conductive connection layer (130) is etched, defects such as residual by-products after etching or a decrease in the thickness of the barrier (PW) during the etching process of the conductive connection layer (130) may occur. However, if the electrical conductivity of each region is controlled by adjusting the oxygen content of the conductive connection layer (130), etching of the conductive connection layer (130) is unnecessary, and the occurrence of the aforementioned defects can be suppressed or prevented.

[0071] The light-emitting element layer (120) is disposed on the conductive connection layer (130). The light-emitting element layer (120) may include light-emitting elements (LE), a barrier (PW), a second insulating film (INS2), a common electrode (CE), a reflective film (RF), a protective film (PTF), a wavelength conversion layer (QDL), and a plurality of color filters (CF1, CF2, CF3).

[0072] The light-emitting element layer (120) may include first light-emitting regions (EA1), second light-emitting regions (EA2), and third light-emitting regions (EA3) partitioned by a partition wall (PW). In each of the first light-emitting regions (EA1), second light-emitting regions (EA2), and third light-emitting regions (EA3), any one of a light-emitting element (LE), a wavelength conversion layer (QDL), and a plurality of color filters (CF1, CF2, CF3) may be disposed.

[0073] A light-emitting element (LE) may be disposed on a conductive connection layer (130) in each of the first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting regions (EA3). The light-emitting element (LE) may be a vertical light-emitting diode element extending in a third direction (DR3). That is, the length of the light-emitting element (LE) in the third direction (DR3) may be longer than the length in the horizontal direction.

[0074] The light-emitting element (LE) may be a micro light-emitting diode. The light-emitting element (LE) includes a first semiconductor layer (SEM1), an electron blocking layer (EBL), an active layer (MQW), a superlattice layer (SLT), and a second semiconductor layer (SEM2) in the third direction (DR3). The first semiconductor layer (SEM1), the electron blocking layer (EBL), the active layer (MQW), the superlattice layer (SLT), and the second semiconductor layer (SEM2) may be stacked sequentially in the third direction (DR3).

[0075] A first semiconductor layer (SEM1) may be disposed on a conductive connection layer (130). The first semiconductor layer (SEM1) may be doped with a first conductive type dopant such as Mg, Zn, Ca, Se, Ba, etc. For example, the first semiconductor layer (31) may be p-GaN doped with p-type Mg.

[0076] An electron blocking layer (EBL) may be placed on the first semiconductor layer (SEM1). The electron blocking layer (EBL) may be a layer for suppressing or preventing too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer (EBL) may be p-AlGaN doped with p-type Mg. The electron blocking layer (EBL) may be omitted.

[0077] The active layer (MQW) can be placed on the electron blocking layer (EBL). The active layer (MQW) can emit light by the coupling of electron-hole pairs according to an electrical signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2). The active layer (MQW) can emit first light, i.e., light in the blue wavelength band, having a central wavelength band in the range of 450 nm to 495 nm.

[0078] The active layer (MQW) may include a material having a single or multiple quantum well structure. If the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately stacked. In this case, the well layers may be formed of InGaN, and the barrier layers may be formed of GaN or AlGaN, but are not limited thereto.

[0079] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, or it may include different Group 3 to Group 5 semiconductor materials depending on the wavelength range of the emitted light. The light emitted by the active layer (MQW) is not limited to the first light (light in the blue wavelength band) and may, in some cases, emit a second light (light in the green wavelength band) or a third light (light in the red wavelength band).

[0080] A superlattice layer (SLT) may be disposed on the active layer (MQW). The superlattice layer (SLT) may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer (SLT) may be formed of InGaN or GaN. The superlattice layer (SLT) may be omitted.

[0081] The second semiconductor layer (SEM2) may be disposed on the superlattice layer (SLT). The second semiconductor layer (SEM2) may be doped with a second conductivity type dopant such as Si, Ge, Sn, etc. For example, the second semiconductor layer (32) may be n-GaN doped with n-type Si.

[0082] A partition wall (PW) may be disposed on the conductive connection layer (130). The partition wall (PW) may be disposed spaced apart from the light-emitting element (LE) disposed in each of the first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting regions (EA3). A planar partition wall (PW) may be disposed to surround each of the light-emitting element (LE) disposed in each of the first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting regions (EA3).

[0083] The bulkhead (PW) may include a first bulkhead (PW1), a second bulkhead (PW2), and a third bulkhead (PW3).

[0084] Although not limited thereto, the first partition (PW1) may be formed by the same process as the light-emitting element (LE), and in this case, at least a portion of the first partition (PW1) may include the same material as the light-emitting element (LE). The first partition (PW1) may include a plurality of sub-partitions (SPW1 to SPW6) that are sequentially stacked in the third direction (DR3). For example, the first partition (PW1) may include a first sub-partition (SPW1), a second sub-partition (SPW2), a third sub-partition (SPW3), a fourth sub-partition (SPW4), a fifth sub-partition (SPW5), and a sixth sub-partition (SPW6).

[0085] The first sub-barrier (SPW1) can be formed of the same material as the first semiconductor layer (SEM1) of the light-emitting element (LE). The first sub-barrier (SPW1) can be formed by the same process as the first semiconductor layer (SEM1) of the light-emitting element (LE).

[0086] The second sub-barrier (SPW2) can be formed of the same material as the electron blocking layer (EBL) of the light-emitting element (LE). The second sub-barrier (SPW2) can be formed using the same process as the electron blocking layer (EBL) of the light-emitting element (LE). If the electron blocking layer (EBL) is omitted, the second sub-barrier (SPW2) can also be omitted.

[0087] The third sub-barrier (SPW3) can be formed of the same material as the active layer (MQW) of the light-emitting element (LE). The third sub-barrier (SPW3) can be formed by the same process as the active layer (MQW) of the light-emitting element (LE).

[0088] The fourth sub-barrier (SPW4) can be formed of the same material as the superlattice layer (SLT) of the light-emitting element (LE). The fourth sub-barrier (SPW4) can be formed by the same process as the superlattice layer (SLT) of the light-emitting element (LE).

[0089] The fifth sub-barrier (SPW5) can be formed of the same material as the second semiconductor layer (SEM2) of the light-emitting element (LE). The fifth sub-barrier (SPW5) can be formed using the same process as the second semiconductor layer (SEM2) of the light-emitting element (LE). In the manufacturing process of the display panel (100), the fifth sub-barrier (SPW5) is not removed, but a portion of the second semiconductor layer (SEM2) of the light-emitting element (LE) is removed, so the thickness of the fifth sub-barrier (SPW5) may be greater than the thickness of the second semiconductor layer (SEM2) of the light-emitting element (LE).

[0090] The sixth sub-barrier (SPW6) can be formed as a semiconductor layer that is not doped with a dopant, i.e., an undoped semiconductor layer. For example, the sixth sub-barrier (SPW6) can be GaN that is not doped with a dopant.

[0091] The second barrier (PW2) and the third barrier (PW3) can serve as masks to prevent the first barrier (PW1) from being etched during the manufacturing process for forming the light-emitting element (LE) and the barrier (PW).

[0092] The second partition (PW2) may be disposed on the first partition (PW1). The second partition (PW2) may be a silicon oxide film (SiO2), an aluminum oxide film (Al2O3), or a hafnium oxide film (HfO2). x It can be formed into an inorganic membrane such as ).

[0093] The third barrier (PW3) may be disposed on the second barrier (PW2). The third barrier (PW3) may include a conductive material such as nickel (Ni).

[0094] The second insulating film (INS2) may be disposed on the sides of the conductive connection layer (130), the sides of the partition (PW), the sides of each of the pixel electrodes (111), the sides of each of the conductive connection layer (130), and the sides of each of the light-emitting elements (LE). The second insulating film (INS2) may be a silicon oxide film (SiO2), an aluminum oxide film (Al2O3), or a hafnium oxide film (HfO2).x It can be formed into an inorganic membrane such as ).

[0095] A common electrode (CE) may be disposed on the upper and side surfaces of each of the light-emitting elements (LE), the upper and side surfaces of the partition wall (PW), and the non-conductive region (NCA) of the conductive connection layer (130). The common electrode (CE) may be in contact with a second insulating film (INS2) disposed on the side surfaces of the conductive connection layer (130), the side surfaces of the partition wall (PW), the side surfaces of each of the pixel electrodes (111), the side surfaces of each of the conductive connection layer (130), and the side surfaces of each of the light-emitting elements (LE). Additionally, the common electrode (CE) may be in contact with the upper surface of the conductive connection layer (130), the upper surface of each of the light-emitting elements (LE), and the upper surface of the partition wall (PW).

[0096] The common electrode (CE) can come into contact with the upper surface (non-conductive region (NCA)) of the conductive connection layer (130) and the upper surface of the light-emitting element (LE) that are exposed and not covered by the second insulating film (INS2). A common voltage can be applied to the conductive connection layer (130), and the common voltage supplied to the conductive connection layer (130) can be applied to the light-emitting element (LE). That is, one end of the light-emitting element (LE) can receive the pixel voltage or anode voltage of the pixel electrode (111) through the conductive connection layer (130), and the other end can receive the common voltage or cathode voltage through the common electrode (CE). The light-emitting element (LE) can emit light with a predetermined brightness according to the voltage difference between the pixel voltage and the common voltage.

[0097] The common electrode (CE) may include a transparent conductive material. The common electrode (CE) may be formed of a transparent conductive oxide (TCO), such as Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO).

[0098] The reflective film (RF) serves to reflect light traveling laterally among the light emitted from the light-emitting element (LE) and guide it upward. The reflective film (RF) may include a metallic material with high reflectivity, such as aluminum (Al).

[0099] The reflective film (RF) may be disposed on the sides of the conductive connection layer (130), the sides of the partition (PW), the sides of each of the pixel electrodes (111), the sides of each of the conductive connection layer (130), and the sides of each of the light-emitting elements (LE). The reflective film (RF) may be in contact with a common electrode (CE) disposed on the sides of the conductive connection layer (130), the sides of the partition (PW), the sides of each of the pixel electrodes (111), the sides of each of the conductive connection layer (130), and the sides of each of the light-emitting elements (LE).

[0100] The wavelength conversion layer (QDL) may be disposed on the common electrode (CE). The wavelength conversion layer (QDL) may be disposed within the first light-emitting regions (EA1), the second light-emitting regions (EA2), and the third light-emitting region (EA3). The wavelength conversion layer (QDL) may fill the internal space defined by the partition (PW). The wavelength conversion layer (QDL) may convert the wavelength of light incident from the light-emitting element (LE) into light of a different color.

[0101] The wavelength conversion layer (QDL) may include a base resin (BRS) and wavelength conversion particles (WCP). The base resin (BRS) may include a transparent organic material. For example, the base resin (BRS) may include an epoxy resin, an acrylic resin, a cardo resin, or an imide resin.

[0102] Wavelength conversion particles (WCPs) can convert a first light incident from a light-emitting element (LE) into a fourth light. For example, the wavelength conversion particles (WCPs) can convert light in the blue wavelength band into light in the yellow wavelength band. The wavelength conversion particles (WCPs) may be quantum dots (QDs), quantum rods, fluorescent materials, or phosphorescent materials. The quantum dots may include group IV nanocrystals, group II-VI compound nanocrystals, group III-V compound nanocrystals, group IV-VI nanocrystals, or a combination thereof.

[0103] The wavelength conversion layer (QDL) may further include a scatterer for scattering light from the light-emitting element (LE) in random directions. In this case, the scatterer may include metal oxide particles or organic particles.

[0104] A plurality of color filters (CF1, CF2, CF3) may be disposed on a wavelength conversion layer (PDL) and a partition (PW). The plurality of color filters (CF1, CF2, CF3) may include first color filters (CF1), second color filters (CF2), and third color filters (CF3).

[0105] Each of the first color filters (CF1) may be placed on the wavelength conversion layer (QDL) in the first light emission region (EA1). Additionally, each of the first color filters (CF1) may be placed on the partition (PW). Each of the first color filters (CF1) may transmit the first light and absorb or block the fourth light. For example, each of the first color filters (CF1) may transmit light in the blue wavelength band and absorb or block light in the green and red wavelength bands. Therefore, each of the first color filters (CF1) may transmit the first light emitted from the light-emitting element (LE) that is not converted by the wavelength conversion layer (QDL), and absorb or block the fourth light converted by the wavelength conversion layer (QDL). The fourth light may include a color different from the color of the first to third light, and may be, for example, yellow. Accordingly, each of the first light-emitting regions (EA1) can emit first light.

[0106] Each of the second color filters (CF2) may be placed on the wavelength conversion layer (QDL) in the second light emission region (EA2). Additionally, each of the second color filters (CF2) may be placed on the partition (PW). Each of the second color filters (CF2) may transmit the second light and absorb or block the first light and the third light. For example, each of the second color filters (CF2) may transmit light in the green wavelength band and absorb or block light in the blue and red wavelength bands. Therefore, each of the second color filters (CF2) may absorb or block the first light emitted from the light-emitting element (LE) that is not converted by the wavelength conversion layer (QDL). Additionally, each of the second color filters (CF2) may transmit the second light corresponding to the green wavelength band and absorb or block the third light corresponding to the blue wavelength band among the fourth light converted by the wavelength conversion layer (QDL). Therefore, each of the second light-emitting regions (EA1) can emit second light.

[0107] Each of the third color filters (CF3) may be placed on the wavelength conversion layer (QDL) in the third light emission region (EA3). Additionally, each of the third color filters (CF3) may be placed on the partition (PW). Each of the third color filters (CF3) may transmit the third light and absorb or block the first light and the second light. For example, each of the third color filters (CF3) may transmit light in the red wavelength band and absorb or block light in the blue and green wavelength bands. Therefore, each of the third color filters (CF3) may absorb or block the first light emitted from the light-emitting element (LE) that is not converted by the wavelength conversion layer (QDL). Additionally, each of the third color filters (CF3) may transmit the third light corresponding to the red wavelength band and absorb or block the second light corresponding to the green wavelength band among the fourth light converted by the wavelength conversion layer (QDL). Therefore, each of the third light-emitting regions (EA3) can emit third light.

[0108] FIGS. 7 to 17 are cross-sectional views illustrating a method for manufacturing a display device according to one embodiment.

[0109] First, referring to FIGS. 7 and 8, a first sub-substrate (SB1) and a second sub-substrate (SB2) separated from each other are bonded together through a material layer (130') for a first conductive connection layer and a material layer (130'') for a second conductive connection layer.

[0110] The first sub-substrate (SB1) may include a semiconductor circuit board (110) and a material layer (130') for a first conductive connection layer disposed on the semiconductor circuit board (110). The second sub-substrate (SB2) may include a light-emitting device substrate (ESUB), a buffer layer (BF) disposed sequentially on the light-emitting device substrate (ESUB), a material layer (120') for a light-emitting device, and a material layer (130'') for a second conductive connection layer. The material layer (120') for a light-emitting device may include a first semiconductor layer (SEM1), an electron blocking layer (EBL), an active layer (MQW), a superlattice layer (SLT), and a second semiconductor layer (SEM2) as shown in FIG. 5.

[0111] The first conductive connection layer material layer (130') and the second conductive connection layer material layer (130'') are bonded together by bonding them to each other, thereby joining the first sub-substrate (SB1) and the second sub-substrate (SB2). The first conductive connection layer material layer (130') and the second conductive connection layer material layer (130'') may contain the same material. The first conductive connection layer material layer (130') and the second conductive connection layer material layer (130'') may include, for example, ITO.

[0112] After bringing the material layer (130') for the first conductive connection layer and the material layer (130'') for the second conductive connection layer into contact, they are melt-bonded at a predetermined temperature. Accordingly, the material layer (130') for the first conductive connection layer and the material layer (130'') for the second conductive connection layer are bonded, thereby forming a conductive connection layer (130).

[0113] Next, referring to FIG. 9, the buffer layer (BF) and the light-emitting element substrate (ESUB) are removed, and the first mask pattern (MP1) and the second mask pattern (MP2) are sequentially placed on the material layer (120') for the light-emitting element.

[0114] A first mask pattern (MP1) is formed on the upper surface of a material layer (120') for a light-emitting device from which the light-emitting device substrate (ESUB) and the buffer layer (BF) have been removed. The upper surface of the material layer (120') for a light-emitting device may be the surface exposed to the top after the light-emitting device substrate (ESUB) and the buffer layer (BF) have been removed. The first mask pattern (MP1) may be formed in the region where the first barrier (PW1) and the light-emitting device (LE) will be formed later. The first mask pattern (MP1) is formed on a silicon oxide film (SiO2), an aluminum oxide film (Al2O3), or a hafnium oxide film (HfO2). x It may include an inorganic membrane such as ).

[0115] The second mask pattern (MP2) may be placed on a portion of the pattern of the first mask pattern (MP1). The second mask pattern (MP2) may be formed in an area where a partition (PW) is to be formed later. The second mask pattern (MP2) may include a conductive material such as nickel (Ni).

[0116] Next, referring to FIG. 10, the material layer (120') for the light-emitting device is etched using the first mask pattern (MP1) and the second mask pattern (MP2) as masks. The material layer (120') for the light-emitting device is not etched in the area where the first mask pattern (MP1) is placed, and the material layer (120') for the light-emitting device can be removed in the area where the first mask pattern (MP1) is not placed. As the material layer (120') for the light-emitting device is etched, the light-emitting device (LE) and the barrier (PW) are formed in the same process.

[0117] In FIG. 10, it is described that the light-emitting element (LE) and the barrier (PW) are formed in the same process, but this is not limited thereto, and the light-emitting element (LE) and the barrier (PW) may be formed through different processes. For example, the first sub-substrate (SB1, see FIG. 7) and the second sub-substrate (SB2, see FIG. 7), which are separated from each other, may be bonded together through the material layer for the first conductive connection layer (130', see FIG. 7) and the material layer for the second conductive connection layer (130'', see FIG. 7), and the light-emitting element (LE) may be formed by etching the material layer for the light-emitting element (120') in the remaining area excluding the area where the light-emitting element (LE) is placed, and then the barrier (PW) may be formed through a separate process. In this case, the barrier (PW, or the first barrier (PW1)) may include a material different from that of the light-emitting element (LE).

[0118] Next, referring to FIG. 11, the material layer (120', see FIG. 10) for the light-emitting element is etched, and the exposed conductive connection layer (130) is plasma treated using oxygen (O2) gas. In this case, the conductive connection layer (130) exposed to the outside without overlapping with the light-emitting element (LE) and the barrier (PW) is plasma treated, while the conductive connection layer (130) covered by the light-emitting element (LE) or the barrier (PW) may not be plasma treated. Accordingly, a conductive region (CA) and a non-conductive region (NCA) may be formed. The non-conductive region (NCA) corresponds to the region plasma treated without overlapping with the light-emitting element (LE) and the barrier (PW), and the conductive region (CA) corresponds to the region that is not plasma treated while overlapping with the light-emitting element (LE) or the barrier (PW).

[0119] By plasma treatment, the conductive connection layer (130) may have different electrical conductivity depending on the region. Since multiple conductive regions (CA) are separated by non-conductive regions (NCA), etching of the conductive connection layer (130) for separation or isolation of the region (conductive region (CA)) connecting the pixel electrode (111) and the light-emitting element (LE) may be unnecessary.

[0120] Next, referring to FIGS. 12 and 13, a second insulating film (INS2) is formed on the side of each of the light-emitting element (LE) and the partition (PW).

[0121] First, a second insulating material layer (INS2') is deposited over the entire surface of a conductive connection layer (130) on which a light-emitting element (LE) and a partition wall (PW) are disposed. In this case, the second insulating material layer (INS2') may be disposed on the upper surface of the conductive connection layer (130), the upper and side surfaces of the partition wall (PW), and the upper and side surfaces of the light-emitting element (LE).

[0122] Next, the second insulating film (INS2) is formed by etching the material layer (INS2') for the second insulating film. The material layer (INS2') for the second insulating film can be etched using a predetermined etching gas by creating a large voltage difference in the third direction (DR3) without a separate mask. In this case, the material layer (INS2') for the second insulating film disposed on the upper surface of the conductive connection layer (130), the upper surface of the partition wall (PW), and the upper surface of the light-emitting element (LE) can be removed. Accordingly, the second insulating film (INS2) can be located on the side of the light-emitting element (LE) and the side of the partition wall (PW). In this case, the second insulating film (INS2) can expose the upper surface of the light-emitting element (LE), the upper surface of the partition wall (PW), and the upper surface of the non-conductive region (NCA) of the conductive connection layer (130).

[0123] Next, referring to FIG. 14, a common electrode (CE) is formed on a light-emitting element (LE). The common electrode (CE) can be formed over the entire area of ​​the base substrate (SUB). In other words, the common electrode (CE) is placed on the upper surface of the conductive connection layer (130), the upper and side surfaces of the partition wall (PW), and the upper and side surfaces of the light-emitting element (LE), and can be placed on the second insulating film (INS). In this case, the common electrode (CE) can be in direct contact with the upper surface of the light-emitting element (LE), the upper surface of the partition wall (PW), and the non-conductive region (NCA) of the conductive connection layer (130). The common electrode (CE) can be electrically connected to the light-emitting element (LE).

[0124] Next, referring to FIGS. 15 and 16, a reflective film (RF) is formed on a common electrode (CE).

[0125] First, a material layer for a reflective film (RF') is deposited over the entire surface of a conductive connection layer (130) on which a light-emitting element (LE) and a partition (PW) are disposed. In this case, the material layer for a reflective film (RF') may be disposed on a common electrode (CE). While the material layer for a reflective film (RF') is disposed on the common electrode (CE), it may also be disposed on the upper surface of the conductive connection layer (130), the upper and side surfaces of the partition (PW), and the upper and side surfaces of the light-emitting element (LE).

[0126] Next, a reflective film (RF) is formed by etching the material layer (RF') for the reflective film. The material layer (RF') for the reflective film can be etched using a predetermined etching gas by creating a large voltage difference in the third direction (DR3) without a separate mask. In this case, the material layer (RF') for the reflective film disposed on the upper surface of the conductive connection layer (130), the upper surface of the partition (PW), and the upper surface of the light-emitting element (LE) can be removed. Accordingly, the reflective film (RF) can be located on the side of the light-emitting element (LE) and the side of the partition (PW). In this case, the reflective film (RF) can expose the common electrode (CE) disposed on the upper surface of the light-emitting element (LE), the upper surface of the partition (PW), and the upper surface of the non-conductive region (NCA) of the conductive connection layer (130).

[0127] Next, referring to FIG. 17, an internal space defined by a partition (PW) is filled with a wavelength conversion layer (QDL), and color filters (CF1, CF2, CF3) are placed on the wavelength conversion layer (QDL). The wavelength conversion layer (QDL) is placed within each light-emitting region (EMA1, EMA2, EMA3), and can fill the remaining region after the light-emitting element (LE), the second insulating film (INS2), and the common electrode (CE) reflective film (RF) are placed in the region surrounded by the partition (PW). The color filters (CF1, CF2, CF3) can be formed on the wavelength conversion layer (QDL) and the partition (PW).

[0128] Hereinafter, with reference to FIGS. 18 to 21, an application example of a display device (10) according to one embodiment is described, but the application example of the display device (10) is not limited thereto.

[0129] FIG. 18 is an exemplary drawing showing a virtual reality device including a display device according to one embodiment. FIG. 18 shows a virtual reality device (1) to which a display device (10_1) according to one embodiment is applied.

[0130] Referring to FIG. 18, a virtual reality device (1) according to one embodiment may be a device in the form of glasses. A virtual reality device (1) according to one embodiment may have a display device (10_1), a left eye lens (10a), a right eye lens (10b), a support frame (20), eyeglass frame legs (30a, 30b), a reflective member (40), and a display device housing (50).

[0131] Although FIG. 18 illustrates a virtual reality device (1) including eyeglass frame temples (30a, 30b), the virtual reality device (1) according to one embodiment may be applied to a head-mounted display that includes a head-mounted band that can be mounted on the head instead of the eyeglass frame temples (30a, 30b). That is, the virtual reality device (1) according to one embodiment is not limited to that shown in FIG. 18 and can be applied in various forms to various other electronic devices.

[0132] The display device housing (50) may include a display device (10_1) and a reflective member (40). An image displayed on the display device (10_1) may be reflected from the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user can view the virtual reality image displayed on the display device (10_1) through their right eye.

[0133] FIG. 18 illustrates that the display device housing (50) is positioned at the right end of the support frame (20), but the embodiments of this specification are not limited thereto. For example, the display device housing (50) may be positioned at the left end of the support frame (20), in which case the image displayed on the display device (10_1) may be reflected from the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user can view the virtual reality image displayed on the display device (10_1) through the left eye. Alternatively, the display device housing (50) may be positioned at both the left end and the right end of the support frame (20), in which case the user can view the virtual reality image displayed on the display device (10_1) through both the left eye and the right eye.

[0134] FIG. 19 is an exemplary drawing showing a smart device including a display device according to one embodiment.

[0135] Referring to FIG. 19, a display device (10_2) according to one embodiment can be applied to a smart watch (2), which is one of the smart devices.

[0136] FIG. 20 is an exemplary drawing showing an automobile instrument panel and a center fascia including a display device according to one embodiment. FIG. 20 shows an automobile to which display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment are applied.

[0137] Referring to FIG. 20, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to an instrument panel of a vehicle, applied to a center fascia of a vehicle, or applied to a Center Information Display (CID) placed on the dashboard of a vehicle. Alternatively, they may be used as a display device (10C). Additionally, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0138] FIG. 21 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0139] Referring to FIG. 21, a display device (10_3) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light at the same time. Therefore, a user located in front of the transparent display device can not only view the image (IM) displayed on the display device (10_3), but also see an object (RS) or background located on the back of the transparent display device. When the display device (10_3) is applied to a transparent display device, the first substrate (SUB1) of the display device (10_3) shown in FIG. 4 and FIG. 5 may include a light-transmitting portion capable of transmitting light, or may be formed of a material capable of transmitting light.

[0140] Other embodiments are described below. In the following embodiments, descriptions of components identical to those already described are omitted or simplified, and the explanation focuses on the differences.

[0141] FIG. 22 is a cross-sectional view of a display device according to another embodiment.

[0142] Referring to FIG. 22, the display device (10_1) according to the present embodiment differs from the embodiment of FIG. 4 in that the second insulating film (INS2, see FIG. 4) is omitted. In this case, the common electrode (CE_1) is in direct contact with the side of the light-emitting element (LE) and can be in direct contact with the side of the partition (PW). The common electrode (CE_1) can be in direct contact with the side of the first partition (PW1), the side of the second partition (PW2), and the side of the third partition (PW3). Even if the common electrode (CE_1) is in direct contact with the partition (PW), the partition (PW) and the light-emitting element (LE) can be mutually insulated by a non-conductive region (NCA).

[0143] In this case as well, etching of the conductive connection layer (130) is unnecessary, and defects that may occur due to etching of the conductive connection layer (130) can be suppressed or prevented. In addition, by omitting the second insulating film (INS2, see FIG. 4), manufacturing costs can be reduced and process efficiency can be improved.

[0144] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0145] 10: Display device 100: Display panel 110: Semiconductor circuit board 111: Pixel electrode 120: Light-emitting element layer 130: Conductive connection layer CA: Challenge Zone NCA: Non-challenge Zone PW: Barrier LE: Light Emitting Difference CE: Common electrode

Claims

Claim 1 A display device comprising: a base substrate; a conductive connection layer disposed on the base substrate; a partition disposed on the conductive connection layer; a light-emitting element disposed on the conductive connection layer and disposed within a space enclosed by the partition in a planar manner; a pixel electrode disposed between the base substrate and the light-emitting element; and a common electrode disposed on the light-emitting element and the conductive connection layer, wherein the conductive connection layer comprises a first region overlapping with the partition or the light-emitting element and a second region not overlapping with the partition and the light-emitting element, the electrical conductivity of the first region is greater than the electrical conductivity of the second region, the oxygen content of the first region is smaller than the oxygen content of the second region, the pixel electrode is disposed in the first region, the common electrode is disposed across the first region and the second region, the light-emitting element is disposed between the pixel electrode and the common electrode, and the common electrode is in direct contact with the second region of the conductive connection layer. Claim 2 delete Claim 3 delete Claim 4 In claim 1, the common electrode is a display device in direct contact with the side of the partition. Claim 5 In claim 1, the first region overlapping with the light-emitting element is a display device disposed in a space enclosed by the second region on a plane. Claim 6 In claim 5, the second region is a display device disposed in a space surrounded by the first region that overlaps with the partition wall. Claim 7 A display device according to claim 6, wherein the first region and the second region overlapping with the light-emitting element are each provided in plurality, and the first region overlapping with the partition is provided integrally. Claim 8 A display device according to claim 1, wherein the conductive connection layer comprises ITO (Indium Tin Oxide). Claim 9 delete Claim 10 A display device according to claim 1, wherein the surface roughness of the first region is greater than the surface roughness of the second region. Claim 11 In claim 1, the light-emitting element and the partition wall are a display device comprising the same material. Claim 12 A display device according to claim 1, wherein the first region is a conductive region and the second region is a non-conductive region. Claim 13 A display device according to claim 1, further comprising a wavelength conversion layer disposed on the light-emitting element, wherein the wavelength conversion layer fills the space surrounded by the partition wall. Claim 14 A display device comprising: a base substrate; a conductive connection layer disposed on the base substrate and including a first region and a second region surrounding the first region in a planar manner; and a light-emitting element disposed on the first region of the conductive connection layer, wherein the electrical resistance of the first region of the conductive connection layer is smaller than the electrical resistance of the second region of the conductive connection layer, and the surface roughness of the first region is greater than the surface roughness of the second region. Claim 15 A display device according to claim 14, further comprising a pixel electrode disposed between the base substrate and the light-emitting element, and a common electrode disposed on the light-emitting element and the conductive connection layer, wherein the pixel electrode is disposed in the first region, the common electrode is disposed across the first region and the second region, and the light-emitting element is disposed between the pixel electrode and the common electrode. Claim 16 In claim 15, the common electrode is a display device in direct contact with the second region of the conductive connection layer. Claim 17 In claim 14, the display device wherein the conductive connection layer comprises ITO (Indium Tin Oxide). Claim 18 In claim 14, a display device in which the oxygen content of the first region is smaller than the oxygen content of the second region. Claim 19 delete Claim 20 A method for manufacturing a display device comprising: a base substrate, a conductive connection layer disposed on the base substrate, a light-emitting element disposed on the conductive connection layer, a pixel electrode disposed between the base substrate and the light-emitting element, and a common electrode disposed on the light-emitting element and the conductive connection layer; and a step of treating the conductive connection layer with oxygen plasma to form a first region and a second region of the conductive connection layer having different electrical conductivity, wherein the first region overlaps with the light-emitting element and the second region does not overlap with the light-emitting element, the electrical conductivity of the first region is greater than the electrical conductivity of the second region, the oxygen content of the first region is smaller than the oxygen content of the second region, the pixel electrode is disposed in the first region, the common electrode is disposed across the first region and the second region, the light-emitting element is disposed between the pixel electrode and the common electrode, and the common electrode is in direct contact with the second region of the conductive connection layer.

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