Electroluminescence Display Device And Driving Method Thereof

KR103025319B1Active Publication Date: 2026-09-29LG DISPLAY CO LTD
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Patent Information

Application Number
KR1020220187711
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-12-28
Publication Date
2026-09-29
Estimated Expiration
2042-12-28

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  • Figure 112022141430168-PAT00002_ABST
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Abstract

The electroluminescent display device according to the present embodiment includes: a timer that counts the time during which a light-emitting element included in each pixel emits light and outputs an accumulated driving time; a stress accumulation circuit that derives accumulated stress data applied to the light-emitting element by an accumulated image implemented in the pixel during the accumulated driving time; a lookup circuit that outputs a lower compensation gain and an upper compensation gain corresponding to the accumulated driving time, respectively, and outputs a stress compensation gain corresponding to the accumulated stress data; a gain calculation circuit that calculates a target compensation gain based on the lower compensation gain, the upper compensation gain, and the stress compensation gain; and a data compensation circuit that down-corrects image data to be written to the pixel based on the target compensation gain.
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Description

Technology Field

[0001] This specification relates to an electroluminescent display device and a driving method thereof. Background Technology

[0002] Electroluminescent displays are classified into inorganic light-emitting displays and electroluminescent displays depending on the material of the light-emitting layer. Each pixel of an electroluminescent display includes a self-emitting light-emitting element, and brightness is controlled by controlling the amount of light emitted by the light-emitting element using a data voltage corresponding to the grayscale of the image data.

[0003] Over time, the degradation characteristics of light-emitting elements can vary from pixel to pixel. If degradation varies between pixels, the driving current contributing to light emission in the pixels will inevitably differ even when the same data voltage is applied. This variation in driving current causes luminance non-uniformity (i.e., afterimage), which degrades image quality.

[0004] In electroluminescent displays, various attempts are being made to slow down pixel degradation, but the effect on improving afterimages is minimal because user viewing behavior is not taken into account. The problem to be solved

[0005] Accordingly, the present embodiment is intended to solve the aforementioned problems and provides an electroluminescent display and a driving method thereof that can enhance the afterimage improvement effect by adaptively adjusting the degree of brightness reduction according to the user's viewing behavior. means of solving the problem

[0006] The electroluminescent display device according to the present embodiment includes: a timer that counts the time during which a light-emitting element included in each pixel emits light and outputs an accumulated driving time; a stress accumulation circuit that derives accumulated stress data applied to the light-emitting element by an accumulated image implemented in the pixel during the accumulated driving time; a lookup circuit that outputs a lower compensation gain and an upper compensation gain corresponding to the accumulated driving time, respectively, and outputs a stress compensation gain corresponding to the accumulated stress data; a gain calculation circuit that calculates a target compensation gain based on the lower compensation gain, the upper compensation gain, and the stress compensation gain; and a data compensation circuit that down-corrects image data to be written to the pixel based on the target compensation gain.

[0007] A driving method for an electroluminescent display device according to the present embodiment comprises: a step of counting the time during which a light-emitting element included in each pixel emits light and outputting an accumulated driving time; a step of deriving accumulated stress data applied to the light-emitting element by an accumulated image implemented in the pixel during the accumulated driving time; a step of outputting a lower compensation gain and an upper compensation gain corresponding to the accumulated driving time, respectively, and outputting a stress compensation gain corresponding to the accumulated stress data; a step of calculating a target compensation gain based on the lower compensation gain, the upper compensation gain, and the stress compensation gain; and a step of down-correcting image data to be written to the pixel based on the target compensation gain. Effects of the invention

[0008] This embodiment has the following effects.

[0009] This embodiment employs a hybrid brightness reduction method to adaptively adjust the degree of brightness reduction according to the user's viewing behavior, thereby enhancing the afterimage improvement effect without impairing the user's visual perception.

[0010] This embodiment can prevent excessive reduction in brightness under high-stress viewing conditions by setting a lower limit of the target compensation gain according to the accumulated driving time.

[0011] This embodiment can prevent inverse afterimages caused by an increase in brightness or overcompensation of the device by setting an upper limit of the target compensation gain according to the accumulated driving time.

[0012] The effects according to this specification are not limited to those exemplified above, and a wider variety of effects are included within this specification. Brief explanation of the drawing

[0013] FIG. 1 is a block diagram showing an electroluminescent display device according to the present embodiment. FIG. 2 is a block diagram showing a residual image improvement circuit according to the present embodiment. FIG. 3 is a diagram showing the stress conversion process performed in the stress accumulation circuit according to the present embodiment. Figure 4 is a diagram showing accumulated stress data according to accumulated driving time and stress compensation gain mapped to the accumulated stress data. Figure 5 is a diagram showing the setting range of the target compensation gain according to the accumulated driving time. FIG. 6 is a diagram showing the operation sequence of a gain calculation circuit according to the present embodiment. Figure 7 is a diagram showing the afterimage distribution according to the accumulated driving time when a timer and stress-based brightness reduction algorithm is applied. Figure 8 is a diagram illustrating the risk when the timer upper limit and timer lower limit are not set on the target compensation gain graph. FIG. 9 is a diagram illustrating the compensation results according to various forms of the timer upper limit and timer lower limit set in the target compensation gain graph. Specific details for implementing the invention

[0014] Preferred embodiments are described in detail below with reference to the attached drawings. Throughout the specification, the same reference numbers denote substantially the same components. In the following description, if it is determined that a detailed description of a known function or configuration related to the contents of this specification may unnecessarily obscure or hinder the understanding of the contents, such detailed description is omitted.

[0015] FIG. 1 is a block diagram showing an electroluminescent display device according to an embodiment of the present specification.

[0016] Referring to FIG. 1, an electroluminescent display device according to an embodiment of the present specification may include a display panel (10), a timing controller (11), a data driver (12), a gate driver (13), a memory circuit (20), and a residual image improvement circuit (111). In FIG. 1, the timing controller (11) and the data driver (12) may be integrated in whole or in part within a drive integrated circuit.

[0017] On the screen where the input image is displayed on the display panel (10), data lines (14) extending in the column direction (or vertical direction) and gate lines (15) extending in the row direction (or horizontal direction) intersect, and pixels (PIX) are arranged in a matrix form at each intersection area to form a pixel array. Each data line (14) is commonly connected to neighboring pixels (PIX) in the column direction, and each gate line (15) is commonly connected to neighboring pixels (PIX) in the row direction.

[0018] Pixels (PIX) included in a pixel array can be grouped in multiples to express various colors. When defining a pixel group for color expression as a unit pixel, one unit pixel may be composed of R (red), G (green), and B (blue) pixels, or may be composed of R (red), G (green), B (blue), and W (white) pixels.

[0019] Each pixel (PIX) includes a light-emitting element and a driving element that generates a driving current according to the gate-source voltage to drive the light-emitting element. The light-emitting element may include an anode electrode, a cathode electrode, and an organic compound layer formed between these electrodes. The organic compound layer may include, but is not limited to, a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). When a driving current flows through the light-emitting element, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) move to the emission layer (EML) to form excitons, and as a result, the emission layer (EML) can emit visible light. Meanwhile, the organic compound layer may be replaced with an inorganic compound layer.

[0020] The driving element may be implemented as a low-temperature-polysilicon (LTPS) or oxide thin film transistor based on an organic substrate (or plastic substrate), but is not limited thereto. The driving element may also be implemented as a silicon wafer (Si-wafer) based CMOS transistor.

[0021] There are increasing attempts to implement some components included in pixel circuits (particularly switching elements where the source or drain is connected to the gate of the driving element) using oxide transistors. For oxide transistors, an oxide called IGZO—combining In (indium), Ga (gallium), Zn (zinc), and O (oxygen)—is used as the semiconductor material instead of polysilicon. Oxide transistors have the advantage of having electron mobility more than 10 times higher than amorphous silicon transistors and significantly lower manufacturing costs compared to LTPS transistors. Additionally, because oxide transistors have low off-current, they offer high driving stability and reliability during low-speed operation where the transistor's off-period is relatively long. Therefore, oxide transistors can be adopted in OLED TVs that require high resolution and low-power operation, or where screen sizes cannot be accommodated using low-temperature polysilicon processes.

[0022] The electrical characteristics of the light-emitting element (e.g., operating point voltage or threshold voltage) must be uniform across all pixels, but differences between pixels (PIX) may occur due to stress over time (hereinafter referred to as degradation variation between pixels). When degradation variation between pixels occurs, the driving current contributing to light emission in the pixels will inevitably differ even when the same data voltage is applied. Such variation in driving current causes afterimages and degrades image quality.

[0023] The afterimage improvement circuit (111) uses a hybrid brightness reduction method that combines a timer-based brightness reduction method and an OLED stress-based brightness reduction method to slow down the degradation of pixels (PIX).

[0024] The timer-based brightness reduction method gradually reduces brightness based on a target compensation gain set according to the cumulative driving time of the light-emitting element. Since brightness is reduced solely based on the cumulative driving time regardless of viewing conditions such as video type or intensity, the afterimage improvement effect is not significant for stressful videos or videos intended for heavy users.

[0025] The OLED stress-based brightness reduction method is a technique that reduces stress by adjusting the degree of brightness reduction according to the consumer's viewing behavior. According to the OLED stress-based brightness reduction method, the amount of brightness reduction varies depending on the viewing conditions.

[0026] The hybrid brightness reduction method of the present embodiment derives cumulative stress data applied to a light-emitting element by a cumulative image implemented in a pixel (PIX) during a cumulative driving time, and if the cumulative stress data is lower than a preset reference stress value, the brightness is reduced to the level of a timer-based brightness reduction method, and if the cumulative stress data is greater than or equal to the reference stress value, the brightness is reduced to the level of an OLED stress-based brightness reduction method.

[0027] The hybrid brightness reduction method of the present embodiment can prevent excessive brightness reduction under high-stress viewing conditions by setting a lower limit of the target compensation gain according to the accumulated driving time.

[0028] The hybrid brightness reduction method of the present embodiment can prevent inverse afterimages caused by brightness increase or overcompensation of the device by setting an upper limit of the target compensation gain according to the accumulated driving time.

[0029] The afterimage improvement circuit (111) may be implemented within the timing controller (11), but is not limited thereto. The afterimage improvement circuit (111) corrects the input image data (DATA) with a target compensation gain to generate corrected image data (CDATA) and supplies the corrected image data (CDATA) to the data driver (12).

[0030] The timing controller (11) receives timing signals such as a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), a data enable signal (DE), and a dot clock (DCLK) from the host system and generates timing control signals to control the operation timing of the data driver (12) and the gate driver (13). The timing control signals may include a gate timing control signal (GDC) and a data timing control signal (DDC).

[0031] The data driver (12) is connected to the pixels (PIX) through the data lines (14). The data driver (12) generates the data voltage required to drive the pixels (PIX) and supplies it to the data lines (14). The data driver (12) samples and latches the correction image data (CDATA) input from the afterimage improvement circuit (111) based on the data timing control signal (DDC) to convert it into parallel data, and maps the parallel data to gamma compensation voltages to convert it into an analog data voltage. The data voltage may have different voltage levels to correspond to the image gradations to be expressed in the pixels (PIX).

[0032] The data driver (12) may be composed of a plurality of source driver integrated circuits. The source driver integrated circuit may include a shift register, a latch, a level shifter, a DAC (Digital to Analog Converter), and an output buffer.

[0033] A gate driver (13) is connected to pixels (PIX) through gate lines (15). The gate driver (13) generates scan signals based on a gate timing control signal (GDC) and supplies each scan signal to the gate lines (15) in accordance with the timing of the supply of data voltage. A horizontal pixel line to which the data voltage is supplied is selected by the scan signal. Each scan signal can be generated as a pulse type that swings between a gate on voltage and a gate off voltage. The gate on voltage is set to a voltage higher than the threshold voltage of the transistor, and the gate off voltage is set to a voltage lower than the threshold voltage of the transistor. The transistor is turned on in response to the gate on voltage, while it is turned off in response to the gate off voltage.

[0034] The gate driver (13) may be composed of a plurality of gate drive integrated circuits, each including a gate shift register, a level shifter for converting the output signal of the gate shift register into a swing width suitable for driving the pixel transistor, and an output buffer. Alternatively, the gate driver (13) may be formed directly on the substrate of the display panel (10) in a GIP (Gate driver In Panel) manner. In the case of the GIP method, the level shifter is mounted on a PCB (Printed Circuit Board), and the gate shift register may be formed in the bezel area, which is a non-display area of ​​the display panel (10). The gate shift register includes a plurality of scan output stages connected to each other in a cascade manner. The scan output stages are independently connected to gate lines and output scan signals to the gate lines (15).

[0035] The memory circuit (20) stores a preset target compensation gain graph. The target compensation gain graph defines the operating range of the target compensation gain according to the accumulated driving time and accumulated stress data, and may include a plurality of lookup tables. The memory circuit (20) may be implemented as NAND memory or flash memory.

[0036] FIG. 2 is a block diagram showing an afterimage improvement circuit according to the present embodiment. FIG. 3 is a diagram showing a stress conversion process performed in a stress accumulation circuit according to the present embodiment. FIG. 4 is a diagram showing accumulated stress data according to the accumulated driving time and a stress compensation gain mapped to the accumulated stress data. FIG. 5 is a diagram showing the setting range of a target compensation gain according to the accumulated driving time. FIG. 6 is a diagram showing the operation sequence of a gain calculation circuit according to the present embodiment.

[0037] Referring to FIG. 2, the afterimage improvement circuit (111) may include a timer (TM), a stress accumulation circuit (SAC), a lookup circuit (LUT), a gain calculation circuit (GCC), and a data compensation circuit (GCC).

[0038] The timer(TM) counts the time during which the light-emitting element included in each pixel of the display panel emits light and outputs the accumulated driving time. The accumulated driving time is the sum of the times during which the image is played on the display panel. The timer(TM) counts the time during which the screen of the display panel is turned on and outputs the accumulated driving time.

[0039] The stress accumulation circuit (SAC) derives accumulated stress data applied to the light-emitting element based on the accumulated image implemented in the pixel during the accumulated driving time. The stress accumulation circuit (SAC) derives a stress value corresponding to each grayscale of the input image data (DATA) by referring to a pre-set stress conversion lookup table as shown in FIG. 3. The stress value represents the predicted amount of degradation of the light-emitting element according to the accumulated driving time. In the stress conversion lookup table, the stress value corresponding to each grayscale of the input image data (DATA) is mapped to the accumulated driving time. The stress conversion lookup table can be created in advance through a stress value conversion algorithm. In the data pattern application process, the current is measured by applying a data pattern for each grayscale to the display panel in the initial state before degradation. In the stress value conversion process, the measured current value is converted into a stress value using a predetermined function formula.

[0040] The stress accumulation circuit (SAC) outputs accumulated stress data derived through a stress transformation lookup table. The stress accumulation circuit (SAC) may further include internal memory for updating and storing accumulated stress data.

[0041] The lookup circuit (LUT) may include a plurality of lookup tables downloaded from the memory circuit (20) when the system power is turned on. The lookup circuit (LUT) includes a lower limit target lookup table (TTL1), an upper limit target lookup table (TTL2), and a stress target lookup table (OTL).

[0042] The lower limit target lookup table (TTL1) outputs the timer lower limit compensation gain (LL-G) using the accumulated driving time input from the timer (TM) as the read address. The timer lower limit compensation gain (LL-G) is located on the timer lower limit line of the target compensation gain graph of FIG. 5.

[0043] The upper target lookup table (TTL2) outputs the timer upper limit compensation gain (UL-G) using the accumulated driving time input from the timer (TM) as the lead address. The timer upper limit compensation gain (UL-G) is located on the timer upper limit of the target compensation gain graph of FIG. 5.

[0044] The stress target lookup table (OTL) outputs a stress compensation gain (SG) using the accumulated stress data input from the stress accumulation circuit (SAC) as a read address. The stress target lookup table (OTL) can be configured as shown in FIG. 4 as an example. FIG. 4 has accumulated stress data according to the accumulated driving time and a stress compensation gain (SG) mapped to the accumulated stress data pre-set. The stress compensation gain (SG) is located within the gain region (AA) surrounded by the timer lower limit and the timer upper limit in the target compensation gain graph of FIG. 5.

[0045] The gain calculation circuit (GCC) calculates the target compensation gain based on the lower compensation gain (LL-G), upper compensation gain (UL-G), and stress compensation gain (SG) input from the lookup circuit (LUT).

[0046] As shown in FIG. 6, the gain calculation circuit (GCC) sets the relatively smaller value between the upper limit compensation gain (UL-G) and the stress compensation gain (SG) as the first operation value (S31). Then, the gain calculation circuit (GCC) sets the relatively larger value between the first operation value and the lower limit compensation gain (LL-G) as the second operation value (S32). Then, the gain calculation circuit (GCC) outputs the second operation value as the target compensation gain (S33).

[0047] The data compensation circuit (GCC) down-corrects the image data (DATA) to be written to the pixel based on the target compensation gain input from the gain calculation circuit (GCC). Since the target compensation gain multiplied by the image data (DATA) is 1 or less as shown in FIG. 5, the corrected image data (CDATA) is lowered to a value lower than the original grayscale value.

[0048] The hybrid brightness reduction method of the present embodiment can be implemented by the operation of a residual image improvement circuit (111) based on the target compensation gain graph of FIG. 5. The shape of the target compensation gain graph can be set as shown in FIG. 5 so that the degree of brightness reduction can be adaptively adjusted according to the accumulated driving time and the user's viewing behavior.

[0049] Specifically, at the first cumulative driving time (0) of the target compensation gain graph, the timer lower limit and the timer upper limit have the same first target compensation gain, and at the second cumulative driving time (50000) of the target compensation gain graph, which is longer than the first cumulative driving time (0), the timer lower limit and the timer upper limit have the same second target compensation gain. Furthermore, at the third cumulative driving time (0~50000) of the target compensation gain graph, which is between the first cumulative driving time (0) and the second cumulative driving time (50000), the timer lower limit has the third target compensation gain, and the timer upper limit has the fourth target compensation gain. Here, the first target compensation gain is 1, the second target compensation gain is 0.5, the third target compensation gain is a first value between 0.5 and 1, and the fourth target compensation gain is a second value between 0.5 and 1, and the second value is higher than the first value.

[0050] It is undesirable to excessively lower the brightness to improve afterimages, as this interferes with the user's visual perception. Through multiple experiments, the applicant set the minimum value of the target compensation gain to 0.5 and determined the time (T50) for the brightness to reach 50% as the reference brightness specification.

[0051] In the target compensation gain graph, to increase the afterimage improvement effect and increase T50, the timer lower limit and the timer upper limit can be designed to have an inflection point near the target compensation gain of 0.6, respectively.

[0052] Specifically, the timer lower limit includes a first lower limit (SLP1) having a first slope and a second lower limit (SLP2) having a second slope that is gentler than the first slope, and the first lower limit (SLP1) and the second lower limit (SLP1) can be connected to each other through a first inflection point (IFP1).

[0053] The timer upper limit includes a first upper limit (SLP3) having a third slope and a second upper limit (SLP4) having a fourth slope that is gentler than the third slope, and the first upper limit (SLP3) and the second upper limit (SLP4) can be connected to each other through a second inflection point (IFP2).

[0054] A first lower limit (SLP1) having a first slope and a first upper limit (SLP3) having a third slope coincide with each other at a first accumulated driving time (0). Then, a second lower limit (SLP2) having a second slope and a second upper limit (SLP4) having a fourth slope coincide with each other at a second accumulated driving time (50000) which is longer than the first accumulated driving time.

[0055] The second slope is gentler than the first slope, and the fourth slope is gentler than the third slope. Due to the relatively steep first and third slopes, the brightness is rapidly reduced before the light-emitting element degrades, thereby improving afterimages, and due to the relatively gentle second and fourth slopes, the T50 is increased, thereby improving the user's visual perception.

[0056] Figure 7 is a diagram showing the afterimage distribution according to the driving time when a timer and stress-based brightness reduction algorithm is applied.

[0057] Referring to FIG. 7, the hybrid brightness reduction method of the present embodiment (indicated by solid line) adaptively adjusts the degree of brightness reduction according to the cumulative driving time and the user's viewing behavior, so it has the effect of reducing the rate of afterimage occurrence in a relatively short cumulative driving time (10,000-20,000) compared to other brightness reduction methods (target not applied, timer-based brightness reduction method).

[0058] Figure 8 is a diagram illustrating the risk when the timer upper limit and timer lower limit are not set on the target compensation gain graph.

[0059] The risks associated with the absence of a timer lower limit can be illustrated through the store mode and heavy usage mode of Fig. 8 (see XX). In store mode, high brightness is used for sales promotion purposes, so the brightness reaches 50% in approximately 2,200 hours. In heavy usage mode, the brightness reaches 50% in approximately 5,800 hours because excessive stress is applied to the light-emitting element while it is used for gaming purposes. As such, without a timer lower limit, the brightness may drop excessively quickly, potentially degrading the user's visual perception.

[0060] The risk in the absence of a timer upper limit can be explained through the brightness increase mode of FIG. 8 (see XY). The brightness increase mode increases the brightness of the element or causes overcompensation, which accelerates the stress applied to the light-emitting element and may result in inverse afterimages.

[0061] In contrast, the hybrid brightness reduction mode of the present embodiment can eliminate the aforementioned problems because it includes a timer lower limit, a timer upper limit, and a gain region (AA).

[0062] FIG. 9 is a diagram illustrating the compensation results according to various forms of the timer upper limit and timer lower limit set in the target compensation gain graph.

[0063] Referring to FIG. 9, if the lower limit of the timer is set in a step form, the brightness may decrease rapidly during step-down, which can impair the user's visual perception. The same applies to the upper limit of the timer. In terms of the user's visual perception, it is desirable for the brightness to decrease gradually over a long period of time.

[0064] In addition, if the timer lower limit is set excessively low, the quality of brightness performance cannot be maintained due to excessive brightness degradation.

[0065] In addition, if the target is not set, the stress applied to the light-emitting element is accelerated due to high brightness, and there is a risk of inverse afterimage occurring.

[0066] In contrast, the lower and upper limits of the timer in this embodiment each have a slope inflection point and have a shape that gradually lowers the brightness, so they are effective in improving afterimages without impairing the user's visual perception.

[0068] From the foregoing, those skilled in the art will understand that various changes and modifications are possible within the scope of the technical concept of the present invention. Accordingly, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims. Explanation of the symbols

[0069] 10: Display panel 11: Timing controller 12: Data driver 13: Gate driver 20: Memory circuit 30: Compensation circuit 113: Compensation gain operation circuit 210: First memory

Claims

Claim 1 An electroluminescent display device comprising: a timer that counts the time during which a light-emitting element included in each pixel emits light and outputs an accumulated driving time; a stress accumulation circuit that derives accumulated stress data applied to the light-emitting element by an accumulated image implemented in the pixel during the accumulated driving time; a lookup circuit that outputs a lower compensation gain and an upper compensation gain corresponding to the accumulated driving time, respectively, and outputs a stress compensation gain corresponding to the accumulated stress data; a gain calculation circuit that calculates a target compensation gain based on the lower compensation gain, the upper compensation gain, and the stress compensation gain; and a data compensation circuit that down-corrects image data to be written to the pixel based on the target compensation gain, wherein the setting range of the target compensation gain includes a timer lower limit where the lower compensation gain is located, a timer upper limit where the upper compensation gain is located, and a gain area enclosed by the timer lower limit and the timer upper limit. Claim 2 The electroluminescent display device according to claim 1 further comprises a memory circuit storing a target compensation gain graph representing the set range of the target compensation gain according to the accumulated driving time and the accumulated stress data, wherein the stress compensation gain is located within the gain region. Claim 3 In claim 2, the timer lower limit and the timer upper limit have the same first target compensation gain at the first cumulative driving time of the target compensation gain graph, the timer lower limit and the timer upper limit have the same second target compensation gain at the second cumulative driving time of the target compensation gain graph which is longer than the first cumulative driving time, the timer lower limit has the same target compensation gain at the third cumulative driving time of the target compensation gain graph which is between the first cumulative driving time and the second cumulative driving time, and the timer upper limit has the fourth target compensation gain, the first target compensation gain is 1, the second target compensation gain is 0.5, the third target compensation gain is a first value between 0.5 and 1, and the fourth target compensation gain is a second value between 0.5 and 1, and the second value is higher than the first value, in an electroluminescent display device. Claim 4 In claim 2, the timer lower limit comprises a first lower limit having a first slope and a second lower limit having a second slope gentler than the first slope, wherein the first lower limit and the second lower limit are connected to each other through a first inflection point, and the timer upper limit comprises a first upper limit having a third slope and a second upper limit having a fourth slope gentler than the third slope, wherein the first upper limit and the second upper limit are connected to each other through a second inflection point. Claim 5 In claim 4, the first lower limit having the first slope and the first upper limit having the third slope coincide with each other at a first cumulative driving time, the second lower limit having the second slope and the second upper limit having the fourth slope coincide with each other at a second cumulative driving time that is longer than the first cumulative driving time, the second slope is gentler than the first slope, and the fourth slope is gentler than the third slope, an electroluminescent display device. Claim 6 An electroluminescent display device according to claim 5, wherein the target compensation gain corresponding equally to the first lower limit and the first upper limit in the first cumulative driving time is 1, and the target compensation gain corresponding equally to the second lower limit and the second upper limit in the second cumulative driving time is 0.

5. Claim 7 A driving method for an electroluminescent display device comprising: a step of counting the time during which a light-emitting element included in each pixel emits light and outputting a cumulative driving time; a step of deriving cumulative stress data applied to the light-emitting element by a cumulative image implemented in the pixel during the cumulative driving time; a step of outputting a lower compensation gain and an upper compensation gain corresponding to the cumulative driving time, respectively, and outputting a stress compensation gain corresponding to the cumulative stress data; a step of calculating a target compensation gain based on the lower compensation gain, the upper compensation gain, and the stress compensation gain; and a step of down-correcting image data to be written to the pixel based on the target compensation gain, wherein the setting range of the target compensation gain includes a timer lower limit where the lower compensation gain is located, a timer upper limit where the upper compensation gain is located, and a gain area enclosed by the timer lower limit and the timer upper limit. Claim 8 A driving method for an electroluminescent display device according to claim 7, wherein a target compensation gain graph representing the setting range of the target compensation gain according to the accumulated driving time and the accumulated stress data is stored in a memory circuit, and the stress compensation gain is located within the gain region. Claim 9 In claim 8, the timer lower limit and the timer upper limit have the same first target compensation gain at the first cumulative driving time of the target compensation gain graph, the timer lower limit and the timer upper limit have the same second target compensation gain at the second cumulative driving time of the target compensation gain graph which is longer than the first cumulative driving time, the timer lower limit has the same second target compensation gain at the third cumulative driving time of the target compensation gain graph which is between the first cumulative driving time and the second cumulative driving time, and the timer upper limit has the fourth target compensation gain, the first target compensation gain is 1, the second target compensation gain is 0.5, the third target compensation gain is a first value between 0.5 and 1, the fourth target compensation gain is a second value between 0.5 and 1, and the second value is higher than the first value, a driving method of an electroluminescent display device. Claim 10 A driving method for an electroluminescent display device according to claim 8, wherein the timer lower limit comprises a first lower limit having a first slope and a second lower limit having a second slope gentler than the first slope, and the first lower limit and the second lower limit are connected to each other through a first inflection point, and the timer upper limit comprises a first upper limit having a third slope and a second upper limit having a fourth slope gentler than the third slope, and the first upper limit and the second upper limit are connected to each other through a second inflection point. Claim 11 A driving method for an electroluminescent display device according to claim 10, wherein the first lower limit having the first slope and the first upper limit having the third slope coincide with each other at a first cumulative driving time, the second lower limit having the second slope and the second upper limit having the fourth slope coincide with each other at a second cumulative driving time that is longer than the first cumulative driving time, the second slope is gentler than the first slope, and the fourth slope is gentler than the third slope. Claim 12 A driving method for an electroluminescent display device according to claim 11, wherein the target compensation gain corresponding equally to the first lower limit and the first upper limit in the first cumulative driving time is 1, and the target compensation gain corresponding equally to the second lower limit and the second upper limit in the second cumulative driving time is 0.5.

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