Apparatus for Testing Robustness of Semiconductor Device And Operating Method Thereof
Patent Information
- Application Number
- KR1020230124831
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-09-19
- Publication Date
- 2026-09-29
- Estimated Expiration
- 2043-09-19
Smart Images

Figure 112023103752670-PAT00004_ABST
Abstract
Description
Technology Field
[0001] The present disclosure relates to an apparatus for evaluating the robustness of a semiconductor device and a method for operating the same. Background Technology
[0002] The following description merely provides background information related to the present embodiment and does not constitute prior art.
[0003] UIS (Unclamped Inductive Switching) testing is one of the methods for evaluating the ruggedness of a power semiconductor. In UIS testing, the failure of a device is determined by varying test conditions (e.g., the size of the inductive load connected to the device, the turn-on time of the device, the current flowing through the device, or the energy stored in the device). The test is repeated until the device is destroyed, and parameters indicating the ruggedness of the device can be calculated based on the critical conditions before the test device (100) is destroyed. At this time, if the failure of the device is incorrectly determined, not only is the accuracy of the ruggedness evaluation reduced, but a sudden current may flow through the device, potentially destroying the test equipment. The problem to be solved
[0004] One objective of the present disclosure is to provide a method and apparatus capable of improving accuracy and stability in evaluating the robustness of a semiconductor device.
[0005] The problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by a person skilled in the art from the description below. means of solving the problem
[0006] According to one aspect of the present disclosure, an apparatus for evaluating the robustness of a semiconductor device is provided, comprising: a power supply that supplies power for testing; a signal generator connected to a first terminal of the semiconductor device and generating a test signal for turning on and off the semiconductor device; an inductive load connected to a second terminal of the semiconductor device; a measuring instrument connected to the second terminal of the semiconductor device and measuring one or more of voltage, current, and energy; and a controller that determines whether the semiconductor device is destroyed by using a plurality of measured values measured by the measuring instrument during a time interval in which the semiconductor device is turned off.
[0007] According to another aspect of the present disclosure, a driving method for a robustness evaluation device of a semiconductor device comprising an inductive load connected to one end of a semiconductor device and a measuring instrument connected to one end of the semiconductor device and measuring one or more of voltage, current, and energy is provided, the driving method comprising: a process of turning on the semiconductor device to store energy in the inductive load; a process of turning off the semiconductor device to consume the energy stored in the inductive load; and a process of determining whether the semiconductor device is destroyed by using a plurality of measured values measured by the measuring instrument during a time interval in which the semiconductor device is turned off.
[0008] In some embodiments, the controller may determine whether the semiconductor device is destroyed based on whether the energy at a first reference point within the time interval in which the semiconductor device is turned off satisfies a preset condition. The first reference point may be determined based on the point in time when the absolute value of the difference between the energy at the time the semiconductor device is turned off and the energy at the first reference point becomes equal to the absolute value of the difference between the energy at the time the semiconductor device is turned off and the energy at the time the semiconductor device is turned on. The first reference point may be the point in time after a preset delay time has elapsed from the point in time when the two absolute values become equal. The controller may calculate the energy by accumulating the product of the voltage value and the current value measured by the measuring instrument. The controller may determine that the semiconductor device is destroyed if the energy at the first reference point is greater than or equal to a first threshold or less than or equal to a second threshold. The first threshold may have a positive value, and the second threshold may have a negative value.
[0009] In some embodiments, if the controller determines that the energy at the first reference point does not satisfy the condition, it may further check whether the energy at one or more second reference points after the first reference point satisfies the condition to determine whether the semiconductor device is destroyed. The second reference point may be selected within a time interval having a predetermined length prior to the capture end point of the measuring instrument.
[0010] In some embodiments, the controller can determine whether the semiconductor device is destroyed based on a plurality of current values measured at a predetermined time interval during the time interval in which the semiconductor device is turned off.
[0011] In some embodiments, the robustness evaluation device may further include a capacitor connected to a third terminal of the semiconductor device and the inductive load; and one or more switches connected between the capacitor and the power supply. The controller may short-circuit the switch to charge the capacitor, and after the charging of the capacitor is complete, open the switch to electrically isolate the circuit formed by the capacitor, the inductive load, and the semiconductor device from the power supply. If it is determined that the semiconductor device is not destroyed, the controller may re-perform the charging and isolation of the capacitor and transmit a test variable updated by a predetermined incremental value to one or more of the measuring instrument and the signal generator. The test variable may include one or more of the pulse width of the test signal and the energy to be stored in the inductive load during the time interval in which the semiconductor device is turned on. Effects of the invention
[0012] According to an embodiment of the present disclosure, there is an effect of being able to accurately determine whether a device is destroyed by using a plurality of measured values or an integral value of the measured values of current and voltage.
[0013] Accordingly, this has the effect of improving the accuracy of robustness assessment and automating the testing process for robustness assessment.
[0014] Furthermore, it can prevent damage to the measurement system caused by misjudgment regarding component failure and reduce the number of tests, thereby reducing overall testing time and costs.
[0015] The effects of the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by a person skilled in the art from the description below. Brief explanation of the drawing
[0016] FIG. 1 is a block diagram schematically showing a robustness evaluation device according to one embodiment of the present disclosure. FIGS. 2a to 2d are waveform diagrams illustrating various examples of waveforms that can be observed in a measuring instrument according to one embodiment of the present disclosure. FIG. 3 is a waveform diagram referenced to explain a method for determining whether a semiconductor device is destroyed according to one embodiment of the present disclosure. FIGS. 4a to 4c are waveform diagrams referenced to explain a method for determining whether a semiconductor device is destroyed according to another embodiment of the present disclosure. FIG. 5 is a flowchart illustrating a method of driving a robustness evaluation device according to one embodiment of the present disclosure. Specific details for implementing the invention
[0017] Some embodiments of the present disclosure are described in detail below with reference to exemplary drawings. It should be noted that in assigning reference numerals to the components of each drawing, the same components are given the same reference numeral whenever possible, even if they are shown in different drawings. Furthermore, in describing the present disclosure, if it is determined that a detailed description of related known components or functions could obscure the essence of the present disclosure, such detailed description is omitted.
[0018] In describing the components of the embodiments according to the present disclosure, symbols such as first, second, i), ii), a), b), etc., may be used. These symbols are intended only to distinguish the components from other components, and the essence, order, or sequence of the components is not limited by the symbols. When a part in the specification is described as 'comprising' or 'having' a component, this means that, unless explicitly stated otherwise, it does not exclude other components but may include additional components.
[0019] The detailed description set forth below, together with the accompanying drawings, is intended to describe exemplary embodiments of the present disclosure and is not intended to represent the only embodiment in which the present disclosure can be practiced.
[0020] FIG. 1 is a block diagram schematically showing a robustness evaluation device according to one embodiment of the present disclosure.
[0021] The ruggedness evaluation device (10) is a device for evaluating the ruggedness of a semiconductor device (100). In the present disclosure, the semiconductor device that is the subject of the ruggedness evaluation may be referred to as a Device Under Test (DUT).
[0022] The robustness evaluation device (10) can perform an unclamped inductive switching (UIS) test as a robustness evaluation technique. To this end, the robustness evaluation device (10) may include all or part of a power supply (110), a switch (120), a capacitor (130), an inductive load (140), a measuring instrument (150), a signal generator (160), and a controller (170). Not all blocks shown in FIG. 1 are essential components, and some blocks included in the robustness evaluation device (10) in other embodiments may be added, changed, or deleted. Meanwhile, the components shown in FIG. 1 represent functionally distinct elements, and at least one component may be implemented in a form that is integrated with each other in an actual physical environment.
[0023] As shown in FIG. 1, a signal generator (160) is connected to the first terminal (100G) of the test element (100), and the second terminal (100D) can be connected to one end of an inductive load (140). The third terminal (100S) of the test element (100) can be connected to both ends of a capacitor (130) to the other end of the inductive load (140). A switch (120) can be connected between both ends of the capacitor (130) and both ends of a power supply (110). Meanwhile, in the following description, it is assumed that the test element (100) is an N-type MOSFET and that the first to third terminals (100G, 100D, and 100S) are the gate terminal, drain terminal, and source terminal, respectively, but the present disclosure is not limited thereto.
[0024] The power supply (110) can supply power for testing. In some embodiments, the power supply (110) may be implemented as a commercial power supply. For example, since UIS testing is generally performed at less than 100V, a commercial power supply having an output performance of 100V and 10A or less may be used as the power supply (110). In a preferred example, the power supply (110) may have an overcurrent protection function. Additionally, for the automation of the testing process, the power supply (110) may have a control function through communication with other devices.
[0025] The switch (120) can electrically isolate the power supply (110) and the capacitor (130) during the test. The switch (120) may be provided to protect the power supply (110) from overcurrent and overvoltage that may occur due to the destruction of the test element (100).
[0026] To protect the power supply (110) from overcurrent caused by device destruction, a small resistor capable of limiting current may be additionally connected between the switch (120) and the power supply (110), and / or between the switch (120) and the charging capacitor (130). Assuming that 50V is applied to the second terminal (100D) of the test device (100) during UIS testing, it is preferable to connect a current limiting resistor of the level of 1 to 2Ω.
[0027] The capacitor (130) should have a capacity greater than the maximum energy that can be supplied by the measuring instrument (150). In a preferred example, the charging capacitor (130) can supply more than 100 times the maximum energy of the measuring instrument (150). After testing, a discharge circuit (not shown) may be further connected to the capacitor (130) to discharge the voltage charged in the capacitor (130). If a discharge circuit is added, safety issues such as static electricity that may occur when replacing the component after testing can be prevented.
[0028] The inductive load (140) is a test load connected to one end of the test element (100). To supply various energies to the test element (100) during UIS testing, the inductive load (140) may be composed of a set of multiple inductors. In this case, to control the set of inductors with a controller (170), the inductive load (140) may further include a set of switches. For example, the inductive load (140) may be a variable inductor comprising multiple switches connected in series or in parallel to each of the multiple inductors.
[0029] A measuring instrument (150) may be provided to analyze various test waveforms of the test element (100). In some embodiments, the measuring instrument (150) may be implemented as a commercial oscilloscope. In a preferred example, the voltage (V) of the first terminal (100G) of the test element (100)G ), voltage (V) of the second terminal (100D) D ) and the current (I) of the second terminal (100D) D To measure ) simultaneously, the measuring instrument (150) may have at least three channels.
[0030] The signal generator (160) can generate a test signal to be applied to the first terminal (100G) of the test element (100). The signal generator (160) may be implemented using a commercial function generator, but since generating a pulse with a pulse width of 0.5 us or more is sufficient for most UIS tests, it may also be implemented using a microcontroller. When using a microcontroller, there is an advantage in that it is easy to implement functions required in the test sequence, such as controlling the switch (120) and / or controlling the discharge circuit of the capacitor (130).
[0031] The controller (170) can control other components within the robustness evaluation device (10) and determine whether the test element (100) is destroyed. For example, the controller (170) can control the operation of the measuring instrument (150) and receive the waveform and / or measurement value measured from the measuring instrument (150) to determine whether the test element (100) is destroyed. The controller (170) can set various parameters for controlling other components. For example, the controller (170) can set the capture time suitable for measurement by the measuring instrument (150) and set the pulse width of the test signal generated by the signal generator (160). The controller (170) can control various functions required for the test sequence.
[0032] In some embodiments, the controller (170) may be implemented as a computing device. The computing device may include memory for storing instructions and at least one processor. Additionally, the computing device may include a user interface for a user to trigger the execution of a program by the processor and / or check the processing results of the processor. The user interface may include input devices such as a keyboard, a mouse, etc., and output devices such as a display device, a speaker, etc.
[0033] FIGS. 2a to 2d are waveform diagrams illustrating various examples of waveforms that can be observed in a measuring instrument according to one embodiment of the present disclosure.
[0034] FIG. 2a shows an example of a waveform that can be observed in a case where the test element (100) is not destroyed by the test signal. FIG. 2b shows an example of a waveform that can be observed in a case where the test element (100) is destroyed by the test signal. FIG. 2c shows another example of a waveform that can be observed in a case where the test element (100) is not destroyed by the test signal. FIG. 2d shows another example of a waveform that can be observed in a case where the test element (100) is destroyed by the test signal.
[0035] The voltage (V) applied to the gate of the test element (100) at time t1 G When ) rises, the test element (100) is turned on, and accordingly, current (I) to the test element (100) and the inductive load (140). D ) flows. The time interval (T) during which the test element (100) is turned on. on Current (I) in ) D ) increases linearly, and the drain voltage (V D ) has a low value.
[0036] The voltage (V) applied to the first terminal (100G) at time t2 G Even if the test element (100) is turned off as ) falls, due to the characteristics of the inductive load (140), the current (I) for a certain time interval D ) continues to flow. At this time, the test element (100) causes avalanche breakdown, and the current (I D ) continues to flow, and the drain voltage (V D ) will have an avalanche breakdown voltage value.
[0037] In the case of a normal test device (100), the current (I D Since ) can only flow as much as the energy stored in the inductor, the time interval (T) during which the test element (100) is off, as shown in FIG. 2a, off Current (I) in ) D ) gradually decreases. Subsequently, when all the energy accumulated in the inductive load (140) is released at time t3, the test element (100) returns to a normal off state, and the current (I D ) stops flowing, and the drain voltage (V D ) has an off voltage, that is, a voltage value supplied by the power supply (110).
[0038] On the other hand, in the case where the test element (100) is destroyed because it cannot withstand the high heat generated in the avalanche yielding state, the time interval (T) during which the test element (100) is off is as shown in FIG. 2b. off Even in ), current (I D ) continues to increase.
[0039] Based on this, in the apparatus and methods according to the comparative example, the time interval (T) during which the test element (100) is turned off off Among ), drain current (I D The measured value of ) is a predetermined set value (I REFThe destruction of the test element (100) is determined based on whether it is above )
[0040] However, in an actual test environment, as shown in FIG. 2c, even though the test element (100) is not destroyed due to noise, etc., the drain current (I D The measured value of ) is the set value (I REF Cases where it exceeds ) may occur. In addition, as shown in FIG. 2d, the test element (100) exhibits current characteristics similar to a normal element for a certain period of time from time t2 when it is turned off, and then from time t4 after a certain period, the drain current (I D There may also be cases where the ) increases. For example, this characteristic may appear when the test device (100) is destroyed due to the internal heat rising in the off state caused by heat generated by avalanche breakdown. In this case, if the test time is not sufficiently long, the drain current (I D ) is the setting value (I REF It may not be possible to reach ).
[0041] Therefore, as in the comparative example, the drain current (I) after turn-off D ) is a predetermined setting value (I REF If the determination of whether destruction occurs is based solely on whether the test element (100) is destroyed, a false positive error may occur in which the test element (100) is incorrectly judged to be destroyed even though it is not actually destroyed, and a false negative error may occur in which the test element (100) is incorrectly judged to be not destroyed even though it is destroyed. These errors become obstacles to accurately calculating parameters indicating the robustness of the test element (100). Furthermore, if a false negative error occurs, a sudden current flows through the test element (100) as the length of the turn-on interval is increased to implement increased energy (or current) in the next run, and the test equipment may be destroyed as a result.
[0042] To solve this problem, the present disclosure provides a method for determining whether a test element (100) is destroyed by comprehensively considering measurement values measured at multiple points in time.
[0043] FIG. 3 is a waveform diagram referenced to explain a method for determining whether a semiconductor device is destroyed according to an embodiment of the present disclosure. The waveforms shown in FIG. 3 (a) to (d) are, respectively, the drain current (I) in the examples described above in FIG. 2a to 2d. D It can correspond to the waveform.
[0044] Referring to FIG. 3, the controller (170) has a time interval (T) during which the test element (100) is off. off By using drain current values (300a to 300d) measured at multiple points in time within ), it is possible to determine whether the test element (100) is destroyed. At this time, the current values (300a to 300d) may be values measured at regular time intervals (△t) from point t2 when the test element (100) is turned off.
[0045] The controller (170) may extract current values corresponding to multiple measurement points having a certain time interval (△t) from a current waveform obtained from the measuring instrument (150), or receive current values measured at each of the multiple measurement points from the measuring instrument (150). Meanwhile, although six measurement points are shown in FIG. 3, it will be clearly understood that more or fewer measurement points may be included. It is preferable to select two or more measurement points.
[0046] The controller (170) can analyze the current pattern after turn-off based on drain current values (300a to 300d) and determine whether the test element (100) is destroyed based on whether the current pattern has a predetermined type.
[0047] For example, if the drain current values (300a) show a pattern of decreasing and then being maintained as in Fig. 3 (a), or if the drain current values (300c) show a pattern of temporarily increasing and then decreasing and being maintained as in Fig. 3 (c), it can be determined that the test element (100) is not destroyed.
[0048] As another example, if the drain current values (300b) after the turn-off time (t2) show a pattern of continuous increase as in Fig. 3 (d), or if the drain current values (300d) show a pattern of increase after a certain amount of time has elapsed from the turn-off time (t2) as in Fig. 3 (d), the test element (100) can be determined to be destroyed.
[0049] FIGS. 4a to 4c are waveform diagrams referenced to explain a method for determining whether a semiconductor device is destroyed according to another embodiment of the present disclosure. The waveforms shown in FIGS. 4a to 4c may each correspond to the examples described above in FIGS. 2b to 2c.
[0050] Referring to FIGS. 4a to 4c, the controller (170) calculates the energy at each time point using the drain current value and drain voltage value at a plurality of time points of the test element (100), and the time interval (T) during which the test element (100) is off off Based on the energy values (400a to 400c) at the first reference time point (t6) within the test element (100), it can be determined whether the test element (100) is destroyed. The controller (170) can calculate the energy by integrating the product of the drain current value and the drain voltage value at each time point over time.
[0051] At this time, the first reference point (t6) may be defined as the point in time when the absolute value of the difference between the integral value at the time when the test element (100) is turned off (t2) and the integral value at the first reference point (t6) becomes equal to the absolute value of the difference between the integral value at the time when the test element (100) is turned on (t1) and the integral value at the time when it is turned off (t2). Taking into account measurement and / or calculation errors, the first reference point (t6) may be defined as the point in time when a certain amount of time (e.g., 1 to 3 us) has elapsed from the point in time when the two absolute values become equal, or the point in time when the difference between the two absolute values becomes smaller than a predetermined threshold. Generally, since the integral value at the time when the test element (100) is turned on (t1) is 0, the calculation may be simplified by using the integral value at the time when the test element (100) is turned off (t2) instead of calculating the absolute value of the difference between the integral value at the time when the test element (100) is turned on (t1) and the integral value at the time when the test element (100) is turned off (t2).
[0052] Energy is stored in the inductive load (140) until turn-off, and after turn-off, the energy of the inductive load (140) is released in the form of avalanche breakdown of the test element (100), so if the destruction of the element does not occur, the two amounts of energy are the same. Therefore, if the energy value (400a) at the first reference time (t6) has a positive value or a negative value, it can be determined that the test element (100) has been destroyed.
[0053] Meanwhile, since energy is the integral of the waveforms, a low-pass filter effect can be obtained, which can cancel out noise. Therefore, even in the case where noise occurs in the waveform as shown in FIG. 4b, it is possible to make an accurate determination of whether the test element (100) is destroyed based on the energy value (400b) at the first reference point (t6).
[0054] On the other hand, in the case where device failure occurs after a specific time as illustrated in FIG. 4c, the energy value (400c) at the first reference time (t6) is 0. In such cases, the failure of the device can be determined based on the energy value (410c) at the second reference time (t7) between the first reference time (t6) and the capture end time (t8) of the measuring instrument (150). If the energy value (400a) at the first reference time (t6) is 0 and the energy value (410c) at the second reference time (t7) has a positive value, the controller (170) can determine that the device failure of the test device (100) occurred belatedly due to heat generated by avalanche breakdown. At this time, it is preferable to select the second reference time (t7) within a time interval of 1 to 2 us immediately before the capture end time (t8). Meanwhile, in Fig. 4c, only one second reference point is shown, but more second reference points may be used.
[0055] FIG. 5 is a flowchart illustrating a method of driving a robustness evaluation device according to one embodiment of the present disclosure. Each process illustrated in FIG. 5 can be understood as being controlled or performed by a controller (170).
[0056] In process S500, the robustness evaluation device (10) may be initialized. The controller (170) may control the instrument (150), power supply (110), switch (120), capacitor (130) and / or signal generator (160) to be initialized. Initialization of the instrument (150) may include setting the trigger mode and / or channel range, etc. Initialization of the capacitor (130) may include discharging the capacitor (130) so that no voltage is charged therein. Initialization of the switch (120) may include opening the switch (120) to electrically isolate the power supply (110) and the capacitor (130).
[0057] In process S510, a test start command may be generated. The test start command may be generated based on user input or may be automatically generated by the controller (170).
[0058] In process S500 or process S510, the inductance, voltage and current measurement range, measurement time, measurement current, etc. of an appropriate inductive load (140) can be set using test conditions (e.g., avalanche energy and maximum current). At this time, the DC link voltage (V) applied to the capacitor (130) DC ), Avalanche energy (E AS ), current (I), pulse width (t p ), the inductance (L) of the inductive load (140) can have a relationship as shown in Equations 1 and 2. Here, the pulse width (t p ) is the time during which the test signal generated by the signal generator is maintained at a high level, and the time interval (T) during which the test element (100) is turned on. on It can respond to ).
[0059]
[0060]
[0061] That is, pulse width (t p When ) and inductance (L) are set, pulse width (t p The energy to be stored in the inductive load (140) during the time corresponding to ) is the avalanche energy (E AS It can be calculated as ). Another setting method is the avalanche energy (E AS By setting the ) and inductance (L), the pulse width (t) is inversely p A method for calculating ) can also be used. One of the two methods can be selected as the setting method according to the user's convenience. However, pulse width (t p Adjusting ) can be set to a value implementable in the signal generator (160), but the avalanche energy (E ASThe disadvantage is that adjusting ) may not be possible, so an implementable approximation must be used instead of the set energy value.
[0062] In process S520, a test variable (v) to be applied to the current test process can be calculated. For example, the test variable (v) may be the pulse width (t p ) or avalanche energy (E AS ) can be selected. During multiple test processes, the test variable (v) can be sequentially increased by a preset increment value (Δv) from a predetermined initial value (v0) to an end value (v1). The test variable value (v) to be applied to the current test process. i ) is the variable value (v) applied in the previous test process, as shown in mathematical formula 3. i-1 It can be determined by adding an incremental value (Δv) to ).
[0063]
[0064] The initial value (v0), end value (v1), and / or incremental value (Δv) of the test variable (v) can be calculated based on the aforementioned mathematical formula 1 or 2. For example, the pulse width (t) supported by (or desired by the user) in the robustness evaluation device (10). p Based on the adjustment range and adjustment unit of ) and inductance (L), avalanche energy (E AS Initial value of )(E AS0 ), termination value(E AS1 ) and / or incremental value (ΔE AS ) can be determined. As another example, avalanche energy (E AS Based on the adjustment range and adjustment unit of ) and inductance (L), pulse width (t p The initial value of )(t p0 ), termination value(t p1 ) and / or incremental value (Δt p ) may be determined. In another example, the increment value (Δv) of the test variable may be calculated based on the set initial value (v0) and end value (v1) and the desired maximum number of tests.
[0065] Additionally, in process S520, a capture time may be set to improve throughput by limiting the number of data points to be measured and / or analyzed. The capture time is the pulse width (t p It can be set with an appropriate margin based on ). In a preferred example, the capture time can be set to 1.5 to 3 times the pulse width.
[0066] In process S530, the switch (120) is short-circuited so that the capacitor (130) can be charged to a voltage set in the power supply (110). When the charging of the capacitor (130) is finished, the switch (120) can be opened to electrically isolate the test circuit and the power supply (110) in order to protect them.
[0067] In process S540, the parameters calculated in process S520 can be transmitted to and applied to the measuring instrument (150) and / or signal generator (160).
[0068] In process S550, a signal generator (160) generates a signal for testing, and a measuring instrument (150) can measure the current and / or voltage of the test element (100). The measuring instrument (150) can be synchronized with the signal generation timing of the signal generator (160) by a trigger signal from the signal generator (160). To this end, the trigger mode of the measuring instrument (150) can be set to a single mode. When the measuring instrument (150) is triggered by the trigger signal generated by the signal generator (160), the measuring instrument (150) can obtain the gate voltage waveform, drain voltage waveform, and drain current waveform of the test element (100).
[0069] In another example, instead of acquiring the entire waveform of the voltage and / or current, a measurement function mounted on the instrument (150) may be used. For example, voltage values, current values, and / or energy values may be read from the time specified by the user or controller (170) after the test element (100) is turned off. In this way, when using the function mounted on the instrument (150), the measurement time can be reduced compared to the case where calculations are made from the waveform acquired via communication from the controller (170), thereby improving the measurement throughput.
[0070] However, since commercial measuring instruments (150) may not be able to implement all the desired various functions, it may be desirable for the controller (170) to perform the function of calculating and / or comparing energy in order to universally implement the devised algorithm.
[0071] In process S560, the measurement results can be analyzed to determine whether the test element (100) is destroyed. The controller (170) can determine whether the test element (100) is destroyed based on the acquired waveform and / or calculated energy.
[0072] For example, as described above in FIG. 3, the controller (170) can determine whether the test element (100) is destroyed based on current values measured at multiple points in time intervals during which the test element (100) is turned off.
[0073] As another example, as described above in FIGS. 4a to 4c, the controller (170) can determine whether the test element (100) is destroyed based on the energy before and after the test element (100) is turned off. To do this, the controller (170) can calculate the energy by integrating the product of the drain current and the drain voltage. The controller (170) can determine whether the test element (100) is destroyed based on the energy (400a to 400c) corresponding to time point t6 within the time interval in which the test element (100) is turned off, and / or the energy (410c) corresponding to any time point t7 after time point t6. As in the example of FIG. 4a, the controller (170) can determine that the test element (100) is destroyed if the total energy (400a) at time point t6 has a positive value. As shown in the example of FIG. 4c, the controller (170) may determine that the test element (100) is destroyed even if the energy (400c) at time t6 has a value close to zero, but the energy (410c) at time t7 thereafter has a positive value. Here, time t6 may be the point in time when the absolute value of the difference between the energy at time t2, when the test element (100) is turned off, and the energy at time t6 becomes equal to the energy at time t2. At this time, considering measurement and / or calculation errors, the energy (400a to 400c) at a point in time after a certain amount of time has elapsed from the point in time when the two values become equal may be extracted. In a preferred example, the energy at a point in time after 1 to 3 µs or more has elapsed from the point in time when the two energy amounts become equal may be extracted. Additionally, time t7 may be a point in time within a time interval of 1 to 2 µs immediately preceding the end time of the capture time, time t8.
[0074] In process S570, a subsequent test process may be performed or the test may be terminated based on whether the test element (100) is destroyed. For example, if destruction occurs, 1 is added to the check value, and if the check value is greater than or equal to the set value, it is determined that the test element (100) is destroyed, and the process proceeds to process S580 to output the result value. On the other hand, if the check value is less than the set value, the element is not destroyed, so the process proceeds to process S520 to calculate the test variable for the next test.
[0075] Meanwhile, if the measurement function of the measuring instrument (150) is used to improve measurement throughput in process S500, it is preferable not to output a waveform while processes S520 to S570 are repeated until device destruction occurs, and to output a waveform only in process S580.
[0076] Each component of the device or method according to the present invention may be implemented in hardware or software, or in a combination of hardware and software. Additionally, the function of each component may be implemented in software, and a microprocessor may be implemented to execute the function of the software corresponding to each component.
[0077] Various embodiments of the systems and techniques described herein may be realized as digital electronic circuits, integrated circuits, field programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include being implemented as one or more computer programs executable on a programmable system. A programmable system comprises a storage system, at least one input device, and at least one programmable processor (which may be a special-purpose processor or a general-purpose processor) coupled to receive data and instructions from and transmit data and instructions to at least one output device. Computer programs (which are also known as programs, software, software applications, or code) include instructions for the programmable processor and are stored on a "computer-readable recording medium."
[0078] Computer-readable recording media include all types of recording devices in which data that can be read by a computer system is stored. Such computer-readable recording media may be non-volatile or non-transitory media such as ROM, CD-ROM, magnetic tape, floppy disk, memory card, hard disk, magneto-optical disk, and storage device, and may also include transitory media such as data transmission media. Additionally, computer-readable recording media may be distributed across networked computer systems, and computer-readable code may be stored and executed in a distributed manner.
[0079] Although the flowcharts and timing diagrams in this specification describe each process as being executed sequentially, this is merely an illustrative explanation of the technical concept of one embodiment of the present disclosure. In other words, a person skilled in the art to which one embodiment of the present disclosure belongs may modify and adapt the flowcharts and timing diagrams in various ways, such as changing the order described in the flowcharts and timing diagrams or executing one or more of the processes in parallel, without departing from the essential characteristics of one embodiment of the present disclosure; therefore, the flowcharts and timing diagrams are not limited to a chronological order.
[0080] The above description is merely an illustrative explanation of the technical concept of the present embodiment, and a person skilled in the art to which the present embodiment belongs would be able to make various modifications and variations within the scope of the essential characteristics of the present embodiment. Accordingly, the present embodiments are intended to explain, not limit, the technical concept of the present embodiment, and the scope of the technical concept of the present embodiment is not limited by these embodiments. The scope of protection of the present embodiment shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of the present embodiment. Explanation of the symbols
[0081] 10: Robustness evaluation device 100: Test component 110: Power supply 120: Switch 130: Capacitor 140: Inductive load 150: Measuring instrument 160: Signal generator 170: Controller
Claims
Claim 1 A robustness evaluation device for evaluating the robustness of a semiconductor device, comprising: a power supply for supplying power for testing; a signal generator connected to a first terminal of the semiconductor device and generating a pulse-shaped test signal for turning on and turning off the semiconductor device; an inductive load connected to a second terminal of the semiconductor device; and a measuring instrument connected to the second terminal of the semiconductor device and measuring one or more of voltage, current, and energy. A robustness evaluation device comprising: a controller that determines whether the semiconductor device is destroyed by using a plurality of measured values measured by the measuring instrument during a time interval in which the semiconductor device is turned off; wherein the controller determines whether the semiconductor device is destroyed based on whether the energy at a first reference point within the time interval in which the semiconductor device is turned off satisfies a preset condition, and the first reference point is determined based on the point in time when the absolute value of the difference between the energy at the time the semiconductor device is turned off and the energy at the first reference point becomes equal to the absolute value of the difference between the energy at the time the semiconductor device is turned off and the energy at the time the semiconductor device is turned on. Claim 2 delete Claim 3 A robustness evaluation device according to claim 1, wherein the first reference point is a point in time after a predetermined delay time has elapsed from the point in time when the two absolute values become equal. Claim 4 In claim 1, the controller calculates the energy by accumulating the product of the voltage value and the current value measured by the measuring instrument, a robustness evaluation device. Claim 5 A robustness evaluation device according to claim 1, wherein the controller determines that the semiconductor device is destroyed when the energy at the first reference time is greater than or equal to a first threshold or less than or equal to a second threshold, wherein the first threshold has a positive value and the second threshold has a negative value. Claim 6 A robustness evaluation device according to claim 1, wherein the controller determines whether the energy at the first reference point satisfies the condition, and further checks whether the energy at one or more second reference points after the first reference point satisfies the condition, thereby determining whether the semiconductor device is destroyed. Claim 7 In claim 6, the second reference point is a robustness evaluation device selected within a time interval having a predetermined length prior to the capture end point of the measuring instrument. Claim 8 A robustness evaluation device according to claim 1, wherein the controller determines whether the semiconductor device is destroyed based on a plurality of current values measured at a predetermined time interval during a time interval in which the semiconductor device is turned off. Claim 9 A robustness evaluation device according to claim 1, further comprising: a capacitor connected to a third terminal of the semiconductor device and the inductive load; and one or more switches connected between the capacitor and the power supply, wherein the controller short-circuits the switch to charge the capacitor, and after the charging of the capacitor is completed, opens the switch to electrically isolate the circuit formed by the capacitor, the inductive load, and the semiconductor device from the power supply. Claim 10 A robustness evaluation device according to claim 9, wherein the controller, when it is determined that the semiconductor device is not destroyed, re-performs charging and insulation of the capacitor and transmits a test variable updated by a predetermined incremental value to one or more of the measuring instrument and the signal generator, wherein the test variable includes one or more of the pulse width of the test signal and the energy to be stored in the inductive load during the time interval in which the semiconductor device is turned on. Claim 11 A method for driving a robustness evaluation device of a semiconductor device comprising: a signal generator connected to a first terminal of a semiconductor device; an inductive load connected to a second terminal of the semiconductor device; and a measuring instrument connected to the second terminal of the semiconductor device to measure one or more of voltage, current, and energy, the method comprising: a process of turning on the semiconductor device to store energy in the inductive load; and a process of turning off the semiconductor device to consume the energy stored in the inductive load. A driving method comprising a process of determining whether the semiconductor device is destroyed using a plurality of measured values measured by the measuring instrument during a time interval in which the semiconductor device is turned off, wherein the determining process determines whether the semiconductor device is destroyed based on whether the energy at a first reference point within the time interval in which the semiconductor device is turned off satisfies a preset condition, wherein the first reference point is determined based on the point in time when the absolute value of the difference between the energy at the time when the semiconductor device is turned off and the energy at the first reference point becomes equal to the absolute value of the difference between the energy at the time when the semiconductor device is turned off and the energy at the time when the semiconductor device is turned on.
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