Jetting driver, apparatus and method for processing substrate

Abstract

A jetting driver is provided that can be used with various types of heads with minimal modification. The jetting driver includes: an image board that receives raw image data and generates image data by transforming it into a form suitable for the type of head being used; and an interface board that is physically separated from the image board, receives the image data, and transmits the image data to multiple heads through multiple channels.

Description

Technology Field

[0001] The present invention relates to a jetting driver, a substrate processing device and a method. Background Technology

[0002] Inkjet devices can be used when manufacturing display devices. The jetting driver of an inkjet device is used to drive a head to eject liquid or pattern onto a glass substrate.

[0003] Meanwhile, various types of print heads can be used depending on the chemicals used in the inkjet device or the required precision. However, whenever a print head is replaced, the jetting driver that operates the head must also be changed. Making such changes requires a significant amount of time and resources. The problem to be solved

[0004] The problem that the present invention aims to solve is to provide a jetting driver that can be used with various types of heads with minimal modification.

[0005] Another problem that the present invention aims to solve is to provide a substrate processing device using the jetting driver.

[0006] Another problem that the present invention aims to solve is to provide a substrate processing method using the jetting driver.

[0007] The problems of the present invention are not limited to those mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0008] One aspect of the jetting driver of the present invention for achieving the above objective comprises: an image board that receives raw image data and generates image data by transforming it into a form suitable for the type of head used; and an interface board that is physically separated from the image board, receives the image data, and transmits the image data to a plurality of heads through a plurality of channels.

[0009] The image board above includes a Field Programmable Gate Array (FPGA), and the FPGA is reprogrammed according to the type of head used.

[0010] The above interface board further includes a plurality of differential line transmitters for communicating with a plurality of heads.

[0011] The above image data is transmitted in the form of a differential signal through the differential line transmitter.

[0012] The above interface board further includes a heater controller, and the heater controller controls a heater installed within the head so that the head can reach a target temperature.

[0013] The above interface board further includes a voltage controller, and the voltage controller specifies a plurality of voltage levels to be used by the head.

[0014] The above interface board further includes a voltage controller, and the voltage controller further includes an amplifier for generating a voltage to drive a nozzle installed in the head, and the use of the amplifier is determined according to the type of the head.

[0015] When the above head is of the DPN (drive per nozzle) type, the above amplifier is used, and

[0016] If the above head is of the DPH (drive per head) type, the above amplifier is not used.

[0017] The above image board is connected to the operating computer via EtherCAT, and

[0018] The image board provides the status of the jetting driver to the operating computer, enabling the operating computer to monitor the jetting driver.

[0019] The image board and the interface board are connected via a board-to-board connector.

[0020] One aspect of the jetting driver of the present invention for achieving the above other objectives comprises: a pattern computer providing raw image data and setting data; and a jetting driver that controls a plurality of heads based on the raw image data and the setting data, wherein the jetting driver comprises an image board and an interface board that are physically separated from each other, wherein the image board comprises a Field Programmable Gate Array (FPGA) that generates image data by transforming it into a form suitable for the type of head used based on the raw image data, and wherein the interface board comprises a plurality of differential line transmitters for communicating with the plurality of heads, an image controller that receives the image data and provides it to the plurality of differential line transmitters, a heater controller that provides a heater control signal to the plurality of differential line transmitters for controlling a heater installed in the head, and a voltage controller that provides a voltage control signal to the plurality of differential line transmitters for specifying a voltage level to be used in the plurality of heads.

[0021] The above image board is connected to an operating computer via EtherCAT, and the image board provides the status of the jetting driver to the operating computer, so that the operating computer can monitor the jetting driver.

[0022] The image board and the interface board can be connected via a board-to-board connector.

[0023] The above voltage controller further includes an amplifier for generating a voltage to drive a nozzle installed in the head, and the use of the amplifier may be determined according to the type of the head.

[0024] If the head is of the DPN (drive per nozzle) type, the amplifier is used, and if the head is of the DPH (drive per head) type, the amplifier may not be used.

[0025] One aspect of the jetting driver of the present invention for achieving the above-mentioned additional objective comprises an image board and an interface board that are physically separated from each other, wherein the image board is provided with a jetting driver that includes a Field Programmable Gate Array (FPGA), wherein the image board receives first raw image data and transforms it into a form suitable for a first head of a first type to generate first image data, wherein the interface board receives the first image data and transmits the first image data to a plurality of first heads through a plurality of channels, wherein the plurality of first heads are replaced with a plurality of second heads, wherein the second heads are of a second type different from the first type, and the FPGA of the image board is reprogrammed to be suitable for the second type, wherein the image board receives second raw image data and transforms it into a form suitable for a second head of a second type to generate second image data, and wherein the interface board receives the second image data and transmits the second image data to a plurality of second heads through a plurality of channels.

[0026] Here, the image board and the interface board can be connected via a board-to-board connector.

[0027] Additionally, the interface board further includes a voltage controller, and the voltage controller further includes an amplifier for generating a voltage to drive a nozzle installed in the head, and the use of the amplifier may be determined according to the type of the head.

[0028] In addition, if the head is of the DPN (drive per nozzle) type, the amplifier is used, and if the head is of the DPH (drive per head) type, the amplifier may not be used.

[0029] Specific details of other embodiments are included in the detailed description and drawings. Brief explanation of the drawing

[0030] FIG. 1 is a block diagram illustrating a jetting driver according to some embodiments of the present invention. Figure 2 is a block diagram illustrating the image board of Figure 1. Figure 3 is a block diagram illustrating the interface board of Figure 1. FIG. 4 is a block diagram illustrating an exemplary structure of the head shown in FIG. 1. FIGS. 5 and 6 are drawings for illustrating a substrate processing apparatus according to some embodiments of the present invention. FIG. 7 is a block diagram illustrating a jetting driver according to another embodiment of the present invention. FIG. 8 is a flowchart illustrating a substrate processing method according to some embodiments of the present invention. Specific details for implementing the invention

[0031] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The advantages and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but can be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Throughout the specification, the same reference numerals refer to the same components.

[0032] Spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used to facilitate the description of the relationship between one element or component and another, as illustrated in the drawings. Spatially relative terms should be understood as encompassing different orientations of the element during use or operation, in addition to the orientations illustrated in the drawings. For example, if an element illustrated in the drawings is flipped, the element described as "below" or "beneath" of another element may be placed "above" of that other element. Therefore, the exemplary term "below" may encompass both the lower and upper directions. Elements may also be oriented in other directions, and accordingly, spatially relative terms may be interpreted according to the orientation.

[0033] Although terms such as "first," "second," etc. are used to describe various elements, components, and / or sections, it goes without saying that these elements, components, and / or sections are not limited by these terms. These terms are used merely to distinguish one element, component, or section from another. Accordingly, it goes without saying that the first element, first component, or first section mentioned below may be a second element, second component, or second section within the technical scope of the present invention.

[0034] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. In describing with reference to the attached drawings, identical or corresponding components are given the same reference number regardless of the drawing symbols, and redundant descriptions thereof will be omitted.

[0035] FIG. 1 is a block diagram illustrating a jetting driver according to some embodiment of the present invention. FIG. 2 is a block diagram illustrating an image board of FIG. 1. FIG. 3 is a block diagram illustrating an interface board of FIG. 1. FIG. 4 is a block diagram illustrating an exemplary structure of a head shown in FIG. 1.

[0036] First, referring to FIG. 1, a jetting driver (10) according to some embodiments of the present invention includes an image board (100) and an interface board (200).

[0037] The image board (100) is provided with setting data (SD) and raw image data (RID).

[0038] The setting data (SD) may be information related to basic settings required for the operation of the heads (H1 to H8). For example, the setting data (SD) may include information regarding the waveform of a voltage for controlling a piezo element installed inside the heads (H1 to H8) (e.g., rising time, falling time, high level holding time, low level holding time, etc.), information regarding the voltage level used (e.g., 3V, 5V, 10V, 15V, etc.), and the target temperature that the heads (H1 to H8) must maintain.

[0039] The image board (100) uses setting data (SD) to generate a first setting signal (SD1) for controlling the temperature of the heads (H1~H8) and a second setting signal (SD2) for controlling the voltage to be used in the heads (H1~H8).

[0040] The raw image data (RID) may be information related to the image that the heads (H1 to H8) must eject onto the substrate. That is, it may be information regarding what shape (e.g., square, triangle, circle, zigzag, etc.) the heads (H1 to H8) must eject the liquid onto the substrate.

[0041] The image board (100) receives raw image data (RID) and transforms it into a form suitable for the type of head being used to generate image data (ID). Regarding the transformation into a "form suitable for the type of head," the interface may differ depending on the type of head, even if the manufacturer is different or the same manufacturer. In other words, since the interface is not standardized, the transmission sequence may differ depending on the manufacturer / type of the head. Therefore, the image board (100) generates image data (ID) in a form suitable for the head manufacturer / type (for example, in accordance with the transmission sequence determined by the head manufacturer).

[0042] Here, referring to FIG. 2, the image board (100) includes input terminals for providing setting data (SD) and raw image data (RID), and output terminals for outputting a first setting signal (SD1), a second setting signal (SD2), and image data (ID). Additionally, the image board (100) includes a processor (110) and a Field Programmable Gate Array (FPGA) (120).

[0043] As described above, the processor (110) can generate and provide a first setting signal (SD1) and a second setting signal (SD2) using setting data (SD). Additionally, the processor (110) can exchange data with a pattern computer (see 60 in FIG. 5) that provides raw image data (RID) and setting data (SD), an operating computer (50 in FIG. 5), and an encoder manager (52 in FIG. 5).

[0044] An FPGA (120) is a semiconductor device containing designable logic elements and / or programmable internal circuits. The FPGA (120) can be reprogrammed in the field by a user (or consumer, designer) even after it has been manufactured. Through this field programming, the FPGA (120) can perform various logic functions. Therefore, when a head is replaced or changed, the user can reprogram the FPGA (120) according to the type of the replaced head (i.e., so that it can perform operations suitable for the replaced head). The FPGA (120) generates image data (ID) by transforming raw image data (RID) into a form suitable for the type of the replaced head. Therefore, even if the head is replaced or changed, the FPGA (120) can be reprogrammed and used, so there is no need to change the image board (100).

[0045] Referring again to FIG. 1, the interface board (200) performs an interfacing operation between the image board (100) and a plurality of heads (H1 to H8).

[0046] For example, the interface board (200) receives a first setting signal (SD1), a second setting signal (SD2), image data (ID), etc. from the image board (100) and provides them to a plurality of heads (H1 to H8). In addition, the interface board (200) may receive status information of the heads (H1 to H8) (e.g., temperature information of the heads (H1 to H8)) from the plurality of heads (H1 to H8), and may control the heads (H1 to H8) in response to the status information or provide the status information to the image board (100). Such status information of the heads (H1 to H8) may be transmitted to an operating computer (see 50 in FIG. 5) through the image board (100).

[0047] Additionally, the image board (100) and the interface board (200) are physically separated. The image board (100) and the interface board (200) are connected by a board-to-board connector, allowing them to communicate with each other through the board-to-board connector.

[0048] Here, referring to FIG. 3, the interface board (200) may include an image controller (210), a voltage controller (220), a heater controller (230), a plurality of differential line transmitters (DLT1~DLT8), etc.

[0049] The image controller (210) transmits image data (ID) provided by the FPGA (120) to multiple heads (H1 to H8) through multiple channels. Although only 8 channels are illustrated as an example in the drawing, it is not limited thereto. The number of channels can vary, such as 2, 4, 16, or 64.

[0050] The transmitted image data (ID) is transformed into a differential signal form by multiple differential line transmitters (DLT1~DLT8) and transmitted to multiple heads (H1~H8). The reason for transforming and transmitting it into a differential signal is to minimize the impact of interference that may occur during the process of transmission from the jetting driver (10) to the multiple heads (H1~H8).

[0051] Additionally, the heater controller (230) receives a first setting signal (SD1) and provides a heater control signal (HCS) that controls a heater (see 320 in FIG. 4) installed in the heads (H1 to H8) so that the heads (H1 to H8) can reach a target temperature. As illustrated, the heater control signal (HCS) is transmitted to multiple heads (H1 to H8) through multiple channels.

[0052] The voltage controller (220) receives a second setting signal (SD2) and can provide a voltage control signal (VCS) that specifies multiple voltage levels to be used by the heads (H1 to H8). As illustrated, the voltage control signal (VCS) is transmitted to multiple heads (H1 to H8) through multiple channels.

[0053] Meanwhile, multiple differential line transmitters (DLT1 to DLT8) provide image data (ID), heater control signals (HCS), and voltage control signals (VCS) in the form of differential signals. Accordingly, multiple line receivers receive differential signals from the corresponding differential line transmitters (DLT1 to DLT8), convert them into single-ended signals, and provide them to the corresponding heads (H1 to H8).

[0054] The heater controller (230), voltage controller (220), and image controller (210) can be implemented with one or several MCUs (Micro Control Units).

[0055] Referring to FIG. 4, the head (e.g., H1) may include a logic chip (310), a heater (320), a control voltage generator (330), an amplifier (340), a plurality of piezo elements (P1 to Pn, where n is a natural number), and a plurality of nozzles (N1 to Nn, where n is a natural number).

[0056] The logic chip (310) receives image data (ID), heater control signal (HCS), and voltage control signal (VCS) and can control a number of function blocks (e.g., 320, 330, P1~Pn, etc.) within the head (H1).

[0057] The logic chip (310) enables the temperature of the heater (320) to reach a target temperature according to the instructions of the heater control signal (HCS). The viscosity of the liquid medicine changes depending on the temperature of the heater (320). If the viscosity of the liquid medicine changes, even if a preset voltage is applied to the piezo elements (P1~Pn), a preset amount of liquid medicine is not discharged. Therefore, it is necessary to continuously manage the temperature of the heater (320).

[0058] The logic chip (310) controls the control voltage generator (320) to operate in time according to a plurality of voltage levels and voltage waveforms specified by the voltage control signal (VCS).

[0059] An amplifier (340) is installed inside the control voltage generator (320). Even if a high level voltage is not applied through the power line, the amplifier (340) can raise a low level voltage to a preset voltage level.

[0060] A plurality of piezo elements (P1~Pn) receive a control voltage from a control voltage generator (430) to cause nozzles (N1~Nn) to discharge the liquid medicine. Although not separately illustrated, nozzles (N1~Nn) are connected to a reservoir that stores the liquid medicine, receive the liquid medicine from the reservoir, and discharge the liquid medicine according to the control voltage.

[0061] In summary, a jetting driver (10) according to some embodiments of the present invention includes a physically separated image board (100) and an interface board (200). Even if the heads (H1 to H8) to be used are changed or replaced, the FPGA (see 120 in FIG. 2) of the image board (100) can be reprogrammed and used. Therefore, there is no need to replace the entire jetting driver (10). If necessary, only the interface board (200) can be replaced, or the interface board (200) can be reused with minimal modification.

[0062] FIGS. 5 and 6 are drawings for explaining a substrate processing apparatus according to some embodiments of the present invention. The explanation will focus on the differences from the description using FIGS. 1 to 4.

[0063] First, referring to FIGS. 5 and 6, the substrate processing device may include a jetting driver (10), an operating computer (50), a pattern computer (60), and an encoder manager (52).

[0064] The pattern computer (60) provides setting data (SD) and raw image data (RID) to the jetting driver (10). As described above, the setting data (SD) is information related to the basic settings required for the operation of the heads (H1 to H8), and may be information regarding voltage waveforms, voltage levels, target temperatures that the heads (H1 to H8) must maintain, etc. The raw image data (RID) is information related to the images that the heads (H1 to H8) must eject onto the substrate.

[0065] The operating computer (50) communicates with the motion controller (55) of FIG. 6 and can control the equipment shown in FIG. 6 through the motion controller (55).

[0066] The equipment includes a process area (PT) and a maintenance area (MT). A gantry (410) is positioned across the process area (PT) and the maintenance area (MT). A plurality of heads (420) are installed on the gantry (410), and the heads (420) can move along the extension direction of the gantry (410) (left and right direction in the drawing). That is, the heads (420) can discharge liquid medicine in both the process area (PT) and the maintenance area (MT).

[0067] A stage (430) is positioned on the process area (PT), and the stage (430) can move along the longitudinal direction of the process area (PT) (up and down direction in the drawing). A glass substrate is placed on the stage (430), and while the stage (430) moves up and down multiple times under the gantry (410), multiple heads (420) discharge a chemical solution onto the glass substrate.

[0068] The maintenance area (MT) is an area for maintaining the heads (H1~H8) or checking the condition of the heads (H1~H8). Although not separately illustrated, a test film that rotates in a roll-to-roll manner is placed in the maintenance area (MT), and a plurality of heads (420) discharge chemical liquid onto the test film. Through this, the amount and density of the chemical liquid discharged from each nozzle of the head (420) can be checked, or whether the nozzle is clogged or if too much liquid is being discharged compared to a preset amount can be checked.

[0069] Here, referring to FIG. 5, the encoder manager (52) provides a trigger signal to a plurality of jetting drivers (10) using an encoder signal indicating the position of the stage (430). As described above, while the stage (430) moves up and down, the heads (H1 to H8) discharge the liquid medicine. Therefore, the exact position of the stage (430) must be known so that the heads (H1 to H8) can discharge the liquid medicine at the correct position. Based on this trigger signal, the jetting drivers (10) control the starting point of the liquid medicine discharge of the heads (H1 to H8).

[0070] The operating computer (50) receives a trigger signal from the encoder manager (52), compares the position of the stage (430) with the trigger signal, and can check whether there is an abnormality in the trigger signal.

[0071] Meanwhile, the jetting driver (10) (i.e., the image board (100)) is connected to the operating computer (50) via an industrial network, EtherCAT. The image board (100) provides the status of the jetting driver (10) to the operating computer (50), allowing the operating computer (50) to monitor the jetting driver (10). Since the jetting driver (10) is connected to the operating computer (50) via EtherCAT, the operating computer (50) can quickly know the status of the jetting driver (10) in real time.

[0072] Additionally, the operating computer (50) may receive status information of the heads (H1~H8) through the interface board (200) and the image board (100) to determine the status of the heads (H1~H8). Depending on the determined status of the heads (H1~H8), the operating computer (50) may request the pattern computer (60) to change the setting data (SD). For example, if the operating computer (50) thinks that the actual temperature of the heads (H1~H8) is high, it may request the pattern computer (60) to lower the target temperature further. The pattern computer (60) may modify the target temperature included in the setting data (SD) in accordance with the request of the operating computer (50).

[0073] Additionally, the jetting driver (10) and the encoder manager (52) can also be connected via EtherCAT. The encoder manager (52) and the operating computer (50) can also be connected via EtherCAT. The operating computer (50) can quickly check the trigger signal provided by the encoder manager (52) in real time. Therefore, the operating computer (50) can have a monitoring function to detect in advance conditions such as non-discharge or pattern misalignment that may occur during mass production.

[0074] FIG. 7 is a block diagram illustrating a jetting driver according to another embodiment of the present invention. For convenience of explanation, substantially identical content to that described using FIG. 3 is omitted below.

[0075] Referring to FIG. 7, the interface board (200) of the jetting driver (10) includes an image controller (210), a voltage controller (220), a heater controller (230), a plurality of differential line transmitters, etc.

[0076] In particular, the voltage controller (220) further includes an amplifier (222) for generating a voltage to drive a nozzle installed in the head (H1~H8), and the voltage controller (220) can determine whether to use the amplifier (222) depending on the type of the head (H1~H8).

[0077] For example, the heads (H1 to H8) may be of the DPH (Drive Per Head) type (see FIG. 4) including an amplifier (340). The DPH type heads (H1 to H8) are controlled on a head-by-head basis by the jetting driver (200) and are not controlled on a nozzle-by-nozzle basis. In this case, the amplifier (222) of the voltage controller (220) is not used. Even if the voltage controller (220) provides only the voltage control signal (VCS) and image data (SD), the control voltage generator (330) of the heads (H1 to H8) can provide a control voltage to the piezo elements (P1 to Pn) in accordance with a preset voltage level.

[0078] On the other hand, the heads (H1~H8) may be of the DPN (Drive Per Nozzle) type, which does not include an amplifier. The DPN type heads (H1~H8) are controlled at the nozzle level by the jetting driver (200). In this case, the amplifier (222) of the voltage controller (220) is used. The voltage controller (220) must provide the heads (H1~H8) with a voltage control signal (VCS), image data (SD), as well as a voltage to control the piezo elements (P1~Pn) having a preset voltage level.

[0079] A jetting driver (10) according to some embodiments of the present invention includes a physically separated image board (100) and an interface board (200). Even if the heads (H1 to H8) to be used are changed or replaced, the FPGA (see 120 in FIG. 2) of the image board (100) can be reprogrammed and used.

[0080] In addition, for example, even if the DPH type head (H1~H8) is changed to a DPN type head (H1~H8), the interface board (200) can be used without changing the interface board (200), by only changing the settings of the interface board (200). That is, a single interface board (200) can be applied to both the DPH type head (H1~H8) and the DPN type head (H1~H8).

[0081] FIG. 8 is a flowchart illustrating a substrate processing method according to some embodiments of the present invention.

[0082] Referring to FIG. 8, a jetting driver (10) described using FIGS. 1 to 6 is provided (S505). That is, the jetting driver (10) includes an image board (100) and an interface board (200) that are physically separated from each other, and the image board (100) may include a Field Programmable Gate Array (FPGA).

[0083] Next, a first type of first head is controlled using a pre-installed jetting driver (10) (S510). Specifically, an image board (100) receives first raw image data and transforms it into a form suitable for a first type of first head to generate first image data. An interface board (200) receives the first image data and transmits the first image data (ID) to a plurality of first heads through a plurality of channels.

[0084] Next, the first head of the first type is replaced with the second head of the second type (H1~H8) for reasons such as the type of liquid or precision (S520). The first type and the second type are different types. For example, the first type may be a DPH type and the second type may be a DPN type.

[0085] Next, the FPGA (120) of the image board (100) is reprogrammed to be suitable for the second type (S530). Additionally, the settings of the interface board (200) can be changed. For example, the use of the amplifier (222) within the voltage controller (220) of the interface board (200) can be changed. Alternatively, the interface board (200) can be replaced with one suitable for the second type.

[0086] Next, a second type of second head is controlled using a reprogrammed jetting driver (10) (S540). Specifically, an image board (100) receives second raw image data and generates second image data by transforming it into a form suitable for a second type of second head. Additionally, an interface board (200) receives the second image data and transmits the second image data to a plurality of second heads through a plurality of channels.

[0087] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing its technical concept or essential features. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0088] 10: Jetting Driver 100: Image Board 110: Processor 120: FPGA 200: Interface board 210: Image controller 220: Voltage Controller 230: Heater Controller

Claims

Claim 1 An image board that receives raw image data and generates image data by transforming it into a form suitable for the type of head used; and an interface board that is physically separated from the image board, receives the image data, and transmits the image data to multiple heads through multiple channels, wherein the image board includes a Field Programmable Gate Array (FPGA) and the FPGA is reprogrammed according to the type of head used. Claim 2 delete Claim 3 A jetting driver according to claim 1, wherein the interface board further comprises a plurality of differential line transmitters for communicating with a plurality of heads. Claim 4 In claim 3, the image data is transmitted in the form of a differential signal through the differential line transmitter, a jetting driver. Claim 5 In claim 1, the interface board further includes a heater controller, and the heater controller controls a heater installed in the head so that the head can reach a target temperature, a jetting driver. Claim 6 In claim 1, the interface board further includes a voltage controller, and the voltage controller is a jetting driver that specifies a plurality of voltage levels to be used by the head. Claim 7 In claim 1, the interface board further includes a voltage controller, the voltage controller further includes an amplifier for generating a voltage to drive a nozzle installed in the head, and the amplifier is a jetting driver whose use is determined according to the type of the head. Claim 8 A jetting driver according to claim 7, wherein the amplifier is used when the head is of the DPN (drive per nozzle) type, and the amplifier is not used when the head is of the DPH (drive per head) type. Claim 9 A jetting driver according to claim 1, wherein the image board is connected to an operating computer via EtherCAT, and the image board provides the status of the jetting driver to the operating computer so that the operating computer can monitor the jetting driver. Claim 10 A jetting driver according to claim 1, wherein the image board and the interface board are connected by a board-to-board connector. Claim 11 A substrate processing device comprising: a pattern computer providing raw image data and setting data; and a jetting driver that controls a plurality of heads based on the raw image data and the setting data, wherein the jetting driver includes an image board and an interface board that are physically separated from each other, wherein the image board includes a Field Programmable Gate Array (FPGA) that generates image data by transforming it into a form suitable for the type of head used based on the raw image data, and wherein the interface board includes a plurality of differential line transmitters for communicating with the plurality of heads, an image controller that receives the image data and provides it to the plurality of differential line transmitters, a heater controller that provides a heater control signal for controlling a heater installed in the head to the plurality of differential line transmitters, and a voltage controller that provides a voltage control signal for specifying a voltage level to be used in the plurality of heads to the plurality of differential line transmitters. Claim 12 A substrate processing device according to claim 11, wherein the image board is connected to an operating computer via EtherCAT, and the image board provides the status of the jetting driver to the operating computer so that the operating computer can monitor the jetting driver. Claim 13 A substrate processing device according to claim 11, wherein the image board and the interface board are connected by a board-to-board connector. Claim 14 In claim 11, the voltage controller further comprises an amplifier for generating a voltage to drive a nozzle installed in the head, and the use of the amplifier is determined according to the type of the head, a substrate processing device. Claim 15 A substrate processing device according to claim 14, wherein the amplifier is used when the head is of the DPN (drive per nozzle) type, and the amplifier is not used when the head is of the DPH (drive per head) type. Claim 16 A substrate processing method comprising an image board and an interface board physically separated from each other, wherein the image board is provided with a jetting driver including a Field Programmable Gate Array (FPGA), the image board receives first raw image data and transforms it into a form suitable for a first head of a first type to generate first image data, the interface board receives the first image data and transmits the first image data to a plurality of first heads through a plurality of channels, and replaces the plurality of first heads with a plurality of second heads, wherein the second heads are of a second type different from the first type, and reprograms the FPGA of the image board to be suitable for the second type, the image board receives second raw image data and transforms it into a form suitable for a second head of a second type to generate second image data, and the interface board receives the second image data and transmits the second image data to a plurality of second heads through a plurality of channels. Claim 17 A substrate processing method according to claim 16, wherein the image board and the interface board are connected by a board-to-board connector. Claim 18 In claim 16, the interface board further includes a voltage controller, the voltage controller further includes an amplifier for generating a voltage to drive a nozzle installed in the head, and the use of the amplifier is determined according to the type of the head, a method for processing a substrate. Claim 19 A substrate processing method according to claim 18, wherein the amplifier is used when the head is of the DPN (drive per nozzle) type, and the amplifier is not used when the head is of the DPH (drive per head) type.

Images