Virtual historical simulation system for semiconductor device technology

Abstract

The present invention relates to a virtual history simulation system for semiconductor device technology. The virtual history simulation system comprises: a plurality of process ownership modules that store process recipes for semiconductor device structures and, based on initial conditions and constraints input from the outside, generate and output process recipes satisfying the initial conditions and constraints from the stored process recipes according to a preset optimization algorithm; a process emulator that generates and outputs a semiconductor device structure according to the process recipes provided by the process ownership modules; a device simulator that simulates the performance of the semiconductor device structure output from the process emulator and outputs simulated performance indicators; and a constraint management module having a constraint providing module that provides constraints to the process ownership modules; thereby being configured to develop a semiconductor device structure satisfying the initial conditions and constraints. By enabling multiple process-owning modules to compete with each other and share information, the development speed of semiconductor device structures can be improved.

Description

Technology Field

[0001] The present invention relates to a virtual history simulation system for semiconductor device technology, and more specifically, to a virtual history simulation system for semiconductor device technology configured to not only develop optimized semiconductor device structures or predict future development directions, but also simulate past technological advancements, by repeating the process of generating semiconductor device structures satisfying new conditions and constraints based on process recipes for semiconductor device structures and simulating the performance of the generated semiconductor device structures. Background Technology

[0002] Semiconductor device technology has been advancing over the past few decades. Among semiconductor devices, the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is the primary device currently in use. Until the 2000s, MOSFETs evolved into planar structures; subsequently, FinFET structures were introduced in the early 2010s, and the technology is shifting toward nanosheet structures as we enter the 2020s. Furthermore, it is predicted that the technology will evolve into Complementary Field-Effect Transistor (CFET) structures in the future. Each of these historical stages of change in semiconductor device technology can be viewed as representing the best possible direction of development achievable at the technological level of that time.

[0003] If the history of such semiconductor device technology development can be virtually simulated, it could also be used as a means to predict future development directions by integrating it with the current level of technology.

[0004] The general development process for semiconductor device technology according to conventional technology is as follows. First, a user proposes a semiconductor device structure having target characteristics. Next, electrical characteristics are predicted by simulating the performance of the semiconductor device structure proposed by the user using a device simulator based on TCAD (Technology Computer-Aided Design). Based on the predicted results of the electrical characteristics, the user repeats the process of improving the semiconductor device structure in a direction that achieves the target characteristics. Through these iterative processes, a semiconductor device structure with the desired performance and characteristics is finally developed. However, these development processes have the problem of being manual and time-consuming.

[0005] Therefore, extensive efforts and research are underway to further automate these processes. One such effort is the study of semiconductor design and optimization using reinforcement learning. Specifically, research is being conducted to model the physical and electrical characteristics of semiconductor devices using reinforcement learning algorithms and to identify optimal design parameters based on this. This aims to improve upon the conventional, manual, and time-consuming design processes and to rapidly develop higher-performance semiconductors.

[0006] However, while various efforts are being made to automate the development process of such semiconductor device technology, there have been no attempts to integrate this with the history of semiconductor device technology development.

[0007] Therefore, the present invention proposes a method to further enhance the development and advancement of semiconductor device technology by enabling a virtual history simulation of semiconductor device technology based on the history of the development of semiconductor device technology. Prior art literature

[0008] Korean Registered Patent Publication No. 10-2572752, Korean Published Patent Publication No. 10-2015-0087725, Korean Published Patent Publication No. 10-2021-0064445 The problem to be solved

[0009] The present invention aims to provide a virtual history simulation system that combines the history of semiconductor device technology development with semiconductor device technology development, thereby enabling the development of an optimized semiconductor device structure that satisfies initial conditions and constraints provided by a user based on the history of semiconductor device technology development. This not only enables the development of an optimized semiconductor device structure and prediction of future technology, but also allows for design education for students or engineers through the reproduction of the past technological development process of semiconductor device structures. means of solving the problem

[0010] To achieve the aforementioned technical objectives, a virtual history simulation system for semiconductor device technology according to the first feature of the present invention comprises: a process ownership module that stores process recipes for semiconductor device structures and, when initial conditions and constraints are input from the outside, generates and outputs a process recipe that satisfies the initial conditions and constraints according to an optimization algorithm; a process emulator that generates and outputs a semiconductor device structure according to the process recipe provided by the process ownership module; a device simulator that simulates the performance of the semiconductor device structure output from the process emulator and outputs simulated performance indicators; and a constraint management module that provides constraints pre-set by the process ownership module; and is configured to develop a semiconductor device structure that satisfies the initial conditions and constraints.

[0011] In a virtual history simulation system for semiconductor device technology according to the first feature described above, the process ownership module is preferably configured to receive feedback on simulated performance indicators for a semiconductor device structure according to the process recipe from a device simulator, compare the feedbacked simulated performance indicators for the semiconductor device structure with the initial conditions, change the process recipe by applying an optimization algorithm based on the comparison result, and output the changed process recipe back to a process emulator to develop a semiconductor device structure optimized for the initial conditions and constraints.

[0012] In a virtual history simulation system for semiconductor device technology according to the first feature described above, it is preferable that the initial condition input to the process ownership module is performance information regarding the semiconductor device structure.

[0013] A virtual history simulation system for semiconductor device technology according to the first feature described above further comprises a plurality of process-owning modules, and it is preferable that the plurality of process-owning modules are provided with different initial conditions and constraints or have different optimization algorithms.

[0014] In a virtual history simulation system for semiconductor device technology according to the first feature described above, the constraint management module is preferably configured to acquire information regarding the semiconductor device structure, information regarding process recipes, and information regarding simulated performance indicators of a plurality of process-owning modules, and to provide one or more of the acquired information to all process-owning modules so that they can share with one another.

[0015] In a virtual history simulation system for semiconductor device technology according to the first feature described above, the plurality of process-owning modules share one or more of information regarding semiconductor device structures, information regarding process recipes, and information regarding simulated performance indicators, and it is preferable to refer to the shared information when generating a process recipe for a new semiconductor device structure.

[0016] A virtual history simulation system for semiconductor device technology according to the second feature of the present invention comprises: a process ownership module that stores process recipes for semiconductor device structures and, when initial conditions are input from the outside, generates and outputs a process recipe that satisfies the initial conditions according to an optimization algorithm; a process emulator that generates and outputs a semiconductor device structure according to the process recipe provided by the process ownership module; a device simulator that simulates the performance of the semiconductor device structure output from the process emulator and outputs simulated performance indicators; and a constraint management module that provides constraints pre-set by the process ownership module; and is configured to develop a semiconductor device structure that satisfies the initial conditions.

[0017] In a virtual history simulation system for semiconductor device technology according to the second feature described above, the process ownership module is configured to receive feedback on simulated performance indicators for a semiconductor device structure according to the process recipe from a device simulator, compare the feedbacked simulated performance indicators for the semiconductor device structure with the initial conditions, change the process recipe by applying an optimization algorithm based on the comparison result, and output the changed process recipe back to a process emulator, thereby developing a semiconductor device structure optimized for the initial conditions.

[0018] In a virtual history simulation system for semiconductor device technology according to the second feature described above, the virtual history simulation system comprises a plurality of process ownership modules, and it is preferable that the plurality of process ownership modules are provided with different initial conditions and constraints or have different optimization algorithms. Effects of the invention

[0019] The virtual history simulation system according to the present invention can spontaneously perform optimization to improve the performance of a semiconductor device from initial conditions given by a user. As a result, the system according to the present invention can develop an optimized semiconductor device structure that satisfies the initial conditions.

[0020] In addition, the virtual history simulation system according to the present invention can develop or simulate an optimal semiconductor device structure that satisfies initial conditions, thereby enabling it to be utilized to predict the future direction of semiconductor device technology or to establish scenarios for the future direction of technology development.

[0021] Furthermore, the virtual history simulation system according to the present invention is configured to receive not only initial conditions but also arbitrary constraints from the user, thereby enabling the development of an optimal semiconductor device structure that satisfies both initial conditions and constraints. In particular, in the system according to the present invention, by setting and providing the constraints based on environmental information or technological levels for each era, it is possible not only to predict the development process of future technology but also to simulate the development process of past technology as a virtual history.

[0022] As such, the system according to the present invention is configured to simulate the development process of past technologies, and thus can be widely utilized for the education of engineers in the industry. In particular, it can be utilized for educational purposes by making the process of performance improvement of the programs constituting the process ownership module according to the present invention available to students or related engineers so that they can experience it indirectly. Furthermore, in the system according to the present invention, the effectiveness of education can be enhanced by enabling direct human decision-making to replace or in conjunction with the process ownership module.

[0023] In addition, the virtual history simulation system according to the present invention is equipped with a plurality of process-owning modules that possess process recipes for different structures of semiconductor devices, thereby enabling the acquisition of an optimal semiconductor device structure capable of providing the best performance through competition among multiple different structures using the plurality of process-owning modules. Furthermore, the system according to the present invention can improve the speed of development by enabling the plurality of process-owning modules to share information with each other. Brief explanation of the drawing

[0024] FIG. 1 is a schematic diagram illustrating a virtual history simulation system for a semiconductor device structure according to a preferred first embodiment of the present invention. FIG. 2 is a schematic diagram illustrating a virtual history simulation system according to a second embodiment of the present invention. FIG. 3 is a graph illustrating a situation in which a plurality of process-owning modules compete for performance improvement in a virtual history simulation system according to a second embodiment of the present invention. Specific details for implementing the invention

[0025] Hereinafter, with reference to the attached drawings, the structure and operation of a virtual history simulation system for a semiconductor device structure according to a preferred embodiment of the present invention will be described in more detail. In describing the present invention, to facilitate overall understanding, the same reference numerals are used for identical components in the drawings, and redundant descriptions of identical components are omitted.

[0026] FIG. 1 is a schematic diagram illustrating a virtual history simulation system for a semiconductor device structure according to a preferred first embodiment of the present invention. Referring to FIG. 1, the virtual history simulation system (1) for semiconductor device technology according to the first embodiment of the present invention is configured to provide an optimal semiconductor device structure that satisfies initial conditions and constraints by including a process ownership module (10), a process emulator (12), a device simulator (14), and a constraint management module (16). The process ownership model, process emulator, device simulator, and constraint management module constituting the virtual history simulation system according to the present invention may all be implemented as programs that can be executed on a computing device, etc., or may be implemented in the form of firmware consisting of a combination of hardware and software.

[0027] Below, each component is described in detail.

[0028] The above constraint management module (16) includes a constraint providing module (17). The constraint providing module (17) may receive input or set constraints that can be used for each round from a user, stores and manages the input or set constraints, and provides the constraints to the process ownership module (10). The constraints are conditions that limit the technologies that the process ownership module can use, and may be input or set by a user, etc., in the form of a scenario.

[0029] An example of a scenario for a constraint that can be input to the constraint providing module (17) is, "The process owner module cannot attempt to improve mobility using stress from the first to the third round. In the fourth round, the option to improve mobility using stress is activated." Therefore, depending on how the user sets this scenario, it may proceed very similarly to the history of real-world technological development, or it may change very differently. The constraint providing module (17) outputs the constraints determined from the input scenario to the process owner module.

[0030] The virtual history simulation system according to the present invention is configured to not only predict future technologies regarding semiconductor device structures but also to simulate the development process of past technologies. Accordingly, if the system according to the present invention simulates an optimized semiconductor device structure using all currently available technologies, it will be possible to predict semiconductor device technologies in the near future. Meanwhile, if the system according to the present invention is to simulate the development process of past semiconductor device structures as a virtual history, by setting the technology state information of the relevant period as a constraint, it becomes possible to virtually simulate the development process of semiconductor device structures or the process of changes in the relevant process during that period.

[0031] The process ownership module (10) stores process recipes for manufacturing semiconductor devices having any structure in advance in a database. The process ownership module (10) receives initial conditions and constraints from the outside. The initial conditions may be input by a user and may be performance information of the target semiconductor device. The performance information of the semiconductor device may include one or more of Power, Performance, Area, etc. The constraints may be input from the constraint management module (16).

[0032] The initial conditions input to the process ownership module described above can be input in the form of a scenario. An example of a scenario that can be input as an initial condition to the process ownership module may be: "High-k metal gate, when the thickness of the oxide film becomes too thin and the gate current increases, can a change in the dielectric constant be attempted?", "Stress engineering, if a physical model for stress is included, can stress engineering be attempted?", "Change from planar structure to FinFET, given a 20nm class process, can the program itself detect the change to FinFET?", etc. When initial conditions in the form of a scenario are input to the process ownership module according to the present invention, the system simulates the process of developing device technology accordingly.

[0033] The process ownership module above generates and outputs a process recipe that satisfies the initial conditions and constraints using an optimization algorithm. An example of an optimization algorithm that the process ownership module can use is the Particle Swarm Optimization (PSO) algorithm. In this way, the process ownership module can be trained as a program capable of predicting good performance using an optimization algorithm.

[0034] The process emulator (12) receives a process recipe from the process ownership module and generates and outputs the structure of a semiconductor device according to the provided process recipe. Here, information regarding the structure of the semiconductor device may include channel length, oxide film thickness, etc.

[0035] The above device simulator (14) receives information about the structure of a semiconductor device from the above process emulator and simulates the performance of the semiconductor device for the provided structure of the semiconductor device. The performance indicators of the semiconductor device simulated by the above device simulator can be fed back to the above process ownership module.

[0036] A semiconductor device simulator that performs simulations of semiconductor device structures is a numerical analysis program that calculates and outputs the electrical characteristics of a semiconductor device by solving governing equations representing the movement of electrons and holes within the semiconductor device in a numerical manner. Representative electrical characteristics output from the semiconductor device simulator include IV characteristic relationships. Since the governing equations considered in semiconductor device simulations are nonlinear, a complete solution cannot be obtained in a single step. Consequently, the semiconductor device simulator first assumes an approximate initial solution and obtains a complete solution by iteratively improving the solution in a direction that reduces the error caused by this initial solution. A general semiconductor device simulator receives semiconductor device structure information and a device structure file to be simulated from a user, performs numerical analysis based on the input data, and outputs simulation results for the corresponding semiconductor device. The process emulator and device simulator according to the present invention are technologies widely known to those skilled in the art to which the present invention belongs, and therefore, a detailed description thereof is omitted in this specification.

[0037] Meanwhile, the process ownership module receives performance indicators for a semiconductor device structure according to the process recipe from a device simulator, compares the feedback performance indicators for the semiconductor device structure with the initial conditions, applies an optimization algorithm based on the comparison result to change the process recipe, and outputs the changed process recipe back to the process emulator. By repeating this process, the system according to the present invention can develop an optimized semiconductor device structure having performance that satisfies the initial conditions and constraints.

[0038] Hereinafter, a virtual history simulation system for a semiconductor device structure according to a second embodiment of the present invention will be described. FIG. 2 is a schematic diagram illustrating a virtual history simulation system according to a second embodiment of the present invention. Referring to FIG. 2, the virtual history simulation system (2) for semiconductor device technology according to a second embodiment of the present invention comprises a plurality of process ownership modules (20), a process emulator (22), a device simulator (24), and a constraint management module (26). Unlike the first embodiment, the virtual history simulation system according to the second embodiment is characterized by enabling a plurality of process ownership modules to compete with each other and share information, thereby enabling the acquisition of an optimized semiconductor device structure in a short period of time.

[0039] In the system (2) according to the second embodiment of the present invention, a plurality of process-owning modules store and manage process recipes for semiconductor device structures, and use them to generate and output a process recipe that satisfies initial conditions and constraints.

[0040] Meanwhile, the process emulator (22) and the device simulator (24) of the system (2) according to the second embodiment of the present invention are configured in the same way as those of the first embodiment. The system according to the second embodiment having the above configuration can develop the semiconductor device structure with the best performance through competition among a plurality of process-owning modules.

[0041] In the system according to the present embodiment, different optimization algorithms may be presented to each process-owning module to facilitate competition among multiple process-owning modules. For example, an evolutionary algorithm such as Particle Swarm Optimization (PSO) may be applied as the optimization algorithm, an algorithm that searches for an optimal solution through the iteration of a simple Design of Experiment (DoE) may be applied, or an approach that trains an artificial neural network representing the relationship between process recipes and performance indicators and uses it to infer an optimal solution may be applied. In addition, various other optimization algorithms may be attempted.

[0042] In addition, in the system according to the present embodiment, different initial conditions may be presented to each process-owning module to facilitate competition among multiple process-owning modules. For example, different initial conditions may be presented to each process-owning module depending on whether the same development team continues development from an existing technology that has already made significant progress or starts development from scratch. And, depending on these differences in initial conditions, the process-owning modules will output different results after a certain period of time.

[0043] In addition, in the system according to the present embodiment, different initial conditions and different optimization algorithms may be presented to each process-owning module to compete among a plurality of process-owning modules.

[0044] In this way, due to differences in optimization algorithms and initial conditions presented to multiple process-owning modules, the multiple process-owning modules explore various device structures according to their own algorithms, thereby enabling the entire virtual history simulation system to handle a wide variety of possible options.

[0045] Through this process, in a single competition round, performance indicators of semiconductor devices for the process recipes generated by each process-owning module are provided from the device simulator, and the process-owning module with the best performance among them is designated as the winner of that competition round. By repeating this competition round several times, each process-owning module becomes able to propose improved new process recipes.

[0046] The above constraint management module (26) comprises a constraint providing module (27) and an information sharing module (28). Since the above constraint providing module (27) is identical to the constraint providing module (17) of the first embodiment, a redundant description is omitted. The above information sharing module (28) collects all information and provides information allowed by user selection among the collected information to each process owning module.

[0047] Meanwhile, in the system according to the present embodiment, if multiple process-owning modules compare only performance indicators without sharing information regarding device structure and performance indicators, a situation may arise where a process-owning module that has once selected an inefficient semiconductor device structure is eliminated from the competition round. To prevent such a situation from occurring, the system according to the present embodiment may be configured to share information regarding the semiconductor device structure selected by each process-owning module and the process recipes generated accordingly during the process of repeating the competition round several times.

[0048] FIG. 3 is a graph illustrating a situation in which a plurality of process-owning modules compete for performance improvement in a virtual history simulation system according to a second embodiment of the present invention. Referring to FIG. 3, information sharing between process-owning modules can be performed at appropriate time intervals, and each process-owning module can modify the semiconductor device structure or change the process recipe accordingly by referring to the shared information.

[0049] Information that can be shared by multiple process-owning modules may include performance indicators for semiconductor device structures such as on-current and off-current of semiconductor devices, key structural information of semiconductor devices such as channel length or oxide thickness, generated semiconductor device structure files, process recipes, etc.

[0050] Information sharing among multiple process-owning modules may be implemented as a system or determined by user selection. Furthermore, it is desirable to allow the system user to determine the extent of information sharing among the multiple process-owning modules. For example, depending on the user's choice, all process recipes of all process-owning modules may be shared, only performance indicators regarding the semiconductor device structures achieved by all process-owning modules may be shared, or only partial information, such as key structural information of the semiconductor devices of all process-owning modules, may be shared.

[0051] The information sharing module (28) of the constraint management module (26) collects all information within the system and provides information allowed by user selection among the collected information to each process owning module, thereby enabling multiple process owning modules to share information. Each process owning module will generate a new process recipe according to its own algorithm using the shared information based on the results of the previous competition round as reference material. Through this information sharing, each process owning module can reduce the time required to find an optimized semiconductor device structure.

[0052] The system or device described above may be implemented as a hardware component, a software component, and / or a combination of a hardware component and a software component. For example, the system, device, and component described in the embodiments may be implemented using one or more general-purpose or special-purpose computers, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing and responding to instructions.

[0053] Meanwhile, the method according to the embodiments may be implemented in the form of program instructions that can be executed through various computer means and recorded on a computer-readable recording medium. The computer-readable recording medium may include program instructions, data files, data structures, etc., either alone or in combination.

[0054] Although the present invention has been described above with reference to preferred embodiments, this is merely illustrative and does not limit the invention. Those skilled in the art will understand that various modifications and applications not exemplified above are possible within the scope of the essential characteristics of the invention. Accordingly, differences related to such modifications and applications of the embodiments of the present invention should be interpreted as being included within the scope of the invention as defined in the appended claims.

[0055] Meanwhile, the present invention is susceptible to various modifications and may have various embodiments, and specific embodiments have been illustrated in the drawings and described in detail. However, this is not intended to limit the present invention to specific embodiments, and it should be understood that it includes all modifications, equivalents, and substitutions that fall within the spirit and scope of the invention. Therefore, other implementations, other embodiments, and equivalents to the claims should also be interpreted as falling within the scope of the claims set forth below. Explanation of the symbols

[0056] 1, 2: Virtual History Simulation System 10, 20: Process ownership module 12, 22 : Process Emulator 14, 24: Device simulator 16, 26: Constraint Management Module

Claims

Claim 1 A virtual history simulation system for semiconductor device technology, characterized by comprising: a plurality of process ownership modules having process recipes for pre-stored semiconductor device structures, receiving initial conditions and constraints from an external source, and generating and outputting a process recipe satisfying the initial conditions and constraints using the stored process recipes according to an optimization algorithm based on the input initial conditions and constraints; a process emulator generating and outputting a semiconductor device structure according to the process recipes provided by the process ownership modules; a device simulator simulating the performance of the semiconductor device structure output by the process emulator and outputting simulated performance indicators; and a constraint management module having a constraint providing module that provides constraints to the process ownership modules; wherein the plurality of process ownership modules share one or more of information regarding semiconductor device structures, information regarding process recipes, and information regarding simulated performance indicators, and use the shared information when generating a process recipe for a new semiconductor device structure. Claim 2 A virtual history simulation system for semiconductor device technology according to claim 1, characterized in that the plurality of process-owning modules receive feedback on simulated performance indicators for a semiconductor device structure according to the process recipe from a device simulator, compare the simulated performance indicators for the semiconductor device structure with the initial conditions, apply an optimization algorithm based on the comparison result to change the process recipe, and repeat the process of outputting the changed process recipe back to a process emulator, thereby developing a semiconductor device structure optimized to satisfy initial conditions and constraints. Claim 3 A virtual history simulation system for semiconductor device technology, characterized in that, in claim 1, the initial conditions input to the process-owning modules are performance information regarding the semiconductor device structure. Claim 4 A virtual history simulation system for semiconductor device technology according to claim 1, characterized in that the plurality of process-owning modules are provided with different initial conditions and constraints or have different optimization algorithms. Claim 5 A virtual history simulation system for semiconductor device technology according to claim 4, wherein the constraint management module further comprises an information sharing module that manages information to be shared by a plurality of process-owning modules; and wherein the information sharing module is configured to collect information on semiconductor device structures, information on process recipes, and information on simulated performance indicators of a plurality of process-owning modules, and to provide one or more of the collected information to all process-owning modules so that they can share with each other. Claim 6 delete Claim 7 A virtual history simulation system for semiconductor device technology, characterized by comprising: a plurality of process ownership modules that store process recipes for semiconductor device structures and, based on initial conditions input from the outside, generate and output a process recipe satisfying the initial conditions using the stored process recipes according to an optimization algorithm; a process emulator that generates and outputs a semiconductor device structure according to the process recipes provided by the process ownership modules; a device simulator that simulates the performance of the semiconductor device structure output from the process emulator and outputs simulated performance indicators; and a constraint management module having a constraint providing module that provides constraints pre-set by the process ownership modules; wherein the plurality of process ownership modules share one or more of information regarding semiconductor device structures, information regarding process recipes, and information regarding simulated performance indicators, and use the shared information when generating a process recipe for a new semiconductor device structure. Claim 8 A virtual history simulation system for semiconductor device technology according to claim 7, wherein the plurality of process ownership modules receive feedback on simulated performance indicators for a semiconductor device structure according to the process recipe from a device simulator, compare the feedbacked simulated performance indicators for the semiconductor device structure with the initial conditions, modify the process recipe by applying an optimization algorithm based on the comparison result, and output the modified process recipe back to a process emulator to develop a semiconductor device structure optimized for the initial conditions. Claim 9 A virtual history simulation system for semiconductor device technology according to claim 7, characterized in that the plurality of process-owning modules are provided with different initial conditions and constraints or have different optimization algorithms. Claim 10 A virtual history simulation system for semiconductor device technology according to claim 7, wherein the constraint management module further comprises an information sharing module that manages information to be shared by a plurality of process-owning modules; and wherein the information sharing module is configured to collect information on semiconductor device structures, information on process recipes, and information on simulated performance indicators of a plurality of process-owning modules, and to provide one or more of the collected information to all process-owning modules so that they can share with each other.

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