Display device and method for fabrication thereof

Abstract

A display device is provided. The display device includes a plurality of pixel electrodes spaced apart from each other on a first substrate, a first light-emitting element disposed on one of the plurality of pixel electrodes, a common substrate disposed on the first light-emitting element and including a hole, and a second light-emitting element disposed within the hole and disposed on another pixel electrode among the plurality of pixel electrodes.

Description

Technology Field

[0001] The present invention relates to a display device and a method for manufacturing the same. Background Technology

[0002] As the information society develops, the demand for display devices for displaying images is increasing in various forms. The display device may be a flat panel display device such as a Liquid Crystal Display, a Field Emission Display, or a Light Emitting Display. The light emitting display device may include an organic light emitting display device comprising an organic light emitting diode as a light emitting element, an inorganic light emitting display device comprising an inorganic semiconductor as a light emitting element, or a micro light emitting diode (or micro light emitting diode) as a light emitting element. The problem to be solved

[0003] The problem that the present invention aims to solve is to provide a display device with improved luminous efficiency of a light-emitting element and a method for manufacturing the same.

[0004] Another problem that the present invention aims to solve is to provide a display device in which the process of aligning light-emitting elements is simplified, and a method for manufacturing the same.

[0005] The problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0006] A display device according to one embodiment for solving the above problem comprises a plurality of pixel electrodes spaced apart from each other on a first substrate, a first light-emitting element disposed on one of the plurality of pixel electrodes, a common substrate disposed on the first light-emitting element and including a hole, and a second light-emitting element disposed within the hole and disposed on another pixel electrode among the plurality of pixel electrodes.

[0007] A method for manufacturing a display device according to one embodiment for solving the above other problems comprises the steps of: preparing a base substrate and forming a first semiconductor material layer, a first active material layer, and a second semiconductor material layer on the base substrate; etching the first semiconductor material layer, the first active material layer, and the second semiconductor material layer to form a common substrate and forming a first light-emitting element disposed on the common substrate; forming a first hole penetrating the common substrate; and inserting the second light-emitting element into the first hole. Effects of the invention

[0008] According to the display device and the method for manufacturing the same according to the embodiments, the luminous efficiency of the light-emitting element is improved, and the process of aligning the light-emitting element can be simplified.

[0009] The effects according to the embodiments are not limited to those exemplified above, and a wider variety of effects are included in this specification. Brief explanation of the drawing

[0010] FIG. 1 is a schematic plan view of a display device according to one embodiment. FIG. 2 is a plan view of light-emitting elements of a display area according to one embodiment. Figure 3 is a cross-sectional view taken along the line I-I' of Figure 2. FIG. 4 is a schematic diagram of a second light-emitting element and a third light-emitting element according to one embodiment. FIG. 5 is a flowchart illustrating a method for manufacturing a display device according to one embodiment. FIGS. 6 to 19 are cross-sectional views showing the manufacturing process of a display device according to one embodiment in sequence. FIGS. 20 and FIGS. 21 are cross-sectional views showing a part of the manufacturing process of a display device according to another embodiment. FIG. 22 is a schematic cross-sectional view of the light-emitting elements of FIG. 21. FIGS. 23 and FIGS. 24 are cross-sectional views showing a part of the manufacturing process of a display device according to another embodiment. Specific details for implementing the invention

[0011] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but may be implemented in various different forms. These embodiments are provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims.

[0012] When an element or layer is referred to as "on" another element or layer, it includes cases where another layer or element is interposed directly above or in the middle of another element. Likewise, when referred to as "below," "left," and "right," they include cases where they are interposed immediately adjacent to another element or where another layer or material is interposed in the middle. Throughout the specification, the same reference numerals refer to the same components. Shapes, sizes, ratios, angles, numbers, etc., disclosed in the drawings for describing embodiments are exemplary and the invention is not limited to the depicted details.

[0013] Although terms such as "first," "second," etc., are used to describe various components, it goes without saying that these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, it goes without saying that the first component mentioned below may also be the second component within the technical scope of the present invention.

[0014] The features of each of the various embodiments of the present invention may be combined or combined with one another, either partially or wholly, and may technically enable various interlocking and operation. Each embodiment may be implemented independently of one another or may be implemented together in an associated relationship.

[0015] Specific embodiments will be described below with reference to the attached drawings.

[0016] FIG. 1 is a schematic plan view of a display device according to one embodiment.

[0017] Referring to FIG. 1, the first direction (DR1) indicates the vertical direction of the display panel (10), the second direction (DR2) indicates the horizontal direction of the display panel (10), and the third direction (DR3) indicates the thickness direction of the display panel (10) or the thickness direction of the semiconductor circuit board (100).

[0018] Referring to FIG. 1, the display device (1) displays a video or a still image. The display device (1) may refer to any electronic device that provides a display screen. For example, a television, laptop, monitor, billboard, Internet of Things, mobile phone, smartphone, tablet PC (Personal Computer), electronic watch, smart watch, watch phone, head-mounted display, mobile communication terminal, electronic notebook, electronic book, PMP (Portable Multimedia Player), navigation, game console, digital camera, camcorder, etc. that provide a display screen may be included in the display device (1).

[0019] The display device (1) includes a display panel that provides a display screen. Examples of display panels include an inorganic light-emitting diode display panel, an organic light-emitting diode display panel, a quantum dot light-emitting diode display panel, a plasma display panel, a field emission display panel, etc. In the following examples, an inorganic light-emitting diode display panel is used as an example of a display panel, but it is not limited thereto, and if the same technical concept is applicable, it can be applied to other display panels.

[0020] The shape of the display device (1) can be varied in many ways. For example, the display device (1) may have a shape such as a horizontally elongated rectangle, a vertically elongated rectangle, a square, a square with rounded corners (vertices), other polygons, a circle, etc. The shape of the display area (DA) of the display device (1) may also be similar to the overall shape of the display device (1). In FIG. 1, a display device (1) with a rectangular shape having a long length in the second direction (DR2) is exemplified.

[0021] The display device (1) may include a display area (DA) and a non-display area (NDA). The display area (DA) is an area where the screen can be displayed, and the non-display area (NDA) is an area where the screen is not displayed. The display area (DA) may also be referred to as an active area, and the non-display area (NDA) as an inactive area. The display area (DA) may generally occupy the center of the display device (1).

[0022] The display area (DA) may include a plurality of pixels (PX). The plurality of pixels (PX) may be arranged in a matrix direction. The shape of each pixel (PX) may be a planar rectangle or a square, but is not limited thereto, and may be a rhombus shape with each side tilted toward one direction. Each pixel (PX) may be arranged in a stripe type or an island type. Additionally, each of the pixels (PX) may include one or more light-emitting elements that emit light of a specific wavelength range to display a specific color.

[0023] A non-display area (NDA) may be placed around a display area (DA). The non-display area (NDA) may surround the display area (DA) in whole or in part. The display area (DA) is rectangular in shape, and the non-display area (NDA) may be placed adjacent to the four sides of the display area (DA). The non-display area (NDA) may form the bezel of the display device (1). In each non-display area (NDA), wiring or circuit drivers included in the display device (1) may be placed, or external devices may be mounted.

[0024] FIG. 2 is a plan view of light-emitting elements of a display area according to one embodiment.

[0025] Each of the plurality of pixels (PX) may include a plurality of light-emitting elements (ED1, ED2, ED3). Each of the pixels (PX) may include one or more light-emitting elements (ED1, ED2, ED3) to display a specific color. A pixel (PX) may be defined as a minimum light-emitting unit capable of displaying white light.

[0026] For example, the first light-emitting element (ED1) may emit light of a first color, the second light-emitting element (ED2) may emit light of a second color, and the third light-emitting element (ED3) may emit light of a third color. For example, the first color may be red, the second color may be blue, and the third color may be green. For example, the main peak wavelength of the first color light may be located approximately 600 nm to 750 nm, the main peak wavelength of the second color light may be located approximately 370 nm to 460 nm, and the main peak wavelength of the third color light may be located approximately 480 nm to 560 nm, but is not limited thereto. In some embodiments, each light-emitting element (ED1, ED2, ED3) may emit light of the same color, and one of each light-emitting element (ED) may emit yellow. The main peak wavelength of the yellow light may be located approximately 550 nm to 600 nm. In some embodiments, one pixel (PX) may include four light-emitting elements, but is not limited thereto.

[0027] Each of the light-emitting elements (ED1, ED2, ED3) may have a circular shape in a planar view. However, not limited thereto, the light-emitting elements (ED1, ED2, ED3) may have polygonal shapes such as squares and pentagons, elliptical shapes, or irregular shapes other than circular shapes.

[0028] Multiple light-emitting elements (ED1, ED2, ED3) may be spaced apart from each other in a first direction (DR1) and a second direction (DR2). Although the drawings illustrate that the third light-emitting elements (ED3) are positioned on the lower right side of the first light-emitting element (ED1) and the second light-emitting elements (ED2) are positioned on the lower left side of the first light-emitting element (ED1), the arrangement relationship of the light-emitting elements (ED1, ED2, ED3) is not limited thereto.

[0029] In a display device (1) according to one embodiment, the sizes of each light-emitting element (ED1, ED2, ED3) may differ from each other. For example, the diameter (W1) of the first light-emitting element (ED1) may be larger than the diameters (W2, W3) of the second light-emitting element (ED2) and the third light-emitting element (ED3), respectively. The diameter (W2) of the second light-emitting element (ED2) may be larger than the diameter (W3) of the third light-emitting element (ED3). However, it is not limited thereto. For example, the diameter of the second light-emitting element (ED2) may be larger than the diameters of the first light-emitting element (ED1) and the third light-emitting element (ED3). Or, the diameter of the third light-emitting element (ED3) may be larger than the diameters of the first light-emitting element (ED1) and the second light-emitting element (ED2).

[0030] In a display device (1) according to one embodiment, the total area of ​​the first light-emitting element (ED1), the total area of ​​the second light-emitting elements (ED2), and the total area of ​​the third light-emitting elements (ED3) may differ from each other. In this specification, the area of ​​each light-emitting element (ED1, ED2, ED3) may vary according to the diameter (W1, W2, W3) of each light-emitting element (ED1, ED2, ED3). The total area of ​​each light-emitting element (ED1, ED2, ED3) may vary according to the number of light-emitting elements (ED1, ED2, ED3) placed in the display area (DA).

[0031] In the display device (1) according to the present embodiment, the red light-emitting element, which is the first light-emitting element (ED1), may have a lower light-emitting efficiency (unit: Cd / Am) than the blue light-emitting element, which is the second light-emitting element (ED2), and the green light-emitting element, which is the third light-emitting element (ED3). The material included in the first light-emitting element (ED1) may be different from the material included in the second light-emitting element (ED2) and the third light-emitting element (ED3). Accordingly, when the first light-emitting element (ED1), the second light-emitting element (ED2), and the third light-emitting element (ED3) are formed with the same area, the light-emitting efficiency of the first light-emitting element (ED1) may be approximately 10% of that of the second light-emitting element (ED2) and approximately 1% of that of the third light-emitting element (ED3), but is not limited thereto. Accordingly, as the first light-emitting element (ED1) has a larger diameter and larger area than the second light-emitting element (ED2) and the third light-emitting element (ED3), the light-emitting efficiency of the first light-emitting element (ED1) can be improved. Accordingly, the display device (1) can improve the phenomenon of a lack of red light in the color of light displayed at the pixel (PX).

[0032] FIG. 3 is a cross-sectional view taken along the line I-I' of FIG. 2. FIG. 4 is a schematic diagram of a second light-emitting element and a third light-emitting element according to one embodiment.

[0033] Referring to FIG. 3, a display device (1_1) according to one embodiment may include a semiconductor circuit board (100) and a display board (200).

[0034] A semiconductor circuit board (100) may include a first substrate (110), a plurality of pixel circuit sections (PXCs), and pixel electrodes (AEs). A display board (200) may include light-emitting elements (EDs), an insulating layer (INS), a common substrate (33), a common electrode (CE), and connecting electrodes (CNE1, CNE2). A space is formed between the semiconductor circuit board (100) and the display board (200) of the display device (1_1). The space may be made of a vacuum and may be filled with a separate filling material, but is not limited thereto.

[0035] The first substrate (110) may be a silicon wafer substrate. The first substrate (110) may be made of single-crystal silicon.

[0036] Each of the plurality of pixel circuits (PXCs) may be disposed on the first substrate (110). Each of the plurality of pixel circuits (PXCs) may include a CMOS (Compact Metal-Oxide Semiconductor) circuit formed using a semiconductor process. Each of the plurality of pixel circuits (PXCs) may include at least one transistor formed using a semiconductor process. Additionally, each of the plurality of pixel circuits (PXCs) may further include at least one capacitor formed using a semiconductor process.

[0037] A plurality of pixel circuits (PXCs) may be placed in a display area (DA). Among the plurality of pixel circuits (PXCs), the pixel circuits (PXCs) placed in the display area (DA) may each be electrically connected to a corresponding pixel electrode (AE). That is, the plurality of pixel circuits (PXCs) and the plurality of pixel electrodes (AE) may be connected in a one-to-one correspondence. Each of the plurality of pixel circuits (PXCs) may apply an anode voltage to the pixel electrode (AE).

[0038] A plurality of pixel electrodes (AE) are disposed in a display area (DA), and each may be disposed on a corresponding pixel circuit (PXC). Each of the pixel electrodes (AE) is formed integrally with the pixel circuit (PXC) and may be an exposed electrode exposed from the pixel circuit (PXC). That is, each of the pixel electrodes (AE) may protrude from the upper surface of the pixel circuit (PXC). Each of the pixel electrodes (AE) may receive an anode voltage from the pixel circuit (PXC). The pixel electrode (AE) may include a metallic material such as aluminum (Al).

[0039] A display substrate (200) may be disposed on a semiconductor circuit board (100) including a plurality of light-emitting elements (ED), a common substrate (33), and a common electrode (CE).

[0040] Referring to FIGS. 3 and 4, light-emitting elements (EDs) can be arranged corresponding to a plurality of pixel electrodes (AEs) of a semiconductor circuit board (100). The light-emitting elements (EDs) may be light-emitting diodes, and specifically, the light-emitting elements (EDs) may be inorganic light-emitting diodes made of inorganic materials, having a size in the nanometer to micrometer range.

[0041] In this embodiment, the display area (DA) includes a main light-emitting area (MEA) and an peripheral area (EAN). The main light-emitting area (MEA) is an area where the first light-emitting element (ED1) is placed, and the peripheral area (EAN) may be an area where the first light-emitting element (ED1) is not placed. The main light-emitting area (MEA) may be an area that emits a first color light. The peripheral area (EAN) includes a second light-emitting area of ​​the second light-emitting element (ED2) and a third light-emitting area of ​​the third light-emitting element (ED3), and may include a non-light-emitting area that does not emit light.

[0042] A light-emitting element (ED) according to one embodiment may have a shape that extends in one direction. The light-emitting element (ED) may have a shape such as a cylinder, a rod, a wire, or a tube. However, the shape of the light-emitting element (ED) is not limited thereto, and the light-emitting element (ED) may have various shapes, such as a polygonal prism shape like a cube, a rectangular prism, or a hexagonal prism, or a shape that extends in one direction but has a partially inclined side. For example, each of the light-emitting elements (ED) may have a shape that extends in a third direction (DR3) (i.e., the thickness direction of the first substrate (110). The length of the third direction (DR3) of the first light-emitting element (ED3) may be longer or shorter than the length in the horizontal direction. The length of the third direction (DR3) of the second light-emitting element (ED2) and the third light-emitting element (ED3) may be longer than the length in the horizontal direction.

[0043] A light-emitting element (ED) may include a semiconductor layer doped with any conductivity type (e.g., p-type or n-type) dopant. The semiconductor layer may emit light of a specific wavelength range when an electrical signal applied from an external power source is transmitted. The light-emitting element (ED) may include a first semiconductor layer (31), a second semiconductor layer (32), and an active layer (36). According to the present embodiment, the second light-emitting element (ED2) and the third light-emitting element (ED3) may further include an insulating film (38).

[0044] The first semiconductor layer (31) may be an n-type semiconductor. The first semiconductor layer (31) is Al x Ga y In 1-x-y It may include a semiconductor material having the chemical formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the first semiconductor layer (31) may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The n-type dopant doped in the first semiconductor layer (31) may be Si, Ge, Sn, Se, etc.

[0045] The second semiconductor layer (32) is disposed on the first semiconductor layer (31) with the active layer (36) in between. Here, the upper surface is described based on the light-emitting element (ED) of FIG. 4. The second semiconductor layer (32) may be a p-type semiconductor, and the second semiconductor layer (32) is Al x Ga y In 1-x-y It may include a semiconductor material having the chemical formula N (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, the second semiconductor layer (32) may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The p-type dopant doped in the second semiconductor layer (32) may be Mg, Zn, Ca, Ba, etc.

[0046] Meanwhile, the drawing shows the first semiconductor layer (31) and the second semiconductor layer (32) as being composed of a single layer, but is not limited thereto. Depending on the material of the active layer (36), the first semiconductor layer (31) and the second semiconductor layer (32) may further include a greater number of layers, such as a clad layer or a TSBR (Tensile strain barrier reducing) layer. For example, the light-emitting device (ED) may further include other semiconductor layers disposed between the first semiconductor layer (31) and the active layer (36), or between the second semiconductor layer (32) and the active layer (36). The semiconductor layer disposed between the first semiconductor layer (31) and the active layer (36) may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN, InN and SLs doped with an n-type dopant, and the semiconductor layer disposed between the second semiconductor layer (32) and the active layer (36) may be one or more of AlGaInN, GaN, AlGaN, InGaN, AlN and InN doped with a p-type dopant.

[0047] The active layer (36) is disposed between the first semiconductor layer (31) and the second semiconductor layer (32). The active layer (36) may include a material having a single or multiple quantum well structure. If the active layer (36) includes a material having a multiple quantum well structure, it may have a structure in which a quantum layer and a well layer are alternately stacked in multiple layers. The active layer (36) can emit light through the coupling of electron-hole pairs according to an electric signal applied through the first semiconductor layer (31) and the second semiconductor layer (32).

[0048] In one embodiment, the first active layer (36_1) of the first light-emitting element (ED1) may include a material different from the second active layer (36_2) of the second light-emitting element (ED2) and the third active layer (36_3) of the third light-emitting element (ED3). For example, the first active layer (36_1) that emits red light may include a material such as GaAs, and the second active layer (36_2) and the third active layer (36_3) that emit blue or green light may include a material such as GaN. Although not limited thereto, depending on the difference in the materials of the active layers, the light-emitting efficiency of the first light-emitting element (ED1) may be lower than the light-emitting efficiency of the second light-emitting element (ED2) and the third light-emitting element (ED3).

[0049] The active layer (36) may have a structure in which semiconductor materials with large band gap energy and semiconductor materials with small band gap energy are alternately stacked, and may include different group 3 to group 5 semiconductor materials depending on the wavelength range of the emitted light. The light emitted by the active layer (36) is not limited to light in the blue wavelength range, and may emit light in the red or green wavelength range depending on the case.

[0050] The insulating film (38) is positioned to surround the sides of the plurality of semiconductor layers described above. For example, the insulating film (38) may be positioned to surround the sides of at least the active layers (36_2, 36_3), while the longitudinal ends of the light-emitting elements (ED2, ED3) may be formed to be exposed. Additionally, the insulating film (38) may be formed with a rounded upper surface in cross-section in an area adjacent to at least one end of the light-emitting elements (ED2, ED3).

[0051] Meanwhile, the sides of the light-emitting elements (ED1, ED2, ED3), including the first light-emitting element (ED1), may be surrounded by an insulating layer (INS). The insulating layer (INS) may be arranged to surround the sides of the active layer (36) of at least the light-emitting elements (ED1, ED2, ED3), while the longitudinal ends of the light-emitting elements (ED1, ED2, ED3) may be formed to be exposed.

[0052] The insulating film (38) and the insulating layer (INS) are made of materials having insulating properties, for example, silicon oxide (SiO₂). x ), silicon nitride (SiN x ), silicon oxynitride (SiO₂ x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), and titanium oxide (TiO₂ x It may include at least one of ). In the drawings, the insulating film (38) and the insulating layer (INS) are illustrated as being formed as a single layer, but are not limited thereto, and in some embodiments, the insulating film (38) and the insulating layer (INS) may be formed as a multilayer structure in which a plurality of layers are stacked.

[0053] The insulating film (38) and the insulating layer (INS) can perform the function of protecting the semiconductor layers of the light-emitting elements (ED2, ED3). The insulating film (38) can prevent an electrical short circuit that may occur in the active layer (36_2, 36_3) when in direct contact with the electrode through which an electrical signal is transmitted to the light-emitting elements (ED2, ED3). The insulating layer (INS) can prevent an electrical short circuit of the light-emitting elements (ED1, ED2, ED3). In addition, the insulating film (38) and the insulating layer (INS) can prevent a decrease in the light-emitting efficiency of the light-emitting elements (ED2, ED3). In FIG. 3, the illustration of the insulating film (38) of the second light-emitting element (ED2, ED3) is omitted.

[0054] As will be described later, the insulating film (38) and the insulating layer (INS) can be formed on the side of the light-emitting element (ED) through different processes.

[0055] The insulating layer (INS) can be formed to be in contact with the lower surface of the common substrate (33) in addition to the sides of the light-emitting elements (ED1, ED2, ED3). Accordingly, the insulating layer (INS) can prevent each light-emitting element (ED1, ED2, ED3) from being electrically connected.

[0056] A common substrate (33) may be placed on the first semiconductor layer (31) of the first light-emitting element (ED1). The common substrate (33) may be formed through the same process as the first semiconductor layer (31) of the first light-emitting element (ED1), and the common substrate (33) may be integrated with the first semiconductor layer (31).

[0057] Additionally, the common substrate (33) may include a first hole ('H1' in FIG. X) and a second hole ('H2' in FIG. X). A second light-emitting element (ED2) may be disposed within the first hole (H1), and a third light-emitting element (ED3) may be disposed within the second hole (H2). The common substrate (33) may separate the second light-emitting element (ED2) and the third light-emitting element (EDD3) from the first light-emitting element (ED1). The common substrate (33) is arranged to surround the second light-emitting element (ED2) and the third light-emitting element (ED3), respectively, and may come into contact with the sides of the light-emitting elements (ED2, ED3) with an insulating layer (INS) and an insulating film (38) in between.

[0058] The common substrate (33) may be an n-type semiconductor comprising the same material as the first semiconductor layer (31). The common substrate (33) may include a semiconductor material having the chemical formula AlxGayIn1-x-yN (0≤x≤1, 0≤y≤1, 0≤x+y≤1). For example, it may be one or more of n-type doped AlGaInN, GaN, AlGaN, InGaN, AlN, and InN. The common substrate (33) may be doped with an n-type dopant, and the n-type dopant may be Si, Ge, Sn, etc. For example, the common substrate (33) may be n-GaN doped with n-type Si.

[0059] An insulating layer (INS) may be placed on the side exposed by the first hole (H1) and the second hole (H2) of the common substrate (33) to insulate the sides of the second light-emitting element (ED2) and the third light-emitting element (ED3) from the common substrate (33). Accordingly, even if the common substrate (33) is integrated with the first light-emitting element (ED1), electrical short circuits between the second light-emitting element (ED2) and the third light-emitting element (ED3) can be prevented.

[0060] A plurality of connecting electrodes (CNE1, CNE2) may be disposed between a display substrate (200) and a semiconductor circuit board (100). The connecting electrodes (CNE1, CNE2) may include a first connecting electrode (CNE1) and a second connecting electrode (CNE2) disposed between a light-emitting element (ED) and a pixel electrode (AE).

[0061] The first connecting electrode (CNE1) can be positioned in the main light-emitting region (MEA) in correspondence with the first light-emitting elements (ED1) and the pixel electrode (AE). The first connecting electrode (CNE1) can be positioned on one side of the second semiconductor layer (32) of the first light-emitting elements (ED1).

[0062] The second connecting electrode (CNE1) may be positioned in the peripheral region (EAN) corresponding to the second light-emitting elements (ED2), the third light-emitting elements (ED3), and the pixel electrode (AE). The second connecting electrode (CNE2) may be positioned on one side of the second semiconductor layer (32) of the second light-emitting elements (ED2) and the third light-emitting elements (ED3).

[0063] Connecting electrodes (CNE1, CNE2) are placed directly on the pixel electrode (AE) and are electrically connected to the pixel electrode (AE) to transmit a light-emitting signal applied to the pixel electrode (AE) to the light-emitting elements (ED). The width of the connecting electrodes (CNE1, CNE2) may be formed to be smaller than the width of the light-emitting elements (ED), but is not limited thereto. The first connecting electrode (CNE1) may serve as a bonding metal for mutually bonding the pixel electrode (AE) and the light-emitting elements (ED) during the manufacturing process. The connecting electrodes (CNE1, CNE2) may include a material capable of being electrically connected to the pixel electrode (AE) and the light-emitting elements (ED). For example, the first connecting electrode (CNE1) may include at least one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn), or a transparent conductive oxide such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). Alternatively, the connecting electrodes (CNE1, CNE2) may include a first layer comprising any one of gold (Au), copper (Cu), aluminum (Al), and tin (Sn), and a second layer comprising the other of gold (Au), copper (Cu), aluminum (Al), and tin (Sn).

[0064] The second connecting electrode (CNE2) may have a shape that extends in one direction. The length of the second connecting electrode (CNE2) in one direction may be longer than the length of the first connecting electrode (CNE1) in one direction, but is not limited thereto. In some embodiments, the length of the second connecting electrode (CNE2) may be the same as the length of the first connecting electrode (CNE1).

[0065] According to the present embodiment, the first light-emitting element (ED1) of the display device (1_1) may have a different arrangement from the second light-emitting element (ED2) and the third light-emitting element (ED3). Hereinafter, in FIG. 3, one side of the light-emitting element (ED) is referred to as the upper surface of the first semiconductor layer (31), and the other side of the light-emitting element (ED) is referred to as the lower surface of the second semiconductor layer (32).

[0066] For example, one side of the second light-emitting element (ED2) and the third light-emitting element (ED3) may be shaped to protrude more than one side of the first light-emitting element (ED1). That is, one side of the second light-emitting element (ED2) and the third light-emitting element (ED3) may be shaped to protrude more in the thickness direction of the first substrate (110) than the common substrate (33). Additionally, the other side of the first light-emitting element (ED1) may be shaped to protrude more in the direction opposite to the thickness direction of the first substrate (110) than the common substrate (33).

[0067] However, the arrangement of the light-emitting elements (EDs) of the display device (1_1) is not limited to the above embodiments. In some embodiments, one side of the light-emitting elements (EDs) may be parallel to one side of the common substrate (33). That is, one side of the light-emitting elements (EDs) may not protrude.

[0068] Meanwhile, the lengths of the third direction (DR3) of the light-emitting elements (ED) may be the same. The length of the third direction (DR3) of the first light-emitting element (ED1), the length of the third direction (DR3) of the second light-emitting element (ED2), and the length of the third direction (DR3) of the third light-emitting element (ED3) may be the same, but are not limited thereto.

[0069] In the drawing, the other surfaces of the second light-emitting element (ED2) and the third light-emitting element (ED3) are shown as being concave compared to the lower surface of the common substrate (33), but it is obvious that this is not limited thereto.

[0070] In the display device (1_1) according to the present embodiment, a first light-emitting element (ED1) having a large area can be included by arranging a second light-emitting element (ED2) and a third light-emitting element (ED3) within holes (H1, H2) of a common substrate (33) having the same material as the first semiconductor layer (31) of the first light-emitting element (ED1). Accordingly, the light-emitting efficiency of the first light-emitting element (ED1) can be improved.

[0071] Hereinafter, the manufacturing process of the display device (1_1) will be described with further reference to other drawings.

[0072] FIG. 5 is a flowchart illustrating a method for manufacturing a display device according to one embodiment.

[0073] Referring to FIG. 5, a method for manufacturing a display device (1_1) according to one embodiment comprises the steps of: preparing a base substrate (SUB) having an undoped semiconductor layer (USEM) formed on a second substrate (210) (S110); forming a first semiconductor material layer (310), a first active material layer (360_1), and a second semiconductor material layer (320) on the front surface of the undoped semiconductor layer (USEM) of the base substrate (SUB) (S120); etching the first semiconductor material layer (310), the first active material layer (360_1), and the second semiconductor material layer (320) to form a common substrate (33) and forming a first light-emitting element (ED1) disposed on the common substrate (33) (S130); forming a first hole (H1) and a second hole (H2) penetrating the common substrate (33), the undoped semiconductor layer (USEM), and the second substrate (210) (S140); and the first light-emitting element The method may include the step (S150) of forming an insulating layer (INS) on the side of the element (ED1), the upper surface of the common substrate (33), and the side of the common substrate (33) exposed by the first hole (H1) and the second hole (H2); the step (S160) of applying a solution (160) containing a second light-emitting element (ED2) and a third light-emitting element (ED3), and cleaning the solution (160) when the second light-emitting element (ED2) and the third light-emitting element (ED3) are aligned; and the step (S170) of bonding the base substrate (SUB) on which the plurality of light-emitting elements (ED1, ED2, ED3) are formed with the semiconductor circuit board (100).

[0074] A method for manufacturing a display device (1_1) may include a process of preparing a semiconductor circuit board (100) and a display board (200) separately, and then bonding them together. In the manufacturing process of the display board (200), a base board (SUB) including a second substrate (210) and an undoped semiconductor layer (USEM) may be prepared, and a process of forming a plurality of light-emitting elements (ED) thereon may be performed.

[0075] Hereinafter, the method of manufacturing the display device (1) will be described in detail with further reference to other drawings.

[0076] FIGS. 6 to 19 are cross-sectional views showing the manufacturing process of a display device according to one embodiment in sequence. FIGS. 6 to 19 show the manufacturing process in sequence based on one cross-section of the display device (1_1) shown in FIG. 3.

[0077] First, referring to FIG. 6, a base substrate (SUB) having an undoped semiconductor layer (USEM) formed on a second substrate (210) is prepared (S110).

[0078] The base substrate (SUB) includes a second substrate (210) and an undoped semiconductor layer (USEM) disposed on the second substrate (210). The second substrate (210) may be a sapphire substrate (Al2O3) or a silicon wafer containing silicon. However, it is not limited thereto, and the second substrate (210) may be made of a conductive substrate such as GaN, SiC, ZnO, Si, GaP, and GaAs. Below, the case where the second substrate (210) is a sapphire substrate is described as an example.

[0079] The undoped semiconductor layer (USEM) disposed on the second substrate (210) may include an undoped semiconductor and may be a material that is not doped into n-type or p-type. The undoped semiconductor layer (USEM) may be at least one of undoped InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, but is not limited thereto. Although the drawing shows the undoped semiconductor layer (USEM) stacked in a single layer, it is not limited thereto and may form multiple layers. The undoped semiconductor layer (USEM) may be disposed to reduce the difference in lattice constants between the common substrate (33) and the second substrate (210), which will be described later.

[0080] Multiple semiconductor material layers may be formed on a base substrate (SUB). Multiple semiconductor material layers grown by the epitaxial method may be formed by growing a seed crystal. Here, the method for forming the semiconductor material layers may be electron beam deposition, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporation, sputtering, metal-organic chemical vapor deposition (MOCVD), etc., and preferably, they may be formed by metal-organic chemical vapor deposition (MOCVD). However, they are not limited thereto.

[0081] The precursor material for forming the semiconductor material layer is not particularly limited within the range that can typically be selected to form the target material. For example, the precursor material may include a metal precursor containing an alkyl group such as a methyl group or an ethyl group. For example, in an embodiment in which the first semiconductor layer (31), the second semiconductor layer (32), and the first active layer (36_1) include any one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN, such as the first light-emitting element (ED1) according to one embodiment, the metal precursor may be trimethyl gallium (Ga(CH3)3) and may be a compound such as trimethyl aluminum (Al(CH3)3) or triethyl phosphate ((C2H5)3PO4). However, it is not limited thereto. A plurality of semiconductor material layers may be formed through a deposition process using the metal precursor and the non-metal precursor. In the following, the method and process conditions for forming multiple semiconductor material layers will be omitted from the description, and the sequence of the manufacturing method and the stacking structure of the light-emitting device (ED) will be described in detail.

[0082] Referring to FIG. 7, a first semiconductor material layer (310), a first active material layer (360_1), and a second semiconductor material layer (320) are formed (S120) on the front surface of an undoped semiconductor layer (USEM) of a base substrate (SUB). The material layers disposed on the base substrate (SUB) may correspond to the semiconductor layers (31, 32) and the first active layer (36_1) of the first light-emitting element (ED1), respectively. For example, the first semiconductor material layer (310) may correspond to the first semiconductor layer (31), and the first active material layer (360_1) and the second semiconductor material layer (320) may correspond to the first active layer (36_1) and the second semiconductor layer (32), respectively. That is, each of the material layers may contain the same material as the semiconductor layers (31, 32) and the first active layer (36_1) of the first light-emitting element (ED1).

[0083] Next, referring to FIG. 8, a first semiconductor material layer (310), a first active material layer (360_1), and a second semiconductor material layer (320) are etched to form a common substrate (33), and a first light-emitting element (ED1) disposed on the common substrate (33) is formed (S130).

[0084] Although not shown, a photoresist layer is formed in an area corresponding to the main light-emitting region (MEA) on the second semiconductor material layer (320). The photoresist layer can be used as a mask layer for etching the semiconductor material layer (310, 320) and the first active material layer (360_1) in an area corresponding to the peripheral region (EAN).

[0085] Next, an etching process is performed to etch vertically on the upper surface of the base substrate (SUB) of the second semiconductor material layer (320) that is exposed without a photoresist layer, and the photoresist layer is removed. The etching process may be a dry etching method, a wet etching method, a reactive ion etching (RIE), an inductively coupled plasma reactive ion etching (ICP-RIE), etc. In the case of a dry etching method, anisotropic etching is possible, so it may be suitable for vertical etching. When using the etching method of the above-described method, the etching etchant may be Cl2 or O2, etc. However, it is not limited thereto.

[0086] According to the above etching process, a common substrate (33) can be formed by etching a portion of the upper surface of the second semiconductor material layer (320), the first active material layer (360_1), and the first semiconductor material layer (310) in the peripheral region (EAN). Additionally, a first light-emitting element (ED1) can be formed in the region corresponding to the main light-emitting region (MEA). The first light-emitting element (ED1) can be partitioned through the above etching process. Since the common substrate (33) is the remaining layer after the upper surface of the first semiconductor material layer (310) has been etched, the thickness of the common substrate (33) may vary depending on the degree of etching of the first semiconductor material layer (310).

[0087] According to the above etching process, the second semiconductor material layer (320) and the first active material layer (360_1) may not be placed in the surrounding region (EAN).

[0088] Next, referring to FIG. 9, a first hole (H1) and a second hole (H2) are formed (S140) through a common substrate (33), an undoped semiconductor layer (USEM), and a second substrate (210).

[0089] The first hole (H1) and the second hole (H2) can penetrate the common substrate (33), the undoped semiconductor layer (USEM), and the second substrate (210). Accordingly, the sides of the common substrate (33), the undoped semiconductor layer (USEM), and the second substrate (210) can be exposed.

[0090] The first hole (H1) includes a first sub-hole (SH1) and a second sub-hole (SH2). The second hole (H2) includes a third sub-hole (SH3) and a fourth sub-hole (SH4). The first sub-hole (SH1) and the second sub-hole (SH2) may be formed sequentially or simultaneously. The third sub-hole (SH3) and the fourth sub-hole (SH4) may be formed sequentially or simultaneously. The first sub-hole (SH1) and the third sub-hole (SH3) may be formed simultaneously. The second sub-hole (SH2) and the fourth sub-hole (SH4) may be formed simultaneously.

[0091] For example, the first sub-hole (SH1) and the third sub-hole (SH3) can penetrate the common substrate (33) and the undoped semiconductor layer (USEM) through a wet etching or dry etching process. The second sub-hole (SH2) and the fourth sub-hole (SH4) can penetrate the second substrate (210) through methods such as super drilling, laser drilling, or etching, depending on the diameter of the hole.

[0092] The first hole (H1) may be a space into which a second light-emitting element (ED2) is inserted in a subsequent process, and the second hole (H2) may be a space into which a third light-emitting element (ED3) is inserted. Accordingly, each hole (H1, H2) may have a diameter and shape corresponding to the size of the second light-emitting element (ED2) and the third light-emitting element (ED3).

[0093] For example, since the diameter of the second light-emitting element (ED2) ('W2' in FIG. 2) is larger than the diameter of the third light-emitting element (ED3) ('W3' in FIG. 2), the diameter of the first hole (H1) may be larger than the diameter of the second hole (H2). As another example, if the shape of the second light-emitting element (ED2) is a cylinder, rod, wire, tube, etc., or a polygonal prism such as a cube, rectangular prism, or hexagonal prism, the first hole (H1) and the second hole (H2) may have corresponding shapes.

[0094] Next, referring to FIG. 10, an insulating layer (INS) is formed (S150) on the side of the first light-emitting element (ED1), the upper surface of the common substrate (33), and the side of the common substrate (33) and the base substrate (SUB) exposed by the first hole (H1) and the second hole (H2).

[0095] An insulating layer (INS) is disposed on the side of the first light-emitting element (ED1), the upper surface of the common substrate (33), and on the side of the common substrate (33) and the base substrate (SUB) exposed by the first hole (H1) and the second hole (H2). The insulating layer (INS) may be formed by atomic layer deposition (ALD) or chemical vapor deposition (CVD), but is not limited thereto.

[0096] An insulating layer (INS) may be formed such that it is placed on the upper surface of the first light-emitting element (ED1) and then removed to expose the upper surface of the first light-emitting element (ED1). Although the insulating layer (INS) is illustrated as exposing the upper surface of the first light-emitting element (ED1) flatly, it is not limited thereto.

[0097] Referring to FIGS. 11 to 14, a solution (160) containing a second light-emitting element (ED2) and a third light-emitting element (ED3) is applied, and when the second light-emitting element (ED2) and the third light-emitting element (ED3) are aligned, the solution (160) is cleaned (S160).

[0098] First, referring to FIGS. 11 and 12, a solution (160) containing a second light-emitting element (ED2) is applied, and when the second light-emitting element (ED2) is aligned within the first hole (H1), the solution (160) is cleaned. Then, referring to FIGS. 13 and 14, a solution (160) containing a third light-emitting element (ED3) is applied, and when the third light-emitting element (ED3) is aligned within the second hole (H2), the solution (160) is cleaned.

[0099] Referring to FIG. 11, the second light-emitting element (ED2) is positioned on the upper side of the base substrate (SUB) and the common substrate (33) by applying a solution (160) containing the second light-emitting element (ED2) to the upper surface of the base substrate (SUB) and the common substrate (33). The solution (160) may come into contact with the surface of the base substrate (SUB) and the common substrate (33).

[0100] Referring to FIG. 12, the second light-emitting element (ED2) is aligned or inserted into the first hole (H1), and then the solution (160) applied to the upper surface of the base substrate (SUB) and the common substrate (33) is cleaned. In FIG. 12, for convenience of explanation, the base substrate (SUB) and the common substrate (33) are referred to as assembly substrates.

[0101] The solution (160) creates a pressure difference between the upper and lower sides of the assembly substrate, causing the solution (160) to move to the lower side through the first hole (H1) of the assembly substrate. That is, the solution (160) located on the upper side of the assembly substrate tends to move to the lower side of the assembly substrate through the first hole (H1), which creates a pressure on the lower side of the assembly substrate that is lower than the pressure on the upper side of the assembly substrate. Subsequently, the solution (160) passes through the first hole (H1), and the second light-emitting element (ED2) contained in the solution (160) also moves together with the solution (160) and is inserted into the first hole (H1). Afterwards, the solution (160) is cleaned to align the third light-emitting element (ED3).

[0102] Meanwhile, since the diameter of the first hole (H1) is larger than the diameter of the second hole (H2), even if the solution (160) containing the second light-emitting element (ED2) is applied to the entire area of ​​the display area (DA), the second light-emitting element (ED2) may not be aligned within the second hole (H2), which has a smaller diameter. Therefore, the second light-emitting element (ED2), which has a larger diameter than the third light-emitting element (ED3), can be inserted preferentially.

[0103] Referring to FIGS. 13 and 14, a solution (160) containing a third light-emitting element (ED3) is applied to the upper surface of a base substrate (SUB) and a common substrate (33) to position the third light-emitting element (ED3) on the upper side of the base substrate (SUB) and the common substrate (33). Then, a pressure difference is created between the upper and lower sides of the base substrate (SUB) and the common substrate (33) by the solution (160), causing the third light-emitting element (ED3) to be inserted into the second hole (H2). Afterward, the solution (160) is cleaned to remove the solution (160) in contact with the surface of the base substrate (SUB) and the common substrate (33).

[0104] Accordingly, a second light-emitting element (ED2) may be placed in the first hole (H1), and a third light-emitting element (ED3) may be placed in the second hole (H2). A common substrate (33) and a base substrate (SUB) are arranged to surround the second light-emitting element (ED2) and the third light-emitting element (ED3), respectively, and may come into contact with the sides of the light-emitting elements (ED2, ED3) with an insulating layer (INS) and an insulating film ('38' in FIG. 4) in between.

[0105] Meanwhile, the second light-emitting element (ED2) and the third light-emitting element (ED3) are semiconductor structures prepared in advance, and may be included in the solution (160) in a state in which an insulating film (38) is arranged to surround the outer surface, and the first semiconductor layer (31), the second semiconductor layer (32), and the active layer (36_2, 36_3).

[0106] Meanwhile, the length of the third direction (DR3) combined with the base substrate (SUB) and the common substrate (33) may be longer than the length of the third direction (DR3) of the light-emitting element (ED2, ED3). Accordingly, the upper surface position of the light-emitting element (ED2, ED3) may be lower than the upper surface position of the common substrate (33). Meanwhile, this process may be carried out after the first substrate (210) is removed. Also, the thickness of the common substrate (33) may be thicker than the thickness of the light-emitting element (ED2, ED3). Accordingly, the light-emitting element (ED2, ED3) may be inserted into a plurality of holes (H1, H2) with upper and lower spaces left in the common substrate (33).

[0107] Referring to FIG. 15, connecting electrodes (CNE1, CNE2) are formed on light-emitting elements (ED1, ED2, ED3).

[0108] A first connecting electrode (CNE1) is formed on the upper surface of a first light-emitting element (ED1), and a second connecting electrode (CNE2) is formed on the upper surfaces of a second light-emitting element (ED2) and a third light-emitting element (ED3). The connecting electrodes (CNE1, CNE2) can be formed on the light-emitting elements (ED1, ED2, ED3) through a photolithography process.

[0109] Through the above process, a display substrate (200) placed on the second substrate (210) can be manufactured. Subsequently, a display device (1_1) can be manufactured by bonding the semiconductor circuit board (100) and the display substrate (200).

[0110] Referring to FIG. 16, a base substrate (SUB) having a plurality of light-emitting elements (ED1, ED2, ED3) formed thereon and a semiconductor circuit board (100) are bonded together (S170).

[0111] A semiconductor circuit board (100) includes a first substrate (110) comprising pixel circuit portions (PXCs) and a pixel electrode (AE) formed on one side of the first substrate (110). A second substrate (210) and a display substrate (200) may be aligned such that light-emitting elements (EDs) on the semiconductor circuit board (100) correspond to the pixel electrode (AE) of the semiconductor circuit board (100). Connecting electrodes (CNE1, CNE2) may be aligned such that they overlap with the pixel electrode (AE) in the thickness direction.

[0112] When the second substrate (210) and the display substrate (200) are aligned with the semiconductor circuit board (100), the display substrate (200) and the semiconductor circuit board (100) can be bonded together. A vacuum space may be formed between the second substrate (210) and the display substrate (200) and the semiconductor circuit board (100), or a filling layer may be filled.

[0113] Connecting electrodes (CNE1, CNE2) placed on the light-emitting elements (ED) of the display substrate (200) can come into direct contact with the pixel electrode (AE). When the semiconductor circuit board (100) and the display substrate (200) are bonded together, the light-emitting elements (ED) can have both ends electrically connected to the pixel circuit portion (PXC) of the semiconductor circuit board (100).

[0114] Next, referring to FIGS. 17 to 19, a second substrate (210) disposed on the undoped semiconductor layer (USEM) of a display substrate (200) can be removed, and the undoped semiconductor layer (USEM) can be removed through an etching process to manufacture a display device (1_1). The second substrate (210) includes a second sub-hole (SH2) and a fourth sub-hole (SH4) as described above.

[0115] According to the manufacturing method of the display device (1_1) according to the present embodiment, a common substrate (33), which is the etching residue of the first semiconductor layer (31) of the first light-emitting element (ED1), can be used as an assembly substrate for the second light-emitting element (ED2) and the third light-emitting element (ED3). Accordingly, the area of ​​the first light-emitting element (ED1) can be formed large so that the efficiency of the first light-emitting element (ED1) can be improved to be the same as the efficiency of the second light-emitting element (ED2) or the third light-emitting element (ED3). A display device (1_1) with improved light-emitting efficiency of the first light-emitting element (ED1) can be realized.

[0116] In addition, since the first semiconductor material layer (310) remaining after growing the first light-emitting element (ED1) is used as an assembly substrate, the process for aligning the first light-emitting element (ED1) can be omitted. That is, three alignment processes can be omitted to form a display device (1_1) having light-emitting elements (ED) of different wavelengths. The alignment process refers to the process of drilling a hole in the substrate, applying a solution, inserting the light-emitting element, and cleaning the solution. That is, since a display device (1_1) having light-emitting elements (ED) of red, green, and blue wavelengths can be realized through two alignment processes of inserting the second light-emitting element (ED2) and the third light-emitting element (ED3), the process can be simplified.

[0117] In this embodiment, the manufacturing process of the display device (1_1) is exemplified by using the etching residue of the first semiconductor layer (31) of the first light-emitting element (ED1) as a substrate, but is not limited thereto. For example, it may be modified to use the first semiconductor layer (31) of the second light-emitting element (ED2) or the first semiconductor layer (31) of the third light-emitting element (ED3) as a substrate.

[0118] Hereinafter, display devices (1_2, 1_3) according to other embodiments will be described with reference to FIGS. 20 to 24. From now on, the description of duplicate reference numerals will be omitted, and the differences will be described in detail.

[0119] FIGS. 20 and 21 are cross-sectional views showing a part of the manufacturing process of a display device according to another embodiment. FIG. 22 is a schematic cross-sectional view of the light-emitting elements of FIG. 21.

[0120] FIG. 20 illustrates a display device (1_2) after assembling a second light-emitting element (ED2) and a third light-emitting element (ED3) on a display substrate (200) before bonding the semiconductor circuit board (100) and the display substrate (200) (corresponding to FIG. 14). FIG. 21 illustrates a display device (1_2) after bonding the semiconductor circuit board (100) and the display substrate (200) (corresponding to FIG. 19).

[0121] In this embodiment, as shown in FIGS. 21 and 22, one side of the light-emitting element (ED) is referred to as the upper surface of the first semiconductor layer (31), and the other side of the light-emitting element (ED) is referred to as the lower surface of the second semiconductor layer (32).

[0122] One side and the top surface of the first light-emitting element (ED1) have the same first diameter (W1), and the first light-emitting element (ED1) has a cylindrical shape, which is the same as the display device (1_1) according to the previous embodiment. The second light-emitting element (ED2) and the third light-emitting element (ED3) differ from the previous embodiment in that they include a side having an inclined slope from the vertical direction of the first substrate (110). The second light-emitting element (ED2) and the third light-emitting element (ED3) may have a cylindrical shape with an inclined side.

[0123] The width of one side of each of the second light-emitting element (ED2) and the third light-emitting element (ED3) may differ from the width of the other side. For example, the width (W21) of one side of the second light-emitting element (ED2) may be smaller than the width (W22) of the other side. The width (W31) of one side of the third light-emitting element (ED3) may be smaller than the width (W32) of the other side.

[0124] In this embodiment, the second light-emitting element (ED2) and the third light-emitting element (ED3) include a cylindrical shape having inclined sides, so that the second light-emitting element (ED2) and the third light-emitting element (ED3) can be more stably aligned within the first hole (H1) and the second hole (H2) of the common substrate (33) and the base substrate (SUB), as shown in FIG. 20. That is, since the first hole (H1) and the second hole (H2) are formed to have an inclination corresponding to the side inclination of the second light-emitting element (ED2) and the third light-emitting element (ED3), it is advantageous for the light-emitting elements (ED2, ED3) to be stably fixed within the holes.

[0125] Meanwhile, one side of the second light-emitting element (ED2) and the third light-emitting element (ED3) may be shaped to protrude more than one side of the first light-emitting element (ED1). That is, one side of the second light-emitting element (ED2) and the third light-emitting element (ED3) may be shaped to protrude more in the thickness direction of the first substrate (110) than the common substrate (33). In addition, the other side of the first light-emitting element (ED1) may be shaped to protrude more in the direction opposite to the thickness direction of the first substrate (110) than the common substrate (33). This is the same as in the previous embodiment.

[0126] Hereinafter, a display device (1_3) according to another embodiment will be described with reference to FIGS. 23 and 24. FIGS. 23 and 24 are cross-sectional views showing a part of the manufacturing process of a display device according to another embodiment.

[0127] FIG. 23 illustrates a display device (1_3) after assembling a second light-emitting element (ED2) and a third light-emitting element (ED3) on a display substrate (200) before bonding the semiconductor circuit board (100) and the display substrate (200) (corresponding to FIG. 14). FIG. 24 illustrates a display device (1_3) after bonding the semiconductor circuit board (100) and the display substrate (200) (corresponding to FIG. 19).

[0128] In this embodiment, as shown in FIG. 24, one side of the light-emitting element (ED) is referred to as the upper surface of the first semiconductor layer (31), and the other side of the light-emitting element (ED) is referred to as the lower surface of the second semiconductor layer (32).

[0129] The one side and the top side of each of the light-emitting elements (ED1, ED2, ED3) have the same diameter (W1, W2, W3), and the light-emitting elements (ED1, ED2, ED3) have a cylindrical shape, which is the same as the display device (1_1) according to the previous embodiment. It differs from the previous embodiment in that the length of the third direction (DR3) of the second light-emitting element (ED2) and the third light-emitting element (ED3) is longer than the length of the third direction (DR3) of the first light-emitting element (ED3).

[0130] By forming the length of the third direction (DR3) of the second light-emitting element (ED2) and the third light-emitting element (ED3) to be longer than the length of the third direction (DR3) of the first light-emitting element (ED1), the other side of the first light-emitting element (ED1) and the other side of the second light-emitting element (ED2) and the third light-emitting element (ED3) placed in the display device (1_3) can be aligned horizontally.

[0131] Accordingly, the length of the third direction (DR3) of the first connecting electrode (CNE1) disposed on the lower surface of the first light-emitting element (ED1) may be substantially the same as the length of the third direction (DR3) of the second connecting electrode (CNE2) disposed on the lower surface of the second light-emitting element (ED2) and the third light-emitting element (ED3).

[0132] In this specification, the length, width, position, and shape of the light-emitting elements (ED1, ED2, ED3) may be varied depending on the manufacturing process and are not limited to the embodiments described above.

[0133] Although embodiments of the present invention have been described above with reference to the attached drawings, those skilled in the art will understand that the present invention may be implemented in other specific forms without changing the technical concept or essential features thereof. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0135] 1: Display device 100: Semiconductor circuit board 200: Display substrate AE: Pixel electrode ED: Light-emitting element 33: Common substrate 31: First semiconductor layer 36: Active layer 32: Second semiconductor layer CE: Common electrode H1, H2: Hole 160: Solution

Claims

Claim 1 A display device comprising: a plurality of pixel electrodes spaced apart from each other and disposed on a first substrate; a first light-emitting element disposed on one of the plurality of pixel electrodes; a common substrate disposed on the first light-emitting element and including a hole; and a second light-emitting element disposed within the hole and disposed on another pixel electrode among the plurality of pixel electrodes, wherein the first light-emitting element includes a first semiconductor layer, a first active layer, and a second semiconductor layer, and the first semiconductor layer includes the same material as the common substrate. Claim 2 delete Claim 3 In claim 1, the common substrate is a display device integrated with the first semiconductor layer of the first light-emitting element. Claim 4 A display device according to claim 1, wherein one surface of the second light-emitting element protrudes in the thickness direction of the first substrate more than one surface of the first light-emitting element. Claim 5 A display device according to claim 1, wherein the diameter of the second light-emitting element is smaller than the diameter of the first light-emitting element. Claim 6 In claim 1, the first light-emitting element is a display device that emits light in the red wavelength band. Claim 7 A display device according to claim 1, wherein the common substrate includes a side exposed by the hole, and further includes an insulating layer disposed on the side of the common substrate. Claim 8 A display device according to claim 1, wherein one surface of the first light-emitting element protrudes toward the upper surface of the first substrate more than one surface of the second light-emitting element. Claim 9 In claim 8, a display device in which the length in the thickness direction of the first substrate of the first light-emitting element is the same as the length in the thickness direction of the first substrate of the second light-emitting element. Claim 10 In claim 8, the side of the second light-emitting element has a slope inclined from the vertical direction of the first substrate. Claim 11 In claim 1, one surface of the first light-emitting element and one surface of the second light-emitting element are parallel to each other in the horizontal direction of the first substrate. Claim 12 A display device according to claim 11, wherein the length in the thickness direction of the first substrate of the first light-emitting element is shorter than the length in the thickness direction of the first substrate of the second light-emitting element. Claim 13 A method for manufacturing a display device comprising: preparing a base substrate and forming a first semiconductor material layer, a first active material layer, and a second semiconductor material layer on the base substrate; etching the first semiconductor material layer, the first active material layer, and the second semiconductor material layer to form a common substrate and forming a first light-emitting element disposed on the common substrate; forming a first hole penetrating the common substrate; and inserting a second light-emitting element into the first hole. Claim 14 A method for manufacturing a display device according to claim 13, wherein the common substrate comprises the same material as the first semiconductor material layer. Claim 15 A method for manufacturing a display device according to claim 13, wherein the step of forming the common substrate is the step of etching a portion of the upper surface of the first semiconductor material layer. Claim 16 A method for manufacturing a display device according to claim 13, further comprising the step of forming an insulating layer on the side of the common substrate surrounding the first hole. Claim 17 A method for manufacturing a display device according to claim 13, wherein the base substrate comprises an undoped semiconductor layer and a first substrate, and the step of forming the first hole comprises the step of etching the undoped semiconductor layer to form a first sub-hole and the step of penetrating the first substrate to form a second sub-hole. Claim 18 A method for manufacturing a display device according to claim 13, wherein the step of inserting the second light-emitting element into the first hole comprises the step of positioning the second light-emitting element on the upper side of the base substrate while it is contained in a solution. Claim 19 A method for manufacturing a display device according to claim 18, further comprising the step of cleaning the solution when the second light-emitting element is aligned within the first hole. Claim 20 A method for manufacturing a display device according to claim 13, comprising a third light-emitting element having a diameter smaller than the diameter of the second light-emitting element, and a step of inserting the second light-emitting element into the first hole and then inserting the third light-emitting element.

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