Error detection method for input part of inverter

KR103032417B1Active Publication Date: 2026-10-13LS ELECTRIC CO LTD
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Patent Information

Application Number
KR1020220023363
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-02-23
Publication Date
2026-10-13
Estimated Expiration
2042-02-23

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Abstract

The present invention relates to a method for detecting an abnormality in the input section of an inverter, and is an abnormality detection method performed in a micro-control unit that detects the charging voltage of a DC link capacitor of an inverter and controls a relay of an initial charging circuit, comprising: a) a reference setting process in which a first charging voltage of a DC link capacitor is detected at a first detection point to provide a point determination standard, and a reference setting process in which the charging voltage of a DC link capacitor is detected at set time intervals and compared with a charging target voltage; b) a first abnormality detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process exceeds the charging target voltage, a first abnormality detection process in which the input power supply is determined to be overvoltage using the point of detection of the charging voltage; and c) a second abnormality detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process is less than or equal to the charging target voltage, a second abnormality detection process in which the input power supply is determined to be undervoltage or the relay is burned out using the point of detection of the charging voltage.
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Description

Technology Field

[0001] The present invention relates to a method for detecting an abnormality in the input section of an inverter, and more specifically, to a method for detecting a failure of a relay in the input power supply and initial charging circuit of an inverter. Background Technology

[0002] Generally, inverters, along with converters, are one of the representative power conversion devices. Inverters receive AC power as input, convert it to DC, and then convert it back to AC for motor control. They are used in various forms across industries where electric motors are utilized, such as fans, pumps, elevators, conveying systems, and production lines. Converters are devices that convert AC or DC input power into DC; their power conversion method is similar to that of inverters, and like inverters, they are widely used across various industries.

[0003] An initial charging circuit is essential for an inverter. The initial charging circuit prevents overcurrent from flowing through the inverter's DC link capacitor due to inrush current and protects the components from high voltages generated by parasitic inductance components of the rectifier and DC sections and inrush currents.

[0004] An initial charging circuit typically has a parallel configuration of a relay and an initial charging resistor, and a configuration for monitoring the state of the initial charging circuit for stable motor control is described in the applicant's published patent No. 10-2021-0107414 (published September 1, 2021).

[0005] The above disclosed patent utilizes a method of detecting the current flowing through the initial charging resistor while the relay of the initial charging circuit is closed using a photocoupler, characterized by the ability to effectively detect abnormalities in the initial charging circuit using a simple circuit.

[0006] However, although the above disclosed patent has a simple additional configuration, improvements are required in that it requires the addition of a photocoupler and cannot detect input power abnormalities. The problem to be solved

[0007] The problem that the present invention aims to solve, taking into account the improvements mentioned above, is to provide a method for detecting relay failure in an initial charging circuit without adding additional circuits or components.

[0008] In addition, another objective of the present invention is to provide a method capable of detecting not only whether the relay of the initial charging circuit is damaged, but also an abnormality in the input voltage of the inverter. means of solving the problem

[0009] The method for detecting an input fault of an inverter according to the present invention, for solving the above technical problem, may include: a) a reference setting process in which a first charging voltage of a DC link capacitor is detected at a first detection point to provide a point determination standard, and the charging voltage of the DC link capacitor is detected at set time intervals and compared with a charging target voltage; b) a first fault detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process exceeds the charging target voltage, the charging voltage is detected at a point in time when the charging voltage is overvoltage of the input power supply; and c) a second fault detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process is less than or equal to the charging target voltage, the charging voltage is detected at a point in time when the charging voltage is undervoltage of the input power supply or a relay burnout is determined.

[0010] In an embodiment of the present invention, the process a) may include the step of detecting a first charging voltage at a first detection point when the inverter operation starts, the step of storing the first charging voltage and the first detection point, the step of detecting the charging voltage of the DC link capacitor at a set time interval, and the step of determining whether the detected charging voltage exceeds a charging target voltage.

[0011] In an embodiment of the present invention, in process b), if the point in time when the charging voltage exceeds the charging target voltage is less than the expected time for charging completion, it can be determined that overcharging of the DC link capacitor due to overvoltage of the input power source has occurred.

[0012] In an embodiment of the present invention, in process c), if the time during which the charging voltage is maintained below the charging target voltage is later than the expected time for charging completion, it can be determined that an abnormality has occurred in which the DC link capacitor is not charged to the charging target voltage because the input power is at a low voltage or the relay is closed. Effects of the invention

[0013] The present invention has the effect of detecting whether the relay of the initial charging circuit is damaged without using a separate additional circuit by detecting an input section abnormality using the time and voltage during which the DC link capacitor is charged through the initial charging resistor.

[0014] In addition, the present invention has the effect of detecting relay burnout and, at the same time, detecting whether there is an abnormality in the input power supply, thereby enabling easy identification of the specific cause of the abnormality in the relay input section. Brief explanation of the drawing

[0015] FIGS. 1 and FIGS. 2 are respectively exemplary diagrams of an inverter to which an input section fault detection method according to a preferred embodiment of the present invention is applied. Figure 3 is a modeling circuit diagram of the initial charging state of the initial charging circuits of Figures 1 and 2. Figure 4 is an initial charging graph. FIG. 5 is a flowchart of a method for detecting an input fault of an inverter according to a preferred embodiment of the present invention. Figure 6 is a charging graph to explain the present invention. Specific details for implementing the invention

[0016] To fully understand the structure and effects of the present invention, preferred embodiments of the present invention are described with reference to the attached drawings. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms and various modifications can be made. The description of the embodiments is provided merely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention. In the attached drawings, components are depicted enlarged from their actual size for convenience of explanation, and the proportions of each component may be exaggerated or reduced.

[0017] Terms such as 'first' and 'second' may be used to describe various components, but said components should not be limited by said terms. These terms may be used solely for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, 'first component' may be named 'second component,' and similarly, 'second component' may be named 'first component.' Furthermore, singular expressions include plural expressions unless the context clearly indicates otherwise. Unless otherwise defined, terms used in the embodiments of the present invention may be interpreted in the sense commonly known to those skilled in the art.

[0018] In particular, the present invention relates to a method for detecting an abnormality in the input section of an inverter, wherein the method is performed by a microcontroller unit (MCU) that is applied to the inverter to detect the DC link voltage and control the relay of the initial charging circuit.

[0019] Hereinafter, a method for detecting an abnormality in the input section of an inverter according to an embodiment of the present invention will be described in detail with reference to the drawings.

[0020] FIGS. 1 and FIGS. 2 are respectively exemplary diagrams of an inverter to which the present invention is applied, FIG. 1 is an example of an AC input type inverter in which the input power is AC, and FIG. 2 is an exemplary diagram of a DC input type inverter in which the input power is DC.

[0021] Referring to FIG. 1 and FIG. 2 respectively, the AC input type inverter is configured to include a DC link capacitor (30) connected in parallel to the inverter section (40), an initial charging circuit (10) that supplies a charging current to one end of the DC link capacitor (30), and a microcontroller unit (50, hereinafter abbreviated as MCU) that detects the charging voltage of the DC link capacitor (30) and controls at least the relay (11) of the initial charging circuit (10).

[0022] The above DC link capacitor (30) and initial charging circuit (10) serve to stabilize the DC power at the input terminal of the inverter unit (40). The DC link capacitor (30) smooths the DC voltage to provide a stable DC voltage, and the initial charging circuit (10) suppresses the inrush current of the DC link capacitor at the time of operation of the inverter unit (40).

[0023] That is, when the inverter unit (40) is initially operated, the relay (11) of the initial charging circuit (10) is open, and thus the inrush current generated by the DC link capacitor (30) flows to the initial charging resistor (12) of the initial charging circuit (10), thereby suppressing the rise of the inrush current.

[0024] Meanwhile, the MCU (50) detects the voltage of the DC link capacitor (30) and, if it is lower than the set reference voltage, opens the relay (11) to supply current through the initial charging resistor (12) so that the DC link capacitor (30) can be charged.

[0025] At this time, when the link voltage charged in the DC link capacitor (30) reaches a set voltage value, the inverter unit (40) is operated to supply current to the motor and drive the motor. At this time, the relay (11) is controlled to a closed state.

[0026] Figure 3 is a modeling circuit diagram of the initial charging state of the initial charging circuit (10) of Figures 1 and 2 described above.

[0027] Referring to FIG. 3, the initial charging circuit (10) can be modeled with a relay (11) and an initial charging resistor (12) connected in series, and during initial charging, the relay (11) is closed so that the current of the input power source (60) flows through the initial charging resistor (12) to the DC link capacitor (30) to charge the DC link capacitor (30).

[0028] When the DC link capacitor (30) is charged to a set voltage, the relay (11) is opened to cut off the input power (60) so that no further charging occurs.

[0029] Under the assumption that the resistance value of the initial charging resistor (12) in such a modeling circuit does not change, the time required for charging can be expressed as a function of the following mathematical formula 1.

[0030] [Mathematical Formula 1]

[0031] t charge = f(C dc-link )

[0032] That is, the time required for charging (t charge ) is the capacitance (C) of the DC link capacitor (30). dc-link It can be expressed as a function of ).

[0033] Figure 4 shows the initial charging graph of the DC link capacitor (30).

[0034] In Fig. 4, Tr indicates the time when charging is complete and the relay (11) is closed.

[0035] The charging voltage (Vdc) of the DC link capacitor increases rapidly from 0V initially and then charges with a gentle slope, and Vdc1 is the target charging voltage that serves as the reference for the time when the relay (11) closes.

[0036] The present invention detects an abnormality in the inverter input section by using the closed or open state of the relay (11), which is the operation of the initial charging circuit (10), and the charging voltage (Vdc) at a specific point in time.

[0037] The operation of the relay (11) above is easily verifiable as it is controlled by the MCU (50).

[0038] FIG. 5 is a flowchart of a method for detecting an input fault of an inverter according to a preferred embodiment of the present invention.

[0039] Referring to FIG. 5, the present invention includes a standard setting process (S10) for setting a detection standard, a first abnormality detection process (S20) for detecting an upward abnormality of the input power supply (60) based on the standard set in the standard setting process, and a second abnormality detection process (S30) for detecting a downward abnormality of the input power supply (60) or an abnormality of the relay (11) based on the standard set in the standard setting process.

[0040] Below, the specific configuration and operation of the inverter input fault detection method of the present invention configured as described above will be explained in more detail with reference to the graph in FIG. 6.

[0041] First, in the reference setting process (S10), when the operation of the inverter is started as in step S11, the MCU (50) detects and stores the charging voltage (Vdcm1) of the DC link capacitor (30) at the first set measurement time (tm1). At this time, the measurement time (tm1) can be set to occur almost simultaneously with the start of the operation of the inverter. For example, it can be set to be within 0.01s after the start of the inverter operation.

[0042] Next, the charging voltage (Vdc) of the DC link capacitor (30) is monitored repeatedly according to the set cycle as in step S12.

[0043] That is, in step S12, the MCU (50) detects the charging voltage (Vdcm2, Vdcm3..) of the DC link capacitor (11) at regular time intervals (tm2, tm3..).

[0044] In FIG. 6, for convenience of explanation, examples of a normal state DC link voltage, a first abnormal state DC link voltage where overcharging occurs, and a second abnormal state where charging is done at a low voltage are shown with excessive differences.

[0045] Next, as in step S13, check whether the currently detected DC link voltage is equal to or greater than the charging target voltage (Vdc1).

[0046] For example, looking at the charging voltage (vdcm2), which is the DC link voltage detected by the MCU (50) at the second time point (tm2), it can be seen that it is a value smaller than the charging target voltage (Vdc1) in the normal state, the first abnormal state, and the second abnormal state.

[0047] In this case, the second anomaly detection process (S30) is performed, and the current time (Tm) is set as the second detection time (tm2) as in step S31.

[0048] Next, in step S32, the difference between the current time (Tm=tm2) and the time when the initial DC link voltage was detected (tm1) is calculated, and it is checked whether that difference is greater than the estimated time for charging completion (Tr).

[0049] At the second time point (tm2), since the calculated value is smaller than the estimated time to complete charging (Tr), the DC link voltage monitoring of step S12 is continued.

[0050] Next, as in step S13, check whether the charging voltage (Vdcm3), which is the DC link voltage detected at the third time point (tm3), is equal to or greater than the charging target voltage (Vdc1).

[0051] In Fig. 6, when the first abnormal condition occurs, the charging voltage (Vdcm3) at the third time point (tm3) is greater than the charging target voltage (Vdc1), and therefore the first abnormal detection process (S20) is performed.

[0052] As in step S21, the third time point (tm3), which is the currently detected time point, is set as the current time (Tm), and as in step S22, it is checked whether the difference between the current time (Tm) and the first time point (tm1) is smaller than the estimated time to complete charging (Tr).

[0053] This step involves checking whether the charging voltage (Vdcm3), detected as the DC link voltage within a short time compared to the estimated charging completion time (Tr), has exceeded the charging target voltage (Vdc1).

[0054] That is, it can be understood as a process of checking whether the DC link capacitor (30) is overcharged by supplying a voltage greater than the normal voltage to the input power supply (60).

[0055] If the result of the judgment in step S22 is an overcharged state, it is determined to be a first abnormal state in which the voltage of the input power source (60) is excessively input, as in step S24.

[0056] At this time, if the difference between the current time (Tm) and the first detection time (tm1) is equal to or greater than the estimated time to complete charging (Tr), it is determined to be normal operation as in step S23.

[0057] If the DC link capacitor (30) is initially charged in the second ideal state as illustrated in FIG. 6, the previously described steps S12, S13, S31, and S32 are continuously performed at set time intervals.

[0058] At this time, the charging voltage (Vdcmn) is detected at the n-th time point in step S12, and when the charging voltage (Vdcm) is less than the charging target voltage (Vdc1) in step S13, the current n-th time point is set as the current time (Tm) as in step S31.

[0059] Next, as in step S32, it is determined whether the difference between the current time (Tm) and the first detection time (tm1) is greater than the estimated charging time (Tr).

[0060] Step S32 essentially determines whether the time elapsed since the initial charging began has exceeded the estimated charging time (Tr).

[0061] That is, it detects cases where the charging voltage (Vdcmn) of the DC link capacitor (30) does not reach the charging target voltage (Vdc1) even though the expected charging time (Tr) has elapsed.

[0062] The reason why charging does not occur in this way can be determined to be that the input power (60) is at a low voltage, or that the relay (11) is in a damaged state where it remains in a closed state rather than an open state.

[0063] In this case, the occurrence of a second abnormal state, such as relay burnout or low voltage of the input power supply (60), is detected as in step S33.

[0064] Thus, the present invention can detect the charging voltage state of a DC link capacitor without adding separate hardware, and determine whether the input power of the inverter is overvoltage or undervoltage using information of the time at which the charging voltage state was detected, and also detect whether the relay (11) of the initial charging circuit (10) is damaged.

[0065] Although embodiments according to the present invention have been described above, they are merely illustrative and those skilled in the art will understand that various modifications and equivalent embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the following claims. Explanation of the symbols

[0066] 10: Initial charging circuit 11: Relay 12: Initial charging resistor 30: DC link capacitor 40: Inverter unit 50: MCU 60: Input power

Claims

Claim 1 An abnormality detection method performed in a micro-control unit that detects the charging voltage of a DC link capacitor of an inverter and controls a relay of an initial charging circuit, comprising: a) a reference setting process in which a first charging voltage of a DC link capacitor is detected at a first detection point to provide a reference point determination standard, and the charging voltage of a DC link capacitor is detected at set time intervals and compared with a charging target voltage, wherein the elapsed time from the first detection point to the last detection point is compared with the expected time of completion of charging; b) a first abnormality detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process exceeds the charging target voltage, the charging voltage detection point is used to determine whether the input power is overvoltage; and c) a second abnormality detection process in which, if the charging voltage detected as a result of comparing the charging voltage and the charging target voltage in the reference setting process is less than or equal to the charging target voltage, the charging voltage detection point is used to determine whether the input power is undervoltage or the relay is burned out. Claim 2 A method for detecting an input fault of an inverter according to claim 1, wherein the process of a) comprises: a step of detecting a first charging voltage at a first detection point when the inverter operation starts; a step of storing the first charging voltage and the first detection point; a step of detecting the charging voltage of a DC link capacitor at a set time interval; and a step of determining whether the detected charging voltage exceeds a charging target voltage. Claim 3 A method for detecting an abnormality in the input section of an inverter, wherein, in paragraph 2, the process b) determines that overcharging of the DC link capacitor due to overvoltage of the input power source has occurred if the point in time when the charging voltage exceeds the charging target voltage is less than the estimated time for completion of charging. Claim 4 A method for detecting an input fault of an inverter, wherein, in paragraph 2, the above process c) determines that if the time during which the charging voltage is maintained below the charging target voltage is later than the above-mentioned charging completion time, an abnormality has occurred in which the input power is at a low voltage or the relay is closed and the DC link capacitor is not charged to the charging target voltage.

Citation Information

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