Thermal deposition of silicon-germanium

Abstract

Exemplary methods of semiconductor processing may include the step of providing a silicon-containing precursor to a processing zone of a semiconductor processing chamber. A substrate may be disposed within the processing zone of the semiconductor processing chamber. The methods may include the step of depositing a silicon-containing material on the substrate. Subsequently to a first time period, the methods may include the step of providing a germanium-containing precursor to a processing zone of the semiconductor processing chamber. The methods may include the step of thermally reacting the silicon-containing precursor and the germanium-containing precursor at a temperature of about 400°C or higher. The methods may include the step of forming a silicon and germanium-containing layer on the substrate.

Description

Technology Field

[0001] This application claims the benefit and priority of U.S. Patent Application No. 17 / 324,352, filed on May 19, 2021, with the title of the invention "THERMAL DEPOSITION OF SILICON-GERMANIUM", which is incorporated by reference in its entirety.

[0002] The present technology relates to methods and components for semiconductor processing. More specifically, the present technology relates to systems and methods for producing silicon-germanium films for semiconductor structures. Background Technology

[0003] Integrated circuits are made possible by processes that produce complexly patterned material layers on substrate surfaces. Producing patterned materials on a substrate requires controlled methods for forming and removing the materials. As device sizes continue to decrease, the aspect ratios of structures may increase, and maintaining the dimensions of these structures during processing operations can be a challenge. It may become more difficult to develop materials that can possess sufficient conformability across features. Furthermore, as the number of material layers patterned during processing increases, producing materials that can maintain material properties while also offering improved removal selectivity over other exposed materials becomes a greater challenge.

[0004] Therefore, improved systems and methods that can be used to produce high-quality devices and structures are required. These and other needs are addressed by the present technology.

[0005] Exemplary methods of semiconductor processing may include the step of providing a silicon-containing precursor to a processing zone of a semiconductor processing chamber. A substrate may be disposed within the processing zone of the semiconductor processing chamber. The methods may include the step of depositing a silicon-containing material on the substrate. Subsequently to a first time period, the methods may include the step of providing a germanium-containing precursor to a processing zone of the semiconductor processing chamber. The methods may include the step of thermally reacting the silicon-containing precursor and the germanium-containing precursor at a temperature of about 400°C or higher. The methods may include the step of forming a silicon and germanium-containing layer on the substrate.

[0006] In some embodiments, the processing zone of the semiconductor processing chamber may be maintained without plasma while forming silicon and germanium-containing layers on a substrate. The first time period may be about 60 seconds or less. The methods may include the step of increasing the flow rate of the silicon-containing precursor while providing the germanium-containing precursor. Thermal reaction of the silicon-containing precursor and the germanium-containing precursor may be performed at a temperature of about 500 °C or higher. Before providing the silicon-containing precursor, the methods may include the step of forming a plasma of the processing precursor. The methods may include the step of contacting the substrate with plasma effluents of the processing precursor. The processing precursor may include at least one of a hydrogen-containing precursor or a nitrogen-containing precursor. The methods may include the step of stopping the formation of plasma before providing the silicon-containing precursor to the processing zone. The methods may include the step of increasing the pressure within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone. The methods may include the step of decreasing the distance between the substrate and the faceplate within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone.

[0007] Some embodiments of the present technology may include semiconductor processing methods. The methods may include the step of forming a plasma of a processing precursor. The methods may include the step of contacting a substrate with plasma effluxes of the processing precursor. The substrate may be placed within a processing zone of a semiconductor processing chamber. The methods may include the step of providing a silicon-containing precursor to the processing zone of the semiconductor processing chamber. The methods may subsequently include the step of providing a germanium-containing precursor to the processing zone of the semiconductor processing chamber. The methods may include the step of reacting the silicon-containing precursor and the germanium-containing precursor within the processing zone of the semiconductor processing chamber. The methods may include the step of forming a silicon and germanium-containing layer on a substrate.

[0008] In some embodiments, the processing zone of the semiconductor processing chamber may be maintained without plasma while providing the silicon-containing precursor and while providing the germanium-containing precursor. The methods may include the step of maintaining the delivery of the silicon-containing precursor while providing the germanium-containing precursor. The germanium-containing precursor may be provided at least about 5 seconds after providing the silicon-containing precursor. The methods may include the step of increasing the flow rate of the silicon-containing precursor while providing the germanium-containing precursor. The semiconductor processing method may be performed at a temperature of about 400°C or higher within the processing zone. The methods may include the step of increasing the pressure within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone.

[0009] Some embodiments of the present technology may include semiconductor processing methods. The methods may include the step of forming a plasma of a processing precursor. The methods may include the step of contacting a substrate with plasma effluxes of the processing precursor. The substrate may be placed within a processing zone of a semiconductor processing chamber. The methods may include the step of providing a silicon-containing precursor to the processing zone of a semiconductor processing chamber. The methods may include the step of forming a layer of silicon-containing material on the substrate. The methods may include the step of providing a germanium-containing precursor to the processing zone of a semiconductor processing chamber following a first time period. The methods may include the step of reacting the silicon-containing precursor and the germanium-containing precursor within the processing zone of a semiconductor processing chamber. The methods may include the step of forming a silicon and germanium-containing layer placed on top of a layer of silicon-containing material on the substrate. In some embodiments, the processing zone of the semiconductor processing chamber may be maintained without plasma while providing the silicon-containing precursor and while providing the germanium-containing precursor. The first time period may be about 60 seconds or less.

[0010] Such technology can provide numerous advantages over conventional systems and techniques. For example, embodiments of the present technology can produce conformal materials applicable to a number of substrate features. Additionally, the present technology can produce silicon-germanium films for plug and gap-filling applications, as well as for any other applications where more uniform deposition may be beneficial. These and other embodiments, along with many of their advantages and features, are described in more detail below and in conjunction with the accompanying drawings. Brief explanation of the drawing

[0011] Further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of this specification and the drawings.

[0012] FIG. 1 illustrates a schematic cross-sectional view of an exemplary plasma system according to some embodiments of the present technology.

[0013] FIG. 2 illustrates operations in a semiconductor processing method according to some embodiments of the present technology.

[0014] FIGS. 3a through 3c illustrate exemplary schematic cross-sectional structures including material layers produced according to some embodiments of the present technology.

[0015] Some of the drawings are included as schematics. It should be understood that the drawings are for illustrative purposes only and should not be considered to be of actual scale unless specifically stated otherwise. Additionally, as schematics, the drawings are provided for illustrative purposes and may not include all aspects or information compared to realistic representations, and may include exaggerated material for illustrative purposes.

[0016] In the attached drawings, similar components and / or features may have the same reference label. Additionally, various components of the same type may be distinguished by having a character that distinguishes similar components follow the reference label. Where only the first reference label is used in this specification, the description is applicable to any one of the similar components having the same first reference label, regardless of the character. Specific details for implementing the invention

[0017] As device sizes continue to shrink, multiple material layers may be reduced in thickness and size to scale the devices. Aspect ratios may also be increased, and more selective material formation may be performed. These materials may be used in gap filling and other deposition operations to isolate and / or protect other materials. Additionally, as the number of materials on the surface to be processed may increase, newer materials may be utilized to increase selectivity during subsequent removal or processing. As a non-limiting example, silicon-germanium may be utilized in applications as an alternative to more conventional silicon oxide or other gap filling materials. However, incorporating germanium can be challenging in producing conformation formation along various device structures.

[0018] Conventional techniques have struggled to produce germanium-containing materials that can be conformable to device structures. For example, silicon-germanium blanket deposition leads to the development of air gaps and voids in devices in production, which may include trenches, plugs, or other structures characterized by increased aspect ratios. Additionally, conformal formation with germanium can be challenging due to various aspects associated with germanium. For instance, compared to silicon, germanium may be characterized by a lower melting point and less thermally stable formation. Furthermore, germanium materials may have a low nucleation potential for certain structures. For instance, germanium may have a higher affinity for certain materials than for others, which can cause island-like formation during deposition. This can limit conformal formation and create additional voids and gaps in the coverage. Therefore, many conventional technologies have been limited in their ability to incorporate silicon-germanium films.

[0019] The present invention overcomes these issues by performing a thermal-based material deposition in which silicon-germanium is placed on a seeding layer of a material on which it can be more easily formed conformally. By performing a thermal reaction to produce silicon-germanium after producing a seed or initiation layer, the present invention can allow for improved germanium-containing film coverage, which can provide conformal growth on any number of semiconductor structures. The remainder of the disclosure will routinely identify specific deposition processes utilizing the disclosed invention and describe one type of semiconductor processing chamber, but it will be readily understood that the described processes can be performed in any number of semiconductor processing chambers. Therefore, the present invention should not be considered limited to use only for these specific deposition processes or chambers. Before describing semiconductor processing methods according to the present invention, the present invention will discuss one possible chamber that can be used to perform processes according to embodiments of the present invention.

[0020] FIG. 1 illustrates a cross-sectional view of an exemplary processing chamber (100) according to some embodiments of the present invention. The drawing may illustrate an overview of a system that may be specifically configured to incorporate one or more aspects of the present invention and / or perform one or more operations according to embodiments of the present invention. Additional details of the chamber (100) or the methods performed may be further described below. While the chamber (100) may be utilized to form film layers according to some embodiments of the present invention, it will be understood that the methods may similarly be performed in any chamber where film formation may occur. The processing chamber (100) may include a chamber body (102), a substrate support (104) disposed inside the chamber body (102), and a cover assembly (106) coupled to the chamber body (102) and sealing the substrate support (104) within a processing volume (120). The substrate (103) may be provided to the processing volume (120) through an opening (126) that can be sealed in a conventional manner for processing using a slit valve or door. The substrate (103) may be placed on the surface (105) of the substrate support during processing. The substrate support (104) may be rotatable along an axis (147) to which the shaft (144) of the substrate support (104) may be located, as indicated by the arrow (145). Alternatively, the substrate support (104) may be lifted upward to rotate as needed during the deposition process.

[0021] A plasma profile modulator (111) may be placed in a processing chamber (100) to control the plasma distribution across a substrate (103) placed on a substrate support (104). The plasma profile modulator (111) may include a first electrode (108) that may be placed adjacent to the chamber body (102) and may separate the chamber body (102) from other components of the lead assembly (106). The first electrode (108) may be part of the lead assembly (106) or may be a separate sidewall electrode. The first electrode (108) may be an annular or ring-shaped member and may be a ring electrode. The first electrode (108) may be a continuous loop around the perimeter of the processing chamber (100) surrounding the processing volume (120) or, if desired, may be discontinuous at selected locations. The first electrode (108) may also be a perforated electrode, such as a perforated ring or mesh electrode, or a plate electrode, such as a secondary gas distributor.

[0022] One or more isolators (110a, 110b), which may be dielectric materials such as ceramics or metal oxides such as aluminum oxide and / or aluminum nitride, may be in contact with the first electrode (108) and may electrically and thermally isolate the first electrode (108) from the gas distributor (112) and the chamber body (102). The gas distributor (112) may define apertures (118) for dispensing process precursors into the processing volume (120). The gas distributor (112) may be coupled to a first electric power source (142), such as an RF generator, an RF power source, a DC power source, a pulsed DC power source, a pulsed RF power source, or any other power source that may be coupled to the processing chamber. In some embodiments, the first electric power source (142) may be an RF power source.

[0023] The gas distributor (112) may be a conductive gas distributor or a non-conductive gas distributor. The gas distributor (112) may also be formed of conductive and non-conductive components. For example, the body of the gas distributor (112) may be conductive, while the faceplate of the gas distributor (112) may be non-conductive. The gas distributor (112) may be powered by a first electric power source (142), such as as shown in FIG. 1, or the gas distributor (112) may be coupled to ground in some embodiments.

[0024] The first electrode (108) may be coupled to a first tuning circuit (128) capable of controlling the ground path of the processing chamber (100). The first tuning circuit (128) may include a first electronic sensor (130) and a first electronic controller (134). The first electronic controller (134) may be a variable capacitor or other circuit element, or may include such. The first tuning circuit (128) may be one or more inductors (132) or may include such. The first tuning circuit (128) may be any circuit that enables a variable or controllable impedance under plasma conditions present in the processing volume (120) during processing. In some embodiments as illustrated, the first tuning circuit (128) may include a first circuit leg and a second circuit leg connected in parallel between ground and the first electronic sensor (130). The first circuit leg may include a first inductor (132A). The second circuit leg may include a second inductor (132B) coupled in series with the first electronic controller (134). The second inductor (132B) may be positioned between the first electronic controller (134) and a node connecting both the first and second circuit legs to the first electronic sensor (130). The first electronic sensor (130) may be a voltage or current sensor and may be coupled to the first electronic controller (134), which may provide some degree of closed-loop control of plasma conditions within the processing volume (120).

[0025] A second electrode (122) may be coupled to a substrate support (104). The second electrode (122) may be embedded within the substrate support (104) or coupled to the surface of the substrate support (104). The second electrode (122) may be a plate, a perforated plate, a mesh, a wire screen, or any other distributed arrangement of a conductive element. The second electrode (122) may be a tuning electrode and may be coupled to a second tuning circuit (136) by, for example, a cable having a selected resistance, such as 50 Ω, by a conduit (146) disposed on the shaft (144) of the substrate support (104). The second tuning circuit (136) may have a second electronic sensor (138) and a second electronic controller (140), and the second electronic controller (140) may be a second variable capacitor. The second electronic sensor (138) may be a voltage or current sensor and may be coupled to the second electronic controller (140) to provide additional control over plasma conditions within the processing volume (120).

[0026] A third electrode (124), which may be a bias electrode and / or an electrostatic chucking electrode, may be coupled to the substrate support (104). The third electrode may be coupled to a second electric power source (150) through a filter (148), which may be an impedance matching circuit. The second electric power source (150) may be DC power, pulsed DC power, RF bias power, pulsed RF source or bias power, or a combination of these or other power sources. In some embodiments, the second electric power source (150) may be RF bias power. The substrate support (104) may also include one or more heating elements configured to heat the substrate to a processing temperature that may be about 25°C to about 800°C or higher.

[0027] The lead assembly (106) and substrate support (104) of FIG. 1 may be used with any processing chamber for plasma or thermal processing. In operation, the processing chamber (100) may provide real-time control of plasma conditions within the processing volume (120). A substrate (103) may be placed on the substrate support (104), and process gases may flow through the lead assembly (106) using the inlet (114) according to any desired flow plan. The gases may exit the processing chamber (100) through the outlet (152). Power may be coupled to the gas distributor (112) to set the plasma in the processing volume (120). In some embodiments, the substrate may be subjected to electrical bias using a third electrode (124).

[0028] When energizing the plasma in the processing volume (120), a potential difference may be established between the plasma and the first electrode (108). A potential difference may also be established between the plasma and the second electrode (122). Electronic controllers (134, 140) may then be used to adjust the flow properties of the ground paths represented by two tuning circuits (128 and 136). To provide independent control of plasma density uniformity and deposition rate from the center to the edge, a set point may be transmitted to the first tuning circuit (128) and the second tuning circuit (136). In embodiments where both electronic controllers may be variable capacitors, electronic sensors may independently adjust the variable capacitors to maximize the deposition rate and minimize thickness non-uniformity.

[0029] Each of the tuning circuits (128, 136) may have a variable impedance that can be adjusted using individual electronic controllers (134 and 140). If the electronic controllers (134, 140) are variable capacitors, the capacitance range of each variable capacitor, and the inductances of the first inductor (132A) and the second inductor (132B) may be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, which may have a minimum value within the capacitance range of each variable capacitor. Thus, when the capacitance of the first electronic controller (134) is at a minimum or maximum value, the impedance of the first tuning circuit (128) may be high, thereby producing a plasma shape with minimal aerial or lateral coverage across the substrate support. When the capacitance of the first electronic controller (134) approaches a value that minimizes the impedance of the first tuning circuit (128), the aerial coverage of the plasma can be maximized, thereby effectively covering the entire working area of ​​the substrate support (104). As the capacitance of the first electronic controller (134) deviates from the minimum impedance setting, the plasma shape can be contracted from the chamber walls, and the aerial coverage of the substrate support can be reduced. The second electronic controller (140) can have a similar effect of increasing and decreasing the aerial coverage of the plasma across the substrate support as the capacitance of the second electronic controller (140) can change.

[0030] Electronic sensors (130, 138) can be used to tune individual circuits (128, 136) within a closed loop. Depending on the type of sensor used, a set point for current or voltage may be installed on each sensor, and control software determining the adjustment for each individual electronic controller (134, 140) may be provided to the sensor to minimize deviation from the set point. Consequently, the plasma shape can be selected and dynamically controlled during processing. Although the foregoing discussion is based on electronic controllers (134, 140) which may be variable capacitors, it will be understood that any electronic component having adjustable characteristics may be used to provide tuning circuits (128 and 136) having adjustable impedance.

[0031] As previously discussed, a plasma processing chamber may be used for one or more aspects of film processing; however, in some embodiments, forming silicon and germanium films may not utilize a plasma enhancement process for some or all of the operations, which can improve the conformability of the films produced. In some embodiments of the present technology, film layers may be formed without at least plasma generation. FIG. 2 illustrates exemplary operations of a processing method (200) according to some embodiments of the present technology. The method may be performed in various processing chambers, including any other chambers including non-plasma chambers where operations can be performed, as well as the processing chamber (100) described above. The method (200) may include one or more operations prior to the initiation of the method, and such one or more operations may include front-end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed prior to the operations described. The methods may include a number of optional operations, which may or may not be specifically associated with some embodiments of the methods according to the embodiments of the present technology. For example, many of the operations are described to provide a broader range of processes to be performed, but are not critical to the present invention or may be performed by alternative methods as further discussed below. Method (200) may describe operations schematically illustrated in FIGS. 3a through 3c, and examples of FIGS. 3a through 3c will be described together with operations of method (200). It should be understood that the figures are merely partial schematics and that the substrate may include any number of additional materials and features having various characteristics and aspects as illustrated in the figures.

[0032] The method (200) may or may not involve optional operations for developing a semiconductor structure following a specific manufacturing operation. It should be understood that the method (200) may be performed on any number of semiconductor structures or substrates (305), as illustrated in FIG. 3a, including exemplary structures on which a silicon-germanium material may be formed. As illustrated in FIG. 3a, the substrate (305) may be processed to form one or more recesses or features, such as trenches, apertures, or any other structure in semiconductor processing. The substrate (305) may be a base wafer or substrate made of any number of materials, such as silicon or silicon-containing materials, germanium, or other substrate materials, as well as one or more materials that may be formed to be placed on the substrate during semiconductor processing. For example, in some embodiments, the substrate may be processed to include one or more materials or structures for semiconductor processing. The substrate (305) may be or may comprise a dielectric material such as an oxide or nitride of any number of materials, and formed features or recesses may provide access to one or more underlying materials (310). The material (310) may be a metal or any other material accessed during processing. For example, the material (310) may be a metal plug of transition metals, including cobalt, tungsten, or any number of other metals, which may be formed into any structure. Additionally, in some embodiments, the recess may include a liner (315) that may extend along the sidewalls of the substrate (305). In some embodiments, the liner (315) may be an oxide or nitride liner such as silicon oxide, silicon nitride, as well as transition metal nitride or oxide.Although only one feature is illustrated in the drawings, it should be understood that exemplary structures may have any number of features defined according to the structures according to embodiments of the present technology.

[0033] The aspect ratio of the features, or the ratio of the depth of the feature to the width or diameter of the formed feature, may be about 2:1 or greater, about 3:1 or greater, about 4:1 or greater, about 5:1 or greater, about 6:1 or greater, about 7:1 or greater, about 8:1 or greater, about 9:1 or greater, about 10:1 or greater, or greater than that. The plasma-deposited layer may not be sufficiently accessible to deeper inside the trench, and pinch-off may occur at the top of the feature. However, the silicon and germanium films produced by the present technique may feature coverage that completely penetrates the structure. For example, the thickness of the film along the sidewalls closer to the top of the structure and the thickness of the film along the sidewalls closer to the bottom of the structure may be substantially the same, and the film produced here is substantially equiangular. Accordingly, in some embodiments, the deposited film may be characterized by having a thickness conformity or similarity between any two regions formed along the sidewall or base of a feature or along the formed film of about 80% or more. In some embodiments, the conformity may be about 85% or more, about 90% or more, about 92% or more, about 94% or more, about 96% or more, about 98% or more, or greater than. Accordingly, the present technology can produce silicon-germanium films that can be integrated into a number of semiconductor processes in which conformity can be achieved and air gap and void formation can be limited.

[0034] As previously described, germanium may be less likely to form on some materials, which may produce segments of formation instead of conformal coverage. For example, dielectric materials that may be used for a substrate (305) or liner (315) may present conformal coverage, where germanium may nucleate more easily on other germanium sites, which may lead to voids within the coverage. Therefore, the present technology can form a seeding layer of silicon or silicon-containing material, which can improve germanium nucleation and increase conformal coverage.

[0035] To increase silicon adhesion and nucleation, in some embodiments, the method (200) may include pretreatment in an optional operation (205). By pretreating the surface of the substrate, the adhesion of the film may be improved by producing favorable terminations along the material or substrate on which deposition can be performed. The pretreatment may be a thermal process or may include a plasma enhancement process. The treatment may include the delivery of a hydrogen-containing precursor, a nitrogen-containing precursor, or some other precursor that may flow to contact or interact with exposed surfaces on the substrate. Exemplary precursors may include the delivery of one or more of hydrogen, nitrogen, ammonia, or other hydrogen-containing or nitrogen-containing precursors among other materials that may pretreat the substrate. The precursor or precursors may be delivered to a processing zone of a chamber, and a plasma may be formed. The substrate may come into contact with plasma effluxes of the precursors, and favorable terminations may be produced. Regardless of whether the liner (315) may be an oxide material or may contain one, a number of materials may additionally contain a superficial oxidation layer due to atmospheric exposure at some points during processing. By performing pretreatment, hydroxyl group terminations may be removed or replaced with more favorable nitrogen-containing or hydrogen-containing terminations.

[0036] The pretreatment may be or include a plasma enhancement operation, but when performed, in some embodiments, the deposition or formation operations may be performed while keeping the processing zone of the semiconductor processing chamber in a plasma-free state. Accordingly, in some embodiments, the method may include a step of stopping plasma formation following the pretreatment operation. In some embodiments, none of the mentioned operations of the method (200) may be performed, or other operations may be performed together with plasma generation, and the remaining operations may be performed as thermal processes. During the pretreatment, the plasma power may be maintained high enough to provide increased radical generation and energy, which can improve surface termination control. For example, the plasma may be generated at a power of about 500 W or more, about 600 W or more, about 700 W or more, about 800 W or more, about 900 W or more, about 1000 W or more, or above.

[0037] In operation (210), the method may include the step of providing a silicon-containing precursor to a processing zone of a semiconductor processing chamber in which a substrate may be housed. The processing chamber may be the same as or different from the chamber in which pretreatment may be performed. The silicon-containing precursor may flow into the processing zone and come into contact with the substrate as well as the processed surfaces when they are produced. A layer of silicon-containing material, which may be silicon including amorphous silicon, may be formed or deposited along the substrate in operation (215). As illustrated in FIG. 3b, the silicon-containing layer (320) may extend along any and / or all exposed surfaces along the substrate, including following the liner material (315), the substrate material (305), and other integrated materials such as, in some embodiments, the material (310), which may be metal, when exposed. The process may be performed for a sufficient period of time to produce a certain amount of coverage over the surface, which may serve as a seeding layer for subsequent silicon-germanium growth.

[0038] In an operation (220) that may occur subsequently to a first time period in which a seeding layer is produced, a germanium-containing precursor may be provided to a processing zone of a semiconductor processing chamber. In an operation (225), the silicon-containing precursor and the germanium-containing precursor may be thermally reacted within the processing zone of the semiconductor processing chamber, which may form a silicon and germanium-containing layer on a substrate. As illustrated in FIG. 3c, the silicon-germanium material (325) may be formed or deposited along exposed areas of the silicon-containing layer (320). This may provide more conformal growth of the germanium-containing material, which may limit the formation of air gaps or voids. Although a seam (330) may be produced during some embodiments of the present invention, the layer may be substantially continuous through the feature, and minimal or limited air gap formation may occur. Since a seeding layer of a material with higher germanium affinity can be formed along the structure, gap-free coverage can be produced along the sidewalls of features along the substrate.

[0039] Due to the reaction performed in some embodiments, the semiconductor processing chamber, pedestal, or substrate may be maintained at a temperature of about 400°C or higher. This may ensure the decomposition of the silicon-containing precursor and the germanium-containing precursor, and in some embodiments, the temperature may be maintained at about 450°C or higher, about 500°C or higher, about 520°C or higher, about 540°C or higher, about 560°C or higher, about 580°C or higher, about 600°C or higher, or higher.

[0040] As previously discussed, some or all of the formation operations may be performed while the substrate processing zone is maintained without plasma. By performing thermochemical vapor deposition, a more conformal material formation may be produced. Non-limiting examples of silicon-containing precursors that may be used during processing according to some embodiments of the present technology may include silanes, disilanes, silicon tetrafluoride, silicon tetrachloride, dichlorosilanes, tetraethyl orthosilicate, as well as any other silicon-containing precursors that may be used to form silicon-containing films. Germanium-containing precursors may include any number of germanium materials, such as germane, other organic-germanium precursors such as tetramethylgermanium, tributylgermanium hydride, triethylgermanium hydride or triphenylgermanium hydride, halogen-germanium precursors such as germanium fluoride, or any other germanium-containing precursor. Additional materials that can flow with the precursors may include diatomic hydrogen, nitrogen, argon, helium, or any number of other carrier gases that can be added with one or both of the silicon-containing precursor and the germanium-containing precursor.

[0041] Although the layers of material may be formed to any thickness in embodiments of the present technology, the silicon-containing layer may be formed to a reduced thickness, which can ensure complete coverage for germanium seeding without significantly altering the properties of the entire film produced. For example, in some embodiments, the silicon-containing layer may be formed to a thickness of about 20 Å or less, and may be formed to a thickness of about 15 Å or less, about 10 Å or less, about 5 Å or less, or less, such as a few material monolayers that can provide complete surface coverage while limiting the effect on film properties. To control the formation of the silicon-containing layer, the temperature may be reduced, which can control the rate of film formation. For example, any of the previously mentioned temperatures may be used, but, for example, by performing silicon-containing layer deposition at a temperature of about 500°C or less, the silicon-containing layer may be formed more slowly. The first time period during which the silicon-containing layer can be produced may be about 60 seconds or less, and in some embodiments of the present technology, it may be about 50 seconds or less, about 40 seconds or less, about 30 seconds or less, about 20 seconds or less, about 10 seconds or less, or less.

[0042] Following the first time period, a germanium-containing precursor may be provided to the processing zone. The flow of the silicon-containing precursor may be maintained during the delivery of the germanium-containing precursor, or it may be modified, for example, by increasing or decreasing the flow rate. For example, the flow of the silicon-containing precursor may continue after the first time period, but the germanium-containing precursor may simply be added to the flow of the silicon-containing precursor. Additionally, in some embodiments, the flow rate of the silicon-containing precursor may be increased or decreased at the time the germanium-containing precursor is provided. For example, a minimum flow rate of the germanium-containing precursor may be provided to ensure that proper formation and conformability are achieved during deposition. However, for example, when a film characterized by lower germanium integration may be sought, the flow rate of the silicon-containing precursor may be increased, which may further dilute the germanium-containing precursor. This may also provide control over germanium integration in the film while allowing for controlled growth of the seed or initiation layer. Accordingly, in some embodiments of the present technology, the germanium concentration can be controlled to less than about 5%, more than about 5%, and more than about 10%, more than about 15%, more than about 20%, more than about 25%, more than about 30%, more than about 35%, more than about 40%, or more than the above.

[0043] When pretreatment operations, such as plasma pretreatment, are performed, other chamber conditions may be adjusted prior to thermal deposition operations. For example, during plasma pretreatment, a relatively low pressure may be maintained in the processing zone, which can increase the mean free path of plasma effluxes and facilitate their delivery to higher aspect ratio structures. However, following plasma processing, in some embodiments, the pressure may be increased for thermal deposition operations, which may include the delivery of either or both silicon-containing precursors or germanium-containing precursors during the formation of, for instance, either or both of a seeding layer or a bulk layer. Increasing the pressure during thermal deposition can help non-plasma-enhanced precursors access higher aspect ratio structures and provide appropriate material flux across all surfaces where deposition can be sought. Accordingly, in some embodiments, the pressure during the pretreatment operation may be maintained at about 12 Torr or less, about 10 Torr or less, about 8 Torr or less, about 6 Torr or less, about 4 Torr or less, about 2 Torr or less, or less. During the delivery of any one deposition precursor, or during part or all of operation (210) to operation (225), the pressure may be increased to about 10 Torr or more, about 50 Torr or more, about 100 Torr or more, about 150 Torr or more, about 200 Torr or more, about 250 Torr or more, about 300 Torr or more, about 350 Torr or more, about 400 Torr or more, or more than that.

[0044] Similarly, in some embodiments, the substrate may be maintained at a first distance from a faceplate within a semiconductor processing chamber during a pretreatment operation, such as plasma pretreatment, and then moved to a second distance from the faceplate during deposition operations. For example, since plasma generation may occur in the processing zone of the processing chamber, the substrate may be maintained at a certain distance from the faceplate to facilitate not only plasma generation but also, for example, lateral or radial flow within the processing zone at lower processing pressures. Following the pretreatment, the substrate may be repositioned closer to or further away from the faceplate in some embodiments. For example, in some embodiments, the substrate may be moved closer to the faceplate, which can facilitate flow within structures formed across the substrate as well as deposition. This can limit temperature fluctuations within the processing chamber and ensure that deposition occurs more conformally along the features. By performing silicon-germanium deposition according to embodiments of the present technology, conformal coverage can be produced across any number of high aspect ratio features.

[0045] In the preceding description, numerous details have been presented for the purpose of explanation to provide an understanding of various embodiments of the present technology. However, it will be obvious to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0046] Although various embodiments have been disclosed, those skilled in the art will recognize that various modifications, alternative structures, and equivalents may be used without departing from the spirit of the embodiments. Additionally, to avoid unnecessarily obscuring the art, many well-known processes and elements have not been described. Accordingly, the above description should not be understood as limiting the scope of the art.

[0047] Where a range of values ​​is given, each value existing between the upper and lower limits of such range is interpreted as also specifically described up to one-tenth of the single-digit value of the smallest digit of the lower limit, unless otherwise clearly indicated in the context. Any narrower range existing between any specified value within a specified range or any unspecified value belonging to such range and any other specified value within such specified range or any other value belonging to such range is included. The upper and lower limits of such sub-ranges may independently be included in or excluded from such ranges, and each range is also included in the description insofar as any specifically excluded limit is in the specified range, whether one or both of the upper and lower limits are included in such sub-ranges or both are excluded from such sub-ranges. Where a specified range includes one or both of the limits, ranges excluding one or both of the limits so included are also included.

[0048] As used herein and in the appended claims, expressions of singular forms include plural references unless the context clearly indicates otherwise. Thus, for example, a designation for "precursor" includes plural such precursors, and a designation for "layer" includes one or more layers and equivalents of those layers known to those skilled in the art.

[0049] Additionally, as used herein and in the following claims, the words “comprise(s),” “comprising,” “contain(s),” “containing,” “include(s),” and “including” are intended to specify the presence of the specified features, integers, components, or actions, but do not exclude the presence or addition of one or more other features, integers, components, actions, acts, or groups.

Claims

Claim 1 A semiconductor processing method comprising: providing a silicon-containing precursor to a processing zone of a semiconductor processing chamber — wherein a substrate is disposed within the processing zone of the semiconductor processing chamber —; depositing a silicon-containing material on the substrate; subsequently, providing a germanium-containing precursor to a processing zone of the semiconductor processing chamber while maintaining the flow rate of the silicon-containing precursor during a first time period; increasing the flow rate of the silicon-containing precursor while providing the germanium-containing precursor; thermally reacting the silicon-containing precursor and the germanium-containing precursor at a temperature of about 400°C or higher; and forming a silicon and germanium-containing layer on the substrate. Claim 2 A semiconductor processing method according to claim 1, wherein the processing zone of the semiconductor processing chamber is maintained without plasma while forming the silicon and germanium-containing layer on the substrate. Claim 3 A semiconductor processing method according to claim 1, wherein the first time period is about 60 seconds or less. Claim 4 delete Claim 5 A semiconductor processing method according to claim 1, wherein the step of thermally reacting the silicon-containing precursor and the germanium-containing precursor is performed at a temperature of about 500°C or higher. Claim 6 A semiconductor processing method according to claim 1, further comprising the steps of: forming a plasma of a processing precursor before providing the silicon-containing precursor; and contacting the substrate with plasma effluents of the processing precursor. Claim 7 A semiconductor processing method according to claim 6, wherein the processing precursor comprises at least one of a hydrogen-containing precursor or a nitrogen-containing precursor. Claim 8 A semiconductor processing method according to claim 6, further comprising the step of stopping the formation of the plasma before providing the silicon-containing precursor to the processing zone. Claim 9 A semiconductor processing method, wherein, in claim 6, the step of increasing the pressure within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone. Claim 10 A semiconductor processing method, wherein, in claim 6, the method further comprises the step of reducing the distance between the substrate and the faceplate within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone. Claim 11 A semiconductor processing method comprising: forming a plasma of a processing precursor; contacting a substrate with plasma effluxes of the processing precursor — said substrate is disposed within a processing zone of a semiconductor processing chamber —; providing a silicon-containing precursor to the processing zone of the semiconductor processing chamber; subsequently, providing a germanium-containing precursor to the processing zone of the semiconductor processing chamber; reacting said silicon-containing precursor and said germanium-containing precursor within the processing zone of the semiconductor processing chamber; and forming a silicon and germanium-containing layer on said substrate. Claim 12 A semiconductor processing method according to claim 11, wherein the processing zone of the semiconductor processing chamber is maintained without plasma while providing the silicon-containing precursor and while providing the germanium-containing precursor. Claim 13 A semiconductor processing method according to claim 11, further comprising the step of maintaining the delivery of the silicon-containing precursor while providing the germanium-containing precursor. Claim 14 A semiconductor processing method according to claim 11, wherein the germanium-containing precursor is provided at least about 5 seconds after providing the silicon-containing precursor. Claim 15 A semiconductor processing method according to claim 11, further comprising the step of increasing the flow rate of the silicon-containing precursor while providing the germanium-containing precursor. Claim 16 In claim 11, the semiconductor processing method is performed at a temperature of about 400°C or higher within the processing zone. Claim 17 A semiconductor processing method according to claim 11, further comprising the step of increasing the pressure within the semiconductor processing chamber before or while providing the silicon-containing precursor to the processing zone. Claim 18 A semiconductor processing method comprising: forming a plasma of a processing precursor; contacting a substrate with plasma effluxes of the processing precursor — said substrate is disposed within a processing zone of a semiconductor processing chamber —; providing a silicon-containing precursor to the processing zone of the semiconductor processing chamber; forming a layer of a silicon-containing material on the substrate; subsequently, providing a germanium-containing precursor to the processing zone of the semiconductor processing chamber while maintaining a flow rate of the silicon-containing precursor after a first time period; reacting the silicon-containing precursor and the germanium-containing precursor within the processing zone of the semiconductor processing chamber; and forming a silicon and germanium-containing layer disposed on the layer of the silicon-containing material on the substrate. Claim 19 A semiconductor processing method according to claim 18, wherein the processing zone of the semiconductor processing chamber is maintained without plasma while providing the silicon-containing precursor and while providing the germanium-containing precursor. Claim 20 A semiconductor processing method according to claim 18, wherein the first time period is about 60 seconds or less.

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