Method for manufacturing a wiring board

Abstract

A method for manufacturing a wiring board is provided that allows the carrier to be peeled off simply and reliably. The method for manufacturing a wiring board comprises the steps of: preparing a laminated sheet having a peel layer and a metal layer in sequence on a carrier; making a slit on the side opposite to the carrier of the laminated sheet so that it passes inward from the outer edge of the laminated sheet when viewed from a planar view, and penetrates the metal layer and the peel layer when viewed from a cross-section of the laminated sheet, and dividing the metal layer and the peel layer into a central part and a peripheral part with respect to the slit; inserting a thin piece from the slit toward the central part of the metal layer or the peel layer and forming a gap between the metal layer and the carrier, and, when viewed from a cross-section of the laminated sheet, the insertion angle of the thin piece with respect to the main surface of the carrier exceeds 0°.

Description

Technology Field

[0001] The present invention relates to a method for manufacturing a wiring board. Background Technology

[0002] In recent years, multilayering of printed circuit boards has become widespread in order to increase mounting density and achieve miniaturization. These multilayer printed circuit boards constitute the majority of portable electronic devices and are used for the purpose of weight reduction and miniaturization. Furthermore, these multilayer printed circuit boards require further reduction in the thickness of the interlayer insulation layer and further weight reduction as a circuit board.

[0003] As a technology to satisfy such requirements, a method for manufacturing a multilayer printed circuit board using a coreless build-up method is employed. The coreless build-up method is a method of creating a multilayer structure by alternately stacking (building up) insulating layers and wiring layers without using a so-called core substrate. In the coreless build-up method, it is proposed to use a metal foil equipped with a carrier so that the separation of the support and the multilayer printed circuit board can be easily performed. For example, Patent Document 1 (Japanese Patent Publication No. 2005-101137) discloses a method for manufacturing a package substrate for mounting a semiconductor device, comprising attaching an insulating resin layer to the carrier surface of a copper foil equipped with a carrier to serve as a support, forming a first wiring conductor on the ultra-thin copper layer side of the copper foil equipped with a carrier through processes such as photoresist processing, pattern electrolytic copper plating, and resist removal, forming a build-up wiring layer, separating the carrier-equipped support substrate, and removing the ultra-thin copper layer.

[0004] In addition, for the miniaturization of the embedded circuit disclosed in Patent Document 1, a metal foil equipped with a carrier having a metal layer thickness of 1 μm or less is desired. Accordingly, to realize a reduction in the thickness of the metal layer, it is proposed to form a metal layer by a vapor phase method such as sputtering. For example, Patent Document 2 (International Publication No. 2017 / 150283) discloses a copper foil equipped with a carrier in which a peeling layer, an anti-reflective layer, and an ultra-thin copper layer (e.g., film thickness 300 nm) are formed by sputtering on a carrier such as a glass sheet. In addition, Patent Document 3 (International Publication No. 2017 / 150284) discloses a copper foil equipped with a carrier in which an intermediate layer (e.g., an adhesive metal layer and a peeling auxiliary layer), a peeling layer, and an ultra-thin copper layer (e.g., film thickness 300 nm) are formed by sputtering on a carrier such as a glass sheet. Patent documents 2 and 3 also disclose that excellent stability of the mechanical peel strength of the carrier is achieved by interposing an intermediate layer composed of a predetermined metal, and that visibility in image inspection (e.g., automatic image inspection (AOI)) is improved by the anti-reflective layer exhibiting a desirable dark color.

[0005] In particular, along with the further miniaturization and energy saving of electronic devices, there is a growing demand for the high integration and thinning of semiconductor chips and printed circuit boards. In recent years, the adoption of FO-WLP (Fan-Out Wafer Level Packaging) and PLP (Panel Level Packaging) has been considered as next-generation packaging technologies to meet these demands. Furthermore, the adoption of coreless build-up methods is being considered for FO-WLP and PLP. As one such method, there is a process called the RDL-First (Redistribution Layer-First) method, in which a wiring layer and, if necessary, a build-up wiring layer are formed on the surface of a coreless support, followed by chip mounting and sealing, and then the support is peeled off. For example, Patent Document 4 (Japanese Patent Publication No. 2015-35551) discloses a method for manufacturing a semiconductor device comprising: forming a metal peel layer on the main surface of a support made of glass or silicon wafer; forming an insulating resin layer thereon; forming a redistribution layer including a build-up layer thereon; mounting and sealing a semiconductor integrated circuit thereon; exposing the peel layer by removing the support; exposing a secondary mounting pad by removing the peel layer; forming a solder bump on the surface of the secondary mounting pad; and secondary mounting.

[0006] However, when peeling off a carrier from a carrier equipped with a wiring layer manufactured using a coreless build-up method, the wiring layer may bend significantly, causing disconnection or peeling, which may result in a decrease in the connection reliability of the wiring layer. Accordingly, a method for removing a carrier to address this problem has been proposed. For example, Patent Document 5 (Japanese Patent Publication No. 2020-119952) discloses a method for removing a carrier from a workpiece provided on the surface of a carrier through a temporary adhesive layer (e.g., including a wiring layer in contact with the temporary adhesive layer, a plurality of chips bonded to the wiring layer, and a mold layer sealing each chip). In the method disclosed in Patent Document 5, a step portion is formed on the back side of the carrier that protrudes laterally compared to the surface side of the carrier on which the workpiece is provided, and the carrier can be easily removed from the workpiece by applying a downward force to the step portion while holding and supporting the workpiece from above. In addition, Patent Document 6 (International Publication No. 2018 / 173807) discloses a method for manufacturing a wiring board, wherein a composite laminate (including a support, a release layer, and a multilayer wiring board) is pressed against a stage, and the support or the multilayer wiring board is peeled from the release layer to form a predetermined convex curved surface. According to this method, it is stated that stable peeling is possible by preventing the occurrence of defects such as cracks in the support or cracks or disconnections in the multilayer wiring board. Prior art literature

[0007] Japanese Patent Publication No. 2005-101137, International Publication No. 2017 / 150283, International Publication No. 2017 / 150284, Japanese Patent Publication No. 2015-35551, Japanese Patent Publication No. 2020-119952, International Publication No. 2018 / 173807 The problem to be solved

[0008] However, conventional manufacturing methods for wiring boards have room for improvement in terms of simple and reliable carrier peeling, as there are cases where carrier peeling becomes difficult due to the thickness of the wiring board (e.g., a resin-containing layer including a wiring layer, a semiconductor device (chip), and a resin layer), or where carrier peeling requires a dedicated device or complex process.

[0009] The inventors have obtained the finding that a wiring board can be manufactured by simply and reliably peeling off the carrier in a laminated sheet having a carrier, a release layer, and a metal layer in sequence, by making a predetermined slit that divides the metal layer and the release layer into a central part and a peripheral part, and by inserting a thin piece at a predetermined angle through the slit to form a gap between the metal layer and the carrier.

[0010] Accordingly, the objective of the present invention is to provide a method for manufacturing a wiring board in which the carrier can be peeled off simply and reliably. means of solving the problem

[0011] According to the present invention, the following embodiments are provided.

[0012] [Mode 1]

[0013] It is a method for manufacturing a wiring board, and

[0014] A process for preparing a laminated sheet having a release layer and a metal layer in sequence on a carrier, and

[0015] A process of making a slit on the side opposite to the carrier of the laminated sheet so that it passes inward from the outer edge of the laminated sheet when viewed in a planar view, and penetrates the metal layer and the peeling layer when viewed in a cross-sectional view, and dividing the metal layer and the peeling layer into a central part and a peripheral part with the slit as a boundary;

[0016] A process of inserting a thin piece from the slit toward the central portion of the metal layer or the peeling layer and forming a gap between the metal layer and the carrier, wherein, when the laminated sheet is viewed in cross-section, the insertion angle of the thin piece with respect to the main surface of the carrier exceeds 0°.

[0017] A method for manufacturing a wiring board including

[0018] [Mode 2]

[0019] It is a method for manufacturing a wiring board, and

[0020] A process for preparing a laminated sheet having a release layer and a metal layer in sequence on a carrier, and

[0021] A process of making a slit on the side opposite to the carrier of the laminated sheet so that it passes inward from the outer edge of the laminated sheet when viewed in a planar view, and penetrates the metal layer and the peeling layer when viewed in a cross-sectional view, and dividing the metal layer and the peeling layer into a central part and a peripheral part with the slit as a boundary;

[0022] A process of inserting a thin piece from the slit toward the central portion of the metal layer or the peeling layer and forming a gap between the metal layer and the carrier, wherein, when the laminated sheet is viewed in cross-section, the insertion angle of the thin piece with respect to the main surface of the carrier exceeds 0°.

[0023] Including,

[0024] A method for manufacturing a wiring board, wherein the carrier is a single-crystal silicon carrier having a notch or an orientation flat on its outer periphery, and in the process of forming the slit, when the angle θ is defined in a clockwise direction starting from the half-line from the center of the single-crystal silicon carrier to the midpoint of the notch or the orientation flat, the slit is formed such that the direction of external stress progression is within the range of 1° < θ < 89°.

[0025] [Mode 3]

[0026] A method for manufacturing a wiring board as described in embodiment 1 or 2, further comprising a process of expanding the gap by moving the thin piece along the slit starting from the gap formed.

[0027] [Mode 4]

[0028] A method for manufacturing a wiring board as described in Embodiment 3, further comprising the process of peeling off the metal layer from the carrier using the gap as a pivot point by applying force to the laminated sheet in a direction in which the carrier and the metal layer are separated after expanding the gap.

[0029] [Mode 5]

[0030] A method for manufacturing a wiring board as described in any one of embodiments 1 to 4, wherein the above slit is formed such that, when viewed in cross-section of the laminated sheet, at least a portion of the carrier does not penetrate.

[0031] [Mode 6]

[0032] A method for manufacturing a wiring board as described in any one of embodiments 1 to 5, wherein the width of the slit is 0.01 mm or more and 20 mm or less.

[0033] [Mode 7]

[0034] A method for manufacturing a wiring board as described in any one of embodiments 1 to 6, wherein the above-mentioned thin piece is a cutting blade, and the cutting blade is any one of a flat blade, a triangular blade, a square blade, a circular blade, and a rotary blade.

[0035] [Mode 8]

[0036] A method for manufacturing a wiring board as described in any one of embodiments 1 to 7, wherein the above slit is formed in a linear pattern such that the periphery surrounds the central portion when the laminated sheet is viewed in a planar view.

[0037] [Mode 9]

[0038] A method for manufacturing a wiring board as described in any one of embodiments 3 to 8, wherein the movement of the above-mentioned thin piece is performed over a part or the entire length of the above-mentioned slit.

[0039] [Mode 10]

[0040] A method for manufacturing a wiring board as described in any one of embodiments 4 to 9, wherein the peeling of the metal layer is performed while gripping or supporting the outer edge of the carrier or the laminated sheet.

[0041] [Mode 11]

[0042] A method for manufacturing a wiring board as described in any one of embodiments 1 to 10, wherein the insertion angle is greater than 0.1° and less than or equal to 60°.

[0043] [Mode 12]

[0044] A method for manufacturing a wiring board as described in any one of embodiments 1 to 11, wherein, in the formation of the gap above, the insertion width of the thin sheet into the laminated sheet is 0.1 mm or more.

[0045] [Mode 13]

[0046] A method for manufacturing a wiring board as described in any one of embodiments 1 to 12, wherein the above-mentioned thin sheet is composed of at least one material selected from the group consisting of iron-based materials, non-ferrous metals, ceramics, and diamonds.

[0047] [Mode 14]

[0048] A method for manufacturing a wiring board as described in any one of embodiments 1 to 13, wherein the laminated sheet further comprises a resin-containing layer on the side opposite to the peeling layer of the metal layer.

[0049] [Mode 15]

[0050] A method for manufacturing a wiring substrate as described in Embodiment 14, wherein the resin-containing layer comprises at least one selected from the group consisting of a wiring layer, a semiconductor device, and a resin layer.

[0051] [Mode 16]

[0052] A method for manufacturing a wiring substrate as described in Embodiment 14 or 15, wherein the thickness of the resin-containing layer is 1000 μm or less.

[0053] [Mode 17]

[0054] A method for manufacturing a wiring board as described in any one of embodiments 14 to 16, wherein, in the formation of the gap above, the insertion of the thin sheet is performed with respect to the resin-containing layer. Brief explanation of the drawing

[0055] FIG. 1a is a process flow diagram showing an example of a method for manufacturing a wiring board of the present invention as a schematic cross-sectional view, corresponding to an initial process (process (i) and (ii)). FIG. 1b is a process flow diagram showing a process corresponding to FIG. 1a, viewed as a schematic top view from the side opposite to the carrier of the laminated sheet. FIG. 2a is a process flow diagram showing an example of a method for manufacturing a wiring board of the present invention in a schematic cross-sectional view, corresponding to an intermediate process (processes (iii) and (iv)) that continues from the process shown in FIG. 1a. FIG. 2b is a process flow diagram showing a process corresponding to FIG. 2a, viewed as a schematic top view from the side opposite to the carrier of the laminated sheet. FIG. 3 is a process flow diagram showing an example of a method for manufacturing a wiring board of the present invention in a schematic cross-sectional view, corresponding to a later process (process (v) and (vi)) that continues from the process shown in FIG. 2a. FIG. 4 is a process flow diagram showing a schematic cross-sectional view of an example of forming a gap using a machine tool in a laminated sheet with a full mold structure. FIG. 5 is a process flow diagram showing an example of a conventional method for manufacturing a wiring board as a schematic cross-sectional view, corresponding to the overall process (process (i) and (ii)). FIG. 6 is a process flow diagram showing an example of a conventional method for manufacturing a wiring board in a schematic cross-sectional view, corresponding to the later processes (processes (iii) and (iv)) following the process shown in FIG. 5. Figure 7 is a drawing illustrating the diameter, blade thickness, and blade angle of a rotary blade. FIG. 8 is a schematic cross-sectional view showing an example of a carrier peeling method. FIG. 9a is a process flow diagram showing a case where the carrier is a silicon wafer having a notch, and the direction of progression of external stress due to the formation of a slit or peeling of the carrier coincides with the cleavage orientation, and a crack enters the silicon wafer, and corresponds to the overall process (process (i) and (ii)). FIG. 9b is a process flow diagram showing a top view of a case where the carrier is a silicon wafer having a notch, and the direction of progression of external stress due to the formation of a slit or peeling of the carrier coincides with the cleavage orientation, and a crack enters the silicon wafer, and corresponds to the later process (processes (iii) and (iv)) following the process shown in FIG. 9a. FIG. 10a is a process flow diagram showing a case where the carrier is a silicon wafer having a notch, and the direction of progression of external stress due to the formation of a slit or peeling of the carrier is mismatched with the cleavage orientation, and cracking of the silicon wafer is suppressed, and corresponds to the overall process (process (i) and (ii)). FIG. 10b is a process flow diagram showing a top view of a case where the carrier is a silicon wafer having a notch, and the direction of progression of external stress due to the formation of a slit or peeling of the carrier is mismatched with the cleavage orientation, and cracking of the silicon wafer is suppressed, and corresponds to the later process (processes (iii) and (iv)) following the process shown in FIG. 10a. FIG. 11 is a diagram showing the cleavage orientation of a carrier in the case where the carrier is a silicon wafer having an orientation flat. Specific details for implementing the invention

[0056] Method for manufacturing a wiring board

[0057] The present invention relates to a method for manufacturing a wiring board. The method of the present invention comprises each of the following steps: (1) preparation of a laminated sheet, (2) formation of a slit, (3) formation of a gap, (4) expansion of the gap as desired, and (5) carrier peeling as desired.

[0058] Hereinafter, each of processes (1) to (5) will be described with reference to the drawings.

[0059] (1) Preparation of laminated sheets

[0060] An example of a method for manufacturing a wiring board of the present invention is shown in FIGS. 1 to 3. First, as shown in (i) of FIG. 1a, a laminated sheet (10) is prepared having a release layer (15) and a metal layer (16) in sequence on a carrier (12). The release layer (15) is a layer provided on the carrier (12) and contributes to the release of the carrier (12) and the metal layer (16). The metal layer (16) is a layer composed of metal provided on the release layer (15).

[0061] The laminated sheet (10) may further have an intermediate layer (14) between the carrier (12) and the release layer (15). Each of the intermediate layer (14), the release layer (15), and the metal layer (16) may be a single layer consisting of one layer, or a multilayer consisting of two or more layers.

[0062] The carrier (12) may be composed of any of glass, ceramics, silicon, resin, and metal, but is preferably a silicon-containing substrate or a glass substrate. As a silicon-containing substrate, any substrate containing Si as an element may be used, and SiO2 substrates, SiN substrates, Si single-crystal substrates, Si polycrystalline substrates, etc., may be applied. More preferably, it is a glass carrier, a single-crystal silicon substrate, or a polycrystalline silicon substrate. According to a preferred embodiment of the present invention, the carrier (12) is a disc shape with a diameter of 100 mm or more, and more preferably a disc shape with a diameter of 200 mm or more and 450 mm or less. According to another preferred embodiment of the present invention, the carrier (12) is a rectangular shape with a short side of 100 mm or more, and more preferably has a short side of 150 mm or more and 650 mm or less. The rectangular carrier (12) may be a roll shape in which the long side is sufficiently longer than the short side, but is preferably 200 mm or more and 650 mm or less.

[0063] As illustrated in (i) of FIG. 1a and (i) of FIG. 1b, the laminated sheet (10) may further have a resin-containing layer (20) on the side opposite to the peeling layer (15) of the metal layer (16). The resin-containing layer (20) preferably comprises at least one selected from the group consisting of a wiring layer, a semiconductor element, and a resin layer (molded resin layer). For example, the resin-containing layer (20) may comprise at least a resin layer. More preferably, the resin-containing layer (20) comprises a wiring layer, a semiconductor element provided on the wiring layer, and at least a resin layer surrounding the semiconductor element. The resin layer may have a structure that surrounds only the semiconductor element (flange mold structure), or a structure that surrounds both the semiconductor element and the wiring layer (full mold structure). In any case, the resin-containing layer (20) can be formed in the same manner as the conventional method of manufacturing a wiring substrate. Furthermore, the aforementioned semiconductor element includes one having device functions such as an integrated circuit or a sensor.

[0064] The thickness of the resin-containing layer (20) is preferably 1000 μm or less, more preferably 10 μm or more and 500 μm or less, even more preferably 50 μm or more and 400 μm or less, and particularly preferably 70 μm or more and 300 μm or less. By doing this, the heat dissipation performance of the resin-containing layer (20) is excellent while miniaturizing or reducing the weight of the wiring board. In addition, even when the resin-containing layer (20) is thin in this way, the peeling of the carrier (12) can be reliably performed according to the present invention.

[0065] A laminated sheet (10) can be prepared, for example, as follows. First, a carrier-equipped metal foil (18) is prepared, having an intermediate layer (14) (i.e., any layer) provided on the carrier (12) as desired, a release layer (15), and a metal layer (16). Next, a first wiring layer is formed on the surface of the metal layer (16). After that, a resin-containing layer (20) is constructed based on the first wiring layer. The formation of the first wiring layer and the construction of the resin-containing layer (20) can be performed by known methods, and, for example, the aforementioned coreless build-up method may be preferably adopted. Additionally, if necessary, a semiconductor device (120b) may be mounted on the first wiring layer (or on the wiring layer (120a) constructed based on the first wiring layer) (see (i) of FIG. 5). By bonding the electrode of the semiconductor device (120b) to the wiring of the wiring layer (120a), the semiconductor device (120b) is electrically connected to the wiring layer (120a). It is preferable that the semiconductor device (120b) be covered with a resin layer (120c) after being mounted on the wiring layer (120a). Additionally, in this specification, the carrier (12), the intermediate layer (14) (if present), the release layer (15), and the metal layer (16) may be collectively referred to as "carrier-equipped metal foil (18)." A preferred form of the carrier-equipped metal foil (18) will be described later.

[0066] (2) Formation of a slit

[0067] A slit S is made on the side opposite to the carrier (12) of the prepared laminated sheet (10). This slit S can be made to pass inward beyond the outer edge of the laminated sheet (10) when viewed from a planar view, as shown in (ii) of FIG. 1b. At this time, the slit S can be made to penetrate the metal layer (16), the release layer (15), and the intermediate layer (14) (if present) when viewed from a cross-sectional view, as shown in (ii) of FIG. 1a. By making such a slit S in the laminated sheet (10), the metal layer (16), the release layer (15), and the intermediate layer (14) (if present) are divided into a central part C and a peripheral part P with respect to the slit S (see (ii) of FIG. 1a and (ii) of FIG. 1b). By doing this, it becomes possible to form the gap described later from the slit S, so that the peeling of the carrier (12) (peeling of the metal layer (16)) can be performed simply and reliably.

[0068] The method for forming the slit S may be any known method and is not particularly limited. For example, the slit S can be formed in the laminated sheet (10) using a cutting tool such as a cutter CT as shown in (ii) of FIG. 1a, or a machine tool such as a cutting blade. When forming the slit S using a machine tool, it is preferable to align the position of the slit S by viewing the laminated sheet (10) from a horizontal direction with a camera or similar device. Here, FIG. 4 shows an example of processing using a machine tool for a laminated sheet (10) of a full mold structure (a structure in which the resin layer constituting the resin-containing layer (20) surrounds both the semiconductor device and the wiring layer). As illustrated in (i) to (iii) of FIG. 4, when forming a slit S and a gap G described later by a machine tool on a laminated sheet (10) of a full mold structure, it is preferable to determine a processing position (distance from the side cross-section of the resin layer) by viewing the laminated sheet (10) in a horizontal direction with a camera (not shown) (see FIG. 4 (i)), and to form the slit S and the gap G using a machine tool (e.g., a rotary blade RC) at the determined processing position (see FIG. 4 (ii) and (iii)). In addition, when processing a laminated sheet (10) of a flange mold structure (a structure in which the resin layer constituting the resin-containing layer (20) surrounds only the semiconductor device), it is preferable to view the vicinity of the side cross-section of the resin layer with a camera and form a slit S along the side cross-section of the resin layer (see FIG. 1a (ii)).

[0069] As shown in (ii) of FIG. 1a, it is preferable that the slit S be formed so that at least a portion of the carrier (12) does not penetrate when the laminated sheet (10) is viewed in cross-section. By doing so, in the gap formation and expansion process described later, it is possible to insert and move the thin sheet using the carrier (12) as a guide, thereby making the peeling of the carrier (12) (peeling of the metal layer (16)) even simpler and more reliable.

[0070] The width of the slit S (width in the plane direction of the laminated sheet (10)) is preferably 0.01 mm or more and 20 mm or less, more preferably 0.05 mm or more and 15 mm or less, and even more preferably 0.2 mm or more and 10 mm or less. By keeping it within this range, in the gap formation and expansion process described later, the insertion of the thin piece at the intended location between the peeling layer (15) and the metal layer (16) becomes more accurate, allowing the subsequent peeling process to be performed smoothly. In addition, it has the effect of preventing unnecessary scratches from occurring on the peeling layer (15) or the metal layer (16), etc. Furthermore, the slit S is preferably formed in a direction approximately perpendicular to the main surface of the carrier (12) (thickness direction of the laminated sheet (10)). That is, it is preferable to place a cutting tool or the like on the side opposite to the carrier (12) of the laminated sheet (10) so as to be approximately perpendicular to the main surface of the carrier (12) (e.g., within a range of 90°±5°).

[0071] It is preferable that the slit S be formed in a linear pattern such that the peripheral portion P surrounds the central portion C when the laminated sheet (10) is viewed from a planar view. This linear pattern may be formed in a curve, and for example, if the laminated sheet (10) is disc-shaped, it includes forming the slit S in a circular pattern. The example illustrated in (ii) of FIG. 1b is formed by processing at a certain distance from the outer edge (four sides) of the rectangular laminated sheet (10) to form the slit S in a rectangular pattern (linear pattern of four sides). Above all, when using a rectangular laminated sheet (10), it is not necessary to form the slit S in the aforementioned linear pattern of four sides, and the slit S may be formed in a linear pattern of one side or more and three sides or less within a range where a gap sufficient for inserting a thin sheet can be formed.

[0072] In the process of forming this slit, if the carrier is a single-crystal silicon carrier, it is desirable to pay attention to the direction of advancement of the slit S. Here, the process of forming the slit and / or the process of peeling off the carrier described later, in the case where the carrier (12) of the carrier-equipped metal foil (18) is a single-crystal silicon carrier, are respectively shown in FIG. 9a, 9b, 10a, and 10b. In the process illustrated in FIGS. 9a to 10b, a carrier-equipped metal foil (18) is prepared in which the carrier (12) is a single-crystal silicon carrier ((i) in FIG. 9a and (i) in FIG. 10a), a resin-containing layer (20) is formed on the metal layer (16) of the carrier-equipped metal foil (18) ((ii) in FIG. 9a and (ii) in FIG. 10a), and then a slit S is formed and / or the carrier (12) is peeled off ((iii) and (iv) in FIG. 9b and (iii) and (iv) in FIG. 10b). Additionally, the single-crystal silicon carrier typically has a notch N shown in (i) in FIG. 9a and (i) in FIG. 10a, or an orientation flat OF (also called an orientation flat) shown in FIG. 11 on the outer periphery to indicate a reference point for crystal orientation. Generally, when the diameter of single-crystal silicon is 200 mm or less, an orientation flat is formed, and when it is 200 mm or more, a notch is formed. Hereinafter, this notch N and orientation flat OF are collectively referred to as "notch, etc."

[0073] As shown in (iii) and (iv) of FIG. 9b, when a slit S is formed in a direction where the advancing direction of external stress ST coincides with the cleavage orientation CL, there is a possibility that the silicon carrier may be destroyed, such as by a crack CR occurring along the cleavage orientation CL starting from the point where the external stress ST was initially applied. In order to suppress such destruction of the silicon carrier by cleavage, when the carrier (12) is a single-crystal silicon carrier, it is preferable to form a slit S on the carrier (12) by adding external stress ST so that it is inconsistent with either the x-axis (left-right direction in the drawing) or the y-axis (up-down direction in the drawing) of the silicon carrier, as shown in (iii) and (iv) of FIG. 10b.

[0074] Accordingly, according to a preferred embodiment of the present invention, the carrier (12) is a single-crystal silicon carrier having a notch or the like on its outer periphery, and in the process of forming a slit S, when an angle θ is defined in a rightward rotation (clockwise) starting from a half-line L from the center of the single-crystal silicon carrier to the notch or the like, the slit is made such that the direction of progression of external stress is within the range of 1° < θ < 89°.

[0075] This will be explained in more detail. As shown in (i) of FIG. 9a and (i) of FIG. 10a, if the angle θ is defined in a clockwise direction starting from the half-line L from the center of the carrier (12) to the midpoint of the notch N or orientation flat OF, then θ = θ°, 90°, 180°, and 270° correspond to the cleavage orientation CL. For this reason, regarding the direction of progression of external stress ST by the slit θr, as shown in (iii) of FIG. 10b, it is preferable to perform the slit while maintaining the direction of progression of external stress ST so that θr is within the range of 1° < θr < 89°, and it is more preferable to make it within the range of 5° < θr < 85°. By introducing a slit that satisfies such a range of θr, it is possible to suppress the destruction of the carrier (12) composed of a silicon wafer. The particularly desirable range of θr for this slit is within θr = 45±5°, 135±5°, 225±5°, and 315±5° when turning to the right from the ray L. These angles correspond to the crystal orientation of the silicon wafer. <100> Since the wafer is most difficult to cleave in this direction, by advancing external stress at these angles, it becomes possible to form slit S while effectively suppressing wafer fracture.

[0076] (3) Formation of gaps

[0077] With respect to the laminated sheet (10) having a slit S formed therein, a thin sheet T is inserted from the slit S toward the central part C of the resin-containing layer (20) (if present), metal layer (16), peeling layer (15), or intermediate layer (14) (if present) ((iii) of FIG. 2a and (iii) of FIG. 2b). At this time, as shown in (iii) of FIG. 2a, when the laminated sheet (10) is viewed in cross-section, the insertion angle θ of the thin sheet T with respect to the main surface of the carrier (12) is made to exceed 0°. By doing this, a gap G can be formed between the metal layer (16) and the carrier (12) ((iv) of FIG. 2a), and using this gap G, it becomes possible to peel off the carrier (12) easily and reliably.

[0078] In recent years, to further thin semiconductor packages, the resin-containing layer is thinned by polishing the resin layer (mold resin), etc. However, the conventional carrier peeling method disclosed in Patent Document 5 requires a process of holding and supporting the resin-containing layer with high rigidity from above with a holding support unit, and it cannot be said that it adequately responds to such thinning, that is, to the resin-containing layer with reduced rigidity. Here, FIGS. 5 and 6 show an example of a conventional method for manufacturing a wiring board. In the conventional process shown in FIGS. 5 and 6, first, a laminated sheet (110) is prepared in which a resin-containing layer (120) is provided on a metal foil (118) provided with a carrier (i) (Fig. 5). In this example, the metal foil (118) provided with the carrier has an intermediate layer (114), a peeling layer (115), and a metal layer (116) in order on the carrier (112). Additionally, the resin-containing layer (120) includes a wiring layer (120a), a semiconductor element (120b), and a resin layer (120c). Next, a slit reaching the carrier-equipped metal foil (118) is made using blade B from the resin-containing layer (120) side of the prepared laminated sheet (110), and an outer edge portion is removed from the slit in the resin-containing layer (120) to form an extended protrusion portion E ((ii) of FIG. 5). Then, with the resin-containing layer (120) fixed by a suction jig SJ, a force is applied to the formed extended protrusion portion E in a direction that separates the carrier (112) from the resin-containing layer (120) ((iii) of FIG. 6). In this way, the carrier (112) and the intermediate layer (114) are peeled from the resin-containing layer (120) at the location of the peeling layer (115) ((iv) of FIG. 6).

[0079] However, according to the findings of the inventors, it has been found that with such a conventional method, peeling of the carrier (112) may be difficult when the resin-containing layer (120) is thin, with a thickness of 300 μm or less. One of the factors contributing to this is as follows. That is, regarding the method of peeling the carrier shown in FIGS. 5 and 6, when the thickness of the resin-containing layer (120) is greater than 300 μm, the residual stress at the interface between the resin-containing layer (120) and the metal foil (118) equipped with the carrier is large, and it is believed that the peeling of the carrier (112), etc. is promoted by this residual stress. On the other hand, when the thickness of the resin-containing layer (120) is smaller than 300 μm, the residual stress at the interface between the resin-containing layer (120) and the metal foil (118) equipped with the carrier is reduced, and it is believed that the peeling of the carrier (112), etc., becomes difficult to promote.

[0080] In contrast, in the present invention, by forming a gap G between the metal layer (16) and the carrier (12) (typically in the peeling layer (15) or nearby therein), the peeling of the carrier (12) (the peeling of the metal layer (16)) can be reliably performed using this gap G. Specifically, in the manufacture of a semiconductor package, the gap between the metal layer (16) and the carrier (12) is configured to have a peeling strength of at least a certain level so as not to cause unintended peeling of the carrier (12) acting as a support. In this regard, by forming a partially peeled gap G between the metal layer (16) and the carrier (12), a stress concentration portion that serves as a starting point for peeling can be formed between the metal layer (16) and the carrier (12) during the subsequent peeling process. By doing so, it becomes possible to reliably peel the carrier (12) acting as a support regardless of the thickness of the resin-containing layer (20). In addition, the method of the present invention can peel off the carrier (12) by a simple method of forming a slit S and a gap G without requiring a dedicated device or complex process. In this way, a predetermined slit S is made in a laminated sheet (10) having a carrier (12), a peeling layer (15), and a metal layer (16) in order, dividing the metal layer (16) and the peeling layer (15) into a central part C and a peripheral part P, and a thin sheet T is inserted from the slit S at a predetermined angle θ to form a gap G between the metal layer (16) and the carrier (12), thereby allowing the carrier (12) to be peeled off simply and reliably to manufacture a wiring board.

[0081] The insertion angle θ of the thin sheet T with respect to the main surface of the carrier (12) is defined as the angle formed between the leading edge of the thin sheet T and the surface of the carrier (12) at the point where the leading edge of the thin sheet T (or a virtual line passing through the leading edge) contacts the surface of the carrier (12) when the laminated sheet (10) is viewed in cross-section as shown in (iii) of FIG. 2a. The reason for defining it in this way is that the thin sheet T does not behave as a rigid body but may bend like an elastic body. This insertion angle θ is greater than 0°, preferably greater than 0.1° and less than or equal to 60°, more preferably greater than or equal to 1° and less than or equal to 58°, even more preferably greater than or equal to 2° and less than or equal to 55°, particularly preferably greater than or equal to 3° and less than or equal to 50°, and most preferably greater than or equal to 5° and less than or equal to 45°. By inserting the thin sheet T into the laminated sheet (10) at such an angle, the thin sheet T is inserted into the location where the adhesion is weakest among the layers constituting the laminated sheet (10) (typically the peeling layer (15) or its vicinity), thereby efficiently forming a gap G. In addition, it is preferable to apply vertical stress to the peeling layer (15) or its vicinity when inserting the thin sheet T (for example, to squeeze out the area around the peeling layer (15) by the thin sheet T), and by doing so, the gap G can be formed even more efficiently.

[0082] In the formation of the gap G, the insertion width of the laminated sheet (10) of the thin sheet T is preferably 0.1 mm or more, more preferably 0.5 mm or more, and even more preferably 1 mm or more. In this specification, the insertion width refers to the distance from the slit S to the innermost part of the gap G (which may also be referred to as the inner length of the gap G). With such an insertion width, the peeling of the carrier (12) can be further promoted by the gap G. The upper limit of the insertion width can be appropriately determined according to the size of the laminated sheet (10) and is not particularly limited, but 20 mm can be used as a standard for the upper limit.

[0083] When the laminated sheet (10) further comprises a resin-containing layer (20), the insertion of a thin sheet T (e.g., a rotary blade RC) in the formation of the gap G may be performed with respect to the resin-containing layer (20) (see (ii) of FIG. 4, the central part C side). Typically, the peel strength between the metal layer (16) and the resin-containing layer (20) is greater than the peel strength between the carrier (12) and the metal layer (16). For this reason, by inserting the thin sheet T into the resin-containing layer (20), the metal layer (16) is lifted together with the resin-containing layer (20) and partially detached from the carrier (12), as shown in (iii) of FIG. 4. As a result, a gap G can be formed between the metal layer (16) and the carrier (12).

[0084] In terms of the formation of gap G, the thickness of the flake T is typically 2 mm or less, and more typically 0.1 mm or more and 1 mm or less. In addition, the spring limit value Kb of the flake T, measured by a cyclic bending test in accordance with JIS H3130-2012 0.1 It is preferable that the rigidity be 100 N / mm² or higher and 1500 N / mm² or lower, more preferable that it be 200 N / mm² or higher and 1000 N / mm² or lower, and even more preferable that it be 300 N / mm² or higher and 800 N / mm² or lower. In addition, the static elastic modulus of the thin plate T, measured in accordance with JIS R1602-1995, is preferably 30 GPa or higher and 800 GPa or lower, more preferably 80 GPa or higher and 300 GPa or lower, and even more preferably 100 GPa or higher and 200 GPa or lower. By using a thin plate T having such rigidity, it becomes easier to form the gap G. The thin plate T may be the same as or different from the cutting tool or machine tool used to form the aforementioned slit.

[0085] Preferably, the thin section T is composed of at least one material selected from the group consisting of ferrous materials, non-ferrous metals, ceramics, and diamond, and more preferably, is composed of tungsten or stainless steel. Preferred examples of ferrous materials include stainless steel, carbon tool steel (such as SK120 specified in JIS G4401-2009), alloy tool steel (such as SKS7 specified in JIS G4404-2015, which is carbon tool steel with small amounts of tungsten, chromium, vanadium, etc. added), and high-speed tool steel (such as SKH51 specified in JIS G4403-2015, which is carbon tool steel with large amounts of tungsten, chromium, vanadium, molybdenum, etc. added). Preferred examples of non-ferrous metals include tungsten and superalloys (alloys made by sintering powder of hard metal carbides such as tungsten carbide). Preferred examples of ceramics include zirconium oxide.

[0086] It is preferable that the thin blade T be a cutting blade, as this facilitates the formation of a gap G. The shape of this cutting blade may be any of a flat blade, a triangular blade, a square blade, a circular blade, or a rotary blade, but among these, it is more preferable that the cutting blade has a tip shaped like an arc or a curve, and it is particularly preferable that it be a rotary blade. By using a rotary blade (which may also be referred to as a rotary cutter, a slit cutter, or a circular knife), it becomes easy to insert the blade into the laminated sheet (10) at a constant insertion angle θ, and by inserting it into the laminated sheet (10) while pressing it while rotating the blade, a gap G can be formed smoothly, thereby effectively suppressing the destruction of the resin-containing layer (20).

[0087] A schematic diagram of a rotary blade is shown in FIG. 7. As illustrated in FIG. 7, it is preferable for the rotary blade to have a diameter d, a blade thickness t, and a blade angle a within a predetermined range in terms of the formation of a gap G. That is, the diameter d of the rotary blade is preferably 5 mm or more and 150 mm or less, more preferably 10 mm or more and 100 mm or less, and even more preferably 18 mm or more and 60 mm or less. The blade thickness t of the rotary blade is preferably 0.1 mm or more and 5 mm or less, more preferably 0.2 mm or more and 3 mm or less, and even more preferably 0.3 mm or more and 1 mm or less. In addition, the blade angle a of the rotary blade is preferably 10° or more and 50° or less, more preferably 15° or more and 40° or less, and even more preferably 20° or more and 30° or less.

[0088] (4) Widening of the gap (arbitrary process)

[0089] Starting from the gap G formed according to the desired direction, the thin section T is moved along the slit S to expand the gap G ((iv) of FIG. 2b). By expanding the gap G in this way, the peeling of the carrier (12) can be performed even more smoothly.

[0090] It is preferable that the movement of the thin film T be carried out over a part or the entire length of the slit S, and it is more preferable that it be carried out over the entire length of the slit S. For example, when the slit S is formed in the aforementioned rectangular pattern (a four-sided linear pattern), gaps G can be formed on each side by moving the thin film T along the rectangular pattern. In particular, when the laminated sheet (10) has a polygonal shape, it is preferable to form gaps G including the corner portions (bent portions) of the slit S, from the perspective that peeling can be performed smoothly by stress concentration in the gaps G during the subsequent peeling process. Furthermore, when the carrier is a single-crystal silicon carrier during the process of expanding these gaps, it is preferable to pay attention to the direction of advancement of the slit S.

[0091] When moving the thin plate T, the insertion angle of the thin plate T relative to the main surface of the carrier (12) is not particularly limited, but it is typical to have the insertion angle of the thin plate T when forming the gap G within the range of θ±10° (where θ±10° > 0°). Additionally, when moving the thin plate T, the gap G may be expanded by tilting the thin plate T toward the direction of movement.

[0092] (5) Detachment of carrier (arbitrary process)

[0093] After expanding the gap G as desired, force is applied to the laminated sheet (10) in a direction that separates the carrier (12) and the metal layer (16) (central part C side) ((v) of FIG. 3). By doing this, the metal layer (16) (and, if present, the resin-containing layer (20)) can be peeled from the carrier (12) using the gap G as a starting point ((vi) of FIG. 3). That is, as described above, by forming and expanding the gap G, a stress concentration portion that serves as the starting point for peeling between the metal layer (16) and the carrier (12) in the peeling process can be formed, so the peeling of the metal layer (16) can be easily performed.

[0094] It is preferable that the peeling of the metal layer (16) be performed while, for example, gripping or supporting the outer edge of the carrier (12) or the laminated sheet (10). Additionally, "support" here includes a method of fixing at least a part of the carrier. For example, as shown in (v) of FIG. 3, while gripping or supporting the carrier (12), etc., the metal layer (16) and the resin-containing layer (20) can be peeled by attaching the adhesive member AM to the metal layer (16) or the resin-containing layer (20) (central part C side) and pulling it in a direction separated from the carrier (12) (direction of the arrow in the drawing). Alternatively, while gripping or supporting the carrier (12), etc., the metal layer (16), etc. may be peeled by using wind pressure or water pressure by spraying wind or water, etc., with a predetermined pressure against the gap G. In addition, as shown in (i) and (ii) of FIG. 8, the metal layer (16) or resin-containing layer (20) may be peeled off by using a suction jig SJ or the like to suck the central part C of the metal layer (16) or resin-containing layer (20) and then using a compression member PM or the like to extrude the peripheral part P of the metal layer (16) or resin-containing layer (20) in a direction opposite to the suction direction.

[0095] In this peeling process, if the carrier is a single-crystal silicon carrier, it is desirable to pay attention to the direction of peeling progress. That is, as shown in (iii) and (iv) of FIG. 9b, if peeling is performed in a direction where the direction of external stress ST progressing coincides with the cleavage orientation CL, there is a possibility that the silicon carrier will be destroyed, such as by the occurrence of a crack CR along the cleavage orientation CL starting from the point where the external stress ST was applied due to the initial peeling. In order to suppress such destruction of the silicon carrier due to cleavage, when the carrier (12) is a single-crystal silicon carrier, it is desirable to perform peeling of the carrier (12) by applying an external stress ST such that it is inconsistent with either the x-axis (left-right direction in the drawing) or the y-axis (up-down direction in the drawing) of the silicon carrier, as shown in (iii) and (iv) of FIG. 10b.

[0096] Accordingly, according to a preferred embodiment of the present invention, the carrier (12) is a single-crystal silicon carrier having a notch or the like on its outer periphery, and in the peeling process of the carrier, when the angle θ is defined in a rightward rotation (clockwise) starting from a half-line from the center of the single-crystal silicon carrier to the notch or the like, the peeling is performed such that the direction of progression of external stress is within the range of 1° < θ < 89°.

[0097] This will be explained in more detail. As shown in (i) of FIG. 9a and (i) of FIG. 10a, if the angle θ is defined in a clockwise direction starting from the half-line L from the center of the carrier (12) to the midpoint of the notch N or orientation flat OF, then θ = θ°, 90°, 180°, and 270° correspond to the cleavage orientation CL. For this reason, regarding the direction of progression θr of the external stress ST due to peeling, as shown in (iii) of FIG. 10b, it is preferable to perform peeling while maintaining the direction of progression of the external stress ST so that θr is within the range of 1° < θr < 89°, and it is more preferable to make it within the range of 5° < θr < 85°. By a peeling method that satisfies such a range of θr, it is possible to suppress the destruction of the carrier (12) composed of a silicon wafer. The particularly desirable range of θr during this peeling is within θr = 45±5°, 135±5°, 225±5°, and 315±5° in a rightward turn from the ray L. These angles correspond to the crystal orientation of the silicon wafer. <100> Since it is most difficult for the wafer to cleave in this direction, by advancing external stress at these angles, it becomes possible to remove the carrier while effectively suppressing wafer destruction. Additionally, as described above, when carrier peeling is performed by attaching an adhesive member AM to a metal layer (16) or a resin-containing layer (20) and pulling it in a direction separated from the carrier (12) (see (v) in FIG. 3), it is preferable to set the direction of propagation of tensile stress by the adhesive member AM to within the range of θr. Alternatively, as described above, when carrier peeling is performed by using a compression member PM, etc., to extrude the peripheral P side of the metal layer (16) or the resin-containing layer (20) in a direction opposite to the suction direction (see (i) and (ii) in FIG. 8), it is preferable to set the direction of stress propagation in the extrusion direction by the compression member PM, etc., to within the range of θr.

[0098] When the laminated sheet (10) has a resin-containing layer (20), the metal layer (16) exposed after peeling off the carrier (12) may be removed by etching. By doing so, the wiring (embedded wiring) formed on the surface of the metal layer (16) is exposed, making it more suitable for forming additional circuits on it by a photolithography process. The etching of the metal layer (16) may be performed based on known methods and is not particularly limited.

[0099] Carrier equipped metal foil

[0100] As described above with reference to FIG. 1a, the carrier-equipped metal foil (18) used in the method of the present invention, as desired, comprises a carrier (12), an intermediate layer (14), a peeling layer (15), and a metal layer (16) in order as desired.

[0101] As described above, the material of the carrier (12) may be any of glass, ceramics, silicon, resin, and metal. Preferably, the carrier (12) is composed of glass, polycrystalline silicon, single-crystal silicon, or ceramics. The shape of the carrier (12) may be any of a sheet, a film, or a plate. Additionally, the carrier (12) may be a laminated structure of these sheets, films, and plates. For example, the carrier (12) may function as a rigid support such as a glass plate, a ceramic plate, a silicon wafer, or a metal plate, or it may be in a shape that does not have rigidity such as a metal foil or a resin film. Preferred examples of the metal constituting the carrier (12) include copper, titanium, nickel, stainless steel, aluminum, etc. Preferred examples of the ceramics include alumina, zirconia, silicon nitride, aluminum nitride, and various other fine ceramics. Preferred examples of resins include polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyamide, polyimide, nylon, liquid crystal polymer, polyetheretherketone (PEEK (registered trademark)), polyamideimide, polyethersulfone, polyphenylene sulfide, polytetrafluoroethylene (PTFE), ethylene tetrafluoroethylene (ETFE), etc. More preferably, for the purpose of preventing warping of the coreless support accompanying heating when mounting a semiconductor device, the material has a coefficient of thermal expansion (CTE) of less than 25 ppm / K (typically 1.0 ppm / K or more and 23 ppm / K or less), and examples of such materials include various resins as described above (especially low thermal expansion resins such as polyimide and liquid crystal polymer), glass, silicon, and ceramics, etc. In addition, from the perspective of ensuring handling and flatness when mounting chips, it is preferable that the carrier (12) has a Vickers hardness of 100 HV or higher, and more preferably 150 HV or higher and 2500 HV or lower.As a material satisfying these characteristics, the carrier (12) is preferably composed of glass, silicon, or ceramic, more preferably of glass or ceramic, and particularly preferably of glass. As a carrier (12) composed of glass, for example, a glass plate can be used. When glass is used as the carrier (12), there are advantages such as being lightweight, having a low coefficient of thermal expansion, having high insulation, being rigid, and having a flat surface, which allows the surface of the metal layer (16) to be extremely smooth. In addition, when the carrier (12) is glass, there are advantages such as having surface flatness (coplanarity) which is advantageous for forming microcircuits, having chemical resistance in desmearing or various plating processes in wiring manufacturing processes, and being able to employ a chemical separation method when peeling the carrier (12) from the metal foil (18) equipped with the carrier. Preferred examples of glass constituting the carrier (12) include quartz glass, borosilicate glass, alkali-free glass, soda-lime glass, aluminosilicate glass, and combinations thereof, more preferably alkali-free glass, soda-lime glass, and combinations thereof, and particularly preferably alkali-free glass. Alkali-free glass is a glass that substantially does not contain alkali metals, with silicon dioxide, aluminum oxide, boron oxide, and alkaline earth metal oxides such as calcium oxide or barium oxide as main components, and further containing boric acid. Since this alkali-free glass has a low and stable coefficient of thermal expansion in the range of 3 ppm / K or more and 5 ppm / K or less over a wide temperature range of 0°C to 350°C, it has the advantage of minimizing warping of the glass in a process involving heating. The thickness of the carrier (12) is preferably 100㎛ or more and 2000㎛ or less, more preferably 300㎛ or more and 1800㎛ or less, and even more preferably 400㎛ or more and 1100㎛ or less.If the carrier (12) has a thickness within this range, it is possible to achieve thinning of the wiring and reduction of bending that occurs when mounting electronic components while securing appropriate strength that does not hinder handling.

[0102] The intermediate layer (14), provided as desired, may be composed of one layer or two or more layers. When the intermediate layer (14) is composed of two or more layers, the intermediate layer (14) includes a first intermediate layer provided immediately above the carrier (12) and a second intermediate layer provided adjacent to the peeling layer (15). The first intermediate layer is preferably a layer composed of at least one metal selected from the group consisting of Ti, Cr, Al, and Ni, in order to ensure adhesion with the carrier (12). The first intermediate layer may be a pure metal or an alloy. The thickness of the first intermediate layer is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 300 nm or less, even more preferably 18 nm or more and 200 nm or less, and particularly preferably 20 nm or more and 100 nm or less. The second intermediate layer is preferably a layer composed of Cu in order to control the peeling strength with the peeling layer (15) to a desired value. The thickness of the second intermediate layer is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, even more preferably 15 nm or more and 300 nm or less, and particularly preferably 20 nm or more and 200 nm or less. Another interlayer may exist between the first intermediate layer and the second intermediate layer, and examples of constituent materials of the interlayer include an alloy of at least one metal selected from the group consisting of Ti, Cr, Mo, Mn, W, and Ni and Cu. Meanwhile, if the intermediate layer (14) is composed of a single layer, the aforementioned first intermediate layer may be adopted as the intermediate layer, or the first intermediate layer and the second intermediate layer may be replaced with a single intermediate alloy layer. This intermediate alloy layer is preferably composed of a copper alloy having a content of at least one metal selected from the group consisting of Ti, Cr, Mo, Mn, W, Al, and Ni of 1.0 at% or more and a Cu content of 30 at% or more.The thickness of the intermediate alloy layer is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, even more preferably 15 nm or more and 300 nm or less, and particularly preferably 20 nm or more and 200 nm or less. In addition, the thickness of each layer described above is a value measured by analyzing the cross-section of the layer using an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope. The metal constituting the intermediate layer (14) may contain unavoidable impurities resulting from raw material components or the film deposition process. Furthermore, the presence of oxygen incorporated due to exposure to the atmosphere after the film deposition of the intermediate layer (14) is permitted. The intermediate layer (14) may be manufactured by any method, but it is particularly preferred that it be a layer formed by a magnetron sputtering method using a metal target, in that it can provide uniformity in the film thickness distribution.

[0103] The peeling layer (15) is a layer that enables or facilitates the peeling of the carrier (12) and, if present, the intermediate layer (14). The peeling layer (15) may be peelable by a method of applying physical force, or it may be peelable by a method of peeling by a laser (laser lift-off, LLO). When the peeling layer (15) is composed of a material that can be peeled by laser lift-off, the peeling layer (15) may be composed of a resin in which the adhesive strength of the interface is reduced by laser irradiation after curing, or it may be a layer of silicon, silicon carbide, metal oxide, etc., which is modified by laser irradiation. In addition, the peeling layer (15) may be either an organic peeling layer or an inorganic peeling layer. Examples of organic components used in the organic peeling layer include nitrogen-containing organic compounds, sulfur-containing organic compounds, carboxylic acids, etc. Examples of nitrogen-containing organic compounds include triazole compounds, imidazole compounds, etc. Meanwhile, examples of inorganic components used in the inorganic peeling layer include metal oxides or metal oxynitrides containing at least one of Cu, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, In, Sn, Zn, Ga, and Mo, or carbon. Among these, the peeling layer (15) is preferably a layer mainly composed of carbon for ease of peeling and layer formation, more preferably a layer mainly composed of carbon or hydrocarbons, and even more preferably a layer composed of amorphous carbon, which is a hard carbon film. In this case, the peeling layer (15) (i.e., the carbon-containing layer) is preferably a carbon concentration of 60 atomic% or more as measured by XPS, more preferably 70 atomic% or more, even more preferably 80 atomic% or more, and particularly preferably 85 atomic% or more. The upper limit of the carbon concentration is not specifically limited and may be 100 atomic%, but 98 atomic% or less is practical.The peeling layer (15) may contain unavoidable impurities (e.g., oxygen, carbon, hydrogen, etc. originating from the surrounding environment such as the atmosphere). Additionally, metal atoms of a type other than the metal contained in the peeling layer (15) may be incorporated into the peeling layer (15) due to the film formation method, such as the metal layer (16) that is subsequently laminated. When a carbon-containing layer is used as the peeling layer (15), the mutual diffusion and reactivity of carriers are low, and even when subjected to press processing at a temperature exceeding 300°C, the mutual diffusion of metal elements caused by high-temperature heating between the metal layer and the bonding interface is prevented, thereby maintaining a state where the peeling removal of carriers is easy. It is preferable that the peeling layer (15) be a layer formed by a vapor phase method such as sputtering, in terms of suppressing excessive impurities in the peeling layer (15) and continuous productivity of other layers. When a carbon-containing layer is used as the peeling layer (15), the thickness is preferably 1 nm or more and 20 nm or less, and more preferably 1 nm or more and 10 nm or less. This thickness is defined as a value measured by analyzing the layer cross-section using an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope.

[0104] The peeling layer (15) may include a metal oxide layer and a carbon-containing layer, or a layer containing both metal oxide and carbon. In particular, when the carrier-equipped metal foil (18) includes an intermediate layer (14), the carbon-containing layer contributes to the stable peeling of the carrier (12), and the metal oxide layer can more effectively suppress the diffusion of metal elements originating from the intermediate layer (14) and the metal layer (16) that accompanies heating, and as a result, it is possible to maintain stable peelability even after heating at a high temperature of, for example, 350°C or higher. The metal oxide layer is preferably a layer containing oxides of metals composed of Cu, Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, In, Sn, Zn, Ga, Mo, and combinations thereof. It is particularly preferable that the metal oxide layer be a layer formed by a reactive sputtering method using a metal target and sputtering under an oxidizing atmosphere, in that the film thickness can be easily controlled by adjusting the film deposition time. The thickness of the metal oxide layer is preferably 0.1 nm or more and 100 nm or less. As for the upper limit of the thickness of the metal oxide layer, it is more preferably 60 nm or less, even more preferably 30 nm or less, and particularly preferably 10 nm or less. This thickness is a value measured by analyzing the cross-section of the layer with an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope. At this time, the order in which the metal oxide layer and the carbon layer are stacked as the peeling layer (15) is not particularly limited. In addition, the peeling layer (15) may exist in a mixed state (i.e., a layer containing both metal oxide and carbon) in which the boundary between the metal oxide layer and the carbon-containing layer is not clearly specified.

[0105] Likewise, in terms of maintaining stable peelability even after heat treatment at high temperature, the peeling layer (15) may be a metal-containing layer in which the side adjacent to the metal layer (16) is a fluorine-treated surface and / or a nitride-treated surface. In the metal-containing layer, it is preferable that a region (hereinafter referred to as the "(F+N) region") in which the sum of the fluorine content and the nitrogen content is 1.0 atomic% or more exists over a thickness of 10 nm or more, and the (F+N) region is preferably located on the metal layer (16) side of the metal-containing layer. The thickness of the (F+N) region (converted to SiO2) is a value determined by performing elemental analysis in the depth direction of the carrier-equipped metal foil (18) using XPS. The fluorine-treated surface or the nitride-treated surface can preferably be formed by reactive ion etching (RIE) or a reactive sputtering method. Meanwhile, the metal element included in the metal-containing layer is preferably to have a negative standard electrode potential. Preferred examples of metal elements included in the metal-containing layer include Cu, Ag, Sn, Zn, Ti, Al, Nb, Zr, W, Ta, Mo, and combinations thereof (e.g., alloys or intermetallic compounds). It is preferable that the content of metal elements in the metal-containing layer be 50 atomic% or more and 100 atomic% or less. The metal-containing layer may be a single layer or a multilayer composed of two or more layers. The total thickness of the metal-containing layer is preferably 10 nm or more and 1000 nm or less, more preferably 30 nm or more and 500 nm or less, even more preferably 50 nm or more and 400 nm or less, and particularly preferably 100 nm or more and 300 nm or less. The thickness of the metal-containing layer itself is a value measured by analyzing the layer cross-section using an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope.

[0106] Alternatively, the peeling layer (15) may be a metal oxynitride-containing layer instead of a carbon layer, etc. The surface opposite to the carrier (12) of the metal oxynitride-containing layer (i.e., the metal layer (16) side) preferably contains at least one metal oxynitride selected from the group consisting of TaON, NiON, TiON, NiWON, and MoON. In addition, in order to ensure adhesion between the carrier (12) and the metal layer (16), the surface of the metal oxynitride-containing layer on the carrier (12) side preferably contains at least one selected from the group consisting of Cu, Ti, Ta, Cr, Ni, Al, Mo, Zn, W, TiN, and TaN. By doing so, the number of foreign particles on the surface of the metal layer (16) is suppressed to improve circuit formation, and it is also possible to maintain stable peel strength even after being heated at a high temperature for a long time. The thickness of the metal oxynitride-containing layer is preferably 5 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, even more preferably 20 nm or more and 200 nm or less, and particularly preferably 30 nm or more and 100 nm or less. This thickness is a value measured by analyzing the cross-section of the layer using an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope.

[0107] The metal layer (16) is a layer composed of metal. The metal layer (16) may be composed of one layer or two or more layers. When the metal layer (16) is composed of two or more layers, the metal layer (16) may be configured such that each metal layer from the first metal layer to the m-th metal layer (m is an integer greater than or equal to 2) is stacked in order on the side opposite to the carrier (12) of the peeling layer (15). The total thickness of the metal layer (16) is preferably 1 nm or more and 2000 nm or less, preferably 100 nm or more and 1500 nm or less, more preferably 200 nm or more and 1000 nm or less, even more preferably 300 nm or more and 800 nm or less, and particularly preferably 350 nm or more and 500 nm or less. The thickness of the metal layer (16) is a value measured by analyzing the cross-section of the layer with an energy-dispersive X-ray spectrometer (TEM-EDX) of a transmission electron microscope. Hereinafter, an example in which the metal layer (16) is composed of two layers, a first metal layer and a second metal layer, will be described.

[0108] It is desirable that the first metal layer imparts a desired function, such as an etching stopper function or an anti-reflection function, to the metal foil (18) equipped with a carrier. Preferred examples of metals constituting the first metal layer include Ti, Al, Nb, Zr, Cr, W, Ta, Co, Ag, Ni, Mo, and combinations thereof; more preferably, Ti, Zr, Al, Cr, W, Ni, Mo, and combinations thereof; even more preferably, Ti, Al, Cr, Ni, Mo, and combinations thereof; and particularly preferably, Ti, Mo, and combinations thereof. These elements have the property of not dissolving in a flash etching solution (e.g., copper flash etching solution), and as a result, can exhibit excellent chemical resistance to the flash etching solution. Therefore, the first metal layer becomes a layer that is more difficult to etch by the flash etching solution than the second metal layer described later, and thus can function as an etching stopper layer. In addition, since the aforementioned metal constituting the first metal layer also has the function of preventing light reflection, the first metal layer can also function as an anti-reflection layer to improve visibility in image inspection (e.g., Automatic Optical Inspection (AOI)). The first metal layer may be a pure metal or an alloy. The metal constituting the first metal layer may contain unavoidable impurities resulting from raw material components or film deposition processes. Furthermore, the upper limit of the content of the metal is not particularly limited and may be 100 atomic percent. The first metal layer is preferably a layer formed by physical vapor deposition (PVD), and more preferably a layer formed by sputtering. The thickness of the first metal layer is preferably 1 nm or more and 500 nm or less, more preferably 10 nm or more and 400 nm or less, even more preferably 30 nm or more and 300 nm or less, and particularly preferably 50 nm or more and 200 nm or less.

[0109] Preferred examples of metals constituting the second metal layer include transition elements of Group 4, Group 5, Group 6, Group 9, Group 10, and Group 11, Al, and combinations thereof (e.g., alloys or intermetallic compounds); more preferably, transition elements of Group 4 and Group 11, Al, Nb, Co, Ni, Mo, and combinations thereof; even more preferably, transition elements of Group 11, Ti, Al, Mo, and combinations thereof; particularly preferably, Cu, Ti, Mo, and combinations thereof; most preferably, Cu. The second metal layer may be manufactured by any method and may be a metal foil formed by, for example, wet deposition methods such as electroless metal plating and electrolytic metal plating, physical vapor deposition (PVD) methods such as sputtering and vacuum deposition, chemical vapor deposition, or a combination thereof. A particularly preferred second metal layer is a metal layer formed by a physical vapor deposition (PVD) method, such as sputtering or vacuum deposition, in terms of being easy to accommodate fine pitch through ultra-thinning, and most preferably, it is a metal layer manufactured by sputtering. Additionally, the second metal layer is preferably a metal layer that has not undergone a shaping treatment, but as long as it does not cause hindrance to the formation of the wiring pattern, it may be a metal layer that has undergone a secondary shaping treatment by a preliminary shaping treatment, a soft etching treatment, a cleaning treatment, or an oxidation-reduction treatment. In terms of accommodating fine pitch, the thickness of the second metal layer is preferably 10 nm or more and 1000 nm or less, more preferably 20 nm or more and 900 nm or less, even more preferably 30 nm or more and 700 nm or less, even more preferably 50 nm or more and 600 nm or less, particularly preferably 70 nm or more and 500 nm or less, and most preferably 100 nm or more and 400 nm or less. It is preferable to manufacture a metal layer with a thickness within this range by the sputtering method, in terms of in-plane uniformity of film thickness and productivity in sheet or roll shapes.

[0110] In the case where the metal layer (16) is composed of a single layer, it is preferable to adopt the aforementioned second metal layer as the metal layer (16). On the other hand, in the case where the metal layer (16) is composed of n layers (n is an integer greater than or equal to 3), it is preferable to make the first metal layer to the (n-1) metal layer of the metal layer (16) the composition of the aforementioned first metal layer, and it is preferable to make the outermost layer of the metal layer (16), that is, the nth metal layer, the composition of the aforementioned second metal layer.

[0111] It is preferable that the metal layer (16), an intermediate layer (14) as desired, and a peeling layer (15) as desired (i.e., at least the metal layer (16), for example, the metal layer (16) and the intermediate layer (14)) extend and protrude to the cross-section of the carrier (12), thereby covering the cross-section. That is, it is preferable that not only the surface of the carrier (12) but also the cross-section be covered with at least the metal layer (16). By covering the cross-section, in addition to preventing the intrusion of chemical solution into the carrier (12) during the manufacturing process of the wiring board, it is possible to firmly prevent chipping caused by peeling at the side end when handling the metal foil (18) or laminated sheet (10) equipped with the carrier, i.e., the detachment of the film (i.e., the metal layer (16)) on the peeling layer (15). The covering area in the cross-section of the carrier (12) is preferably an area of ​​0.1 mm or more, more preferably an area of ​​0.2 mm or more, and even more preferably extends across the entire cross-section of the carrier (12) in the thickness direction (i.e., a direction perpendicular to the surface of the carrier) from the surface of the carrier (12).

[0112] Examples

[0113] The present invention will be explained in more detail by the following examples.

[0114] Example 1

[0115] (1) Fabrication of laminated sheets

[0116] As a carrier (12), a glass substrate (material: soda-lime glass) with a thickness of 1.1 mm and a size of 320 mm × 320 mm was prepared. On this carrier (12), a titanium layer (thickness 50 nm) and a copper layer (thickness 200 nm) as an intermediate layer (14), an amorphous carbon layer (thickness 6 nm) as a peeling layer (15), and a titanium layer (thickness 100 nm) and a copper layer (thickness 300 nm) as a metal layer (16) were deposited in this order by sputtering, and a carrier-equipped metal foil (18) was obtained. On the metal layer (16) of this carrier-equipped metal foil (18), a resin layer (material: epoxy resin) with a thickness of 300 μm and a size of 300 mm × 300 mm was formed and made into a resin-containing layer (20). In this way, a laminated sheet (10) was produced having a carrier (12), an intermediate layer (14), a release layer (15), a metal layer (16), and a resin-containing layer (20) in this order (see (i) in FIG. 1a and (i) in FIG. 1b).

[0117] (2) Formation of a slit

[0118] A slit S (width 0.5 mm) was formed by inserting the blade of a cutter CT (material: tungsten) perpendicularly to the main surface of the carrier (12) from the surface of the metal layer (16) of the laminated sheet (10). This slit S was formed in a rectangular pattern (a linear pattern of four sides) to surround the resin-containing layer (20) when viewed from a planar view of the laminated sheet (10) (see (ii) in FIG. 1b). In addition, this slit S was formed at a depth that penetrates the metal layer (16), the peeling layer (15), and the intermediate layer (14) when viewed from a cross-section of the laminated sheet (10), but does not penetrate the carrier (12) (see (ii) in FIG. 1a). In this way, the metal layer (16), the peeling layer (15), and the intermediate layer (14) were divided into a central part C and a peripheral part P with respect to the slit S.

[0119] (3) Formation of gaps

[0120] A rotary blade RC (diameter 45 mm, blade thickness 0.3 mm, blade angle 21°, material: tungsten) was inserted from the corner of slit S toward the central side of the metal layer (16), peeling layer (15), and intermediate layer (14) (see (iii) in FIG. 2a and (iii) in FIG. 2b). At this time, when viewing the laminated sheet (10) in cross-section, the insertion angle θ of the rotary blade RC relative to the main surface of the carrier (12) was set to 45°. In addition, the insertion width of the rotary blade RC relative to the laminated sheet (10) was set to 2 mm. In this way, a gap G was formed between the metal layer (16) and the carrier (12).

[0121] (4) Widening of the gap

[0122] Starting from the gap G formed, the rotating blade RC was moved along the slit S (see (iv) in FIG. 2a and (iv) in FIG. 2b). By moving the rotating blade RC along the rectangular shape pattern of the slit S in this way, the gap G on each side was expanded.

[0123] (5) Detachment of the carrier

[0124] With the periphery P of the laminated sheet (10) supported, a commercially available adhesive tape AM was attached to the corner of the resin-containing layer (20) and pulled up in a direction separated from the carrier (12), thereby peeling off the resin-containing layer (20) and the metal layer (16) from the carrier (12) (see (v) and (vi) of FIG. 3).

Claims

Claim 1 A method for manufacturing a wiring board, comprising: a process of preparing a laminated sheet having a release layer and a metal layer in sequence on a carrier; a process of making a slit on the side opposite to the carrier of the laminated sheet such that it passes inwardly from the outer edge of the laminated sheet when viewed from a planar view, and penetrates the metal layer and the release layer when viewed from a cross-section of the laminated sheet, and dividing the metal layer and the release layer into a central part and a peripheral part with respect to the slit; a process of inserting a thin piece from the slit toward the central part of the metal layer or the release layer, and forming a gap between the metal layer and the carrier such that the metal layer and the carrier are separated; and a process wherein, when viewed from a cross-section of the laminated sheet, the insertion angle of the thin piece with respect to the main surface of the carrier exceeds 0°. Claim 2 A method for manufacturing a wiring board according to claim 1, wherein the carrier is a single-crystal silicon carrier having a notch or an orientation flat on its outer periphery, and in the process of forming the slit, when the angle θ is defined in a clockwise direction starting from the half-line from the center of the single-crystal silicon carrier to the midpoint of the notch or the orientation flat, the slit is formed such that the direction of external stress progression is within the range of 1° < θ < 89°. Claim 3 A method for manufacturing a wiring board according to claim 1 or 2, further comprising a process of expanding the gap by moving the thin piece along the slit starting from the gap formed. Claim 4 A method for manufacturing a wiring board according to claim 3, further comprising a process of separating the metal layer from the carrier using the gap as a basis by applying force to the laminated sheet in a direction in which the carrier and the metal layer are separated after expanding the gap. Claim 5 A method for manufacturing a wiring board according to claim 1 or 2, wherein the slit is formed such that, when viewed in cross-section of the laminated sheet, at least a portion of the carrier is not penetrated. Claim 6 A method for manufacturing a wiring board according to claim 1 or 2, wherein the width of the slit is 0.01 mm or more and 20 mm or less. Claim 7 A method for manufacturing a wiring board according to claim 1 or 2, wherein the thin piece is a cutting blade, and the cutting blade is any one of a flat blade, a triangular blade, a square blade, a circular blade, and a rotary blade. Claim 8 A method for manufacturing a wiring board according to claim 1 or 2, wherein the slit is formed in a linear pattern such that the periphery surrounds the central portion when the laminated sheet is viewed in a planar view. Claim 9 A method for manufacturing a wiring board according to paragraph 3, wherein the movement of the above-mentioned thin piece is performed over a part or the entire length of the above-mentioned slit. Claim 10 A method for manufacturing a wiring board, wherein, in paragraph 4, the peeling of the metal layer is performed while gripping or supporting the outer edge of the carrier or the laminated sheet. Claim 11 A method for manufacturing a wiring board according to claim 1 or 2, wherein the insertion angle is greater than 0.1° and less than or equal to 60°. Claim 12 A method for manufacturing a wiring board according to claim 1 or 2, wherein, in the formation of the gap, the insertion width of the thin sheet into the laminated sheet is 0.1 mm or more. Claim 13 A method for manufacturing a wiring board according to claim 1 or 2, wherein the thin sheet is composed of at least one material selected from the group consisting of iron-based materials, non-ferrous metals, ceramics, and diamond. Claim 14 A method for manufacturing a wiring board according to claim 1 or 2, wherein the laminated sheet further comprises a resin-containing layer on the side opposite to the peeling layer of the metal layer. Claim 15 A method for manufacturing a wiring substrate according to claim 14, wherein the resin-containing layer comprises at least one selected from the group consisting of a wiring layer, a semiconductor device, and a resin layer. Claim 16 A method for manufacturing a wiring substrate according to claim 14, wherein the thickness of the resin-containing layer is 1000 μm or less. Claim 17 A method for manufacturing a wiring board according to claim 14, wherein the insertion of the thin sheet in the formation of the gap is performed with respect to the resin-containing layer. Claim 18 A method for manufacturing a wiring board, comprising: a process of preparing a laminated sheet having a release layer and a metal layer in sequence on a carrier; a process of making a slit on the side opposite to the carrier of the laminated sheet such that it passes inwardly from the outer edge of the laminated sheet when viewed from a planar view, and penetrates the metal layer and the release layer when viewed from a cross-sectional view of the laminated sheet, and dividing the metal layer and the release layer into a central part and a peripheral part with respect to the slit; and a process of forming a gap between the metal layer and the carrier from the slit, such that the metal layer and the carrier are separated. Claim 19 A method for manufacturing a wiring board according to claim 18, wherein the carrier is a single-crystal silicon carrier having a notch or an orientation flat on its outer periphery, and in the process of forming the slit, when the angle θ is defined in a clockwise direction starting from the half-line from the center of the single-crystal silicon carrier to the midpoint of the notch or the orientation flat, the slit is formed such that the direction of external stress progression is within the range of 1° < θ < 89°. Claim 20 A method for manufacturing a wiring board according to claim 18 or 19, further comprising a process of expanding the gap formed starting from the gap. Claim 21 A method for manufacturing a wiring board according to claim 20, further comprising a process of separating the metal layer from the carrier using the gap as a pivot point by applying force to the laminated sheet in a direction in which the carrier and the metal layer are separated after the gap is enlarged. Claim 22 A method for manufacturing a wiring board according to claim 18 or 19, wherein the slit is formed such that, when viewed in cross-section of the laminated sheet, at least a portion of the carrier is not penetrated. Claim 23 A method for manufacturing a wiring board according to claim 18 or 19, wherein the width of the slit is 0.01 mm or more and 20 mm or less. Claim 24 A method for manufacturing a wiring board according to claim 18 or 19, wherein the slit is formed in a linear pattern such that the periphery surrounds the central portion when the laminated sheet is viewed in a planar view. Claim 25 A method for manufacturing a wiring board according to claim 21, wherein the peeling of the metal layer is performed while gripping or supporting the outer edge of the carrier or the laminated sheet. Claim 26 A method for manufacturing a wiring board according to claim 18 or 19, wherein the laminated sheet further comprises a resin-containing layer on the side opposite to the peeling layer of the metal layer. Claim 27 A method for manufacturing a wiring substrate according to claim 26, wherein the resin-containing layer comprises at least one selected from the group consisting of a wiring layer, a semiconductor device, and a resin layer. Claim 28 A method for manufacturing a wiring substrate according to claim 26, wherein the thickness of the resin-containing layer is 1000 μm or less.

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