Vertical stacked microdisplay panel and manufacturing method thereof

Abstract

The present invention relates to a vertically stacked microdisplay panel, comprising: a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a plurality of LED stacks each having a plurality of light-emitting parts stacked vertically through a bonding layer and each having a plurality of LED stacks aligned on the plurality of CMOS electrode pads; and a common electrode formed on the plurality of LED stacks, wherein the plurality of LED stacks includes a first LED stack including a first light-emitting part emitting a first color, a second LED stack including a second light-emitting part emitting a second color, and a third LED stack including a third light-emitting part emitting a third color, wherein each of the plurality of LED stacks has a short passage formed in a portion of its area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, and the first light-emitting part emits red light. According to the present invention, the luminous efficiency of red light can be significantly improved in a vertically stacked tandem structure.

Description

Technology Field

[0001] The present invention relates to a vertically stacked microdisplay panel and a method for manufacturing the same, and more specifically, to a vertically stacked LEDoS microdisplay panel and a method for manufacturing the same in which an alignment process between an LED stack and a CMOS electrode pad is unnecessary by using an engineering monolithic epitaxy wafer method. Background Technology

[0002] The types of implementation for the recently trending Metaverse are classified into four forms: VR (virtual reality), AR (augmented reality), MR (mixed reality), and XR (extended reality). Among these, the future Metaverse ecosystem is expected to develop around XR, a reality that integrates VR, AR, and MR. To effectively implement this, devices (such as smart glasses and head-mounted displays) containing microdisplays with a diagonal length of less than one inch as core components are required, along with software for next-generation computing platforms capable of providing innovative user experiences. In particular, the development of high-performance microdisplay panel technology is absolutely necessary to provide XR users with the greatest sense of immersion, visibility, and convenience while minimizing dizziness.

[0003] As illustrated in FIG. 1, the conventional microdisplay panel (10) is a technology that combines a Si CMOS semiconductor wafer process with a high-resolution, high-brightness ultra-small display process. The conventional microdisplay panel (10) may have a structure in which a Si CMOS wafer (11) having a crystal plane of 4" or larger (100) equipped with a plurality of CMOS electrode pads (12), a microLED electrode pad (14), and a transparent wafer (13) having a plurality of microLED chips (15) are bonded through a conductive bond (16). Meanwhile, the types of microdisplay panels expected to be applied to XR devices include liquid crystal (LC) based LCoS (LC on Si), OLED (organic light-emitting diode) based OLEDoS (OLED on Si), and ultra-small microLED based LEDoS (LED on Si) having a pixel size of less than 5㎛. In the case of VR with a low pixel density display, development and mass production are centered on LCoS and OLEDoS.

[0004] However, with the advancement of metaverse implementation technology, there is an increasing need for lightweight AR, MR, and XR devices equipped with high pixel density microdisplay panels. In response to this need, there is an urgent need to develop LEDoS technology, which is attracting attention as a theoretically ideal solution based on the superiority of inorganic properties, but a microdisplay panel platform for this has not yet been established.

[0005] When applied to XR devices, microLED-based LEDoS with pixel sizes of less than 5㎛ offers the advantages of excellent power-to-performance ratio and short response speed. Additionally, it has a long lifespan due to its inorganic composition and allows for efficient power usage, which helps mitigate heat and enables long battery life. In particular, since XR devices have a very short distance between the display and the eyes, even a slight delay in image conversion can easily cause discomfort such as dizziness. Therefore, LEDoS, which has a nanosecond response speed, is considered the most suitable for XR devices compared to LCoS and OLEDoS, which have microsecond response speeds.

[0006] Furthermore, it is assessed that the biggest reason LEDoS is attracting attention in AR, MR, and XR devices, unlike VR, is due to its brightness and luminous efficiency. Given the nature of smart glasses that can be worn regardless of location, high brightness is an essential condition to ensure normal operation even in outdoor environments such as sunlight. Theoretically, microLEDs support brightness levels of tens to millions of nits, and since microLEDs are inorganic rather than organic, they also have the advantage of high luminous efficiency.

[0007] However, despite the aforementioned advantages, the biggest reason why ultra-small microLED-based LEDoS with pixel sizes of less than 5㎛ has not established itself as a key component of XR devices is the difficulty of mass production. In other words, since LEDoS requires fixing millions of ultra-small microLEDs onto a Si CMOS wafer, the process difficulty is high and the yield is very low, leading to increased manufacturing costs and high component prices. This is reflected in the end consumer price, resulting in high-priced XR devices, making it difficult to meet market demand.

[0008] Meanwhile, as illustrated in Fig. 2, the development of LEDoS with microLED light sources of group 3-5 compounds (GaN, GaP, etc.) has been carried out through traditional approaches such as ① monolithic integration of a wafer (or unit die) composed of a microLED array on a CMOS wafer, or ② hybridization between wafers (or unit dies) on a CMOS wafer or on blue, green, and red light source wafers (or unit dies) on which a microLED array is fabricated.

[0009] One of the biggest obstacles to the development of LEDoS using blue, green, and red microLED light sources composed of Group 3-5 compounds to date is the difficulty in securing solutions for pixels smaller than 5㎛. Recently, however, pixels at the 5㎛ level have been successfully demonstrated using monolithic integration technology, and some prototypes developed based on hybridization technology have achieved pixels at the 10㎛ level by fabricating them using sapphire flip chips. Additionally, it has been proven that it is possible to reduce pixels to the 5㎛ level in the same way by using microtube wiring in hybridization technology. However, both monolithic integration technology and hybridization technology are impractical solutions that face significant difficulties in mass production in terms of quality and yield, making mass production difficult.

[0010] The aforementioned monolithic integration technology and hybridization technology share a common characteristic in that a front plane wafer composed of a group 3-5 compound microLED array and a Si CMOS back plane wafer composed of numerous IC electrode pad arrays are designed and fabricated separately and then assembled. In either method, however, microLED arrays fabricated at the unit die-level or wafer-level on the Si CMOS wafer must be ultra-finely aligned. Consequently, this alignment is limited by the precision of process-related equipment, which has a significant impact on pixel and pixel pitch limitations, and makes mass production difficult. Accordingly, to manufacture LEDoS equipped with high-resolution, high-brightness, and high-speed driving blue, green, and red microLED light sources featuring pixels smaller than 5㎛ and pitches smaller than 3㎛, a new alternative solution is required to avoid the aforementioned ultra-fine alignment constraints.

[0011] Accordingly, although several impressive demonstrations with 6㎛ pixels have recently been released using engineering monolithic epitaxy wafers manufactured through a low-temperature metal bonding process between a Si CMOS wafer and a microLED array wafer, mass production is considered impossible due to low quality and yield issues caused by the low-temperature metal bonding and the use of small-diameter wafers of 6 inches or less. Above all, when fabricating ultra-fine pixels of less than 3㎛ for microdisplays using conventional engineering monolithic epitaxy wafers with metal bonding, even greater difficulties are faced during patterning etching.

[0012] As another example, a new engineering monolithic epitaxy wafer approach has recently been proposed that has achieved significant success in solving the problem of limiting the brightness and resolution of LEDoS using group 3-5 compound microLED light sources, while also providing mass production and low-cost manufacturing solutions through the use of 12-inch large-diameter Si CMOS wafers.

[0013] As illustrated in Fig. 3, specifically, the process using an engineering monolithic epitaxy wafer is carried out through the following four steps: ① First, using an LED epitaxy wafer, LED epitaxy cut to a predetermined size (e.g., 4 mm × 6 mm) is aligned and bonded at the unit die level onto a 12-inch large-diameter Si blanket wafer. Subsequently, the growth wafer and buffer layer of the LED epitaxy are removed and planarized, leaving only an LED active layer of a predetermined thickness (e.g., approximately 1.5 μm) on the large-diameter Si blanket wafer, thereby completing the LED fab process in the form of a pixel chip. ② Next, the Si blanket wafer with the completed pixel chip is bonded to a 12-inch CMOS IC Si wafer at the wafer level through multilayer metal bonding. ③ Next, the Si blanket wafer is removed. ④ Next, the residual process is finally performed on the microLED array functioning as a pixel on a CMOS IC Si wafer.

[0014] However, in step ①, when bonding the LED epitaxy unit die onto the Si blanket wafer, there is a limitation in that position alignment must be performed on a CMOS IC Si wafer of the same size to bond it, and in step ②, when bonding with a multilayer metal containing low-melting point metals (Sn, In), the ejection phenomenon of the low-melting point metal components overflowing occurs relatively easily, resulting in a short circuit defect that electrically connects between microLED subpixel arrays within the panel or with neighboring CMOS IC electrode pad arrays. Furthermore, in step ②, due to the optically opaque nature of the Si blanket wafer and the multilayer metal bonding layer, it is difficult to perform ultra-fine alignment wafer bonding between the Si blanket wafer (i.e., front plane wafer) and the CMOS IC Si wafer, which leads to defects. Here, ultra-fine alignment means aligning a microLED array, which is a plurality (hundreds to tens of millions) of ultra-small pixel chips provided on a Si blanket wafer, with a CMOS IC electrode pad array provided on a CMOS IC Si wafer in a 1:1 matching ratio.

[0015] In other words, the engineering monolithic epitaxy wafer approach presented in the aforementioned technologies is evaluated as providing a solution that brings us one step closer to realizing ultra-small microLED-based LEDoS with pixel sizes of less than 5㎛, but there are quality and yield issues caused by the use of metal (low temperature, multilayer) in wafer bonding, and it is very difficult to fabricate high-resolution microdisplays with ultra-fine pixels of less than 3㎛, and there are also problems related to some alignment processes, so a new alternative is needed.

[0016] In addition, in the vertically stacked tandem structure of conventional microdisplays, a color filter is still applied to achieve full color, which has disadvantages in terms of color quality, process complexity, and productivity.

[0017] Meanwhile, in a conventional microdisplay panel structure equipped with a short passage as shown in FIG. 4, a first light-emitting unit (121) that emits red light, a second light-emitting unit (122) that emits green light, and a third light-emitting unit (123) that emits blue light are stacked in that order, so that blue light is emitted from the top. In this case, the red light emitted from the first light-emitting unit (121) is absorbed as it passes through the second light-emitting unit (122) and the third light-emitting unit (123), so there is a problem that the efficiency of red is relatively low in the structure.

[0018] In addition, to solve this, if a third light-emitting unit (123) emitting blue light, a second light-emitting unit (122) emitting green light, and a first light-emitting unit (121) emitting red light are stacked in that order, there is a problem in that light excitation occurs in the upper second light-emitting unit (122) and first light-emitting unit (121) due to the short wavelength blue light, which may result in unwanted sub-pixel light emission. Prior art literature

[0019] Republic of Korea Published Patent Application No. 10-2018-0009116 The problem to be solved

[0020] The objective of the present invention is to solve the aforementioned conventional problems by using an engineering monolithic epitaxy wafer method, thereby eliminating the need for an alignment process between the LED stack and the CMOS electrode pads, and at the same time, providing a vertically stacked LEDoS microdisplay panel and a method for manufacturing the same that can significantly improve the luminous efficiency of red light in a vertically stacked tandem structure. means of solving the problem

[0021] The above objective is achieved by a vertically stacked microdisplay panel according to the present invention, comprising: a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a plurality of LED stacks each having a light-emitting part stacked vertically through a bonding layer and each having a plurality of LED stacks aligned on the plurality of CMOS electrode pads; and a common electrode formed on the plurality of LED stacks, wherein the plurality of LED stacks each include a first LED stack including a first light-emitting part emitting a first color, a second LED stack including a second light-emitting part emitting a second color, and a third LED stack including a third light-emitting part emitting a third color, wherein each of the plurality of LED stacks has a short passage formed in a portion of its area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, and the first light-emitting part emits red light.

[0022] In addition, the width of the above-mentioned short passage can be formed to correspond to the width of the above-mentioned light-emitting part.

[0023] In addition, the common electrode may be a negative electrode or a positive electrode.

[0024] The above objective is achieved, according to the present invention, by a preparation step of preparing a plurality of front wafers including a support wafer and a light-emitting part, and a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a stacking step of vertically stacking a plurality of light-emitting parts on a support wafer by repeating the process of bonding another front wafer onto one front wafer through a bonding layer and then removing the support wafer of the other front wafer; a first processing step of forming a short passage in a partial area from one side of the stacked plurality of light-emitting parts; a bonding step of bonding the stacked plurality of light-emitting parts to the back wafer and then removing the support wafer to stack a plurality of light-emitting parts on the back wafer; a second processing step of forming a short passage in a partial area from the other side of the stacked plurality of light-emitting parts; and an etching step of etching the stacked plurality of light-emitting parts to separate them into preset units so that a plurality of LED stacks are each aligned on a plurality of CMOS electrode pads. A method for manufacturing a vertically stacked microdisplay panel is achieved by including a forming step of forming a common electrode on a plurality of the above-mentioned LED stacks, wherein the plurality of the above-mentioned LED stacks include a first LED stack including a first light-emitting part that emits a first color, a second LED stack including a second light-emitting part that emits a second color, and a third LED stack including a third light-emitting part that emits a third color, wherein each of the plurality of the above-mentioned LED stacks has a short passage formed in a portion of the area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, and the first light-emitting part emits red light.

[0025] In addition, the width of the above-mentioned short passage can be formed to correspond to the width of the above-mentioned light-emitting part.

[0026] In addition, the above common electrode may be a negative electrode.

[0027] The above objective is achieved, according to the present invention, by a preparation step of preparing a plurality of front wafers including a support wafer and a light-emitting part, and a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a stacking step of vertically stacking a plurality of light-emitting parts on a support wafer by repeating the process of bonding another front wafer onto one front wafer through a bonding layer and then removing the support wafer of the other front wafer; a first processing step of forming a short passage in a partial area from one side of the stacked plurality of light-emitting parts; a second processing step of forming a short passage in a partial area from the other side of the stacked plurality of light-emitting parts; a bonding step of bonding the stacked plurality of light-emitting parts to the back wafer and then removing the support wafer to stack a plurality of light-emitting parts on the back wafer; and an etching step of etching the stacked plurality of light-emitting parts to separate them into preset units so that a plurality of LED stacks are each aligned on a plurality of CMOS electrode pads. A method for manufacturing a vertically stacked microdisplay panel is achieved by including a forming step of forming a common electrode on a plurality of the above-mentioned LED stacks, wherein the plurality of the above-mentioned LED stacks include a first LED stack including a first light-emitting part that emits a first color, a second LED stack including a second light-emitting part that emits a second color, and a third LED stack including a third light-emitting part that emits a third color, wherein each of the plurality of the above-mentioned LED stacks has a short passage formed in a portion of the area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, and the first light-emitting part emits red light.

[0028] In addition, the width of the above-mentioned short passage can be formed to correspond to the width of the above-mentioned light-emitting part.

[0029] In addition, the above common electrode may be an anode. Effects of the invention

[0030] According to the present invention, even though a vertically stacked tandem structure is adopted, a color filter becomes unnecessary, so the color quality of the microdisplay can be significantly improved, and process complexity and productivity can be significantly improved.

[0031] In addition, according to the present invention, unlike conventional monolithic integration methods or hybrid methods that have alignment issues, an engineering monolithic epitaxy wafer is first fabricated, and then a stack on the engineering monolithic epitaxy wafer is etched to separate it into preset units, thereby allowing a plurality of LED stacks to be aligned on a plurality of CMOS electrode pads. This enables the use of not only small-diameter wafers of 6 inches or less, but also large-diameter wafers of 8 inches or more, thereby having the effect of significantly increasing the product yield.

[0032] Furthermore, according to the present invention, since the bonding layer and the ohmic contact electrode utilize an electrically conductive transparent ceramic material rather than a metal, the likelihood of electrical short circuit failure is significantly reduced, and the reliability of the device is greatly enhanced. In addition, during the plasma dry process for aligning LED stacks, etching is facilitated, and at the same time, the problem of etching byproducts being redeposited does not occur. Moreover, due to the aforementioned ease of etching, it provides a much more advantageous benefit for fabricating high-resolution microdisplays with ultra-fine pixels of less than 3㎛.

[0033] In addition, according to the present invention, since the light-emitting part, the bonding layer, and the ohmic contact electrode are all transparent and visible light is transmitted, there is an effect of eliminating alignment error issues during the exposure process.

[0034] In addition, according to the present invention, the luminous efficiency of red light can be significantly improved in a vertically stacked tandem structure.

[0035] In addition, since all other light-emitting parts are removed except for the light-emitting part that emits the corresponding color in each LED laminate of the present invention, the occurrence of unwanted sub-pixel light emission caused by photoexcitation by short-wavelength blue light can be fundamentally blocked.

[0036] Meanwhile, the effects of the present invention are not limited to those mentioned above, and various effects may be included within the scope obvious to a person skilled in the art from the contents described below. Brief explanation of the drawing

[0037] FIG. 1 illustrates the structure of a conventional microdisplay panel, and FIG. 2 illustrates a conventional LEDoS development approach, and FIG. 3 illustrates an approach using a conventional engineering monolithic epitaxy wafer, and FIG. 4 illustrates the absorption of red light in a conventional microdisplay panel structure equipped with a short passage, and FIG. 5 is a flowchart of a method for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, and FIGS. 6 and 7 illustrate the process of preparing a front wafer in a method for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, and FIG. 8 illustrates the process of preparing a back wafer in a method for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, and FIGS. 9 and 10 illustrate the process of manufacturing a vertically stacked microdisplay panel according to the method for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention, and FIG. 11 illustrates a vertically stacked microdisplay panel according to a first embodiment of the present invention, and FIG. 12 is a flowchart of a method for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention, and FIGS. 13 and 14 illustrate the process of preparing a front wafer in a method for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention, and FIGS. 15 and 16 illustrate the process of manufacturing a vertically stacked microdisplay panel according to the method for manufacturing a vertically stacked microdisplay panel according to the second embodiment of the present invention, and FIG. 17 illustrates a vertically stacked microdisplay panel according to a second embodiment of the present invention. Specific details for implementing the invention

[0038] Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. It should be noted that in assigning reference numerals to the components of each drawing, the same components are given the same reference numeral whenever possible, even if they are shown in different drawings.

[0039] In addition, when describing embodiments of the present invention, if it is determined that a detailed description of related known configurations or functions would hinder understanding of the embodiments of the present invention, such detailed description is omitted.

[0040] In addition, terms such as first, second, A, B, (a), (b), etc., may be used when describing the components of the embodiments of the present invention. These terms are used merely to distinguish the components from other components, and the essence, order, or sequence of the components is not limited by such terms.

[0042] Now, with reference to the attached drawings, a method (S100) for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention will be described in detail.

[0043] FIG. 5 is a flowchart of a method (S100) for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, FIG. 6 and FIG. 7 illustrate the process of preparing a front wafer (110) in the method (S100) for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, FIG. 8 illustrates the process of preparing a back wafer (140) in the method (S100) for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention, FIG. 9 and FIG. 10 illustrate the process of manufacturing a vertically stacked microdisplay panel according to the method (S100) for manufacturing a vertically stacked microdisplay panel according to a first embodiment of the present invention.

[0044] As illustrated in FIGS. 5 to 10, the method (S100) for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention, in the case where the common electrode (160) is a cathode, includes a preparation step (S110), a stacking step (S120), a first processing step (S130), a bonding step (S140), a second processing step (S150), an etching step (S160), and a forming step (S170).

[0045] The preparation step (S110) is a step of preparing a plurality of front wafers (110) and back wafers (140).

[0046] A plurality of front wafers (110) are each intended to emit different colors. The plurality of front wafers (110) may include a first front wafer (111) for emitting a first color, a second front wafer (112) for emitting a second color different from the first color, and a third front wafer (113) for emitting a third color different from the first and second colors. Meanwhile, the first color, the second color, and the third color may be, for example, red, green, and blue, respectively, but are not limited thereto, and various other colors may be included.

[0047] Here, the first front wafer (111) includes a support wafer (S) and a first light-emitting part (121) disposed on top of the support wafer (S), the second front wafer (112) includes a support wafer (S) and a second light-emitting part (122) disposed on top of the support wafer (S), and the third front wafer (113) includes a support wafer (S) and a third light-emitting part (123) disposed on top of the support wafer (S).

[0048] The light-emitting part (120) generates light and can emit blue light, green light, or red light. In the present invention, when the light-emitting part (120) emits blue light or green light, binary, ternary, or quaternary compounds such as InN, InGaN, GaN, AlGaN, AlN, and AlGaInN, which are group 3 (Al, Ga, In) nitride semiconductors among group 3-5 compound semiconductors, can be placed in appropriate positions and order on the initial growth wafer (G) and grown by epitaxy.

[0049] In particular, to emit blue or green light, a high-quality InGaN group 3 nitride semiconductor with a high In composition must be preferentially formed on top of a group 3 nitride semiconductor composed of GaN, AlGaN, AlN, and AlGaInN, but is not limited thereto.

[0050] In addition, when the light-emitting part (120) in the present invention emits red light, binary, ternary, and quaternary compounds such as InP, InGaP, GaP, AlInP, AlGaP, AlP, and AlGaInP, which are group 3 (Al, Ga, In) phosphide semiconductors among group 3-5 compound semiconductors, can be arranged in appropriate positions and order on the initial growth wafer (G) and grown by epitaxy. Furthermore, in order to further improve the value of display panel products and the development of equipment and process technologies in recent years, when emitting red light, in addition to group 3 phosphide semiconductors, a high-quality group 3 nitride semiconductor of InGaN having a high In composition of 30% or more can be preferentially formed on top of a group 3 nitride semiconductor composed of GaN, AlGaN, AlN, and AlGaInN.

[0051] In particular, to emit red light, a high-quality Group 3 phosphide semiconductor of InGaP with a high In composition must be preferentially formed on top of a Group 3 phosphide semiconductor composed of GaP, AlInP, AlGaP, AlP, and AlGaInP, but is not limited thereto, and the following description is based on a Group 3 nitride semiconductor.

[0052] Each light-emitting part (120) more specifically includes a first semiconductor region (1201) (e.g., a p-type semiconductor region), an active region (1203) (e.g., multi quantum wells, MQWs), and a second semiconductor region (1202) (e.g., an n-type semiconductor region), and may have a structure in which the second semiconductor region (1202), the active region (1203), and the first semiconductor region (1201) are epitaxially grown in sequence on a growth wafer (G), and may have a thickness of approximately 5.0 to 8.0 μm overall by including multiple layers of group 3 nitride, but is not limited thereto.

[0053] Each of these first semiconductor region (1201), active region (1203), and second semiconductor region (1202) may be composed of a single layer or multiple layers, and although not illustrated, prior to epitaxially growing the light-emitting part (120) on the growth wafer (G), necessary layers such as a buffer layer may be added to improve the quality of the epitaxially grown light-emitting part (120). For example, the buffer layer may be composed of a compliant layer (CL) consisting of a nucleation layer (NL) and an un-doped semiconductor region to relieve stress and improve thin film quality, and may have a thickness of typically around 4.0 μm. Additionally, when removing the growth wafer (G) using a laser lift-off (LLO) technique, a sacrificial layer (SL) may be provided between the nucleation layer and the un-doped semiconductor region, and a seed layer may function as a sacrificial layer.

[0054] The second semiconductor region (1202) has second conductivity and is formed on the growth wafer (G). This second semiconductor region (1202) may have a thickness of 2.0 to 3.5 μm.

[0055] The active region (1203) generates light by utilizing the recombination of electrons and holes and is formed on the second semiconductor region (1202). This active region (1203) can have a thickness of several tens of nanometers in a multilayer.

[0056] The first semiconductor region (1201) has a first conductivity (p-type) and is formed on the active region (1203). This first semiconductor region (1201) can have a thickness of several tens of nanometers to several micrometers in a multilayer structure, and the surface can have gallium polarity (Ga-polarity).

[0057] That is, the active region (1203) is interposed between the first semiconductor region (1201) and the second semiconductor region (1202), so that light can be generated when holes in the first semiconductor region (1201), which is a p-type semiconductor region, and electrons in the second semiconductor region (1202), which is an n-type semiconductor region, recombine in the active region (1203).

[0058] Additionally, during the process of preparing the front wafer (110), an ohmic contact electrode (124) having optical transparency and electrical conductivity, which is ohmic contacted and electrically connected to the light-emitting part (120), may be formed on at least one of the upper or lower surfaces of the light-emitting part (120), and this will be described later.

[0059] The support wafer (S) supports the light-emitting part (120) (first light-emitting part (121), second light-emitting part (122) or third light-emitting part (123)) placed on the top, and if the first growth wafer (G) is not removed, the growth wafer (G) may be the support wafer (S), and may be a separate wafer bonded to remove the first growth wafer (G).

[0060] As illustrated in FIG. 6, the process of manufacturing the first front wafer (111) in this embodiment is as follows.

[0061] In the case of a first front wafer (111) for emitting red light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a GaAs growth wafer (G), then a p-type ohmic contact electrode (124) with transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then a bonding layer (130) with transparent conductivity is deposited on the ohmic contact electrode (124) to form a p-side up front wafer (110). At this time, the growth wafer (G) acts as a support wafer (S), and may have a structure in which the support wafer (S), the light-emitting part (120), the ohmic contact electrode (124), and the bonding layer (130) are stacked in sequence.

[0062] In addition, as shown in FIG. 6, the process of manufacturing the second front wafer (112) in this embodiment is as follows.

[0063] In the case of a second front wafer (112) for emitting green light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a sapphire (α-phase Al2O3) growth wafer (G), then a p-type ohmic contact electrode (124) with transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then a bonding layer (130) with transparent conductivity is deposited on the ohmic contact electrode (124) to form a p-side up front wafer (110). At this time, the growth wafer (G) acts as a support wafer (S), and may have a structure in which the support wafer (S), the light-emitting part (120), the ohmic contact electrode (124), and the bonding layer (130) are stacked in sequence.

[0064] In addition, as shown in FIG. 7, the process of manufacturing the third front wafer (113) in this embodiment is as follows.

[0065] In the case of a third front wafer (113) for emitting blue light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a sapphire (α-phase Al2O3) growth wafer (G), then a p-type ohmic contact electrode (124) having transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then the support wafer (S) and the ohmic contact electrode (124) are bonded through a bonding layer (B). Subsequently, the growth wafer (G) is separated from the light-emitting part (120) using a laser lift-off (LLO) technique, and the second semiconductor region (1202) is etched to reduce the thickness of the second semiconductor region (1202). Then, an n-type ohmic contact electrode (124) having transparent conductivity is formed on the surface of the second semiconductor region (1202) with reduced thickness, and a bonding layer (130) is deposited on the n-type ohmic contact electrode (124) to form a front wafer (110) in an n-side-up shape. At this time, the support wafer (S) may be formed of a Si material having a crystal plane (111), (110), or (100), but is not limited thereto, and may have a structure in which the support wafer (S), bonding layer (B), ohmic contact electrode (124), light-emitting part (120), ohmic contact electrode (124), and bonding layer (130) are stacked in order.

[0066] Meanwhile, for green light and blue light, a blue light or green light emitting part (120) may be formed on Si having a crystal plane (111) instead of a sapphire (α-phase Al2O3) growth wafer (G), and the Si growth wafer (G) may be separated and removed by mechanical polishing or chemical lift-off (CLO).

[0067] Furthermore, in the present invention, the growth wafer (G), support wafer (S), and / or temporary wafer (T) materials may each be silicon (Si) or sapphire, but the choice of material may be determined according to the wafer bonding method.

[0068] For example, when surface activated bonding is performed at room temperature after a surface activation process, wafers of different materials such as silicon (Si) or sapphire may be selected regardless of the coefficient of thermal expansion, but when bonding between a growth wafer (G), a support wafer (S), a temporary wafer (T), and a back wafer (140), the bonding is performed at a temperature of 50°C or higher, or when annealing is performed at a temperature of 50°C or higher without removing one side of the wafer while the wafers are bonded, wafers of the same material must be selected.

[0069] Meanwhile, in the manufacturing process of the front wafer (110) described above, before the ohmic contact electrode (124) is formed on the surface of the first semiconductor region (1201) or the surface of the second semiconductor region (1202), the surface of the first semiconductor region (1201) may be exposed (in the form of a p-side up) or the surface of the second semiconductor region (1202) may be exposed (in the form of an n-side up), so that the respective surfaces may have smooth surfaces, the surfaces may be polished through mechanical polishing (MP) or chemical-mechanical polishing (CMP) to be smoothly flattened.

[0070] Additionally, the ohmic contact electrode (124) of the front wafer (110) is formed of a transparent conductive material. When the ohmic contact electrode (124) is formed to be in contact with a first semiconductor region (1201) which is a p-type semiconductor, the ohmic contact electrode (124) material may include NiO, PtO, PdO, AgO2, Au, Rh2O3, RuO2, In2O3, SnO2, ZnO, IZO, ITO, and IGZO. When the ohmic contact electrode (124) is formed to be in contact with a second semiconductor region (1202) which is an n-type semiconductor, the ohmic contact electrode (124) material may include TiN, CrN, VN, In2O3, SnO2, ZnO, IZO, ITO, and IGZO. Furthermore, since the surface roughness of the second semiconductor region (1202) having nitrogen polarity (N-polarity) is much greater than that of the first semiconductor region (1201) having gallium polarity (Ga-polarity), it is desirable to introduce a chemical-mechanical polishing (CMP) process to polish and flatten the surface of the second semiconductor region (1202) before forming the ohmic contact electrode (124) having transparent conductivity.

[0071] Additionally, the surface of the ohmic contact electrode (124) formed on the front wafer (110) can also be polished through mechanical polishing (MP) or chemical-mechanical polishing (CMP) to be smooth and flattened.

[0072] The back wafer (140) is an active driving IC driven by an active matrix (AM) method, and refers to a CMOS wafer having a plurality of CMOS electrode pads (141) arranged in an array on its upper surface as shown in FIG. 8. A passivation layer may be formed on the upper surface of the back wafer (140) so that the upper surface of the plurality of CMOS electrode pads (141) is not exposed, and a portion of the passivation layer may be etched so that the plurality of CMOS electrode pads (141) are exposed when the front wafer (110) is bonded.

[0073] Here, the back wafer (140) can be provided as a Si wafer having a crystal plane (100), and can be provided as an 8-inch or 12-inch Si wafer according to a standard CMOS IC process, but considering that the usual LED wafer (front wafer (110)) for bonding is 4 inches or 6 inches, the size of the back wafer is not particularly limited.

[0074] The stacking step (S120) is a step of vertically stacking a plurality of light-emitting parts (120) on a support wafer (S) by repeating the process of bonding another front wafer (110) onto one front wafer (110) through a bonding layer (130) and then removing the support wafer (S) of the other front wafer (110).

[0075] Here, the bonding layer (130) is formed of a ceramic material that is optically transparent and electrically conductive, that is, transparently conductive, wherein optically transparent means Transparent (transmittance of 80% or more) or Translucent (transmittance of 50% or more) in the wavelength range of light (including visible light) used in the photolithography process, and electrically conductive means 10 -3It means having an electrical resistance of less than Ω / cm. Ceramic materials with such transparent conductivity include transparent conductive oxide (TCO), transparent conductive nitride (TCN), and transparent conductive oxide nitride (TCON).

[0076] In this case, when the ceramic material is a transparent conductive oxide, the ceramic material may include In2O3, SnO2, ZnO, IZO, ITO, and IGZO; when the ceramic material is a transparent conductive nitride, the ceramic material may include TiN, CrN, and VN; and when the ceramic material is a transparent conductive oxynitride, the ceramic material may include InON, SnON, ZnON, IZON, ITON, and IGZON.

[0077] As illustrated in FIG. 9, specifically in the stacking step (S120) of the present embodiment, first, a second front wafer (112) in a p-side up form that emits green light is bonded to a third front wafer (113) in an n-side up form that emits blue light through a bonding layer (130), and then the support wafer (S) of the second front wafer (112) is removed using a laser lift-off or the like. Afterward, the second semiconductor region (1202) of the second light-emitting part (122) exposed by removing the support wafer (S) is etched to reduce its thickness, and then an n-type ohmic contact electrode (124) is formed on the surface of the second semiconductor region (1202), and a bonding layer (130) is deposited on the n-type ohmic contact electrode (124).

[0078] Next, a first front wafer (111) in a p-side up shape that emits red light is bonded through a bonding layer (130), and then the support wafer (S) of the first front wafer (111) is removed using a chemical lift-off or the like. Afterward, the second semiconductor region (1202) of the first light-emitting part (121) exposed by removing the support wafer (S) is etched to reduce its thickness, and then an n-type ohmic contact electrode (124) is formed on the surface of the second semiconductor region (1202). At this time, when etching the second semiconductor region (1202) of the first light-emitting part (121), a surface texturing process may be performed on the surface of the second semiconductor region (1202).

[0079] Next, after bonding a temporary wafer (T) to an upper n-type ohmic contact electrode (124) through a bonding layer (B), the lower support wafer (S) is separated using a laser lift-off or chemical lift-off, and the bonding layer (B) is removed. Then, heat treatment at a high temperature of 200 to 900°C is essential to improve the bonding strength of the transparent conductive ceramic bonding layer (130). That is, in the present invention, after all RGB light sources are stacked on the temporary wafer (T) and then heat treatment is performed at a high temperature to secure the bonding strength between the RGB epitaxies, the RGB stacked structure can be bonded to the CMOS Si back wafer (140) in one go.

[0080] Through this, a temporary wafer (T), a bonding layer (B), a first light-emitting part (121) with ohmic contact electrodes (124) formed on the upper and lower surfaces respectively, a bonding layer (130), a second light-emitting part (122) with ohmic contact electrodes (124) formed on the upper and lower surfaces respectively, a bonding layer (130), and a third light-emitting part (123) with ohmic contact electrodes (124) formed on the upper and lower surfaces respectively are stacked in a vertical direction, and the stacked body secures a strong bonding force between RGB epitaxy through heat treatment at a high temperature.

[0081] Meanwhile, the stacking step (S120) can utilize the property of smooth surfaces adhering to each other due to van der Waals forces without using high pressure or an external electric field. Accordingly, it is desirable to introduce a chemical-mechanical polishing (CMP) process before bonding the front wafers (110) together so that the roughness of each bonding surface becomes very low (Rq, < 0.5 nm @ 2 μm × 2 μm) and there are no particles such as impurities between the surfaces. To this end, in the stacking step (S120), before bonding the front wafers (110) together, the surface of the bonding layer (130) of the front wafers (110) can be polished through mechanical polishing (MP) or chemical-mechanical polishing (CMP) to make it smooth and flat.

[0082] The first processing step (S130) is a step of forming a shot passage (180) in a portion of the surface of a plurality of stacked light-emitting parts (120) (i.e., the side of the third light-emitting part (123)).

[0083] Specifically, in the first processing step (S130), a third light-emitting part (123), an ohmic contact electrode (124) on the upper and lower surfaces of the third light-emitting part (123), and a bonding layer (130) are penetrated through the portion where the first LED laminate (L1) is to be formed, and then a through hole is extended to penetrate to the second light-emitting part (122) and the ohmic contact electrode (124) on the upper and lower surfaces of the second light-emitting part (122) (or to penetrate to the bonding layer (130) on the lower surface of the second light-emitting part (122)), and then a conductive transparent material that is optically transparent and electrically conductive is filled into the through hole to form a short passage (180). Additionally, in the first processing step (S130), a through hole is formed in the portion where the second LED laminate (L2) is to be formed, so as to penetrate to the third light-emitting part (123) and the ohmic contact electrode (124) on the upper and lower surfaces of the third light-emitting part (123) (or to penetrate to the bonding layer (130) on the lower side of the third light-emitting part (123)), and then a conductive transparent material is filled into the through hole to form a short passage (180).

[0084] At this time, the width of the through hole, that is, the width of the short passage (180), may be formed to correspond to the width of the LED laminate (L) to be formed or the width of the light-emitting part (120) of the formed LED laminate (L), but is not limited thereto.

[0085] Here, forming a short passage (180) after forming a through hole can be done by filling the through hole with a conductive transparent material using a direct self-align method or by filling the through hole with a conductive transparent material using a liquid coating method such as solgel, but is not limited thereto, and any method for forming a short passage (180) in the through hole may be provided.

[0086] Meanwhile, in the first processing step (S130) of the present invention, a through hole may be filled with an optically transparent and electrically conductive material to form a short passage (180). After filling the through hole, the material may remain on the surface of the bonding layer (130) or be removed. In this case, if the material remains on the ohmic contact electrode (124) on the third light-emitting part (123), a transparent layer (170) may be formed. That is, both the short passage (180) and the transparent layer (170) may be formed from an optically transparent and electrically conductive material.

[0087] When the short passage (180) and the transparent layer (170) are formed from a material that is optically transparent and electrically conductive, it is preferable that they be formed from a material having low resistance and high transmittance characteristics. Such materials may include, but are not limited to, In2O3, SnO2, ZnO, IZO, ITO, and IGZO.

[0088] The bonding step (S140) is a step of removing a temporary wafer (T) in which a plurality of light-emitting parts (120) are stacked in a vertical direction after the first processing step (S130), bonding the temporary wafer (T) with a back wafer (140) through a bonding layer (130), and then removing the temporary wafer (T).

[0089] After the temporary wafer (T) and the back wafer (140) are bonded, heat treatment of the bonding layer (130) is performed at a temperature of less than 400°C to prevent damage to the CMOS circuit of the back wafer (140), and the removal of the temporary wafer (T) may be performed using mechanical polishing (MP) and chemical lift-off (CLO) techniques. Meanwhile, if a sapphire temporary wafer (T) is used as the temporary wafer (T), the temporary wafer (T) can be removed using a laser lift-off (LLO) technique.

[0090] Meanwhile, in the present invention, although a partial alignment process between the short passage (180) and the CMOS electrode pad (141) is required in the bonding step (S140), high-precision bonding is possible because the light-emitting part (120), the short passage (180), the transparent layer (170), and the bonding layer (130) are all transparent in the visible light region.

[0091] Accordingly, in the present invention, a third light-emitting part (123) emitting blue light, a second light-emitting part (122) emitting green light, and a first light-emitting part (121) emitting red light are sequentially stacked on a back wafer (140) in an n-side up configuration, and the upper surface of the first light-emitting part (121) having nitrogen polarity is surface-textured.

[0092] The second processing step (S150) is a step of forming a shot passage (180) from the other side (i.e., the first light-emitting part (121) side) of the stacked plurality of light-emitting parts (120).

[0093] Specifically, in the second processing step (S150), a first light-emitting part (121), an ohmic contact electrode (124) on the upper and lower surfaces of the first light-emitting part (121), and a bonding layer (130) on the lower surface of the first light-emitting part are penetrated through the portion where the third LED laminate (L3) is to be formed, and then a through hole is extended to penetrate to the second light-emitting part (122) and the ohmic contact electrode (124) on the upper and lower surfaces of the second light-emitting part (122) (or to penetrate to the bonding layer (130) on the lower surface of the second light-emitting part (122)), and then a conductive transparent material that is optically transparent and electrically conductive is filled into the through hole to form a short passage (180). Additionally, in the second processing step (S150), a through hole is formed in the portion where the second LED laminate (L2) is to be formed, so as to penetrate to the first light-emitting part (121) and the ohmic contact electrode (124) on the upper and lower surfaces of the first light-emitting part (121) (or to penetrate to the bonding layer (130) on the lower side of the first light-emitting part (121)), and then a conductive transparent material is filled into the through hole to form a short passage (180). Additionally, in the second processing step (S150), after filling the through hole with the conductive transparent material, the material is left on the ohmic contact electrode (124) so ​​that a transparent layer (170) is formed in the portion where the first LED laminate (L1) is to be formed.

[0094] At this time, the width of the through hole, that is, the width of the short passage (180), may be formed to correspond to the width of the LED laminate (L) formed in the first processing step (S130) or the width of the light-emitting part (120) of the formed LED laminate (L), but is not limited thereto.

[0095] The etching step (S160) is a step in which a plurality of LED stacks (L) are each placed and aligned on a plurality of CMOS electrode pads (141) by etching the stacked plurality of light-emitting parts (120), ohmic contact electrodes (124), and bonding layer (130) to separate them into preset units.

[0096] That is, the etching step (S160) etches the light-emitting part (120), bonding layer (130), ohmic contact electrode (124), and transmission layer (170) in a vertical direction until the surface or adjacent area of ​​the back wafer (140) is exposed so that they are arranged in an array, that is, so that a plurality of LED stacks (L) are aligned on top of the aligned CMOS electrode pad (141). Here, the already set unit means a pixel or sub-pixel unit and may mean the width (diameter) of the plurality of LED stacks (L).

[0097] At this time, the light-emitting part (120), bonding layer (130), ohmic contact electrode (124), and transmission layer (170) of the present invention are all transparent so that visible light is transmitted, thus having the advantage of not having alignment error issues in the exposure process. In addition, since the bonding layer (130) and the ohmic contact electrode (124) of the present invention are both made of ceramic material rather than metal, they are easy to etch in the plasma dry process, and there is the advantage of not having to deal with the problem of etching byproducts being re-deposited.

[0098] Meanwhile, a plurality of LED stacks (L) include a first LED stack (L1) for emitting only a first color, a second LED stack (L2) for emitting only a second color, and a third LED stack (L3) for emitting only a third color.

[0099] After undergoing the etching step (S160) described above, a short passage (180) is formed so that the first LED laminate (L1) is removed from the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the first light-emitting part (121) to emit only the first color, and if a transparent layer (170) is formed on the first light-emitting part (121), the transparent layer (170) can transmit the first color generated in the first light-emitting part (121).

[0100] Additionally, the second LED laminate (L2) has a short passage (180) formed so that the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, and the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, are each removed, thereby allowing current to flow only to the second light-emitting part (122) to emit only the second color.

[0101] Additionally, the third LED laminate (L3) has a short passage (180) formed so as to remove the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the third light-emitting part (123) to emit only the third color, and a transparent layer (170) can be formed on the lower part of the third light-emitting part (123).

[0102] Accordingly, the first LED stack (L1) of the present invention includes only a first light-emitting part (121) that emits red light, the second LED stack (L2) includes only a second light-emitting part (122) that emits green light, and the third LED stack (L3) includes only a third light-emitting part (123) that emits blue light.

[0103] Additionally, the first light-emitting part (121) of the first LED stack (L1) has an n-side-up shape and is located above the second light-emitting part (122) of the second LED stack (L2), and the second light-emitting part (122) of the second LED stack (L2) has an n-side-up shape and is located above the third light-emitting part (123) of the third LED stack (L3), and the upper surface of the first light-emitting part (121) having nitrogen polarity can be surface-textured.

[0104] According to this, since red light is not absorbed by other light-emitting parts (120), the light emission efficiency of red light in a vertically stacked tandem structure can be greatly improved.

[0105] In addition, since all other light-emitting parts (120) are removed except for the light-emitting part (120) that emits a corresponding color in each LED stack (L) of the present invention, the occurrence of unwanted sub-pixel light emission caused by photo-excitation by short-wavelength blue light can be fundamentally blocked.

[0106] Meanwhile, in the present invention, the light-emitting area of ​​a plurality of LED stacks (L) may all be the same, and the operating voltage may also be set to be the same for all of the plurality of LED stacks (L). Generally, each light-emitting part (120) that emits red, green, or blue light does not have the same operating voltage. However, assuming that the operating voltage per light-emitting part (120) is 3V, the present invention is a stacked structure, but since the series connection is completely released by energizing through the short passage (180), it becomes the same as a parallel structure, so the operating voltage can all be set to 3V.

[0107] The forming step (S170) is a step of forming a mold portion (150) that fills the space between a plurality of aligned LED stacks (L), and then forming a common electrode (160) on the plurality of LED stacks (L). At this time, since the light-emitting portions (120) in this embodiment are in an n-side up shape, the common electrode (160) can be formed as a negative electrode.

[0108] At this time, preferably prior to forming a mold portion (150) that fills between a plurality of aligned LED stacks (L), a material that is optically transparent and electrically insulating (e.g., SiO2, SiN) x A passivation process, that is, a process of wrapping the sides of all light-emitting parts (120) with Al2O3, may also be performed.

[0109] More specifically, in the forming step (S170), a mold portion (150) is formed between and on top of a plurality of aligned LED stacks (L), and after etching the mold portion (150) so that the top of the plurality of LED stacks (L) is exposed, a common electrode (160) is formed to contact the top of the plurality of LED stacks (L) to complete a vertical stacked LEDoS structure. Here, the common electrode (160) may be formed of a material having transparent conductivity similar to an ohmic contact electrode (124), and when the common electrode (160) is a cathode, the material of the common electrode (160) may include TiN, CrN, VN, In2O3, SnO2, ZnO, IZO, ITO, and IGZO.

[0110] Additionally, the surface of the common electrode (160) can also be polished through mechanical polishing (MP) or chemical-mechanical polishing (CMP) to be smooth and flattened.

[0111] Furthermore, although not shown, a protection layer made of transparent organic material may be additionally formed to protect the common electrode (160) from the atmospheric environment.

[0113] Now, with reference to the attached drawings, a vertical stacked microdisplay panel (100) according to the first embodiment of the present invention will be described in detail.

[0114] FIG. 11 illustrates a vertically stacked microdisplay panel (100) according to a first embodiment of the present invention.

[0115] As illustrated in FIG. 11, a vertically stacked microdisplay panel (100) according to the first embodiment of the present invention comprises a back wafer (140), a plurality of LED stacks (L), a mold part (150), and a common electrode (160), wherein the common electrode (160) is a negative electrode.

[0116] In the following, some details that overlap with the method (S100) for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention will be omitted from the description.

[0117] The back wafer (140) is an active driving IC driven by an active matrix (AM) method, and refers to a CMOS wafer having a plurality of CMOS electrode pads (141) arranged in an array on its upper surface. A passivation layer may be formed on the upper surface of the back wafer (140), and a portion of the passivation layer may be etched so that the plurality of CMOS electrode pads (141) are exposed when the front wafer (110) is bonded.

[0118] A plurality of LED stacks (L) are stacked vertically through a bonding layer (130) and include a light-emitting part (120) having an ohmic contact electrode (124) on the upper and lower surfaces, and are each aligned on a plurality of CMOS electrode pads (141).

[0119] Specifically, the plurality of LED stacks (L) include a first LED stack (L1) for emitting only a first color, a second LED stack (L2) for emitting only a second color, and a third LED stack (L3) for emitting only a third color.

[0120] At this time, a short passage (180) is formed so that the first LED laminate (L1) is removed from the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, so that current is passed only to the first light-emitting part (121) to emit only the first color, and if a transparent layer (170) is formed on the first light-emitting part (121), the transparent layer (170) can transmit the first color generated from the first light-emitting part (121).

[0121] Additionally, the second LED laminate (L2) has a short passage (180) formed so that the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, and the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, are each removed, thereby allowing current to flow only to the second light-emitting part (122) to emit only the second color.

[0122] Additionally, the third LED laminate (L3) has a short passage (180) formed so as to remove the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the third light-emitting part (123) to emit only the third color, and a transparent layer (170) can be formed on the lower part of the third light-emitting part (123).

[0123] Accordingly, the first LED stack (L1) of the present invention includes only a first light-emitting part (121) that emits red light, the second LED stack (L2) includes only a second light-emitting part (122) that emits green light, and the third LED stack (L3) includes only a third light-emitting part (123) that emits blue light.

[0124] Additionally, the first light-emitting part (121) of the first LED stack (L1) has an n-side-up shape and is located above the second light-emitting part (122) of the second LED stack (L2), and the second light-emitting part (122) of the second LED stack (L2) has an n-side-up shape and is located above the third light-emitting part (123) of the third LED stack (L3), and the upper surface of the first light-emitting part (121) having nitrogen polarity can be surface-textured.

[0125] According to this, since red light is not absorbed by other light-emitting parts (120), the light emission efficiency of red light in a vertically stacked tandem structure can be greatly improved.

[0126] In addition, since all other light-emitting parts (120) are removed except for the light-emitting part (120) that emits a corresponding color in each LED stack (L) of the present invention, the occurrence of unwanted sub-pixel light emission caused by photo-excitation by short-wavelength blue light can be fundamentally blocked.

[0127] The mold portion (150) supports a vertical stacked LEDoS structure and is formed to fill between a plurality of aligned LED stacks (L).

[0128] The common electrode (160) is provided as a negative electrode and formed on a plurality of LED stacks (L) in which a mold portion (150) is formed, and is formed to be in contact with the upper portion of the plurality of LED stacks (L). It may be formed of a material having transparent conductivity similar to the ohmic contact electrode (124), and when the common electrode (160) is a negative electrode, the material of the common electrode (160) may include TiN, CrN, VN, In2O3, SnO2, ZnO, IZO, ITO, and IGZO.

[0130] Now, with reference to the attached drawings, a method (S200) for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention will be described in detail.

[0131] FIG. 12 is a flowchart of a method (S200) for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention, FIG. 13 and FIG. 14 illustrate the process of preparing a front wafer (210) in the method (S200) for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention, and FIG. 15 and FIG. 16 illustrate the process of manufacturing a vertically stacked microdisplay panel according to the method (S200) for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention.

[0132] As illustrated in FIGS. 12 to 16, the method (S200) for manufacturing a vertically stacked microdisplay panel according to the second embodiment of the present invention, in the case where the common electrode (260) is an anode, includes a preparation step (S210), a stacking step (S220), a first processing step (S230), a second processing step (S240), a bonding step (S250), an etching step (S260), and a forming step (S270).

[0133] In the following, some details that overlap with the method (S100) for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention will be omitted from the description.

[0134] The preparation step (S210) is a step of preparing a plurality of front wafers (210) and back wafers (140).

[0135] A plurality of front wafers (210) are each intended to emit different colors. The plurality of front wafers (210) may include a first front wafer (211) for emitting a first color, a second front wafer (212) for emitting a second color different from the first color, and a third front wafer (213) for emitting a third color different from the first and second colors. Meanwhile, the first color, the second color, and the third color may be, for example, red, green, and blue, respectively, but are not limited thereto, and various other colors may be included.

[0136] Here, the first front wafer (211) includes a support wafer (S) and a first light-emitting part (121) disposed on top of the support wafer (S), the second front wafer (212) includes a support wafer (S) and a second light-emitting part (122) disposed on top of the support wafer (S), and the third front wafer (213) includes a support wafer (S) and a third light-emitting part (123) disposed on top of the support wafer (S).

[0137] As illustrated in FIG. 13, the process of manufacturing the first front wafer (211) in this embodiment is as follows.

[0138] In the case of a first front wafer (211) for emitting red light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a GaAs growth wafer (G), and then a p-type ohmic contact electrode (124) having transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then the support wafer (S) and the ohmic contact electrode (124) are bonded through a bonding layer (B). Subsequently, the growth wafer (G) is separated from the light-emitting part (120) using a chemical lift-off (CLO) technique, and the second semiconductor region (1202) is etched to reduce the thickness of the second semiconductor region (1202). Then, an n-type ohmic contact electrode (124) having transparent conductivity is formed on the surface of the second semiconductor region (1202) with reduced thickness, and a bonding layer (130) is deposited on the n-type ohmic contact electrode (124) to form a front wafer (210) in an n-side-up shape. At this time, the support wafer (S) may be formed of a Si material having a crystal plane (111), (110), or (100), but is not limited thereto, and may have a structure in which the support wafer (S), bonding layer (B), ohmic contact electrode (124), light-emitting part (120), ohmic contact electrode (124), and bonding layer (130) are stacked in order.

[0139] In addition, as illustrated in FIG. 13, the process of manufacturing the second front wafer (212) in this embodiment is as follows.

[0140] In the case of a second front wafer (212) for emitting green light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a sapphire (α-phase Al2O3) growth wafer (G), then a p-type ohmic contact electrode (124) with transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then the support wafer (S) and the ohmic contact electrode (124) are bonded through a bonding layer (B). Subsequently, the growth wafer (G) is separated from the light-emitting part (120) using a laser lift-off (LLO) technique, and the second semiconductor region (1202) is etched to reduce the thickness of the second semiconductor region (1202). Then, an n-type ohmic contact electrode (124) having transparent conductivity is formed on the surface of the second semiconductor region (1202) with reduced thickness, and a bonding layer (130) is deposited on the n-type ohmic contact electrode (124) to form a front wafer (210) in an n-side-up shape. At this time, the support wafer (S) may be formed of a Si material having a crystal plane (111), (110), or (100), but is not limited thereto, and may have a structure in which the support wafer (S), bonding layer (B), ohmic contact electrode (124), light-emitting part (120), ohmic contact electrode (124), and bonding layer (130) are stacked in order.

[0141] In addition, as shown in FIG. 14, the process of manufacturing the third front wafer (213) in this embodiment is as follows.

[0142] In the case of a third front wafer (213) for emitting blue light, a second semiconductor region (1202), an active region (1203), and a first semiconductor region (1201) are epitaxially grown in sequence on a sapphire (α-phase Al2O3) growth wafer (G), which is an optically transparent wafer with high temperature resistance that transmits 100% (theoretically) a laser beam (single wavelength light) without absorption, then a p-type ohmic contact electrode (124) with transparent conductivity is formed on the upper surface of the first semiconductor region (1201), and then a transparent conductive bonding layer (130) is deposited on the ohmic contact electrode (124) to form a p-side up front wafer (210). At this time, the growth wafer (G) acts as a support wafer (S), and may have a structure in which the support wafer (S), the light-emitting part (120), the ohmic contact electrode (124), and the bonding layer (130) are stacked in order.

[0143] The back wafer (140) is an active driving IC driven by an active matrix (AM) method, and refers to a CMOS wafer having a plurality of CMOS electrode pads (141) arranged in an array on its upper surface as shown in FIG. 8. A passivation layer may be formed on the upper surface of the back wafer (140) so that the upper surface of the plurality of CMOS electrode pads (141) is not exposed, and a portion of the passivation layer may be etched so that the plurality of CMOS electrode pads (141) are exposed when the front wafer (210) is bonded.

[0144] The stacking step (S220) is a step of vertically stacking a plurality of light-emitting parts (120) on a support wafer (S) by repeating the process of bonding another front wafer (210) onto one front wafer (210) through a bonding layer (130) and then removing the support wafer (S) of the other front wafer (210).

[0145] As illustrated in FIG. 15, specifically in the stacking step (S220) of the present embodiment, first, a second front wafer (212) in an n-side up form that emits green light is bonded to a third front wafer (213) in a p-side up form that emits blue light through a bonding layer (130), and then the support wafer (S) of the second front wafer (212) is removed using a laser lift-off or the like, and the bonding layer (130) is deposited on a p-type ohmic contact electrode (124).

[0146] Afterward, a first front wafer (211) in a p-side up shape that emits red light is bonded through a bonding layer (130), and then the support wafer (S) of the first front wafer (211) is removed using a chemical lift-off or the like so that the p-type ohmic contact electrode (124) is exposed to the outside.

[0147] Next, to improve the bonding strength of the transparent conductive ceramic bonding layer (130), heat treatment at a high temperature of 200 to 900°C is essential. That is, in the present invention, after all RGB light sources are stacked on the support wafer (S) (initial growth wafer (G)), high-temperature heat treatment is performed to secure bonding strength between the RGB epitaxies, and then the RGB stacked structure can be bonded to the CMOS Si back wafer (140) in one go.

[0148] Through this, a support wafer (S), a third light-emitting part (123) with an ohmic contact electrode (124) formed on the upper surface, a bonding layer (130), a second light-emitting part (122) with an ohmic contact electrode (124) formed on the upper and lower surfaces respectively, a bonding layer (130), and a first light-emitting part (121) with an ohmic contact electrode (124) formed on the upper and lower surfaces respectively are stacked in a vertical direction, and the stacked body is heat-treated at a high temperature to ensure strong bonding strength between the RGB epitaxies.

[0149] The first processing step (S230) is a step of forming a shot passage (180) in a portion of one side (i.e., the first light-emitting part (121) side) of a plurality of stacked light-emitting parts (120).

[0150] Specifically, in the first processing step (S230), a first light-emitting part (121), an ohmic contact electrode (124) on the upper and lower surfaces of the first light-emitting part (121), and a bonding layer (130) on the lower surface of the first light-emitting part are penetrated through the portion where the third LED laminate (L3) is to be formed, and then a through hole is extended to penetrate to the second light-emitting part (122) and the ohmic contact electrode (124) on the upper and lower surfaces of the second light-emitting part (122) (or to penetrate to the bonding layer (130) on the lower surface of the second light-emitting part (122)), and then a conductive transparent material that is optically transparent and electrically conductive is filled into the through hole to form a short passage (180). Additionally, in the first processing step (S230), a through hole is formed in the portion where the second LED laminate (L2) is to be formed, so as to penetrate to the first light-emitting part (121) and the ohmic contact electrode (124) on the upper and lower surfaces of the first light-emitting part (121) (or to penetrate to the bonding layer (130) on the lower side of the first light-emitting part (121)), and then a conductive transparent material is filled into the through hole to form a short passage (180). Additionally, in the first processing step (S230), after filling the through hole with the conductive transparent material, the material is left on the ohmic contact electrode (124) so ​​that a transparent layer (170) is formed in the portion where the first LED laminate (L1) is to be formed.

[0151] The second processing step (S240) is a step of forming a shot passage (180) in a portion of the other surface of the stacked plurality of light-emitting parts (120).

[0152] Specifically, in the second processing step (S240), a temporary wafer (T) is bonded to one surface of a plurality of light-emitting parts (120) stacked through a bonding layer (B), and then the lower support wafer (S) is separated using a laser lift-off or the like, and then the second semiconductor region (1202) of the exposed third light-emitting part (123) is etched to reduce the thickness of the second semiconductor region (1202), and then an n-type ohmic contact electrode (124) having transparent conductivity is formed on the surface of the second semiconductor region (1202) with reduced thickness.

[0153] Subsequently, in the second processing step (S240), a short passage (180) is formed on the other side of the stacked plurality of light-emitting parts (120) (i.e., the side of the third light-emitting part (123)). Specifically, the third light-emitting part (123), the ohmic contact electrode (124) on the upper and lower surfaces of the third light-emitting part (123), and the bonding layer (130) are penetrated in the part where the first LED stack (L1) is to be formed. Then, a through hole is extended to penetrate to the second light-emitting part (122) and the ohmic contact electrode (124) on the upper and lower surfaces of the second light-emitting part (122) (or to penetrate to the bonding layer (130) on the lower surface of the second light-emitting part (122)). After that, a conductive transparent material that is optically transparent and electrically conductive is filled into the through hole to form the short passage (180). Additionally, in the second processing step (S240), a through hole is formed in the portion where the second LED laminate (L2) is to be formed, so as to penetrate to the third light-emitting part (123) and the ohmic contact electrode (124) on the upper and lower surfaces of the third light-emitting part (123) (or to penetrate to the bonding layer (130) on the lower side of the third light-emitting part (123)), and then a conductive transparent material is filled into the through hole to form a short passage (180). Additionally, in the second processing step (S240), after filling the through hole with a transparent and electrically conductive material, the material is left on the ohmic contact electrode (124) so ​​that a transparent layer (170) is formed in the portion where the third LED laminate (L3) is to be formed.

[0154] At this time, the width of the through hole, that is, the width of the short passage (180), can be formed to correspond to the width of the LED laminate (L) formed in the first processing step (S230) or the width of the light-emitting part (120) of the formed LED laminate (L).

[0155] The bonding step (S250) is a step of removing a temporary wafer (T) in which a plurality of light-emitting parts (120) are stacked in a vertical direction after the second processing step (S240), bonding the temporary wafer (T) with a back wafer (140) through a bonding layer (130), and then removing the temporary wafer (T).

[0156] After the temporary wafer (T) and the back wafer (140) are bonded, heat treatment of the bonding layer (130) is performed at a temperature of less than 400°C to prevent damage to the CMOS circuit of the back wafer (140), and the removal of the temporary wafer (T) may be performed using mechanical polishing (MP) and chemical lift-off (CLO) techniques. Meanwhile, if a sapphire temporary wafer (T) is used as the temporary wafer (T), the temporary wafer (T) can be removed using a laser lift-off (LLO) technique.

[0157] Accordingly, in the present invention, a third light-emitting part (123) emitting blue light, a second light-emitting part (122) emitting green light, and a first light-emitting part (121) emitting red light are sequentially stacked on a back wafer (140) in a p-side up configuration.

[0158] The etching step (S260) is a step in which a plurality of LED stacks (L) are each placed and aligned on a plurality of CMOS electrode pads (141) by etching the stacked plurality of light-emitting parts (120), ohmic contact electrodes (124), and bonding layer (130) to separate them into preset units.

[0159] Meanwhile, a plurality of LED stacks (L) include a first LED stack (L1) for emitting only a first color, a second LED stack (L2) for emitting only a second color, and a third LED stack (L3) for emitting only a third color.

[0160] After undergoing the etching step (S260) described above, a short passage (180) is formed so that the first LED laminate (L1) is removed from the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the first light-emitting part (121) to emit only the first color, and if a transparent layer (170) is formed on the first light-emitting part (121), the transparent layer (170) can transmit the first color generated in the first light-emitting part (121).

[0161] Additionally, the second LED laminate (L2) has a short passage (180) formed so that the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, and the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, are each removed, thereby allowing current to flow only to the second light-emitting part (122) to emit only the second color.

[0162] Additionally, the third LED laminate (L3) has a short passage (180) formed so as to remove the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the third light-emitting part (123) to emit only the third color, and a transparent layer (170) can be formed on the lower part of the third light-emitting part (123).

[0163] Accordingly, the first LED stack (L1) of the present invention includes only a first light-emitting part (121) that emits red light, the second LED stack (L2) includes only a second light-emitting part (122) that emits green light, and the third LED stack (L3) includes only a third light-emitting part (123) that emits blue light.

[0164] Additionally, the first light-emitting part (121) of the first LED stack (L1) has a p-side up shape and is located above the second light-emitting part (122) of the second LED stack (L2), and the second light-emitting part (122) of the second LED stack (L2) has a p-side up shape and can be located above the third light-emitting part (123) of the third LED stack (L3).

[0165] According to this, since red light is not absorbed by other light-emitting parts (120), the light emission efficiency of red light in a vertically stacked tandem structure can be greatly improved.

[0166] In addition, since all other light-emitting parts (120) are removed except for the light-emitting part (120) that emits a corresponding color in each LED stack (L) of the present invention, the occurrence of unwanted sub-pixel light emission caused by photo-excitation by short-wavelength blue light can be fundamentally blocked.

[0167] The forming step (S270) is a step of forming a mold portion (150) that fills between a plurality of aligned LED stacks (L), and then forming a common electrode (260) on the plurality of LED stacks (L). At this time, since the light-emitting portions (120) in this embodiment are in a p-side up shape, the common electrode (260) can be formed as an anode. Here, the common electrode (260) can be formed from a material having transparent conductivity similar to the ohmic contact electrode (124), and when the common electrode (260) is an anode, the material of the common electrode (260) may include NiO, PtO, PdO, AgO2, Au, Rh2O3, RuO2, In2O3, SnO2, ZnO, IZO, ITO, and IGZO.

[0169] Now, with reference to the attached drawings, a vertical stacked microdisplay panel (200) according to the second embodiment of the present invention will be described in detail.

[0170] FIG. 17 illustrates a vertically stacked microdisplay panel (200) according to a second embodiment of the present invention.

[0171] As illustrated in FIG. 17, a vertically stacked microdisplay panel (200) according to the second embodiment of the present invention comprises a back wafer (140), a plurality of LED stacks (L), a mold part (150), and a common electrode (260), wherein the common electrode (260) is an anode.

[0172] In the following, some details that overlap with the method (S200) for manufacturing a vertically stacked microdisplay panel according to the second embodiment of the present invention will be omitted from the description.

[0173] The back wafer (140) is an active driving IC driven by an active matrix (AM) method, and refers to a CMOS wafer having a plurality of CMOS electrode pads (141) arranged in an array on its upper surface. A passivation layer may be formed on the upper surface of the back wafer (140), and a portion of the passivation layer may be etched so that the plurality of CMOS electrode pads (141) are exposed when the front wafer (210) is bonded.

[0174] A plurality of LED stacks (L) are stacked vertically through a bonding layer (130) and include a light-emitting part (120) having an ohmic contact electrode (124) on the upper and lower surfaces, and are each aligned on a plurality of CMOS electrode pads (141).

[0175] Specifically, the plurality of LED stacks (L) include a first LED stack (L1) for emitting only a first color, a second LED stack (L2) for emitting only a second color, and a third LED stack (L3) for emitting only a third color.

[0176] At this time, a short passage (180) is formed so that the first LED laminate (L1) is removed from the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, so that current is passed only to the first light-emitting part (121) to emit only the first color, and if a transparent layer (170) is formed on the first light-emitting part (121), the transparent layer (170) can transmit the first color generated from the first light-emitting part (121).

[0177] Additionally, the second LED laminate (L2) has a short passage (180) formed so that the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, and the third light-emitting part (123) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, are each removed, thereby allowing current to flow only to the second light-emitting part (122) to emit only the second color.

[0178] Additionally, the third LED laminate (L3) has a short passage (180) formed so as to remove the first light-emitting part (121) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, to the second light-emitting part (122) region, which includes the ohmic contact electrode (124) on the upper and lower surfaces, thereby allowing current to flow only to the third light-emitting part (123) to emit only the third color, and a transparent layer (170) can be formed on the lower part of the third light-emitting part (123).

[0179] Accordingly, the first LED stack (L1) of the present invention includes only a first light-emitting part (121) that emits red light, the second LED stack (L2) includes only a second light-emitting part (122) that emits green light, and the third LED stack (L3) includes only a third light-emitting part (123) that emits blue light.

[0180] Additionally, the first light-emitting part (121) of the first LED stack (L1) has a p-side up shape and is located above the second light-emitting part (122) of the second LED stack (L2), and the second light-emitting part (122) of the second LED stack (L2) has a p-side up shape and can be located above the third light-emitting part (123) of the third LED stack (L3).

[0181] According to this, since red light is not absorbed by other light-emitting parts (120), the light emission efficiency of red light in a vertically stacked tandem structure can be greatly improved.

[0182] In addition, since all other light-emitting parts (120) are removed except for the light-emitting part (120) that emits a corresponding color in each LED stack (L) of the present invention, the occurrence of unwanted sub-pixel light emission caused by photo-excitation by short-wavelength blue light can be fundamentally blocked.

[0183] The mold portion (150) supports a vertical stacked LEDoS structure and is formed to fill between a plurality of aligned LED stacks (L).

[0184] The common electrode (260) is provided as an anode and formed on a plurality of LED stacks (L) in which a mold portion (150) is formed, and is formed to be in contact with the upper portion of the plurality of LED stacks (L), and can be formed of a material having transparent conductivity similar to the ohmic contact electrode (124), and when the common electrode (260) is an anode, the material of the common electrode (260) may include NiO, PtO, PdO, AgO2, Au, Rh2O3, RuO2, In2O3, SnO2, ZnO, IZO, ITO, and IGZO.

[0186] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to such embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined in one or more ways to operate.

[0187] Furthermore, terms such as "include," "compose," or "have" described above, unless specifically stated otherwise, mean that the relevant component may be inherent; therefore, they should be interpreted as allowing for the inclusion of additional components rather than excluding them. All terms, including technical or scientific terms, have the same meaning as generally understood by those skilled in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as those defined in advance, should be interpreted in accordance with their meaning in the context of the relevant technology and should not be interpreted in an ideal or overly formal sense unless explicitly defined in the present invention.

[0188] Furthermore, the above description is merely an illustrative explanation of the technical concept of the present invention, and those skilled in the art to which the present invention pertains will be able to make various modifications and variations within the scope of the essential characteristics of the present invention.

[0189] Accordingly, the embodiments disclosed in this invention are intended to illustrate, not limit, the technical concept of the invention, and the scope of the technical concept of the invention is not limited by these embodiments. The scope of protection of this invention shall be interpreted by the claims below, and all technical concepts within an equivalent scope shall be interpreted as being included within the scope of rights of this invention. Explanation of the symbols

[0190] 10: Conventional microdisplay panel 11: Si CMOS wafer 12: CMOS electrode pad 13: Transparent wafer 14: microLED electrode pad 15 : microLED chip 16: Conductive junction S100: Method for manufacturing a vertically stacked microdisplay panel according to the first embodiment of the present invention S110: Preparation stage S120: Stacking step S130: 1st processing step S140: Bonding step S150: Second processing step S160: Etching step S170: Formation stage 100: Vertically stacked microdisplay panel according to the first embodiment of the present invention 110: Front wafer S: Support wafer 120 : Light-emitting part 111: 1st front wafer 121: First light-emitting part 112: 2nd front wafer 122 : Second light-emitting part 113: 3rd front wafer 123 : 3rd light-emitting part L : LED laminate L1: 1st LED laminate L2: 2nd LED laminate L3: 3rd LED laminate 1201: 1st semiconductor region 1202: Second semiconductor region 1203 : Active area 124 : Ohmic contact electrode G: Growth wafer T: Temporary wafer B: Bonding layer 130 : Bonding layer 140: Back wafer 141 : CMOS electrode pad 150 : Mold part 160 : Common electrode 170 : Transmissive layer 180 : Short passage S200: Method for manufacturing a vertically stacked microdisplay panel according to a second embodiment of the present invention S210: Preparation stage S220: Stacking step S230: 1st processing step S240: Second processing step S250: Bonding step S260: Etching step S270: Formation stage 200: Vertically stacked microdisplay panel according to the second embodiment of the present invention 210: Front wafer 211: 1st front wafer 212: 2nd front wafer 213: 3rd Front Wafer 260 : Common electrode

Claims

Claim 1 A back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a plurality of LED stacks each comprising a light-emitting portion stacked vertically through a junction layer and each aligned on the plurality of CMOS electrode pads; A common electrode formed on a plurality of the above LED stacks, wherein the plurality of the above LED stacks includes a first LED stack including a first light-emitting part that emits a first color, a second LED stack including a second light-emitting part that emits a second color, and a third LED stack including a third light-emitting part that emits a third color, wherein each of the plurality of the above LED stacks has a short passage formed in a portion of the area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, wherein the first light-emitting part emits red light, and the width of the short passage is formed to correspond to the width of the light-emitting part so that the light-emitting part of the color that each of the above LED stacks does not emit can be removed, and the first LED stack includes only the first light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part. A vertically stacked microdisplay panel having a short passage formed continuously below the first light-emitting part, the second LED stack including only the second light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part, and having the short passage formed above and below the second light-emitting part respectively, the third LED stack including only the third light-emitting part among the first light-emitting part, the second light-emitting part, and the short passage formed continuously above the third light-emitting part, and the short passage formed in the third LED stack and the short passage formed above the second light-emitting part in the second LED stack are formed of a material having optically transparent and electrically conductive material. Claim 2 delete Claim 3 A vertically stacked microdisplay panel according to claim 1, wherein the common electrode is a cathode or an anode. Claim 4 A preparation step of preparing a plurality of front wafers including a support wafer and a light-emitting part, and a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a stacking step of vertically stacking a plurality of light-emitting parts on a support wafer by repeating the process of bonding another front wafer onto one front wafer through a bonding layer and then removing the support wafer of the other front wafer; a first processing step of forming a short passage in a partial area from one side of the stacked plurality of light-emitting parts; a bonding step of bonding the stacked plurality of light-emitting parts to the back wafer and then removing the support wafer to stack a plurality of light-emitting parts on the back wafer; a second processing step of forming a short passage in a partial area from the other side of the stacked plurality of light-emitting parts; and an etching step of etching the stacked plurality of light-emitting parts to separate them into preset units, thereby aligning a plurality of LED stacks on each of the plurality of CMOS electrode pads.The method includes a forming step of forming a common electrode on a plurality of the above LED stacks, wherein the plurality of the above LED stacks includes a first LED stack including a first light-emitting part that emits a first color, a second LED stack including a second light-emitting part that emits a second color, and a third LED stack including a third light-emitting part that emits a third color, wherein each of the plurality of the above LED stacks has a short passage formed in a portion of the area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, wherein the first light-emitting part emits red light, and the width of the short passage is formed to correspond to the width of the light-emitting part so that the light-emitting part of the color that the respective LED stack does not emit can be removed, and the first LED stack is, among the first light-emitting part, the second light-emitting part, and the third light-emitting part, the first A method for manufacturing a vertically stacked microdisplay panel, wherein the first LED stack comprises only a light-emitting part, and the short passage is continuously formed below the first light-emitting part; the second LED stack comprises only the second light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part, and the short passage is formed above and below the second light-emitting part, respectively; the third LED stack comprises only the third light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part, and the short passage is continuously formed above the third light-emitting part; and the short passage formed in the third LED stack and the short passage formed above the second light-emitting part in the second LED stack are formed of a material having optical transparency and electrical conductivity. Claim 5 delete Claim 6 A method for manufacturing a vertically stacked microdisplay panel, wherein, in claim 4, the common electrode is a cathode. Claim 7 A preparation step of preparing a plurality of front wafers including a support wafer and a light-emitting part, and a back wafer having a plurality of CMOS electrode pads aligned on its upper surface; a stacking step of vertically stacking a plurality of light-emitting parts on a support wafer by repeating the process of bonding another front wafer onto one front wafer through a bonding layer and then removing the support wafer of the other front wafer; a first processing step of forming a short passage in a partial area from one side of the stacked plurality of light-emitting parts; a second processing step of forming a short passage in a partial area from the other side of the stacked plurality of light-emitting parts; a bonding step of bonding the stacked plurality of light-emitting parts to the back wafer and then removing the support wafer to stack a plurality of light-emitting parts on the back wafer; and an etching step of etching the stacked plurality of light-emitting parts to separate them into preset units so that a plurality of LED stacks are each aligned on a plurality of CMOS electrode pads.The method includes a forming step of forming a common electrode on a plurality of the above LED stacks, wherein the plurality of the above LED stacks includes a first LED stack including a first light-emitting part that emits a first color, a second LED stack including a second light-emitting part that emits a second color, and a third LED stack including a third light-emitting part that emits a third color, wherein each of the plurality of the above LED stacks has a short passage formed in a portion of the area so that current is passed to the light-emitting part where the short passage is not formed, thereby emitting only a specific color, wherein the first light-emitting part of the first LED stack is located above the second light-emitting part of the second LED stack and the third light-emitting part of the third LED stack, wherein the first light-emitting part emits red light, and the width of the short passage is formed to correspond to the width of the light-emitting part so that the light-emitting part of the color that the respective LED stack does not emit can be removed, and the first LED stack is, among the first light-emitting part, the second light-emitting part, and the third light-emitting part, the first A method for manufacturing a vertically stacked microdisplay panel, wherein the first LED stack comprises only a light-emitting part, and the short passage is continuously formed below the first light-emitting part; the second LED stack comprises only the second light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part, and the short passage is formed above and below the second light-emitting part, respectively; the third LED stack comprises only the third light-emitting part among the first light-emitting part, the second light-emitting part, and the third light-emitting part, and the short passage is continuously formed above the third light-emitting part; and the short passage formed in the third LED stack and the short passage formed above the second light-emitting part in the second LED stack are formed of a material having optical transparency and electrical conductivity. Claim 8 delete Claim 9 A method for manufacturing a vertically stacked microdisplay panel, wherein, in claim 7, the common electrode is an anode.

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