Adaptive loop-optimized battery impedance and open-circuit voltage measuring apparatus

Abstract

The present invention relates to a measuring device and method for measuring the impedance and open-circuit voltage of a battery, wherein current and voltage paths are selectively configured according to the size or terminal position of the battery to minimize the loop area, thereby reducing the influence of disturbances and parasitic components. Since an optimal path is formed using a plurality of segmented paths and a switching unit, batteries of various shapes can be measured with high precision and high reproducibility.

Description

Technology Field

[0001] The present invention relates to the field of secondary battery inspection technology and concerns an adaptive loop optimization device and method for measuring secondary battery impedance and open-circuit voltage that suppresses the loop area formed by the current supply path and the voltage sensing path, minimizes the influence of electromagnetic interference and parasitic components, and enables stable and reproducible measurements even when the battery type is changed, even if one or more of the cell size, terminal position, and shape differ from one another. Background Technology

[0002] Internal resistance (impedance) and open-circuit voltage (OCV) of secondary batteries are critical electrical characteristics for determining cell performance, degradation, and safety. Accordingly, various test devices are widely used in battery manufacturing and quality inspection processes to reliably measure these electrical characteristics. In this regard, conventional impedance or open-circuit voltage measuring devices include a current supply path to apply current to the secondary battery under measurement and a voltage sensing path to measure the voltage across the cell terminals; these paths are generally configured with a fixed wiring structure within the device. Since such fixed wiring structures are often designed based on battery cells of specific specifications, a certain degree of measurement stability can be ensured in environments where cells of the same dimensions are repeatedly tested. However, in actual industrial settings, battery cell sizes, distances between terminals, tab positions, and terminal shapes vary depending on the product type or application field. Furthermore, even within the same manufacturer, it is frequently necessary to continuously test cells of different generations or performance grades on a single piece of equipment. As the number of cells to be measured increases, the paths of current and voltage flow paths reaching the cell terminals vary for each cell within a fixed wiring structure. Consequently, the increase in flow path length or the distance between wires inevitably leads to the formation of wide closed loops. When current and voltage flow paths form wide loops, electromagnetic interference (EMI) or induced voltages generated by surrounding equipment, such as switching elements, motors, and metal frames, directly affect the flow paths. Particularly during the measurement of minute internal resistances of a few microohms (mΩ) or less, such disturbances manifest as fluctuations in measurement values, increased errors, and reduced reproducibility. Furthermore, as flow paths lengthen, parasitic inductance and capacitance increase, which can lead to signal distortion or phase errors in impedance measurements using high-frequency components.

[0003] In addition, because the shapes and terminal arrangements of battery cells differ, conventional measuring devices face the inconvenience of having to replace fixtures or jigs to match the cell shape whenever the cell type changes, in order to secure the cell or ensure terminal contact. This not only hinders work efficiency on the manufacturing line but also increases fixture manufacturing costs, setup time, and the possibility of human error due to wiring relocation.

[0004] Therefore, there is a need for a measurement device with a new structure that suppresses the loop area formed by the current supply path and voltage sensing path, minimizes the influence of electromagnetic interference and parasitic components, and enables stable and reproducible measurements even when the battery type is changed, even if one or more of the cell size, terminal position, and shape differ from one another. Prior art literature

[0005] Republic of Korea Patent Publication No. 10-2023-0073141 The problem to be solved

[0006] An adaptive loop optimization device for measuring secondary battery impedance and open-circuit voltage according to one embodiment of the present invention aims to solve the following problems.

[0007] First, this invention aims to solve the problem in which the accuracy and reproducibility of impedance and open-circuit voltage measurements are degraded due to the significant influence of electromagnetic interference, parasitic inductance, and parasitic capacitance, which arises when current supply and voltage sensing paths are inevitably formed by a fixed wiring structure even when battery cell sizes, distances between terminals, and terminal shapes differ. This leads to increased path lengths or larger spacing between wires, forming wide closed loops.

[0008] In particular, whenever the type of battery cell to be measured changes, a fixture or jig matching the cell shape must be replaced, which causes problems such as increased line setup time, increased parts replacement costs, and reduced operational efficiency. Therefore, we aim to provide a loop optimization device that includes a flexible measurement structure capable of stable measurement within the same device even when the battery type changes.

[0009] Furthermore, in processes measuring very small internal resistances of a few microohms (mΩ) or less, disturbance effects resulting from changes in loop area or flow path configuration are sensitively reflected. Therefore, as a wiring path configuration method capable of structurally suppressing noise ingress and ensuring the stability of the measurement signal is required, we aim to provide a technical means that can always form a minimum loop and reduce the influence of parasitic components even under changes in the measurement environment.

[0010] In addition, we aim to provide a loop optimization device capable of ensuring the reliability of measurement values ​​by actively controlling the current and voltage paths according to measurement conditions, taking into account variations in parasitic inductance and parasitic capacitance that occur whenever loop formation, wiring length, and contact structure change.

[0011] Therefore, we aim to provide a loop optimization device capable of accurately and stably measuring impedance and open-circuit voltage while minimizing the closed-loop area and reducing the influence of electromagnetic interference and parasitic components by selectively configuring current and voltage paths, even if the shapes and terminal positions of secondary batteries differ. means of solving the problem

[0012] To solve the above-mentioned problem, a loop optimization device according to one embodiment of the present invention may include: (1) a current supply path segmented based on a plurality of nodes to apply current to the terminals of a secondary battery; (2) a voltage sensing path segmented based on a plurality of nodes at a position corresponding to the current supply path; (3) a switching unit including a solid-state relay (SSR), a MOSFET array, or a MEMS switch for individually turning on or off each segmented path segment; and (4) a control unit that receives information on the size, distance between terminals, or terminal coordinates of a secondary battery to be measured, calculates the centerline of each path segment based on the length, placement layer, distance between the two paths, and surrounding structure information for each segment of the current supply path and the voltage sensing path, defines the area of ​​the closed curve formed by the two centerlines as the loop area and calculates it, and controls the switching unit by selecting a path combination in which the sum of at least one of the loop area, parasitic inductance, and parasitic capacitance is minimized.

[0013] Preferably, each segment of the current supply channel is arranged in parallel with the corresponding voltage sensing channel segment on the same layer or an adjacent layer of the PCB, and the distance between the centerline of the current channel segment and the centerline of the voltage channel segment can be designed to be greater than or equal to a preset minimum value (Dmin) and less than or equal to a maximum value (Dmax) to prevent an increase in parasitic capacitance.

[0014] Preferably, the current supply path and the voltage sensing path share multiple nodes at the same coordinates or the same mechanical location, and the control unit can be configured such that the centerlines of the two paths form substantially the same spatial path by selecting the same combination of nodes in the voltage sensing path as the path between nodes selected in the current supply path.

[0015] Preferably, the control unit can calculate parasitic capacitance and parasitic inductance using a microstrip-based capacitance model or a loop-area-based inductance model, wherein for each segment of the current path and voltage path, at least one of the segment length, the distance between centerlines of the trace width, the placement layer, and the permittivity of the substrate is used as a parameter.

[0016] Preferably, the control unit may further include a correction operation function that removes the influence of the parasitic component from the voltage measurement value or impedance calculation value by applying parasitic inductance and parasitic capacitance values ​​corresponding to the selected Euro combination.

[0017] Preferably, the control unit may further include an interlocking mapping algorithm that selects a voltage sensing channel segment having the same or adjacent centerline path as the segment when a current supply channel segment combination is selected.

[0018] Preferably, the device further includes a database storing size, terminal coordinates, and arrangement information between terminals for multiple types of secondary battery models, and the control unit may include a function of calling a profile corresponding to the battery to be measured and applying an optimal path combination stored in the profile to the switching unit.

[0019] Meanwhile, another embodiment of the present invention provides a loop optimization method using the loop optimization device described above. Specifically, the method may include: (a) a providing step of providing a measuring device comprising segmented current supply paths and segmented voltage sensing paths; (b) an input step of receiving information on the size of a secondary battery to be measured, the distance between terminals, or terminal coordinates defined in a reference coordinate system; (c) a calculation step of calculating at least one of parasitic inductance and parasitic capacitance for each segment of the current supply path and the voltage sensing path, using at least one of the length of the segment, the placement layer, the distance between the segment centerlines, and the permittivity of the substrate as parameters; (d) a combination determination step of determining a path combination in which the area of ​​the closed curve formed by the current path centerline and the voltage path centerline (loop area) and the sum of the parasitic components are minimized based on the calculated values; (e) a blocking step of connecting only the segments included in the determined path combination through a switching unit and blocking the other segments; and (f) a voltage measurement step of applying current through the selected current path and measuring voltage through the selected voltage path.

[0020] Preferably, to minimize loops in current and voltage paths, the method may include at least one of the following steps: (i) configuring current segments and voltage segments as a 1:1 pair to maintain the centerline separation distance between a minimum value (Dmin) and a maximum value (Dmax); (ii) sharing the same node to select the same combination of nodes in the voltage path as well as in the current path; and (iii) selecting segment centerlines arranged in parallel on the same layer or adjacent layers of the PCB.

[0021] Preferably, the calculation step may further include a correction operation step for removing the influence of the parasitic component from the measured voltage or impedance calculation value using parasitic inductance and parasitic capacitance values ​​corresponding to the selected Euro combination.

[0022] Preferably, a combination determination step for determining a specific segment combination of a current supply path may include a reference step determined by referring to an interlocking mapping algorithm that selects a voltage sensing path segment having the same or adjacent centerline path as the segment.

[0023] Furthermore, the above method may include the step of calling a loop profile corresponding to the secondary battery to be measured from a database storing size, terminal coordinates, and terminal placement information for multiple types of secondary battery models, and applying the Euro segment combination stored in the profile as is to the switching unit.

[0024] Furthermore, the combination determination step may further include a re-selection step for verifying whether the separation distance between the current flow centerline and the voltage flow centerline satisfies a range of at least a minimum value (Dmin) and at least a maximum value (Dmax) over the entire path for the flow determined in the combination determination step, and re-selecting the flow combination if there exists a segment exceeding the range. Effects of the invention

[0025] A loop optimization device according to one embodiment of the present invention can structurally minimize the closed-loop area formed by the flow paths by electrically selecting and controlling the current supply path and the voltage sensing path according to the size, distance between terminals, or terminal shape of the secondary battery to be measured. Consequently, it can effectively suppress the effects of electromagnetic interference (EMI) introduced from the external environment, as well as parasitic inductance and parasitic capacitance caused by increased flow path length. Therefore, even in processes measuring minute internal resistances of a few mΩ or less, it is possible to obtain effects of increased accuracy and improved reproducibility.

[0026] In addition, since the optimal path can be automatically configured solely through switching control even if the shape, size, and terminal position of the battery cells differ, the work of replacing fixtures or reconfiguring wiring when changing cell types can be significantly reduced, which has the advantage of shortening production line setup time, improving work efficiency, and reducing fixture manufacturing and maintenance costs.

[0027] Furthermore, since the control unit can correct and reflect wiring lengths and parasitic components that change depending on the path selection, the stability and reliability of electrical signals measured under different conditions can be maximized. Additionally, because a suitable path can be selectively used according to the impedance measurement frequency, distortion is reduced in frequency response-based analysis (such as EIS).

[0028] Therefore, through the effects of minimizing loops in current and voltage paths, suppressing measurement disturbances, enhancing the ability to respond to dimensional changes, and improving operational efficiency, it offers the advantage of stably performing accurate and highly reliable impedance and open-circuit voltage measurements in various industrial fields, such as battery manufacturing processes, module and pack assembly processes, quality inspection, and reuse battery sorting processes. Brief explanation of the drawing

[0029] FIG. 1 is an explanatory diagram schematically illustrating an adaptive loop optimization apparatus and method for measuring secondary battery impedance and open-circuit voltage according to the present invention. Specific details for implementing the invention

[0030] The advantages and features of the present invention and the methods for achieving them will become clear by referring to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below but will be implemented in various different forms. The embodiments described herein are provided to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention. Furthermore, the present invention is defined only by the scope of the claims. Accordingly, in some embodiments, well-known components, well-known operations, and well-known techniques are not described in detail to avoid the present invention being interpreted ambiguously. Also, throughout the specification, the same reference numerals refer to the same components, and the terms used (mentioned) in this specification are for describing the embodiments and are not intended to limit the present invention. In this specification, the singular form includes the plural form unless specifically stated otherwise in the text, and components and operations referred to as 'comprising' (or 'comprising') do not exclude the presence or addition of one or more other components and operations. Unless otherwise defined, all terms used in this specification (including technical and scientific terms) may be used in a meaning commonly understood by those skilled in the art to which the present invention pertains. Additionally, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless otherwise defined.

[0031] The present invention will be described in detail below with reference to the attached drawings.

[0032] As described above, an adaptive loop optimization device for measuring the impedance or open-circuit voltage of a secondary battery according to an embodiment of the present invention may include a current supply path segmented based on a plurality of nodes to apply current to the terminals of the secondary battery, a voltage sensing path segmented based on a plurality of nodes at a position corresponding to the current supply path, a switching unit including any one of a solid-state relay (SSR), a MOSFET array, or a MEMS switch for individually turning on or off each segmented path segment, and a control unit that receives information on the size, distance between terminals, or terminal coordinates of the secondary battery to be measured, calculates the centerline of each path segment based on the length, placement layer, distance between the two paths, and surrounding structure information for each segment of the current supply path and the voltage sensing path, defines the area of ​​the closed curve formed by the two centerlines as the loop area and calculates it, and controls the switching unit by selecting a path combination in which the sum of at least one of the loop area, parasitic inductance, and parasitic capacitance is minimized. In this regard, the aforementioned centerline can be defined as a line defined based on the vertical center of the trace width. Specifically, the centerline is a virtual line defined along the center in the width direction of copper traces formed on a printed circuit board, such as current supply paths and voltage sensing paths; it serves as a reference line representing the spatial path of the current supply path or voltage sensing path and is used when calculating loop area, separation distance (Dmin, Dmax), parasitic inductance, and capacitance. For reference, the meaning that the centerlines form substantially the same path does not imply that the traces are physically completely overlapping or duplicated, but rather refers to a case where the traces themselves are separated yet the path of the centerline is spatially identical. It signifies a case where the layers are different (or adjacent) and physically separated, but the path is identical upon planar projection, and can be said to mean a path in substantially the same space.Therefore, when center lines are close but not identical, a distance exists between the center lines, resulting in a loop area; in this case, it can be managed using a separation distance (Dmin~Dmax) as in the present invention.

[0033] Specifically, the adaptive loop optimization device according to the present invention is configured by segmenting the current supply path and the voltage sensing path into multiple segments to minimize errors caused by an increase in loop area and parasitic components that occur when measuring the impedance or open-circuit voltage of a secondary battery, and is designed to adaptively respond to the physical shape of the secondary battery to be measured. To this end, the device first provides a current supply path for applying current to the terminals of the secondary battery, wherein the current supply path may be composed of multiple segments partitioned based on multiple nodes on a printed circuit board (PCB) within the device. Each segment is defined by the start node and end node of the corresponding segment, and may be formed so that the length, width, thickness, and placement layer of traces such as the current supply path and the voltage sensing path can be independently set. Through this segment structure, the current supply path has structural flexibility that allows the path to be flexibly reconfigured according to the terminal location, distance between terminals, or shape of the battery. Therefore, if there are sections functionally divided based on nodes within a single path, such that the interval (segment) between nodes, which serves as the reference point for electrical connection and disconnection, is composed of partitioned segments, then it is possible to configure the path to match the same node combination as the voltage sensing path by selectively connecting or disconnecting only specific sections through a switching unit, such as bypassing, shortening, or selecting only specific layers. In this case, if the centerlines are identical, the loop area theoretically converges to zero, but physically, it means that it becomes the most optimal minimum value rather than zero; that is, it signifies a state in which the loop area formed by the centerline of the current supply path and the centerline of the voltage sensing path practically converges to the minimum value.

[0034] The voltage sensing path is also positioned at a location corresponding to the current supply path and can likewise be composed of segments segmented based on multiple nodes. Each segment of the voltage sensing path is designed to acquire the battery terminal voltage with high precision in the corresponding section and is formed at a corresponding location on the same layer or an adjacent layer, taking into account the relative positional relationship with the current supply path. This configuration minimizes the centerline separation between the current path and the voltage path, thereby preventing the area of ​​the closed curve formed by the two paths—that is, the loop area—from increasing unnecessarily.

[0035] At this time, each segment is not fixed in itself but can be connected by a switching unit so that it can be individually selected. The switching unit may be configured to include at least one of a solid-state relay (SSR), a MOSFET array, or a MEMS switch, and may be arranged in series between the start node and the end node of each segment to perform the function of conducting or not conducting a specific segment. For example, the switching unit may be arranged in series between the nodes of each segment of the current supply path and the voltage sensing path to selectively conduct or block the corresponding segment. By controlling this switching unit, the control unit selects the segments to be included in the current supply path and the segments not to be included in the voltage sensing path in an on / off manner. Accordingly, the device is able to select the optimal route of area among a plurality of segments to apply current to the battery terminal and sense the voltage.

[0036] In particular, the control unit receives geometric information such as the size of the secondary battery under measurement, the distance between terminals, and terminal coordinates, and performs the function of evaluating segment combinations based on this information. For each segment of the current supply path and voltage sensing path, the control unit calculates the centerline coordinates of each segment by considering physical characteristics such as trace length, placement layer, distance between centerlines, and surrounding structures. At this time, the centerline is defined as the coordinates corresponding to the exact midpoint of the two edges based on the trace width, and is stored as a continuous set of coordinates across the entire segment.

[0037] Using the coordinates of the current and voltage centerlines calculated in this manner, the area of ​​the closed curve formed by the two centerlines is defined as the loop area, and the control unit quantitatively calculates the loop area of ​​each possible path combination by applying a polygon area calculation algorithm. Additionally, the control unit calculates or evaluates parasitic inductance and parasitic capacitance values ​​based on the spacing between segments and the layer structure to search for a combination in which both the loop area and parasitic components are minimized.

[0038] Finally, the control unit selects a segment combination in which at least one value among the loop area, parasitic inductance, and parasitic capacitance is minimized according to the evaluation result, and outputs a control signal corresponding to the switching unit to ensure that only the selected segment is connected. With such a configuration, the adaptive loop optimization device for measuring secondary battery impedance and open-circuit voltage according to an embodiment of the present invention can always form optimal loop conditions for secondary batteries having various sizes and terminal arrangements to perform current application and voltage measurement, and through this structure, the accuracy of impedance measurement and open-circuit voltage measurement can be maximized. At this time, the control unit is positioned at a location electrically separated from the current supply path and the voltage sensing path, and can control the connection so that only the selected path segment is connected by providing a control signal to the switching unit.

[0039] In this regard, even if the loop area is minimized because the centerlines are identical, as long as the two traces are two conductors (current supply path trace and voltage sensing path trace) located close to each other, an electric field is formed by the dielectric (PCB substrate), and as a result, parasitic capacitance inevitably exists. That is, while the loop area is minimized when the centerlines of the current supply path and the voltage sensing path form substantially the same spatial path, as long as the two paths exist as adjacent conductors, an electric field mediated by the substrate dielectric is formed and parasitic capacitance remains. Therefore, if the separation distance (Dmin, Dmax) is calculated and exceeds the allowable range, an adaptive function can be implemented to combine other segments or enable the correction operation described later.

[0040] In other words, the current supply path is formed by segmenting the path for applying current to the terminals of a secondary battery based on multiple nodes, thereby allowing the physical path to which current is applied to be selected rather than fixed as a single path. This segmented structure provides a structural basis for flexibly changing the current application path to suit the battery, even if the terminal position or size of the secondary battery being measured changes. Based on this segmented structure of the current supply path, the aforementioned voltage sensing path is formed by segmenting based on the same nodes at a location corresponding to the current supply path. Accordingly, the voltage sensing path is not positioned independently of the current supply path, but rather has a spatially corresponding relationship with each segment of the current supply path, and has a structure in which the voltage measurement path can also be defined together depending on the selection of the current application path. That is, by the current supply path and the voltage supply path sharing the same node system, a prerequisite is formed for the current path and the voltage path to be interconnected. In a state where the current supply path and the voltage sensing path are separated as described above, a means is required to determine which segment to use during actual measurement and to physically implement this. To this end, the aforementioned switching unit can be configured to individually turn each separated path segment on or off. By selectively connecting only specific segments through the switching unit, the current supply path and the voltage sensing path do not remain merely in a structurally separated state, but can be dynamically configured into paths suitable for actual measurement conditions.

[0041] Based on this selectable structure, the control unit of component (4) receives information regarding the size of the secondary battery to be measured, the distance between terminals, or the terminal coordinates, and comprehensively evaluates the physical and electrical characteristics of each segment of the current supply path and the voltage sensing path. The control unit calculates a centerline based on the length of each segment, the arrangement layer, the distance between the two paths, and surrounding structure information, and defines the area of ​​the closed curve formed by the centerlines of the current path and the voltage path as the loop area, thereby quantitatively reflecting the parasitic inductance and parasitic capacitance occurring in the measurement path.

[0042] As a result, the control unit determines a path combination in which the sum of at least one of the loop area, parasitic inductance, and parasitic capacitance is minimized, and controls the switching unit so that the path combination is actually implemented. Accordingly, the segmented structure formed in (1), the corresponding arrangement in (2), the selection execution means through (3), and the quantitative evaluation and control of (4) are organically combined, thereby implementing an adaptive loop optimization device capable of measuring impedance or open-circuit voltage under minimum loop conditions even if the shape or terminal position of the secondary battery changes.

[0043] Preferably, each segment of the current supply channel is arranged in parallel with a corresponding voltage sensing channel segment on the same layer or an adjacent layer of the PCB, and the distance between the centerline of the current channel segment and the centerline of the voltage channel segment can be designed to be greater than or equal to a preset minimum value (Dmin) and less than or equal to a maximum value (Dmax) to prevent an increase in parasitic capacitance.

[0044] Specifically, when designing the wiring structure of each segment of the current supply path on a printed circuit board (PCB), it is positioned at a location corresponding to the segment of the voltage sensing path, and the two paths can be formed to form a substantially parallel structure on the same layer or adjacent layers. Here, a parallel structure means an arrangement in which the current supply path segment and the corresponding voltage sensing path segment have the same or similar direction of travel, and the starting and ending points of the segments extend side by side within a geometrically corresponding position range. That is, if a specific current segment extends from node A to node B, the corresponding voltage segment is formed to connect the same pair of nodes or a pair of nodes adjacent to the same node, so that the entire path of the two segments follows each other and is arranged in parallel.

[0045] At this time, each of the current supply channel segment and the voltage sensing channel segment is implemented as a trace having a predetermined width, and a line connecting the exact centers of both edges based on the width of each trace can be defined as the centerline of the corresponding segment. In the actual field, a CAD system in the control unit or design stage can calculate the distance between the current segment and the voltage segment based on the coordinates of this centerline, and in the present invention, this distance between the centerlines is referred to as the centerline separation distance (D). Since the said D can directly affect the electrical coupling state between the current channel and the voltage channel, particularly the magnitude of parasitic capacitance, the wiring structure can be set to limit D within a certain range.

[0046] Specifically, it is desirable that the above D be greater than or equal to a preset minimum value (Dmin) and less than or equal to a maximum value (Dmax) to prevent an increase in parasitic capacitance. Here, Dmin is a lower limit value intended to prevent the phenomenon in which a minute voltage signal flowing through the voltage sensing path is distorted by changes in the current of the current path, which occurs when the voltage sensing path is excessively close to the current supply path and the parasitic capacitance formed between the traces increases excessively. For example, considering the dielectric constant of the substrate, trace width, and expected measurement frequency band, if the separation distance between the two paths narrows below a certain value, a significant coupling voltage may be induced in the voltage line due to high-frequency components or sudden changes in current; to avoid such a situation, Dmin may be set based on experimental values ​​or simulation results. Conversely, Dmax is set as an upper limit value to prevent an increase in induced noise caused by changes in the external magnetic field, which occurs when the centerline of the current supply path and the centerline of the voltage sensing path become excessively far apart, thereby unnecessarily increasing the loop area, which is the area of ​​the closed curve formed by the two centerlines.

[0047] Accordingly, as the two flow paths move further apart, the loop area increases in nearly proportion to D; as the loop area grows, the noise voltage induced in the measurement circuit by current changes around the battery or magnetic fields generated by nearby power lines or other devices increases. Therefore, to ensure the loop area does not exceed a pre-allowed range, the upper limit of the separation distance between the two centerlines is set to Dmax, allowing control to be exercised so that D always does not exceed Dmax during wiring design and flow path combination selection.

[0048] At this time, for each segment of the current supply path and the segment of the voltage sensing path corresponding to each segment, the coordinates of each centerline can be extracted on a PCB design tool, and it can be verified whether the distance between centerlines over the entire length of the segment is maintained within a range of Dmin or greater and Dmax or less. If the distance between centerlines becomes less than Dmin or exceeds Dmax in a specific section, the distance can be adjusted by methods such as modifying the placement path of the segment or moving a portion to an adjacent layer. Therefore, even when the control unit selects a segment combination, only combinations in which D satisfies the above range among the selectable combinations are treated as valid candidates, thereby ensuring that the current path and voltage path always maintain a stable parallel structure and an appropriate separation state.

[0049] With such a configuration, the adaptive loop optimization device according to the present invention can prevent voltage measurement signal distortion caused by an increase in parasitic capacitance and suppress disturbance-induced noise caused by an increase in loop area by mathematically defining D, which is a separation distance based on a centerline, rather than simply arbitrarily placing the current supply path and the voltage sensing path adjacently on a PCB, and controlling D to satisfy the range of Dmin to Dmax. Through this, even when measuring secondary batteries with various battery sizes and terminal arrangements, the current path and the voltage path can always maintain an optimal state that is physically parallel and electrically stable, and measurement values ​​of impedance and open-circuit voltage can be secured with high precision.

[0050] In addition, the current supply path and the voltage sensing path may be formed in a structure that shares multiple nodes placed on the PCB. This node-sharing structure enables the current path and the voltage path to form the same path combination according to the location and shape of the battery terminal, thereby causing the two paths to follow the same geometric trajectory. Here, a node is an electrical connection point where a path segment begins or ends, and may include a metal pad, a via, or a combined form of a pad and a via formed at a specific coordinate (x, y) location on the PCB. In a path structure according to one embodiment of the present invention, the current path and the voltage path are each structured to have the same node at the same location, so that the paths of the two paths can be formed based on the same node sequence. That is, if there is a path selected in the current path such as 'Node A → Node B → Node C', the voltage path can also be configured to select a corresponding segment following the same 'A → B → C' sequence.

[0051] To this end, each voltage flow channel segment may be designed to have the same start and end nodes as the corresponding segment of the current flow channel, or correspondence may be ensured by sharing at least nodes within a predetermined distance range adjacent to said nodes. In this case, adjacent nodes may refer to nodes of the voltage flow channel located within a range that does not exceed a preset distance from said node, even if they do not share the same node coordinates. For example, this includes distances of 1 mm or less on the PCB, or the Z-axis distance during layer switching.

[0052] As described above, a structure that aligns the current flow path and the voltage flow path in a node-based manner differs from conventional technology in that it ensures the entire trajectory of the flow path maintains the same shape, rather than simply arranging the two flow paths in parallel. In other words, since the entire path from the starting point to the ending point follows the same node arrangement, rather than only a portion of a specific segment being parallel, the centerlines of the two flow paths also trace substantially the same trajectory over the entire path length. According to this node-based synchronization arrangement method, as the current flow path and the voltage flow path are configured along the same node arrangement, the area of ​​the closed curve (loop area) formed by the two flow paths can be kept uniformly small throughout the entire path. Generally, the loop area increases sharply if the two flow paths diverge at any point along the path; however, according to the configuration described above, this loop non-uniformity can be fundamentally eliminated, thereby significantly suppressing noise voltage induced by an external magnetic field.

[0053] In addition, as the current segment and the voltage segment share the same node, the relative position error between the two channels is eliminated. Therefore, in general, non-uniform spacing or position errors are major causes of distortion in small voltage signals in battery measurement systems, but the node-sharing structure described above can fundamentally eliminate these errors and significantly improve voltage measurement accuracy.

[0054] Furthermore, when the control unit selects a segment, if a specific node combination is selected in the current path, the same node combination can be selected in the voltage path; thus, the matching of the current path and the voltage path can be significantly simplified from a control perspective. In other words, the control unit can simultaneously configure the matched paths of the current and voltage paths simply by selecting the node arrangement, thereby simplifying the control algorithm and reducing the possibility of errors to implement high-quality technology. Additionally, the node sharing method can significantly improve responsiveness to various battery models. Therefore, even when the battery shape and terminal location vary significantly, if the path segments are subdivided based on nodes, the control unit can configure the current and voltage paths by selecting the node arrangement path closest to the corresponding battery terminal location. This offers the advantage of high versatility, allowing a single wiring structure to accommodate various battery types.

[0055] Meanwhile, in order to accurately calculate the parasitic capacitance and parasitic inductance occurring in the respective segments of the current supply path and voltage sensing path, the control unit may be configured to use a microstrip-based capacitance model or a loop area-based inductance model. This step is intended to quantify electromagnetic interactions that are difficult to accurately determine through simple distance or length comparisons, due to the self-evident fact that various design elements, such as conductor shape, placement layer, spacing between conductors, and substrate permittivity, can directly affect the degree of electrical coupling when current and voltage paths are actually formed on the PCB.

[0056] Specifically, the current path and the voltage path are each divided into several segments, and each segment has a centerline defined by connecting the center of the conductor width. At this time, the control unit first identifies the length of the segment, the distance between centerlines, and the type of layer on which the conductor is placed based on the centerline coordinates of each segment, and can calculate the parasitic capacitance by considering the dielectric constant and thickness information of the substrate together. More specifically, when two conductors are placed side by side on a PCB, these two conductors form a natural electrostatic coupling with the substrate as the medium, and the capacitance formed at this time increases as the distance between centerlines (D) decreases, increases as the length of the segment increases, and increases as the dielectric constant (εr) of the substrate beneath the conductor increases. Therefore, to reflect these patterns, the control unit calculates the capacitance of each segment by applying an approximation model widely used in microstrip line theory. In cases where the total length of the segment is not constant or the separation distance varies partially, the segment can be divided into smaller sections to calculate the capacitance for each section individually, and then the total value can be calculated by integrating or summing them. This method enables accurate evaluation of capacitance even when the current and voltage paths are not simple linear structures.

[0057] The aforementioned parasitic inductance is a value that arises because the magnetic field formed around a current-carrying conductor affects the segments differently depending on their spatial arrangement; generally, it exhibits the characteristic of increasing as the loop area increases. Accordingly, the control unit calculates the loop area by determining the closed curve formed by the centerlines of the current path and the voltage path, and then inputs this area into a parasitic inductance calculation model to determine the inductance of the segment or the entire path. To achieve this, a closed curve is constructed using centerline coordinates, and the loop area is precisely calculated by applying a geometric area calculation algorithm such as the Shoelace formula. Subsequently, the inductance is calculated by applying a classical loop inductance model based on this area. In this process, the control unit considers the curvature of the segments, changes in direction, and variations in the relative position between layers to calculate an inductance value that reflects the actual degree of magnetic flux coupling.

[0058] The process of calculating such parasitic capacitance and parasitic inductance is not merely a calculation of reference values, but rather data that is directly reflected in the predefined path optimization function. Therefore, the control unit evaluates the electrical stability of each current path and voltage path combination based on the calculated parasitic component values, and determines which segment combination is the most stable by comprehensively comparing the size of the loop area, capacitance, and inductance. As a result, only the selected path is activated through the switching unit, and the unselected path is blocked, thereby allowing the current applied to the actual battery terminals and the measured voltage to be transmitted while minimizing the influence of parasitic components.

[0059] Therefore, unlike conventional methods that simply compare the physical lengths or shapes of current and voltage paths, this approach evaluates the path by quantitatively reflecting the actual electromagnetic characteristics of the PCB conductors, thereby accurately predicting parasitic components and selecting the optimal path based on this. Furthermore, this calculation model possesses universality, allowing it to be applied regardless of variations in battery size, terminal layout, or PCB design structure. Consequently, it offers the advantage of providing consistent and highly reproducible measurement quality across various secondary battery models.

[0060] Meanwhile, the control unit may further include a correction operation function that removes the influence of the parasitic component from the voltage measurement value or impedance calculation value by applying parasitic inductance and parasitic capacitance values ​​corresponding to the selected Euro combination.

[0061] In addition to using the aforementioned calculated parasitic inductance and capacitance values ​​as criteria for path selection, the control unit is enabled to perform calculation functions to correct the influence of these parasitic components on actual voltage measurements or impedance calculations. This is intended to address the problem that residual parasitic components, which cannot be completely eliminated due to electromagnetic characteristics even when the current supply and voltage sensing paths are optimally configured, can cause distortion in the actual measurement values ​​of the battery. In particular, since battery impedance measurement often involves high-precision processes down to very small values ​​in the order of a few mΩ, even minute deviations in parasitic components can cause significant errors in the actual measurements; therefore, measurement accuracy can be maximized through this correction function.

[0062] In this regard, parasitic inductance generates an induced voltage proportional to the change in current (di / dt); particularly during impedance measurement or pulse current application, unnecessary components are added to the measured voltage, which can cause the measured voltage value to be larger than the actual value or distorted. In the case of parasitic capacitance, charge accumulation and discharge occur in response to the change in voltage (dv / dt), and current is coupled and flows into the voltage sensing path; consequently, the influence of high-frequency components can be amplified, potentially causing the voltage waveform to be delayed, smoothed, or distorted. Therefore, it is necessary to reduce measurement errors in impedance and open-circuit voltage, and it is desirable to select a path that minimizes the contribution of the total error. Consequently, correction can be achieved in a rational manner by reducing only the inductance, only the capacitance, or both within an appropriate range through the sum of the two. In this case, since the influence of inductance is significant at low frequencies and the influence of capacitance is greater at high frequencies, the control unit can determine the path combination to minimize the total influence on measurement accuracy by evaluating parasitic inductance and parasitic capacitance individually or integrally depending on the situation. Accordingly, the control unit can select a path combination to minimize the total influence on measurement error by using at least one of parasitic inductance and parasitic capacitance, or their sum, along with the loop area as an evaluation criterion.

[0063] To this end, the control unit first stores the values ​​of parasitic inductance (Lp) and parasitic capacitance (Cp) calculated by the method described above in internal memory, and when a selected path combination is determined, it can integrally obtain the total parasitic inductance value (Lp_total) and total parasitic capacitance value (Cp_total) corresponding to that path combination. These values ​​are affected by the actual measured values ​​due to current variation, voltage variation, frequency characteristics, etc., and the control unit can perform correction by mathematically separating and eliminating each influencing factor.

[0064] The aforementioned parasitic inductance generates an induced voltage (L * di / dt) proportional to the time rate of change of current (di / dt). This induced voltage is directly included in the voltage measured at the battery terminals, which can result in a measured value higher than the actual battery voltage. Therefore, the control unit can restore a signal identical in form to the actual battery terminal voltage by collecting the current waveform in real time during the measurement process, differentiating it to calculate the di / dt value, multiplying it by Lp_total to calculate the induced voltage term, and subtracting this value from the measured voltage value.

[0065] The error caused by the parasitic capacitance mentioned above appears in the form of a bypass current (C * dv / dt) proportional to the time rate of change of voltage (dv / dt). If Cp_total, which exists between the voltage sensing path and the current path, is large, the current that should flow from the battery is partially bypassed through Cp_total, and consequently, the measured impedance value may be calculated to be smaller than the actual value. To address this, the control unit obtains dv / dt by differentiating the measured voltage waveform over time and quantitatively calculates the bypass current value by multiplying it by Cp_total. Then, by subtracting this bypass current from the total measured current, the effective current value flowing through the battery can be reconstructed. Subsequently, the control unit can calculate the impedance (Z_true = V_true / I_true) using the corrected voltage (V_true) and the corrected current (I_true).

[0066] Unlike simple signal processing methods such as filtering or averaging, this correction process accurately and mathematically eliminates physically existing parasitic components based on an equivalent model of the electrical circuit; therefore, it does not distort the inherent reaction characteristics of the battery included in the measurement signal. For example, when analyzing chemical reactions or diffusion resistance components occurring within the battery in a specific frequency range, the presence of residual parasitic capacitance can cause the overall phase of the data to shift, making analysis impossible. However, the aforementioned correction function eliminates such signal distortion, effectively enabling the accurate extraction of only the inherent battery response.

[0067] Furthermore, the correction process based on the aforementioned method can respond to variations in the measurement environment. Specifically, even if a specific segment of the current or voltage path deteriorates due to long-term use, or if the substrate characteristics of the PCB change slightly due to temperature fluctuations, the control unit can calculate new Lp_total and Cp_total values ​​for every measurement and apply the latest correction results at that moment. This has the advantage of allowing for immediate response to the measurement environment by applying optimized correction calculations rather than treating parasitic components as fixed values ​​for correction. Therefore, reliable measurement results can be maintained over a long period, even in environments requiring high stability and reproducibility, such as production lines.

[0068] In other words, the path can be determined by minimizing parasitic components through the correction operation function of the control unit, and error factors in voltage or impedance measurements can be structurally eliminated through a dual safety device that combines two processes of computationally removing remaining parasitic components.

[0069] Furthermore, the control unit may further include an interlocking mapping algorithm that selects a voltage sensing channel segment having the same or adjacent centerline path as the segment when a current supply channel segment combination is selected.

[0070] Specifically, the configuration may include a control unit that incorporates a linkage mapping algorithm, wherein the current supply path and the voltage sensing path are not simply selected independently, but the voltage path is automatically linked and selected based on the result of selecting the current path. Since the current path and the voltage path must always be placed along a spatially close path to minimize the loop area, this configuration can practically reflect how the measurement path should be configured on the actual PCB through the linkage mapping algorithm.

[0071] Specifically, both the current supply path and the voltage sensing path are composed of multiple segments, and each segment possesses specific coordinates, mechanical position, centerline path, and layer information. The path segment selected to apply current may vary depending on the battery terminal position or size information; when specific current segments are selected, the voltage sensing path segment located closest to them must also be selected to reduce the loop area and minimize the influence of parasitic components. However, since the current path and the voltage path do not necessarily have the same positional relationship, calculating the voltage path combination separately after the current path has been selected can cause the loop to grow irregularly. To solve this problem, an interlocking mapping algorithm can be used to automatically determine how the voltage path will be selected during the current path selection stage.

[0072] This algorithm may first include a mapping table that matches the voltage sensing channel segment closest to each segment of the current supply channel. The mapping table can predefine which voltage segment is the optimal match for a specific current segment by considering factors such as the distance between the centerlines of each current segment and the centerline of the voltage segment, the layer where the two segments are located, the arrangement direction, and the congestion of surrounding conductors; alternatively, it can be generated by the control unit's algorithm through real-time calculation. For example, when the i-th segment of the current channel is selected, the algorithm automatically selects the voltage channel segment that is closest to the centerline of that segment and satisfies the conditions Dmin to Dmax. In this case, the algorithm does not simply select the closest single segment in a one-to-one correspondence, but may also consider path continuity so that the entire path of the current segment and the entire path of the voltage segment form a similar overall shape. In other words, instead of matching based on only a single segment, it selects a combination where the voltage segment can also be continuously connected to match the continuous path of the selected current segment.

[0073] This coupled mapping algorithm can also consider the curvature of the centerline path between segments, the placement angle of the segments, and the possibility of intersection between current and voltage conductors. Specifically, since matching the voltage sensing path to follow the same mechanical curved path when the current path changes from a straight path to a curved path is necessary to prevent an increase in loop area, the algorithm analyzes the forward / backward direction of the current segment, angle changes in the segment path, and whether layers have shifted to select segments that ensure the voltage path follows the exact same mechanical path as much as possible. Therefore, through this coupled mapping algorithm, the problem that occurred in conventional systems—where the current path takes a short route while the voltage path takes a different route, leading to large gaps between conductors and a massive increase in loop area—can be resolved.

[0074] In addition, the coupled mapping algorithm can be configured to be closely linked to the actual switching operation. When the control unit selects a current segment and turns on the selected switch, either an SSR or a MOSFET, the algorithm can immediately perform switching of the voltage segment with the same or adjacent path. This configures the control unit to operate the switching as an integrated structure of current selection, automatic voltage selection, and switching execution, thereby maximizing measurement reliability. In particular, through the function of the algorithm automatically synchronizing the switching timing of the two paths, it is possible to block noise generated during the current switching process from being transmitted to the voltage sensing path in measurements that are affected by highly sensitive noise, such as open-circuit voltage measurements.

[0075] Therefore, the operation ensures that the segment selection of the current supply path is directly reflected in the segment selection of the voltage sensing path, thereby allowing the two paths to always maintain identical or mechanically adjacent centerline paths. Through this structure, the loop area can be minimized, the influence of parasitic components reduced, and phase and magnitude distortion of the measurement signal prevented, thereby enabling the stable maintenance of the high-precision environment required for battery impedance and open-circuit voltage measurements.

[0076] Meanwhile, the above device further includes a database storing size, terminal coordinates, and arrangement information between terminals for multiple types of secondary battery models, and the control unit can further optimize the adaptive loop by including a function to call a profile corresponding to the battery to be measured and apply the optimal path combination stored in the profile to the switching unit.

[0077] Specifically, when various types of secondary batteries exist, since the characteristics of each battery model—such as size, terminal arrangement, distance between terminals, and terminal shape—are all different, this can be described as a function that enables the device to automatically recall and immediately apply a drive combination optimized for the corresponding battery, without requiring the user or external device to manually calculate or select a drive combination every time. To this end, a device according to one embodiment of the present invention may include a structure that stores a battery profile database for various types of battery models in advance in a storage device accessible from within or outside the device, and recalls an optimal segment combination in conjunction with model identification information of the battery to be measured.

[0078] In this database, information for each battery model is stored in a structured manner; for example, the structured information may include the sentiment, external dimensions of the battery, coordinate information of the battery terminals, and distance information between terminals.

[0079] Specifically, the external dimensions (length, width, height) of the battery serve as basic information for determining the total length of the Euro path and the available placement area that constitute the loop area, and the optimal path can vary significantly depending on whether the specific battery is small, medium, or pouch type.

[0080] In addition, the coordinate information of the battery terminals is information indicating the absolute positions of the + and - terminals in a reference coordinate system, and is used to determine which segments the current supply path and voltage sensing path must connect to accurately correspond to the terminals. Also, since terminal lengths or widths may differ depending on the cell structure, the terminal coordinate information may be stored as information for the entire terminal area rather than simple two-point information.

[0081] In addition, the inter-terminal distance information refers to the distance between the + and - terminals of a specific battery and can serve as a criterion for determining which 'node combination' is most suitable for current and voltage paths. For example, in batteries with a wide inter-terminal distance, more segments must be connected in the middle to form the path, so the segment selection strategy for loop minimization may differ.

[0082] When a user wishes to measure a specific battery, the above control unit may receive identifiers such as the model code, cell type, and manufacturer information of the battery model, or automatically recognize them through a barcode, QR code, or automatic detection algorithm.

[0083] Subsequently, the control unit immediately reads profile information matching the corresponding model from the database, and the optimal flow path combination that has already been calculated is stored within that profile. This optimal flow path combination can be configured in advance through iterative measurements in a manufacturing or research environment, or it can be pre-calculated and stored using the device's own loop calculation algorithm.

[0084] In particular, the control unit can directly apply the path combinations retrieved from the profile to the switching unit. That is, since both the optimal current supply path segment combination and the optimal voltage sensing path segment combination for the corresponding model are stored, the user can immediately configure the most accurate measurement environment without any calculations. This process can be achieved by controlling a selected array of SSRs or MOSFETs in the switching unit to turn on the stored segments and turn off all other segments. By doing so, the selected path exactly matches the stored profile, ensuring that a consistent measurement environment is always established when repeatedly measuring the same battery model.

[0085] Furthermore, this profile-based structure can respond quickly and reliably even when battery models are changed. For example, if a device needs to measure 18650 cylindrical cells and then immediately switch to measuring 21700 cells, the optimal path must be completely different because the two cells differ in terminal spacing and size. The profile automation function allows for immediate switching to a new combination without the user having to manually reconfigure these changes. This can reduce measurement time and improve operational efficiency, particularly when various models need to be inspected sequentially on a production line.

[0086] Furthermore, the database is designed to be updated when new battery models emerge, facilitating easy application through scalability. For instance, when a device measures a new battery for the first time, a loop optimization algorithm can be used to calculate the optimal combination and register it as a new profile; this allows for its application in subsequent cycles without the need for separate calculations. This structure enables the device to evolve autonomously as it handles more battery models, thereby maximizing usability across diverse measurement environments.

[0087] Ultimately, through the information storage function of the database and the function of applying the optimal path combination by the control unit to the switching unit, the inconvenience of having to recalculate the path combination whenever mechanical conditions such as battery size or terminal position change is eliminated, and at the same time, problems such as increased loop area or larger parasitic components caused by incorrect path selection can be prevented in advance. This ensures an optimal measurement environment for various battery models at all times, maintains consistency in repeated measurements, and significantly improves productivity and measurement reliability.

[0088] According to another embodiment of the present invention, a method for adaptive loop optimization for measuring the impedance or open-circuit voltage of a secondary battery is provided.

[0089] Specifically, the loop optimization method may include: (a) a providing step of providing a measuring device including segmented current supply paths and segmented voltage sensing paths; (b) an input step of receiving information on the size of a secondary battery to be measured, the distance between terminals, or terminal coordinates defined in a reference coordinate system; (c) a calculation step of calculating at least one of parasitic inductance and parasitic capacitance for each segment of the current supply path and the voltage sensing path, using at least one of the length of the segment, the placement layer, the distance between the segment centerlines, and the permittivity of the substrate as parameters; (d) a combination determination step of determining a path combination in which the area of ​​the closed curve formed by the current path centerline and the voltage path centerline (loop area) and the sum of the parasitic components are minimized based on the calculated values; (e) a blocking step of connecting only the segments included in the determined path combination through a switching unit and blocking other segments; and (f) a voltage measurement step of applying current through the selected current path and measuring voltage through the selected voltage path.

[0090] In other words, this relates to a series of procedures for accurately measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device. This method is based on a structure in which the current supply path and the voltage sensing path have a segmented structure; by evaluating the electromagnetic characteristics of each segment to select the optimal path and performing measurements along that path, the loop area and the influence of parasitic components can be minimized.

[0091] First, in the provisioning stage, a measuring device is prepared that includes current supply paths and voltage sensing paths segmented based on multiple nodes. As described above, this device has multiple path segments physically arranged on a PCB, and each segment can be configured to be independently turned on or off by a switching unit. This structure is intended to allow for the configuration of various path combinations even when different battery models have different terminal positions or sizes; since this is identical to the description above, redundant details will be omitted.

[0092] Subsequently, in the input stage, the control unit receives mechanical information about the secondary battery to be measured in order to determine which segment among the current supply path and the voltage sensing path mechanically corresponds best with the corresponding battery terminals. This may include the dimensions of the battery's external shape (length, width, and height), the distance between the battery's + terminal and - terminal, and terminal coordinates defined in a reference coordinate system.

[0093] In the subsequent calculation stage, the control unit can analyze the electromagnetic characteristics of each segment of the current supply path and the voltage sensing path. To this end, the control unit can calculate the values ​​of parasitic inductance and parasitic capacitance occurring in each segment by using parameters such as the length of each segment, information on the PCB layer where the segment is located, the distance between the centerlines of the current path and the voltage path segment, and the permittivity of the substrate as input values. These parasitic components occur naturally due to electromagnetic coupling between conductors, and quantification is essential because they can cause signal distortion when applying high current or performing high-precision voltage measurements. As described above, the control unit can quantify these parasitic components by utilizing a microstrip-based capacitance model and a loop area-based inductance model.

[0094] In the subsequent combination determination step (d), the calculated parasitic components and mechanical path information are combined to calculate the optimal path combination. In this step, the control unit calculates the area of ​​the closed curve formed by the current path centerline and the voltage path centerline, i.e., the loop area, and evaluates the sum of the parasitic inductance and parasitic capacitance occurring in the corresponding path. This is because sensitivity to external noise and magnetic field changes decreases as the loop area decreases, and as the parasitic components increase, the measured impedance or voltage deviates from the actual characteristics of the battery; therefore, the path combination in which the sum of the two values ​​(parasitic inductance and parasitic capacitance) is minimized can be determined as the optimal path for the current supply path and the voltage sensing path.

[0095] Subsequently, in the blocking step (e), only the segments selected in the combination determination step are kept in the ON state through the switching unit, while all remaining segments are turned OFF. This step corresponds to the actual switching operation for accurately configuring the current and voltage paths, and the switch selected as the switching unit—whether an SSR, MOSFET, or MEMS-based switch—can rapidly select or block each segment, so that only the optimal path becomes a valid measurement path.

[0096] In the voltage measurement step (f) performed after the cutoff step, current may be applied to the battery terminals through the current path, or, in the case of open-circuit voltage measurement, the battery terminal voltage may be measured through the voltage sensing path without applying current. Since both the current path and the voltage path used at this time are selected to satisfy the loop minimum condition in the combination determination step, the influence of external interference or parasitic components is minimized during the measurement process, and as a result, high-accuracy impedance and open-circuit voltage measurement values ​​can be obtained. If necessary, the measured signal may be further refined by a correction calculation step using the correction calculation function, which is the parasitic component correction process described above.

[0097] According to the steps executed in this manner, a series of processes—including mechanism information input, parasitic component calculation, determination of minimum loop combination, switching configuration, and actual voltage or impedance measurement—are performed integrally. This ensures that measurements are always taken along the optimal path, even if the structural characteristics of the battery vary. By providing an adaptive path selection function that was impossible with conventional fixed-wiring-based measurement methods, this enables high-precision measurements across various battery models.

[0098] That is, as described above, in the providing stage, a measuring device is provided in which a current supply path for applying current and a voltage sensing path for measuring voltage are each segmented into multiple segments. By forming the paths in a pre-segmented structure in this stage, a structural premise is established that allows the current application path and the voltage measurement path to be selectively configured according to the measurement target, rather than being used as a single fixed form in subsequent stages. Accordingly, a basic physical basis is formed that enables path selection and optimization calculations to be performed in all stages after the providing stage.

[0099] Based on such a segmented flow path structure, the input stage receives information regarding the size of the secondary battery under measurement, the distance between terminals, or terminal coordinates defined in a reference coordinate system. The information input at this stage functions as reference data to determine which part of the segmented flow path will actually be used; rather than arbitrarily selecting the current supply path and the voltage sensing path, it acts as a condition for selecting a path corresponding to the actual physical shape of the secondary battery under measurement.

[0100] In the subsequent calculation step, electrical characteristics are calculated for each segment of the current supply path and voltage sensing path based on the secondary battery information input in the input step and the segmented path structure provided in the provision step. Specifically, at least one of the following parameters—the length of each segment, the placement layer, the distance between the centerlines of the current path and the voltage path, and the dielectric constant of the substrate—is used to quantitatively calculate at least one of the parasitic inductance and parasitic capacitance that may occur in the corresponding segment combination. This step serves to numerically establish judgment criteria for determining the path combination thereafter.

[0101] In the subsequent combination determination stage, the path combination is determined by considering the parasitic component values ​​calculated in the calculation stage, along with the area of ​​the closed curve formed by the current path centerline and the voltage path centerline—that is, the loop area. At this stage, the path combination is not simply selected by choosing the shortest path, but is determined such that the sum of at least one of the loop area, parasitic inductance, and parasitic capacitance is minimized. Accordingly, this stage comprehensively reflects the physical and electrical characteristics calculated in the preceding steps to derive the optimal path combination that minimizes the factor having the greatest impact on measurement error.

[0102] Once the optimal path combination is determined in this manner, in the blocking step, only the segments included in the determined path combination are connected through the switching unit, and the other segments are blocked. This step is a step of implementing the abstract path combination derived in the combination determination step onto actual hardware, ensuring that only the selected path is configured as an electrically valid path. Through this, the path optimization result is not merely a calculation result but is converted into a physical path usable for actual measurement.

[0103] Finally, in the voltage measurement step, current is applied to the terminals of the secondary battery through the current path selected in the cutoff step, and the voltage is measured through the selected voltage path. At this time, since the current application and voltage measurement are performed through a path configured to satisfy the minimum loop condition in the preceding step, the impedance or open-circuit voltage is measured while the influence of parasitic inductance and parasitic capacitance is structurally suppressed. Accordingly, loop optimization can be performed by minimizing the loop area and the influence of parasitic components by proceeding step-by-step through providing the path structure → reflecting target information → calculating electrical characteristics → determining the optimal path → physical implementation → precise measurement.

[0104] Preferably, to minimize loops in the current flow path and voltage flow path described above, the method may include at least one of the following steps: (i) configuring the current segment and voltage segment as a 1:1 pair to maintain the centerline separation distance between a minimum value (Dmin) and a maximum value (Dmax); (ii) sharing the same node to select the same combination of nodes selected in the current flow path for the voltage flow path; and (iii) selecting segment centerlines arranged in parallel on the same layer or adjacent layer of the PCB.

[0105] Specifically, to perform the aforementioned loop optimization measurement method more stably and reproducibly, the procedure may consist of selectively or in combination applying three different methods to structurally suppress or minimize the loop area that may be formed between the current supply path and the voltage sensing path. Through this, not only is the path selected based on simply calculated parasitic inductance or capacitance values, but the method of configuring the path itself is also predefined to fundamentally suppress factors that increase the loop; consequently, the current and voltage paths can always maintain high alignment and stability despite variations in the measurement environment or changes in battery terminal positions.

[0106] More specifically, (i) is a method of configuring current segments and voltage segments as a 1:1 pair to maintain a centerline separation distance between a minimum value (Dmin) and a maximum value (Dmax), which is a so-called pair-based path configuration method that corresponds current segments and voltage segments in a 1:1 manner. Specifically, for a specific segment included in a current supply path, a voltage sensing path segment designed to have the same direction, the same mechanical position, and the same design pattern as that segment can be corresponded, and the two segments can be selected to be formed in parallel along the entire path. The key of the pair method is to maintain the relative position of the current path centerline and the voltage path centerline in the entire path at a constant separation distance (D), and maintaining this constant distance can structurally limit the width of the closed curve, which is the most important factor in determining the loop area. In particular, if the separation distance between centerlines is smaller than Dmin, an increase in capacitance due to excessive electrostatic coupling occurs, and if it is larger than Dmax, the loop area increases; therefore, the pair configuration can be designed so that the two paths are selected together to always satisfy this range. In other words, the pair-based method fundamentally prevents the current and voltage paths from splitting or twisting relative to each other. By doing so, it minimizes the amount of magnetic field generated by current changes that is induced in the voltage path, thereby effectively reducing parasitic inductance and noise.

[0107] (ii) is a node-sharing-based path synchronous selection method in which the combination of nodes selected in the current path is identically selected in the voltage path by sharing the same nodes. This method configures the path so that the current supply path and the voltage sensing path share the same set of nodes, thereby forcing the start node, intermediate node, and end node selected in the current path to be identically selected in the voltage sensing path. Since the node-sharing method determines the path in such a way that the current segment and the voltage segment must start from, pass through, and end at the same mechanical reference point, it can fundamentally prevent path distortion or misalignment that may occur during the selection of the two paths. This is particularly effective when the terminal positions of the battery being measured are asymmetrical or when the shape of the segments constituting the internal wiring of the device is complex, making it difficult to arrange them in a straight or regular pattern. In other words, the node-sharing-based method not only simply places the two paths in close proximity but also ensures that the two paths follow the same path coordinates, thereby maintaining a loop area that is practically close to zero, which has the effect of reducing inductance noise in high-frequency environments.

[0108] (iii) is a method of selecting segment centerlines arranged in parallel on the same layer or adjacent layer of the PCB, and is a parallel arrangement method based on the same layer or adjacent layer. This method may be a configuration in which the vertical distance between the two centerlines is maintained constant by placing the current flow path and the voltage flow path on the same layer or adjacent layer (e.g., TOP-INNER1 or INNER1-INNER2, etc.) on the PCB. Specifically, when the PCB has a multilayer structure, the thickness between each layer is precisely defined during the manufacturing process and maintained very precisely within a certain range, so the arrangement on the same layer or adjacent layer allows the distance and directionality between the current and voltage centerlines to be maintained stably regardless of changes in the measurement environment or device state. This allows not only the loop area but also the electric and magnetic field coupling structure between layers to be maintained within a predictable range, which has the effect of suppressing non-uniformity of parasitic capacitance and parasitic inductance through the entire path. In particular, in certain battery cell structures, terminal positions are often orthogonal to the PCB layer direction or arranged at complex angles; therefore, same-layer-based alignment also has the effect of offsetting the extent to which magnetic fields generated by current changes are transmitted to the voltage path.

[0109] The three methods described above may be applied independently or in combination, and in actual systems, the three methods are applied in combination to maximize the accuracy of optimal path selection. For example, when the Pair method and the Node Sharing method are applied simultaneously, the two centerlines share the same node and do not deviate beyond a certain separation distance; furthermore, if the Layer Parallel method is added, even the vertical distance between centerlines can be stably controlled. Therefore, by structurally restricting the method of configuring current and voltage paths and applying one or more of the three optimization principles in combination, it is possible to generate a path combination with the practically smallest loop area by combining this with the results of minimizing parasitic components calculated during the combination determination stage.

[0110] This method can prevent structural loop distortion, increased inter-layer interference, centerline deviation, and sudden increases in induced noise that may occur during the process of applying current to battery terminals or measuring voltage. Furthermore, since this method can be applied even if the battery type or terminal position changes, the loop minimization principle based on the same standard is always maintained, thereby guaranteeing high measurement reproducibility and precision. Moreover, it can be applied to AC impedance measurements or high-frequency characteristic analysis that are sensitive to minute changes in the measurement environment, providing excellent signal stability.

[0111] Preferably, it may further include a correction operation step to remove the influence of the parasitic component from the calculated voltage or impedance value measured using parasitic inductance and parasitic capacitance values ​​corresponding to the selected Euro combination.

[0112] Specifically, in addition to the impedance or open-circuit voltage measurement procedure, precise measurements can be performed by computationally correcting the influence of parasitic inductance and parasitic capacitance structurally possessed by the current and voltage paths used in the measurement, so that the final voltage value or calculated impedance value accurately reflects only the electrical characteristics of the actual battery. This implies providing a two-stage precision method that recognizes that parasitic components are inevitably bound to occur in the actual measurement environment and, rather than minimizing them only in the device design, mathematically eliminates them before they are reflected in the measurement results.

[0113] More specifically, the segment combination of the current supply path and the voltage sensing path is optimized to select a path with minimized loop area and parasitic components. However, parasitic components cannot be completely eliminated through design or combination optimization alone; particularly in AC impedance measurements, since the actual impedance value of the battery is very small, even small remaining parasitic inductance or capacitance can cause significant errors in the measurement results. Therefore, to prevent this, a correction calculation step may be included to computationally remove parasitic components during the measurement process.

[0114] This correction calculation process can be broadly divided into two stages. In the first stage, the parasitic inductance (Lp) and parasitic capacitance (Cp) already calculated for the selected combination of current and voltage paths can be used as input values. The control unit independently obtains Lp and Cp values ​​for the current and voltage paths, respectively, calculated based on the length of each segment, spacing, layer structure, and substrate permittivity; once the selected path combination is determined, Lp_total and Cp_total can be calculated.

[0115] In the second step, the actual measured voltage (V_meas) or impedance (Z_meas) can be corrected using the calculated parasitic component values. For example, parasitic inductance generates an induced voltage (L·di / dt) proportional to the rate of change of current (di / dt). Since this induced voltage component is measured by being added to the actual voltage generated by the battery, the control unit can calculate the induced voltage component by differentiating the measured current waveform and subtract it from V_meas to determine the actual battery voltage (V_true) in order to eliminate it. Through this process, precise calculations can be produced in response to situations where the rate of change of current over time is large, such as in AC impedance measurements.

[0116] A correction method similar to that used for parasitic inductance can also be applied to parasitic capacitance. Parasitic capacitance between two circuits can create a current path proportional to the rate of change of voltage (dv / dt), which can cause a portion of the current to bypass through the capacitance during impedance measurement, thereby underestimating or overestimating the actual impedance of the battery. Accordingly, the control unit calculates the bypass current component represented by Cp_total·dv / dt based on the dv / dt of the voltage waveform, and by removing this value from the total measured current, obtains the actual current flowing inside the battery (I_true), after which the impedance can be calculated using V_true / I_true.

[0117] This correction calculation step can dramatically improve measurement accuracy by removing residual noise, minute magnetic flux coupling, and the influence of substrate parasitic capacitance from the measurement data, which cannot be eliminated by loop optimization alone. In particular, since this correction function is dynamically calculated using time-axis information of current and voltage waveforms, it can respond to minute structural changes caused by battery temperature variations or equipment aging. In other words, even if the absolute value of parasitic components fluctuates slightly over time, the correction calculation step can instantly correct based on the new parasitic component value for every measurement, thereby maintaining consistent measurement accuracy at all times.

[0118] Furthermore, since this step involves accurate correction calculations based on an electrical equivalent model rather than simple signal filtering or averaging, it does not distort the actual electrochemical reactions within the battery but rather allows its inherent characteristics to be revealed more clearly. For example, when analyzing the diffusion resistance of lithium ions at a specific frequency, accurate data can be obtained through the aforementioned correction algorithm in high-frequency ranges where the influence of parasitic capacitance is significant.

[0119] Therefore, by combining the multi-segment-based optimal path configuration function through the correction calculation step, measurement environment configuration (hardware optimization) and measurement result correction (software refinement) can be performed simultaneously, thereby enabling the provision of impedance or open-circuit voltage measurement results with high precision, reproducibility, and reliability.

[0120] Meanwhile, a combination determination step for determining a specific segment combination of a current supply path may include a reference step determined by referring to an interlocking mapping algorithm that selects a voltage sensing path segment having a centerline path identical to or adjacent to the segment.

[0121] Specifically, to prevent structural problems such as spatial misalignment or increased loop area that may occur during the process of randomly selecting different paths for the current supply path and the voltage sensing path in the aforementioned path combination determination step, a coupled mapping algorithm may be applied to ensure that when a current path segment combination is selected, a voltage path segment having the same or adjacent centerline path is selected. This step is intended to resolve the problem of path asynchronous operation that may occur when the current path and the voltage path are optimized independently, and by structurally enforcing basic alignment in the path formation method, the stability and consistency of loop minimization can be enhanced.

[0122] Specifically, the interlocking mapping algorithm may be a method in which, once a combination of segments of the current supply path is selected in the combination determination stage, the control unit generates a group of selectable segment candidates in the voltage sensing path based on the centerline information of the selected segments. Here, the centerline can be defined as a line connecting the center of the width of each trace, and this centerline serves not only as a reference when calculating the loop area but also as an absolute standard in the process of evaluating how well the current and voltage paths are actually aligned.

[0123] More specifically, the coupled mapping algorithm analyzes structural patterns, such as the node connection order constituting the centerline path of the current path, the change in coordinates (Δx, Δy) of the centerline, the length of each section, and layer information, and can restrict the segments of the voltage sensing path to follow the same pattern. That is, if the current path has a structure connecting from a specific node to the next node, the voltage sensing path can also be guided to follow the same node combination or adjacent node combination. This process not only matches the node numbers but also ensures that the current and voltage centerlines are substantially parallel or maintain the same geometric shape throughout the entire path, thereby enabling the elimination of factors that increase the loop area from the path configuration stage.

[0124] In particular, the interdependence between Euro segment combinations is reflected through the coupled mapping algorithm. For instance, if a specific segment is selected in the current path and that segment has a wider width than others or is located on a different layer, the selection of the voltage sensing path can be restricted to only the corresponding segment on the same or adjacent layer. This minimizes changes in the vertical and horizontal separation distances between the current and voltage paths, thereby preventing the problem of unexpected increases in the loop area.

[0125] Furthermore, regarding the measurement of parasitic components, this algorithm for path synchronization addresses the fact that when the current in a current path changes over time, a magnetic field is formed in the surrounding space, which can induce a voltage in a nearby voltage sensing path. If the current path and the voltage path are spatially separated, this induced voltage increases, resulting in reduced accuracy of voltage measurements. However, by aligning or quasi-aligning the two paths through the coupling mapping algorithm, the induced voltage is distributed almost equally across both conductors, thereby significantly reducing the inductive influence on the voltage sensing path. Therefore, the coupling mapping algorithm offers the advantage of simultaneously achieving not only the effect of simply reducing the loop area but also the structural suppression of induced noise (EMI / EMC).

[0126] This algorithm can be applied immediately or automatically during the path selection phase, enabling the generation of the most aligned current and voltage paths for every measurement without operator intervention. In particular, when battery terminal locations vary across models and the layout of internal device segments is complex, it was impossible or severely limited to accurately align current and voltage paths with devices based on conventional technology. However, since this method structurally enforces path alignment from the selection phase, it offers the advantage of automatically generating the optimal path based on the same principle, regardless of changes in battery type.

[0127] Consequently, through a reference step determined by referring to an interlocking mapping algorithm, problems such as loop expansion, centerline asymmetry, increased noise due to current-voltage path misalignment, and path length non-uniformity that may occur when current and voltage loops are configured independently or in opposite directions within the measuring device can be fundamentally prevented in advance, and high-precision impedance and open-circuit voltage measurement functions can be stably implemented.

[0128] In addition, the loop optimization method according to an embodiment of the present invention may preferably include the step of calling a loop profile corresponding to a secondary battery to be measured from a database storing size, terminal coordinates, and terminal placement information for multiple types of secondary battery models, and applying the combination of Euro segments stored in the profile as is to a switching unit.

[0129] Specifically, in real industrial environments where various types of secondary batteries exist, the measurement process can be automated by utilizing pre-stored loop profiles for each battery model to rapidly apply different optimal loop combinations for each battery. This step can be used in environments where multiple cell models must be measured repeatedly, such as production lines or automated inspection equipment, and allows the device to automatically select the optimal segment combination without the need for a human to manually set the flow paths.

[0130] More specifically, mechanical information such as size information, terminal coordinate locations, distances between terminals, terminal shapes, and terminal placement directions can be stored in a database format for multiple secondary battery models. This database can be stored in the device's internal memory or in external connected storage such as a local server or a cloud-based database, and can be configured to reflect different structural characteristics for each battery model.

[0131] Each entry in the database contains a pre-calculated and stored path combination that minimizes loop area and parasitic components, which is a segment combination of current supply paths and voltage sensing paths that operates optimally for the corresponding battery model. This optimal combination may be pre-calculated based on drawing information provided by the manufacturer, or it may be a value calculated in advance during the initial setup phase using the loop calculation algorithm of the method described above. Regarding the procedure, when a user wishes to measure a specific battery during the measurement process, the device first receives model identification information from the user, such as the battery model name, cell type number, or unique identification code, or can automatically recognize it using a barcode, QR code, RFID tag, etc. Subsequently, the control unit can retrieve the loop profile corresponding to the model from the database. This loop profile includes both the optimal segment combination of the current path and the optimal segment combination of the voltage path, and can be composed of segment combinations that minimize loop area (Dloop), parasitic inductance (Lp), and parasitic capacitance (Cp).

[0132] When the above profile is called, the control unit applies the circuit combination stored in the profile directly to the switching unit. Specifically, depending on the segment ID or node combination included in the profile, one of the switches selected from the SSR, MOSFET, or MEMS of the switching unit is turned on to connect the corresponding segments, while all other segments are left off to be removed from the path. In this way, the device accurately configures the current supply circuit and voltage sensing circuit required for battery sensing, and an optimal loop path can be formed immediately without the need for a separate combination determination algorithm.

[0133] This profile-based automatic selection feature enhances the reproducibility of measurement results by ensuring that the same path settings are always applied when repeatedly measuring the same battery model. Furthermore, even in production environments where cell models change frequently, measurement speed and efficiency can be significantly improved as the device automatically configures the optimal path simply by the user selecting or recognizing a new model. In addition, when a new battery model is added for the first time, the loop optimization algorithm is executed just once during the initial setup phase to calculate the optimal path and register it as a new profile; subsequently, this offers the convenience of being able to be reused repeatedly through the database-based automatic selection feature.

[0134] In other words, through an automatic selection step that applies the profile-based Euro segment combination directly to the switching section, fast, accurate, and consistent measurements for various battery models are enabled, and the usability of the measurement equipment can be significantly improved by automating complex Euro calculations. In particular, productivity can be enhanced in battery manufacturing or inspection processes, and the actual measurement process can be stably realized by minimizing loops and parasitic components.

[0135] Preferably, for the flow path determined in the combination determination step, a reselection step may be further included, which verifies whether the separation distance between the current flow path centerline and the voltage flow path centerline satisfies a range greater than or equal to a minimum value (Dmin) and less than or equal to a maximum value (Dmax0) over the entire path, and if there is a segment exceeding the range, the flow path combination is reselected.

[0136] Specifically, in the combination determination stage, the control unit may include a process of first determining the optimal combination of the current supply path and the voltage sensing path, then verifying whether the combination accurately satisfies the minimum loop condition on the actual PCB path, and if it deviates from the reference range in some segment sections, re-selecting the path combination. This is intended to prevent incomplete combinations from affecting measurement accuracy by not merely determining the path based on calculated values, but by additionally verifying the spatial relationship between the actual path centerlines.

[0137] In an adaptive loop optimization device according to one embodiment of the present invention, as described above, the current supply path and the voltage sensing path are each composed of a plurality of segments, and each segment has a line defined based on the vertical center of the trace width, which is the centerline. Since the loop area is defined by the area of ​​the closed curve formed by the centerlines of the two paths, the loop area can be minimized only if the distance between the two centerlines is maintained below a certain level throughout the entire path. However, in the combination determination step, the path combination is determined by mathematically evaluating various parameters such as parasitic inductance, parasitic capacitance, segment length, and layer arrangement; therefore, based solely on the calculated values, a situation may occur where the distance between the centerlines in a specific segment section deviates from the reference value.

[0138] To address this, the method may further include a procedure to verify, over the entire section, whether the separation distance between the two centerlines is greater than or equal to a predefined minimum value (Dmin) and simultaneously less than or equal to a maximum value (Dmax) by following the entire centerline path of the current and voltage paths selected in the combination determination stage. To this end, the control unit reconstructs the 3D path of the centerlines based on the geometric coordinates and layer information of each selected segment, and calculates the minimum and maximum distances between the current path centerline and the voltage path centerline along this path. This verification can be performed on a segment basis or on a fixed length section basis, and if a separation distance smaller than Dmin or larger than Dmax is found in even a single section within the path, the path may be determined not to satisfy the loop minimum condition.

[0139] At this time, if a segment outside the reference range is found, the control unit can immediately re-select the Euro combination. In the re-selection stage, the segments that constitute the existing combination can be excluded or have their priority lowered, and then the segment combination corresponding to the optimal candidate can be applied to perform centerline separation distance verification again. This process is intended to ensure the maximum performance of the algorithm by finding a combination that simultaneously minimizes loop area and parasitic components, because if there are sections where the separation between centerlines is excessively large, problems such as increased noise or unstable electrical coupling may occur during actual measurement.

[0140] Furthermore, this step serves to ensure that current and voltage paths naturally maintain a parallel structure, whether adjacent or within the same layer. If the centerline separation distance is smaller than Dmin, the capacitance between the two conductors increases excessively, potentially leading to phase distortion in voltage measurements or an increase in bypass current; conversely, if it is larger than Dmax, the loop area increases, making it vulnerable to changes in external magnetic fields. Therefore, the high quality of the actual physical path can be secured through a verification and re-selection process. This verification step compensates for errors or physical layout limitations that may occur when implementing the theoretically optimal combination selected by the loop optimization algorithm into the actual path, thereby maintaining a consistently stable and uniform loop structure. This minimizes the influence of parasitic components in both low-frequency and high-frequency regions during impedance measurements and allows for the stable observation of sensitive changes during open-circuit voltage measurements. Additionally, since path verification is performed for every measurement even in a repetitive measurement environment, a reliable measurement environment can always be ensured, even if the battery position changes slightly or there are external variations.

[0141] Consequently, the loop optimization method according to the present invention is not limited to simple mathematical optimization but is an advanced method that considers the stability of the physical path when applied in the actual field, and can maximize measurement accuracy, reproducibility, and noise reduction effects. Explanation of the symbols

[0143] N : Node S: Segment 10 : Secondary battery 20 : Current supply path 30 : Voltage sensing Euro 40 : Loop area 50 : Switching section 60 : Control unit

Claims

Claim 1 An adaptive loop optimization device for measuring the impedance or open-circuit voltage of a secondary battery comprises: (1) a current supply path segmented based on a plurality of nodes to apply current to the terminals of the secondary battery; (2) a voltage sensing path segmented based on a plurality of nodes at a position corresponding to the current supply path; (3) a switching unit including a solid-state relay (SSR), a MOSFET array, or a MEMS switch for individually turning on or off each segmented path segment; and (4) a control unit that receives information on the size, distance between terminals, or terminal coordinates of a secondary battery to be measured, and calculates the centerline of each channel segment based on the length, arrangement layer, distance between the two channels, and surrounding structure information for each segment of the current supply channel and the voltage sensing channel, wherein the centerline of the current supply channel is calculated based on the vertical center of the trace width for the channel segment of the current supply channel, and the centerline of the voltage sensing channel is calculated based on the vertical center of the trace width for the channel segment of the voltage sensing channel, and the area of ​​the closed curve formed by the centerline of the current supply channel and the centerline of the voltage sensing channel is defined as the loop area and calculated, and controls the switching unit by selecting a channel combination in which the sum of at least one of the loop area and parasitic inductance and parasitic capacitance is minimized;The current supply path includes, wherein each segment of the current supply path is arranged in parallel with a corresponding voltage sensing path segment on the same layer or an adjacent layer of the PCB, and is designed such that the separation distance between the centerline of the current supply path segment and the centerline of the voltage sensing path segment is greater than or equal to a preset minimum value (Dmin) and less than or equal to a maximum value (Dmax); wherein the current supply path and the voltage sensing path share multiple nodes at the same coordinates or the same mechanical location; wherein the control unit is configured such that the centerlines of the two paths form substantially the same spatial path by selecting a node combination in the voltage sensing path that is identical to the path between nodes selected in the current supply path; wherein the control unit further includes a correction operation function that removes the influence of parasitic inductance and parasitic capacitance from the voltage measurement value or impedance calculation value by applying parasitic inductance and parasitic capacitance values ​​corresponding to the selected path combination; and wherein the control unit selects a voltage sensing path segment having a centerline path identical to or adjacent to the corresponding segment when a current supply path segment combination is selected. An adaptive loop optimization device for measuring the impedance or open-circuit voltage of a secondary battery, characterized in that it further includes a coupled mapping algorithm, the device further includes a database storing size, terminal coordinates, and arrangement information between terminals for multiple types of secondary battery models, and the control unit includes a function of calling a profile corresponding to the battery to be measured and applying a combination of paths stored in the profile to a switching unit. Claim 2 delete Claim 3 delete Claim 4 delete Claim 5 delete Claim 6 delete Claim 7 delete Claim 8 (a) a providing step of providing a measuring device including segmented current supply paths and segmented voltage sensing paths; (b) an input step of receiving information on the size of a secondary battery to be measured, the distance between terminals, or terminal coordinates defined in a reference coordinate system; (c) a calculation step of calculating at least one of parasitic inductance and parasitic capacitance for each segment of the current supply path and the voltage sensing path, using at least one of the length of the segment, the placement layer, the distance between the segment centerlines (lines defined based on the vertical center of the trace width), and the permittivity of the substrate as parameters; (d) a combination determination step of determining a path combination in which the area of ​​the closed curve formed by the current path centerline and the voltage path centerline (loop area) and the sum of the parasitic components are minimized based on the calculated values; (e) a blocking step of connecting only the segments included in the determined path combination through a switching unit and blocking the other segments; and (f) a voltage measurement step of applying current through a selected current path and measuring voltage through a selected voltage path; A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device characterized by including Claim 9 A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device, wherein the above calculation step comprises applying at least one of the following methods to minimize loops in current flow paths and voltage flow paths: (i) configuring current segments and voltage segments as 1:1 pairs to maintain a centerline separation distance between a minimum value (Dmin) and a maximum value (Dmax); (ii) sharing the same node to select the same combination of nodes selected in the current flow path for the voltage flow path; and (iii) selecting segment centerlines arranged in parallel on the same layer or adjacent layer of the PCB. Claim 10 A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device, wherein, in claim 8, the calculation step further includes a correction operation step for removing the influence of said parasitic component from the calculated voltage or impedance value measured using parasitic inductance and parasitic capacitance values ​​corresponding to the selected Euro combination. Claim 11 A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device, wherein, in claim 8, the combination determination step for determining a specific segment combination of a current supply path includes a reference step determined by referring to a linkage mapping algorithm that selects a voltage sensing path segment having the same or adjacent centerline path as the segment. Claim 12 A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device, wherein, in claim 8, the method comprises the step of calling a loop profile corresponding to the secondary battery to be measured from a database storing size, terminal coordinates, and terminal arrangement information for each of the multiple types of secondary battery models, and applying the Euro segment combination stored in the profile as is to the switching part. Claim 13 A method for measuring the impedance or open-circuit voltage of a secondary battery using an adaptive loop optimization device, wherein, in claim 8, the combination determination step further includes a reselection step for verifying whether the separation distance between the current flow path centerline and the voltage flow path centerline satisfies a range of greater than or equal to a minimum value (Dmin) and less than or equal to a maximum value (Dmax) over the entire path for the flow path determined in the combination determination step, and reselecting the flow path combination if there exists a segment exceeding the range.

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