Pellicle for EUV lithography and method of manufacturing pellicle for EUV lithography using stencil mask

The pellicle for EUV lithography with a multilayer structure of varying materials addresses the limitations of conventional pellicles by providing diverse light patterns and improved durability through enhanced transmittance and emissivity.

KR103042158B1Active Publication Date: 2026-11-03KOREA ADVANCED INST OF SCI & TECH
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Patent Information

Application Number
KR1020230163027
Authority / Receiving Office
KR · KR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2023-11-22
Publication Date
2026-11-03
Estimated Expiration
2043-11-22

AI Technical Summary

Technical Problem

Conventional EUV lithography pellicle thin films have limited transmittance range, monotonous light patterns, and poor durability due to low emissivity, making it difficult to perform experiments under various conditions and maintain temperature.

Method used

A pellicle for EUV lithography using a stencil mask is fabricated by depositing multiple thin film layers of different materials, including Si-based and metal/metal silicide materials, with varying transmittance and emissivity properties, achieved through high-temperature heat treatment and plasma treatment to form a multilayer structure with diverse light patterns and improved heat dissipation.

Benefits of technology

The pellicle achieves a wide range of transmittance and emissivity, allowing diverse light patterns and effective heat dissipation, enhancing experimental flexibility and durability.

✦ Generated by Eureka AI based on patent content.

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Abstract

A pellicle for EUV lithography and a method for manufacturing an EUV lithography pellicle using a stencil mask having an increased transmittance range, diversified light patterns, and improved durability are disclosed. A method for fabricating a pellicle for EUV lithography using a stencil mask comprises the steps of: preparing a substrate; placing a first mask having a first through-hole formed therein on the substrate; depositing a first thin film layer on the first through-hole and the first mask; removing the first mask to form a first membrane layer having a first pattern hole on the substrate; placing a second mask having a second through-hole formed therein on the first membrane layer; depositing a second thin film layer on the first pattern hole, the second through-hole and the second mask; removing the second mask to form a second membrane layer having a second pattern hole; and etching the lower part of the substrate.
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Description

Technology Field

[0001] The present invention relates to a pellicle for EUV lithography using a stencil mask and a method for manufacturing an EUV lithography pellicle, and more specifically, to a pellicle for EUV lithography using a stencil mask for protecting a mask to be exposed and a method for manufacturing an EUV lithography pellicle. Background Technology

[0002] Generally, EUV lithography technology is a technology used in the semiconductor industry, and it is an extreme ultraviolet lithography technology or a manufacturing process utilizing it that uses a light source of extreme ultraviolet wavelength (i.e., EUV) in the photolithography process, which is an important process in making semiconductors.

[0003] EUV lithography technology performs exposure using a light source with a wavelength of 13.5 nm, and this EUV lithography technology is considered a key next-generation semiconductor device manufacturing technology to replace existing ArF lithography technology using a light source with a wavelength of 193 nm.

[0004] In such EUV lithography technology, a photomask and a pellicle to protect the photomask may be used. This pellicle includes a pellicle thin film and a pellicle frame that supports the pellicle thin film.

[0005] Since conventional pellicle thin films are formed from a single material, their transmittance (the degree to which light is transmitted) is limited to a certain range, and there is also a problem with the light pattern of the pellicle thin film becoming monotonous. When the light pattern is monotonous, it is difficult for an experimenter to perform experiments under various conditions using the pellicle thin film.

[0006] In addition, since the pellicle thin film has a low emissivity (the degree to which it emits heat transmitted through light), the temperature of the pellicle thin film cannot be maintained at a preset temperature, and there is a problem with the reduced durability of the pellicle thin film. Prior art literature

[0007] (Patent Document 0001) KR 10-2015-0121293 A The problem to be solved

[0008] The present invention aims to solve the above-mentioned problems by providing a pellicle for EUV lithography using a stencil mask with an increased transmittance range, diversified light patterns, and improved durability, and a method for manufacturing a pellicle for EUV lithography. means of solving the problem

[0009] A method for fabricating a pellicle for EUV lithography using a stencil mask according to embodiments of the present invention for solving the above problem comprises: a step of preparing a substrate; a step of placing a first mask having a first through hole formed therein on the substrate; a step of depositing a first thin film layer on the first through hole and on the first mask; a step of removing the first mask to form a first membrane layer having a first pattern hole on the substrate; a step of placing a second mask having a second through hole formed therein on the first membrane layer; a step of depositing a second thin film layer on the first pattern hole, the second through hole, and on the second mask; a step of removing the second mask to form a second membrane layer having the second pattern hole; and a step of etching the lower part of the substrate.

[0010] The step of depositing the second thin film layer comprises the step of fixing the second thin film layer, which is composed of a material different from the first membrane layer, to the first membrane layer.

[0011] The step of fixing the second thin film layer to the first membrane layer comprises the step of performing at least one of high-temperature heat treatment and plasma treatment on the first membrane layer and the second thin film layer; and the step of forming the second membrane layer having the second pattern hole comprises the step of having the second thin film layer remain at a position corresponding to the second through hole on the substrate and the first membrane, having the second pattern hole formed at a position corresponding to the second mask, and having the second membrane layer covering the first membrane layer formed.

[0012] The step of performing at least one of high-temperature heat treatment and plasma treatment on the first membrane layer and the second thin film layer includes the step of changing the physical properties of the contact area between the first membrane layer and the second thin film layer.

[0013] The step of forming a second membrane layer covering the first membrane layer comprises the step of manufacturing the second membrane layer to have different transmittances and emissivitys through the first membrane layer having a first transmittance and a first emissivity, the second thin film layer having a second transmittance and a second emissivity, and the contact portion having a third transmittance and a third emissivity.

[0014] The step of forming a first membrane layer having a first pattern hole on the substrate comprises the step of having the first thin film layer remain at a position corresponding to the first through hole on the substrate, forming the first pattern hole at a position corresponding to the first mask, and manufacturing the first membrane layer.

[0015] The step of depositing a first thin film layer on the upper portion of the first through hole and the first mask comprises: a step in which one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, or liquid coating is performed and the first thin film layer is applied.

[0016] The step of depositing a second thin film layer on the upper portion of the first pattern hole, the second through hole, and the second mask comprises: a step in which one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, or liquid coating is performed, and the second thin film layer is applied.

[0017] The step of depositing a first thin film layer on the upper portion of the first through-hole and the first mask comprises the step of depositing a first thin film layer on the lower portion of the substrate; the step of depositing a second thin film layer on the upper portion of the first pattern hole, the second through-hole and the second mask comprises the step of depositing a second thin film layer on the lower portion of the first thin film layer; and the step of etching the lower portion of the substrate comprises the step of attaching a first etching mask having a first etching hole formed on the lower portion of the second thin film layer; and the step of sequentially etching the second thin film layer, the first thin film layer, and the substrate along the first etching hole.

[0018] Prior to the step of etching the lower part of the substrate, the method comprises: a step of placing a second etching mask having a second etching hole formed on the upper part of the second membrane layer; and a step of etching the second membrane layer and the first membrane layer along the second etching hole to form a third pattern hole in which at least a portion is connected to the second pattern hole.

[0019] Prior to the step of etching the lower part of the substrate, the method further includes the step of placing a third mask having a third through-hole formed therein on the second membrane layer; the step of depositing a third thin film layer on the upper part of the second pattern hole, the third through-hole, and the third mask; and the step of removing the third mask to form a third membrane layer having the third pattern hole.

[0020] A pellicle for EUV lithography according to one embodiment of the present invention, which is exposed to EUV and allows light to be transmitted, comprises: a pellicle frame; and a pellicle thin film formed on the upper portion of the pellicle frame and having a plurality of pattern holes provided on the upper portion thereof, wherein the pellicle thin film is formed of at least two materials having different physical properties.

[0021] The above pellicle thin film comprises: a first membrane layer disposed on the upper part of the pellicle frame and having a first pattern hole; a second membrane layer having a second pattern hole, with a portion of it being inserted into the first pattern hole and the remainder disposed on the first membrane layer; and a boundary surface formed at the boundary between the first membrane layer and the second membrane layer; wherein the first membrane layer and the second membrane layer are formed of different materials and have different physical properties regarding transmittance and emissivity.

[0022] The above interface is formed such that its physical properties regarding transmittance and emissivity differ from those of the first membrane layer and the second membrane layer, respectively.

[0023] The first membrane layer is configured such that a portion of it is covered by the second membrane layer, and the remaining portion is exposed to the outside.

[0024] The first membrane layer comprises a Si-based material, and the second membrane layer comprises at least one of a metal material and a metal silicide-based material.

[0025] The first membrane layer comprises at least one of SiN, SiC, MoSi, ZrSi, WSi, TaSi, TiSi, NiSi, and CoSi, and the second membrane layer comprises at least one of Mo, Ru, Zr, Co, W, Ni, Ti, and Ta. Effects of the invention

[0026] According to the present invention, since the pellicle thin film is composed of heterogeneous materials with different physical properties, the pellicle thin film has different transmittances. Since the pellicle thin film has a wide range of transmittances, the pattern of light transmitted by the pellicle thin film becomes diverse.

[0027] In addition, since the light patterns become more diverse, experimenters can conduct various experiments using the pellicle thin film.

[0028] In addition, since the pellicle thin film is composed of heterogeneous materials with different physical properties and has a wide range of emissivity, heat from the pellicle thin film is easily released, and the temperature of the pellicle thin film is maintained below a preset temperature. That is, heat transmitted by various light of different wavelengths is released through the various emissivity of the pellicle thin film. Therefore, the durability of the pellicle thin film is maintained. Brief explanation of the drawing

[0029] FIG. 1 is a flowchart of a method for manufacturing a pellicle for EUV lithography according to one embodiment of the present invention. FIGS. 2(a) to 2(d) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to one embodiment of the present invention. FIG. 3(a) and FIG. 3(d) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to one embodiment of the present invention. Figure 4 is an enlarged view of part A of Figure 3 (b). FIG. 5 is a flowchart of a method for manufacturing a pellicle for EUV lithography according to another embodiment of the present invention. FIGS. 6(a) to 6(f) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to another embodiment of the present invention. FIGS. 7(a) to 7(e) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to another embodiment of the present invention. Specific details for implementing the invention

[0030] The embodiments described in this specification may be modified in various ways. Specific embodiments may be depicted in the drawings and described in detail in the detailed description. However, specific embodiments disclosed in the accompanying drawings are intended only to facilitate understanding of various embodiments. Accordingly, the technical concept is not limited by specific embodiments disclosed in the accompanying drawings, and it should be understood that it includes all equivalents or substitutions that fall within the spirit and scope of the invention.

[0031] Terms including ordinal numbers, such as first, second, etc., may be used to describe various components, but these components are not limited by the aforementioned terms. The aforementioned terms are used solely for the purpose of distinguishing one component from another.

[0032] In this specification, terms such as “comprising” or “having” are intended to specify the existence of the features, numbers, steps, actions, components, parts, or combinations thereof described in the specification, and should be understood as not precluding the existence or addition of one or more other features, numbers, steps, actions, components, parts, or combinations thereof. When a component is described as being “connected” or “connected” to another component, it should be understood that it may be directly connected to or connected to that other component, or that there may be other components in between. On the other hand, when a component is described as being “directly connected” or “directly connected” to another component, it should be understood that there are no other components in between.

[0033] Meanwhile, a "module" or "part" for a component as used in this specification performs at least one function or operation. Furthermore, a "module" or "part" may perform a function or operation by hardware, software, or a combination of hardware and software. Additionally, a plurality of "modules" or a plurality of "parts," excluding a "module" or "part" that must be performed on specific hardware or on at least one processor, may be integrated into at least one module. A singular expression includes a plural expression unless the context clearly indicates otherwise.

[0034] Furthermore, in describing the present invention, if it is determined that a detailed description of related known functions or configurations may unnecessarily obscure the essence of the invention, such detailed description is abbreviated or omitted.

[0035] Various embodiments are described in more detail below with reference to the attached drawings.

[0037] FIG. 1 is a flowchart of a method for manufacturing a pellicle for EUV lithography using a stencil mask according to an embodiment of the present invention, FIG. 2(a) to FIG. 2(d) are schematic diagrams of the process sequence of an EUV lithography pellicle according to an embodiment of the present invention, FIG. 3(a) and FIG. 3(d) are schematic diagrams of the process sequence of an EUV lithography pellicle according to an embodiment of the present invention, and FIG. 4 is an enlarged view of part A of FIG. 3(b).

[0038] Hereinafter, with reference to FIGS. 1 to 4, a method for manufacturing a pellicle for EUV lithography using a stencil mask according to an embodiment of the present invention will be described.

[0039] A method for manufacturing a pellicle for EUV lithography using a stencil mask according to an embodiment of the present invention comprises the steps of: preparing a substrate (10) (S110); placing a first mask (20) having a first through hole (21) formed therein on the substrate (10) (S120); depositing a first thin film layer (30) on the first through hole (21) and the first mask (20) (S130); removing the first mask (20) to form a first membrane layer (121) having a first pattern hole (121a) on the substrate (10) (S140); placing a second mask (40) having a second through hole (41) formed therein on the first membrane layer (121) (S150); and depositing a second thin film layer (50) on the first pattern hole (121a), the second through hole (41), and the second mask (40) (S160). The method includes the step (S170) of removing the second mask (40) to form a second membrane layer (122) having a second pattern hole (122a) and the step (S180) of etching the lower part of the substrate (10).

[0040] Referring to FIG. 1 and FIG. 2(a), with the substrate (10) prepared (S110), a first mask (20) having a first through hole (21) formed therein is placed on the upper surface of the substrate (10) (S120). The first mask (20) is placed coaxially with respect to the substrate (10) with respect to a third direction. In the embodiments of the present invention, the case where the first mask (20) is a stencil mask is described as an example.

[0041] Referring to FIG. 1 and FIG. 2(b), a first thin film layer (30) is deposited inside the first through hole (21) and on the upper surface of the first mask (20) (S130). As shown in FIG. 2(b), the first thin film layer (30) is applied to the upper surface of the substrate (10) on which the first mask (20) is mounted by any one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, or liquid coating. The first thin film layer (30) is introduced into the space formed by the first through hole (21) from the upper surface of the substrate (10), and the first thin film layer (30) is applied to the upper surface of the portion of the first mask (20) where the first through hole (21) is not formed.

[0042] At the same time as the first thin film layer (30) is deposited on the inside of the first through hole (21) and on the upper part of the first mask (20), the first thin film layer (30) is also deposited on the lower part of the substrate (10).

[0043] Referring to FIG. 1 and FIG. 2(c), a first mask (20) is removed from a substrate (10) to form a first membrane layer (121) having a first pattern hole (121a) on the substrate (10) (S140). As shown in FIG. 2(c), as the first mask (20) (and a portion of the first thin film layer (30) applied on top of the first mask (20)) is removed, only the remaining portion of the first thin film layer (30) deposited at a position corresponding to the first through hole (21) with respect to the third direction remains on the substrate (10). The remaining portion of the first thin film layer (30) remaining on the substrate (10) forms the first membrane layer (121). In the first membrane layer (121), a first pattern hole (121a) is provided, which is formed at a position corresponding to the first mask (20) as the first mask (20) is removed.

[0044] Referring to FIG. 1 and FIG. 2(d), a second mask (40) having a second through hole (41) is seated on the first membrane layer (121) (S150). The second mask (40) is seated coaxially with the first membrane layer (121) with respect to the third direction. In the embodiments of the present invention, the case where the second mask (40) is a stencil mask is described exemplarily.

[0045] Referring to FIG. 1 and FIG. 3(a), a second thin film layer (50) is deposited on the first pattern hole (121a), the second through hole (41), and the second mask (40) (S160). As shown in FIG. 3(a), the second thin film layer (50) is applied to the upper part of the first membrane layer (121) on which the second mask (40) is placed by any one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, or liquid coating. The second thin film layer (50) is introduced into the space formed by the first pattern hole (121a) and the second through hole (41) on the upper part of the substrate (10), and the second thin film layer (50) is applied to the upper part of the second mask (40) where the second through hole (41) is not formed.

[0046] In the case where a second thin film layer (50) composed of a material different from the first membrane layer (121) is fixed to the first membrane layer (121), at least one of high-temperature heat treatment and plasma treatment is performed on the first membrane layer (121) and the second thin film layer (50). Through high-temperature heat treatment (or plasma treatment), the second thin film layer (50) is fixed on the first membrane layer (121), and an interface (123) is formed between the first membrane layer (121) and the second thin film layer (50) fixed on the first membrane layer (121). As shown in FIG. 3(b), the interface (123) is formed by deforming the portion where the first membrane layer (121) and the second thin film layer (50) come into contact with each other by heat. Accordingly, the physical properties of the interface (123) are changed through high-temperature heat treatment (or plasma treatment), and the interface (123) has different physical properties (i.e., third transmittance and third emissivity) from the first membrane layer (121) and the second thin film layer (50).

[0047] Meanwhile, at the same time as the process of depositing the second thin film layer (50) on the inside of the first pattern hole (121a), the inside of the second through hole (41), and the upper part of the second mask (40), the second thin film layer (50) is also deposited on the lower part of the first thin film layer (30) deposited on the lower part of the substrate (10).

[0048] Referring to FIG. 1 and FIG. 3(b), the second mask (40) is removed to form a second membrane layer (122) having a second pattern hole (122a) (S170). As shown in FIG. 3(b), as the second mask (40) (and a portion of the second thin film layer (50) applied on the upper part of the second mask (40)) is removed, only the remaining portion of the second thin film layer (50) deposited at positions corresponding to the first pattern hole (121a) and the second through hole (41) with respect to the third direction remains on the substrate (10) and the first membrane layer (121). The remaining portion of the second thin film layer (50) remaining on the substrate (10) and the first membrane layer (121) forms the second membrane layer (122). In the second membrane layer (122), as the second mask (40) is removed, a second pattern hole (122a) is formed at a position corresponding to the second mask (40).

[0049] Referring to FIG. 1 and FIG. 3(c), the lower part of the substrate (10) is etched (S180). As shown in FIG. 3(c), a first etching mask (60) is attached to the second thin film layer (50) deposited on the lower part of the first thin film layer (30) on the lower side of the substrate (10). The second thin film layer (50), the first thin film layer (30), and the substrate (10) are sequentially etched along the first etching hole (61) of the first etching mask (60). In one embodiment of the present invention, the case where the method of etching the second thin film layer (50), the first thin film layer (30), and the substrate (10) is wet etching is described as an example.

[0050] Referring to FIG. 3(d), the second thin film layer (50), the first thin film layer (30), and the substrate (10) are etched along the first etching hole (61) in the third direction, and a pellicle frame (110) is formed. As the pellicle frame (110) is formed by the etching process, the lower part of the first membrane layer (121) and the lower part of the second membrane layer (122) are opened, so a pellicle thin film (120) composed of the first membrane layer (121), the second membrane layer (122), and the interface (123) is formed.

[0051] When the pellicle frame (110) and the pellicle thin film (120) are formed, the first etching mask (60) attached to the lower part of the pellicle frame (110) is removed, and the fabrication of the EUV lithography pellicle (100) is completed.

[0052] Meanwhile, although not shown in the drawing, a third mask (not shown) having a third through-hole (not shown) formed in the second membrane layer (122) may be placed thereon prior to the step (S180) of etching the lower part of the substrate (10). In one embodiment of the present invention, the step of placing the third mask having a third through-hole formed in the second membrane layer (122) is described exemplarily between the step (S170) of removing the second mask (40) to form the second membrane layer (122) having a second pattern hole (122a) and the step (S180) of etching the lower part of the substrate (10).

[0053] After a third mask having a third through hole formed in the second membrane layer (122) is placed thereon, a third thin film layer (not shown) is deposited on the second pattern hole (122a), the third through hole, and the upper portion of the third mask. The third thin film layer is applied to the upper portion of the second membrane layer (122) on which the third mask is placed by any one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, or liquid coating. From the upper portion of the second membrane layer (122), the third thin film layer is introduced into the space formed by the second pattern hole (122a) and the third through hole, and the third thin film layer is applied to the upper portion of the third mask where the third through hole is not formed.

[0054] After depositing a third thin film layer on the second pattern hole (122a), the third through hole, and the third mask, the third mask can be removed to form a third membrane layer (not shown) having a third pattern hole (not shown). As the third mask is removed, only the remaining portion of the third thin film layer deposited at a position corresponding to the second pattern hole (122a) and the third through hole with respect to the third direction remains on the second membrane layer (122). The remaining portion of the third thin film layer remaining on the second membrane layer (122) forms the third membrane layer. As the third mask is removed, a third pattern hole is formed in the third membrane layer at a position corresponding to the third mask. Since the pellicle thin film (120) has another transmittance due to the third membrane layer and the third pattern hole, the pellicle thin film has a transmittance of various ranges. Therefore, the pattern of light transmitted by the pellicle thin film becomes diverse.

[0055] In addition, therefore, since the pellicle thin film (120) has another emissivity due to the third membrane layer and the third pattern hole, heat of the pellicle thin film is easily released and the durability of the pellicle thin film (120) is maintained.

[0057] Hereinafter, with reference to FIGS. 2(a) to FIGS. 4, the structure of a pellicle (100) for EUV lithography according to one embodiment of the present invention will be described.

[0058] It is explained by example that the EUV lithography pellicle (100) according to one embodiment of the present invention is manufactured by the method for manufacturing an EUV lithography pellicle using a stencil mask according to one embodiment of the present invention described above.

[0059] A pellicle (100) for EUV lithography according to one embodiment of the present invention is a film that is exposed to EUV (Extreme UltraViolet) (i.e., a light source of extreme ultraviolet wavelength) and allows light to pass through. Additionally, a pellicle (100) for EUV lithography according to one embodiment of the present invention is a film that protects a mask exposed to EUV.

[0060] A pellicle (100) for EUV lithography according to one embodiment of the present invention includes a pellicle frame (110) and a pellicle thin film (120).

[0061] The pellicle frame (110) supports the pellicle thin film (120). The pellicle frame (110) extends along the edge of the pellicle (100) for EUV lithography. The pellicle frame (110) is formed in a grid shape that extends along a first direction (see FIG. 2) and a second direction (a direction horizontally orthogonal to the first direction) (see FIG. 2). Additionally, the pellicle frame (110) has a predetermined thickness in a third direction (a direction perpendicularly orthogonal to the first and second directions, respectively, and the thickness direction of the pellicle thin film (120)) (see FIG. 2).

[0062] The pellicle frame (110) is formed by etching the substrate (10), the first thin film layer (30) attached to the lower part of the substrate (10), and the second thin film layer (50) attached to the lower part of the first thin film layer (30). The pellicle frame (110) is formed such that the second thin film layer (50), the first thin film layer (30), and the substrate (10) are sequentially stacked along the lower side from the upper side with respect to the third direction, and the center of the stacked second thin film layer (50), the first thin film layer (30), and the substrate (10) is formed in a concave indented structure.

[0063] A pellicle thin film (120) is formed on the upper part of a pellicle frame (110), and a plurality of pattern holes (second pattern holes (122a)) are provided on the upper part. The pellicle thin film (120) is formed from at least two materials having different physical properties. In one embodiment of the present invention, the case in which the pellicle thin film (120) is formed from two different materials is described as an example. However, it is obvious that the pellicle thin film (120) may be provided from a plurality of different materials.

[0064] The pellicle thin film (120) includes a first membrane layer (121), a second membrane layer (122), and an interface (123).

[0065] The first membrane layer (121) is placed on the upper part of the pellicle frame (110). The first membrane layer (121) is formed of a material different from the second membrane layer (122) and has a first transmittance and a first emissivity. The first transmittance and the first emissivity are intrinsic values ​​of the material forming the first membrane layer (121) (e.g., the first thin film layer (30)).

[0066] The first membrane layer (121) is formed from a material including a Si-based material. For example, the first membrane layer (121) is formed from a material including at least one of SiN, SiC, MoSi, ZrSi, WSi, TaSi, TiSi, NiSi, and CoSi.

[0067] The first membrane layer (121) has a first pattern hole (121a) that penetrates along a third direction. The first pattern hole (121a) is formed in multiple numbers and is spaced apart from the first membrane layer (121) to form a specific pattern. The pattern formed by the multiple first pattern holes (121a) in the first membrane layer (121) can be changed according to the purpose.

[0068] Additionally, the first membrane layer (121) is configured such that a portion of it is covered by the second membrane layer (122), and the remaining portion is exposed to the outside. The portion of the first membrane layer (121) covered by the second membrane layer (122) is formed at a position corresponding to the location of the second through-hole (41) of the second mask (40) used when depositing the second membrane layer (122) on the first membrane layer (121). Additionally, the portion of the first membrane layer (121) exposed is formed at a position corresponding to the location where the second mask (40) used when depositing the second membrane layer (122) on the first membrane layer (121) is placed.

[0069] A second membrane layer (122) is formed with a portion of it inserted into the first pattern hole (121a) and the remaining portion formed on the upper part of the first membrane layer (121). A second membrane layer (122) is formed through a second thin film layer (50) that is partially inserted into the first pattern hole (121a) and the remaining portion formed on the upper part of the first membrane layer (121). At least one of high-temperature heat treatment and plasma treatment is performed on the second thin film layer (50) to form the second membrane layer (122), and it is formed by being fixed to the upper part of the first membrane layer (121) and inside the first pattern hole (121a) (and the upper part of the substrate (10).

[0070] The second membrane layer (122) is formed of a material different from the first membrane layer (121) and has a second transmittance and a second emissivity. The second transmittance and the second emissivity are intrinsic values ​​of the material forming the second membrane layer (122) (e.g., the second thin film layer (50)).

[0071] The second membrane layer (122) is formed from a material comprising at least one of a metal material and a metal silicide-based material. For example, the second membrane layer (122) is formed from a material comprising at least one of Mo, Ru, Zr, Co, W, Ni, Ti, and Ta.

[0072] Additionally, the second membrane layer (122) has a second pattern hole (122a) that is concavely recessed inward along the third direction. The second pattern hole (122a) is formed in multiple numbers and is spaced apart from the second membrane layer (122) to form a specific pattern. The multiple second pattern holes (122a) are formed so that at least a portion overlaps with the first pattern hole (121a) with respect to the third direction. The pattern formed by the multiple second membrane layers (122) in the second membrane layer (122) can be changed according to the user's purpose.

[0073] Additionally, the second membrane layer (122) covers a portion of the first membrane layer (121). The portion of the second membrane layer (122) that covers the first membrane layer (121) is formed at a position corresponding to the position of the second through-hole (41) of the second mask (40) used when depositing the second thin film layer (50) on the first membrane layer (121).

[0074] Since a portion of the first membrane layer (121) is exposed to the outside, light is transmitted through the exposed portion of the first membrane layer (121) at a first transmittance. Additionally, through the second membrane layer (122) covering the remaining portion of the first membrane layer (121), light is transmitted at a second transmittance different from the light transmitted at the first transmittance through the first membrane layer (121), thereby diversifying the path of light. Accordingly, the pellicle film (120) has various transmittances through the first membrane layer (121) and the second membrane layer (122).

[0075] In addition, since a portion of the first membrane layer (121) is exposed to the outside and the remaining portion of the first membrane layer (121) is covered by the second membrane layer (122), the pellicle film (120) has various emissivity through the exposed portion and the covered portion, so that the pellicle film (120) can easily dissipate heat generated by light. Therefore, the durability of the pellicle film (120) is maintained.

[0076] Referring to FIG. 4, the interface (123) is provided at the boundary portion where the first membrane layer (121) and the second membrane layer (122) come into contact with each other. The interface (123) is formed by deforming the portion where the first membrane layer (121) and the second membrane layer (122) come into contact with each other during the process of high-temperature heat treatment or plasma treatment performed to fix the second thin film layer (50) (i.e., the second membrane layer (122)) to the first membrane layer (121).

[0077] The interface (123) has properties for transmittance and emissivity different from the properties for transmittance and emissivity of the first membrane layer (121) and the second membrane layer (122).

[0078] The interface (123) has a third transmittance different from the first and second transmittances, and a third emissivity different from the first and second emissivitys. The third transmittance and the third emissivity are intrinsic values ​​of the material constituting the interface (123).

[0079] Since light transmitted through the pellicle thin film (120) forms a light path with a first transmittance and a second transmittance and another light path through the interface (123), the pellicle thin film (120) forms various light paths. In addition, since the pellicle thin film (120) emits heat with a third emissivity in addition to emitting heat with a first emissivity and a second emissivity through the interface (123), heat is emitted more easily. That is, heat transmitted by various light of different wavelengths is emitted through the various emissivity of the pellicle thin film. Therefore, the durability of the pellicle thin film (120) is maintained.

[0081] FIG. 5 is a flowchart of a method for manufacturing a pellicle for EUV lithography using a stencil mask according to another embodiment of the present invention, FIG. 6(a) to 6(f) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to another embodiment of the present invention, and FIG. 7(a) to 7(e) are schematic diagrams of the process sequence of a pellicle for EUV lithography according to another embodiment of the present invention.

[0082] Hereinafter, with reference to FIGS. 5 to 7(e), a method for fabricating a pellicle for EUV lithography using a stencil mask according to another embodiment of the present invention will be described.

[0083] A method for manufacturing a pellicle for EUV lithography using a stencil mask according to another embodiment of the present invention comprises the steps of: preparing a substrate (10) (S210); placing a first mask (20) having a first through hole (21) formed therein on the substrate (10) (S220); depositing a first thin film layer (30) on the first through hole (21) and the first mask (20) (S230); removing the first mask (20) to form a first membrane layer (221) having a first pattern hole (221a) on the substrate (10) (S240); placing a second mask (40) having a second through hole (41) formed therein on the first membrane layer (221) (S250); and depositing a second thin film layer (50) on the first pattern hole (121a), the second through hole (41), and the second mask (40) (S260). The method includes the step of removing the second mask (40) to form a second membrane layer (220) having a second pattern hole (222a) (S270), the step of forming a third pattern hole (224) in the first membrane layer (121) and the second membrane layer (122) (S280), and the step of etching the lower part of the substrate (10) (S290).

[0084] Referring to FIG. 5 and FIG. 6(a), with the substrate (10) prepared (S210), a first mask (20) having a first through hole (21) is placed on top of the prepared substrate (10) (S220).

[0085] Referring to FIGS. 5 and FIGS. 6(b), a first thin film layer (30) is deposited inside the first through hole (21) and on the upper part of the first mask (20) (S230). The first thin film layer (30) is introduced into the space formed by the first through hole (21) from the upper part of the substrate (10), and the first thin film layer (30) is applied to the upper part of the first mask (20) where the first through hole (21) is not formed. Additionally, the first thin film layer (30) is also deposited on the lower part of the substrate (10).

[0086] Referring to FIGS. 5 and FIGS. 6(c), a first mask (20) is removed from a substrate (10) to form a first membrane layer (221) having a first pattern hole (221a) on the substrate (10) (S240).

[0087] Referring to FIGS. 5 and FIGS. 6(d), a second mask (40) having a second through hole (41) is placed on the first membrane layer (221) (S250).

[0088] Referring to FIGS. 5 and 6(e), a second thin film layer (50) is deposited on the upper portion of the first pattern hole (221a), the second through hole (41), and the second mask (40) (S260). The second thin film layer (50) is introduced into the space formed by the first pattern hole (221a) and the second through hole (41) on the upper portion of the substrate (10), and the second thin film layer (50) is applied to the upper portion of the second mask (40) where the second through hole (41) is not formed.

[0089] Additionally, when a second thin film layer (50) composed of a material different from the first membrane layer (221) is fixed to the first membrane layer (221), at least one of high-temperature heat treatment and plasma treatment is performed on the first membrane layer (221) and the second thin film layer (50). Through high-temperature heat treatment (or plasma treatment), the second thin film layer (50) is fixed on the first membrane layer (221), and as shown in FIG. 6(f), an interface (223) is formed between the first membrane layer (221) and the second thin film layer (50) fixed on the first membrane layer (221).

[0090] In addition, a second thin film layer (50) is deposited on the lower part of the first thin film layer (30) deposited on the lower part of the substrate (10).

[0091] Referring to FIGS. 5 and 6(f), a second membrane layer (222) having a second pattern hole (222a) is formed by removing the second mask (40) (S270). As the second mask (40) is removed, the second thin film layer (50) remaining on the substrate (10) and the first membrane layer (221) forms the second membrane layer (222). As the second mask (40) is removed, a second pattern hole (222a) is formed in the second membrane layer (222) at a position corresponding to the second mask (40).

[0092] Referring to FIGS. 5 and FIGS. 7(a) to 7(c), a third pattern hole (224) is formed in the first membrane layer (221) and the second membrane layer (222) (S280).

[0093] Referring to FIG. 5 and FIG. 7(a), a second etching mask (70) having a second etching hole (71) is placed on the upper part of the second membrane layer (222) (S281). The second etching mask (70) is placed coaxially with the substrate (10) with respect to the third direction.

[0094] Referring to FIG. 5 and FIG. 7(b), the first membrane layer (221) and the second membrane layer (222) are etched along the second etching hole (71). Only the first membrane layer (221) exposed to the outside along the second etching hole (71) of the second etching mask (70) is etched, or the second membrane layer (222) covering the first membrane layer (221) and the first membrane layer (221) covered by the second membrane layer (222) are etched sequentially. The first membrane layer (221) and the second membrane layer (222) can be etched through a wet etching method.

[0095] The first membrane layer (221) and the second membrane layer (222) are etched through a wet etching method, and a third pattern hole (224) is formed through a third direction in the portion where the first membrane layer (221) and the first membrane layer (221) and the second membrane layer (222) are stacked.

[0096] Referring to FIG. 5 and FIG. 7(c), the second etching mask (70) is removed from the second membrane layer (222).

[0097] Referring to FIG. 5 and FIG. 7(d), the lower part of the substrate (10) is etched (S290). As shown in FIG. 7(d), a first etching mask (60) is attached to the second thin film layer (50) deposited on the lower part of the first thin film layer (30) on the lower side of the substrate (10). Along the first etching hole (61) of the first etching mask (60), the second thin film layer (50), the first thin film layer (30), and the substrate (10) are sequentially etched.

[0098] Referring to FIG. 5 and FIG. 7(b), the substrate (10) of the second thin film layer (50) and the first thin film layer (30) is etched along the first etching hole (61) in the third direction, and a pellicle frame (210) is formed. As the pellicle frame (210) is formed by the etching process, the lower part of the first membrane layer (221) and the lower part of the second membrane layer (222) are opened, so a pellicle thin film (220) composed of the first membrane layer (221), the second membrane layer (222), the interface (223), and the third pattern hole (224) is formed.

[0099] When the pellicle frame (210) and the pellicle thin film (220) are formed, the first etching mask (60) attached to the lower part of the pellicle frame (210) is removed, and the fabrication of the EUV lithography pellicle (200) is completed.

[0101] Hereinafter, with reference to FIGS. 6(a) to FIGS. 7(e), the structure of a pellicle (200) for EUV lithography according to another embodiment of the present invention will be described.

[0102] It is explained by example that the EUV lithography pellicle (200) according to another embodiment of the present invention is manufactured by the method for manufacturing an EUV lithography pellicle using a stencil mask according to another embodiment of the present invention described above.

[0103] An EUV lithography pellicle (200) according to another embodiment of the present invention is an embodiment in which a pattern hole (a third pattern hole (224) of the EUV lithography pellicle (200) according to another embodiment of the present invention) is additionally provided to penetrate the second membrane layer (122) compared to an EUV pyrography pellicle (100) according to one embodiment of the present invention.

[0104] In the following description of the structure of the EUV lithography pellicle (200) according to one embodiment, the description of the structure identical to the EUV lithography pellicle (100) is omitted.

[0105] A pellicle (200) for EUV lithography according to another embodiment of the present invention includes a pellicle frame (210) and a pellicle thin film (220).

[0106] The pellicle frame (210) supports the pellicle thin film (220).

[0107] A pellicle thin film (210) is formed on the upper part of a pellicle frame (210), and a plurality of pattern holes (second pattern holes (222a)) are provided on the upper part, and a hole (third pattern hole (224)) penetrating the interior along a third direction is provided.

[0108] The pellicle thin film (220) includes a first membrane layer (221), a second membrane layer (222), an interface (223), and a third pattern hole (224).

[0109] The first membrane layer (221) is positioned on the upper part of the pellicle frame (210) and has a plurality of first pattern holes (221a) penetrating along a third direction.

[0110] A portion of the second membrane layer (220) is inserted into the first pattern hole (221a), and the remaining portion is formed on the upper part of the first membrane layer (221).

[0111] The boundary surface (223) is provided at the boundary portion where the first membrane layer (221) and the second membrane layer (222) come into contact with each other.

[0112] Referring to FIG. 7(c), the third pattern hole (224) is a hole that penetrates the pellicle thin film (220) along the third direction. The third pattern hole (224) is provided in multiple numbers and is formed irregularly in the pellicle thin film (220). The third pattern hole (224) is formed by etching a portion of the first membrane layer (221) that is not covered by the second membrane layer (222), and the remaining portion is formed by etching the first membrane layer (221) and the second membrane layer (222) that are covered by the second membrane layer (222). Through the plurality of third pattern holes (224) penetrating the interior of the pellicle thin film (220), the path through which light is transmitted becomes diverse. Accordingly, the pellicle thin film (220) has a range of transmittances, and the pattern of light transmitted through the pellicle thin film (220) or transmitted by the pellicle thin film (220) becomes diverse.

[0113] Additionally, the pellicle film (220) has a plurality of third pattern holes (224) penetrating its interior, through which a path for discharging heat generated by light is added. Accordingly, the pellicle film (220) has different emissivity, heat from the pellicle film (220) is easily discharged, and the temperature of the pellicle film (220) is maintained below a preset temperature, thereby maintaining the durability of the pellicle film (220).

[0115] Although embodiments of the present invention have been described in more detail with reference to the attached drawings, the present invention is not necessarily limited to these embodiments and may be modified in various ways within the scope of the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are intended to explain, not to limit, the technical spirit of the present invention, and the scope of the technical spirit of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. The scope of protection of the present invention shall be interpreted by the claims below, and all technical spirits within the equivalent scope shall be interpreted as being included within the scope of rights of the present invention. Explanation of the symbols

[0116] 100, 200: Pellicle for EUV lithography 110, 210: Pellicle frame 120, 220; Pellicle thin film 121, 221: First membrane layer 122, 222: Second membrane layer 123, 223: Interface

Claims

Claim 1 A step of preparing a substrate; a step of placing a first mask having a first through-hole formed therein onto the substrate; a step of depositing a first thin film layer on the first through-hole and on the first mask; a step of removing the first mask to form a first membrane layer having a first pattern hole on the substrate; a step of placing a second mask having a second through-hole formed therein onto the first membrane layer; a step of depositing a second thin film layer on the first pattern hole, the second through-hole and on the second mask; a step of removing the second mask to form a second membrane layer having a second pattern hole. A method for fabricating a pellicle for EUV lithography using a stencil mask having different physical properties for transmittance and emissivity, comprising: a step of etching the lower portion of the substrate; wherein a portion of the second membrane layer is inserted into the first pattern hole and the remaining portion is disposed on the first membrane layer, and an interface is formed between the first membrane layer and the second membrane layer, and the first membrane layer and the second membrane layer are formed of different materials. Claim 2 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 1, wherein the step of depositing the second thin film layer comprises the step of fixing the second thin film layer, which is composed of a material different from the first membrane layer, to the first membrane layer. Claim 3 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 2, wherein the step of fixing the second thin film layer to the first membrane layer comprises: a step of performing at least one of high-temperature heat treatment and plasma treatment on the first membrane layer and the second thin film layer; and the step of forming the second membrane layer having the second pattern hole comprises: a step of having the second thin film layer remain at a position corresponding to the second through hole on the substrate and the first membrane, having the second pattern hole formed at a position corresponding to the second mask, and having the second membrane layer covering the first membrane layer formed. Claim 4 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 3, wherein the step of performing at least one of high-temperature heat treatment and plasma treatment on the first membrane layer and the second thin film layer comprises the step of changing the physical properties of the contact area between the first membrane layer and the second thin film layer. Claim 5 A method for manufacturing a pellicle for EUV lithography using a stencil mask according to claim 4, wherein the step of forming a second membrane layer covering the first membrane layer comprises: a step of manufacturing the second membrane layer to have different transmittances and emissivitys through the first membrane layer having a first transmittance and a first emissivity, the second thin film layer having a second transmittance and a second emissivity, and the contact portion having a third transmittance and a third emissivity. Claim 6 A method for manufacturing a pellicle for EUV lithography using a stencil mask according to claim 1, wherein the step of forming a first membrane layer having a first pattern hole on the substrate comprises the step of having the first thin film layer remain at a position corresponding to the first through hole on the substrate, forming the first pattern hole at a position corresponding to the first mask, and manufacturing the first membrane layer. Claim 7 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 1, wherein the step of depositing a first thin film layer on the upper portion of the first through hole and the first mask comprises performing any one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, and liquid coating, and applying the first thin film layer. Claim 8 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 1, wherein the step of depositing a second thin film layer on the upper portion of the first pattern hole, the second through hole, and the second mask comprises: a step in which any one of chemical vapor deposition, atomic layer deposition by a precursor, sputtering, thermal deposition, and liquid coating is performed and the second thin film layer is applied. Claim 9 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 1, wherein the step of depositing a first thin film layer on the upper portion of the first through-hole and the first mask comprises the step of depositing a first thin film layer on the lower portion of the substrate; the step of depositing a second thin film layer on the upper portion of the first pattern hole, the second through-hole and the second mask comprises the step of depositing a second thin film layer on the lower portion of the first thin film layer; and the step of etching the lower portion of the substrate comprises the step of attaching a first etching mask having a first etching hole formed on the lower portion of the second thin film layer; and the step of sequentially etching the second thin film layer, the first thin film layer, and the substrate along the first etching hole. Claim 10 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 9, comprising: a step of placing a second etching mask having a second etching hole formed on the upper portion of the second membrane layer prior to the step of etching the lower portion of the substrate; and a step of etching the second membrane layer and the first membrane layer along the second etching hole to form a third pattern hole in which at least a portion is connected to the second pattern hole. Claim 11 A method for fabricating a pellicle for EUV lithography using a stencil mask according to claim 9, further comprising: a step of placing a third mask having a third through-hole formed therein on the second membrane layer prior to the step of etching the lower part of the substrate; a step of depositing a third thin film layer on the second pattern hole, the third through-hole, and the third mask; and a step of removing the third mask to form a third membrane layer having the third pattern hole. Claim 12 A pellicle for EUV lithography to be exposed to EUV and to transmit light, comprising: a pellicle frame; a pellicle thin film formed on the upper portion of the pellicle frame and having a plurality of pattern holes on the upper portion; wherein the pellicle thin film comprises: a first membrane layer disposed on the upper portion of the pellicle frame and having a first pattern hole; a second membrane layer having a second pattern hole, a portion of which is inserted into the first pattern hole and the remainder disposed on the first membrane layer; and an interface formed at the boundary between the first membrane layer and the second membrane layer; wherein the first membrane layer and the second membrane layer are formed of different materials and have different physical properties regarding transmittance and emissivity. Claim 13 delete Claim 14 In claim 12, the interface is an EUV lithography pellicle formed such that the physical properties with respect to transmittance and emissivity are different from those of the first membrane layer and the second membrane layer, respectively. Claim 15 A pellicle for EUV lithography according to claim 12, wherein the first membrane layer is configured such that a portion of it is covered by the second membrane layer and the remainder of it is exposed to the outside. Claim 16 A pellicle for EUV lithography according to claim 12, wherein the first membrane layer comprises a Si-based material and the second membrane layer comprises at least one of a metal material and a metal silicide-based material. Claim 17 A pellicle for EUV lithography according to claim 16, wherein the first membrane layer comprises at least one of SiN, SiC, MoSi, ZrSi, WSi, TaSi, TiSi, NiSi, and CoSi, and the second membrane layer comprises at least one of Mo, Ru, Zr, Co, W, Ni, Ti, and Ta.

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