Photoelectric synaptic device
A photoelectric synapse device with non-polar and semi-polar zinc oxide thin films, grown using controlled deposition methods, addresses performance optimization by enhancing synaptic performance and energy efficiency through improved photocurrent retention and responsiveness.
Patent Information
- Application Number
- KR1020250149952
- Authority / Receiving Office
- KR · KR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-10-16
- Publication Date
- 2026-11-05
- Estimated Expiration
- 2045-10-16
AI Technical Summary
Existing photoelectric synapse devices face challenges in optimizing device performance due to the need for controlling the crystallographic growth orientation of zinc oxide thin films to enhance energy efficiency and responsiveness to photostimulation.
A photoelectric synapse device comprising a non-polar or semi-polar thin film, such as zinc oxide, is developed with controlled deposition methods to preferentially grow non-polar and semi-polar planes over polar planes, utilizing substrates like sapphire and deposition techniques like sol-gel, CVD, and PVD, and incorporating an insulating layer for amplification and attenuation functions.
The device exhibits higher paired pulse-facilitation and prolonged photocurrent retention, enhancing the synaptic performance and learning capabilities through controlled crystallographic orientation, leading to improved energy efficiency and operational speed.
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Figure 112025115831381-PAT00005_ABST
Abstract
Description
Technology Field
[0001] This invention relates to a photoelectric synapse device according to one embodiment of the present invention. Background Technology
[0002] Recently, various neuromorphic devices are being researched to realize neuromorphic computing systems capable of mimicking various core functions of the brain. Research is underway on light-based synapses and neuromorphic devices that can improve the energy efficiency and increase the operating speed of neuromorphic computing systems.
[0003] In particular, photoelectric synapse devices are devices that exhibit memory characteristics through the generation and maintenance of photocurrent via photostimulation, enabling applications as sensing memory devices. The electrodes of such photoelectric synapse devices must maintain the highest possible transmittance to form a device capable of responding sensitively to photostimulation.
[0004] Zinc oxide (ZnO) is widely applied in optoelectronic devices such as light-emitting diodes, photodetectors, and transistors due to its wide bandgap of about 3.3 eV and excellent chemical and physical properties. In particular, depending on the crystal orientation of the zinc oxide thin film, it exhibits different optical and electrical properties depending on the (0002) polarization plane which exhibits piezoelectric polarization characteristics, the (10-10) and (11-20) non-polarization planes which do not exhibit piezoelectric polarization characteristics, and the (10-11) and (11-22) antipolarization planes which are finely present. Furthermore, it is a promising material that can be applied to nonpolarization and antipolarization optoelectronic devices (e.g., light-emitting devices, photodetectors, and optoelectronic synapse devices) due to photoelectric properties resulting from light stimulation based on the surface atomic composition of the polarization, nonpolarization, and antipolarization planes.
[0005] Furthermore, zinc oxide is compatible with low-cost solution processes, making it advantageous for fabricating large-area, flexible, and scalable neuromorphic devices, and the crystallographic orientation of ZnO thin films can play a crucial role in determining optoelectronic synaptic performance.
[0006] Therefore, there is a need to develop neuromorphic materials capable of optimizing device performance in optoelectronic computing systems by controlling the crystallographic growth orientation of ZnO thin films. The problem to be solved
[0007] According to one embodiment, the present invention provides a photoelectric synapse device comprising a photoactive layer based on a non-polarizing and / or semi-polarizing thin film (e.g., a wurtzite structured semiconductor) (e.g., zinc oxide).
[0008] However, the problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art from the description below. means of solving the problem
[0009] According to one embodiment, the photoelectric synapse device of the present invention may comprise a substrate; a photoactive layer comprising a nonpolar or semipolar thin film on the substrate; and an electrode layer on the photoactive layer.
[0010] According to one embodiment, the substrate may comprise at least one of a sapphire substrate, a glass substrate, and a silicon substrate.
[0011] According to one embodiment, the sapphire substrate may be a sapphire substrate having a plane other than the c-plane.
[0012] According to one embodiment, the nonpolar or semipolar thin film is deposited on the substrate, and the deposition is performed using at least one of a liquid phase synthesis, chemical vapor deposition (CVD), and physical vapor deposition (PVD) apparatus, and the nonpolar or semipolar thin film may be formed by controlling the polarization of the thin film by adjusting the growth parameters of the deposition apparatus so that the nonpolar and semipolar planes grow preferentially over the polarized planes.
[0013] According to one embodiment, the deposition may utilize at least one of the sol-gel method, thermal chemical vapor deposition (thermal CVD), atomic layer deposition (ALD), sputtering, and hydrothermal synthesis.
[0014] According to one embodiment, an insulating layer between the substrate and the photoactive layer may be further included, and when a gate voltage is applied to the substrate, a conductive filament channel is formed within the insulating layer to provide amplification and attenuation functions by three terminals.
[0015] According to one embodiment, the substrate is a p-type or n-type silicon substrate, and the insulating layer may comprise at least one of silicon oxide, silicon nitride oxide, and silicon nitride.
[0016] According to one embodiment, the thin film may comprise at least one of a group III-V nitride-based compound semiconductor and a group II-VI compound semiconductor having wurzite-structured piezoelectric polarization properties.
[0017] According to one embodiment, the thin film may comprise at least one of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and zinc oxide (ZnO).
[0018] According to one embodiment, the thin film comprises a zinc oxide thin film, and the zinc oxide thin film may have a value of [polarized zinc oxide-related XRD peak intensity / zinc oxide-related XRD total peak intensity] × 100 in the XRD pattern of 50% or less.
[0019] According to one embodiment, the paired pulse-facilitation (PPF) of the photoelectric synapse device may be higher than the PPF of the photoelectric synapse device including a polarization film.
[0020] According to one embodiment, the electrode may comprise at least one metal or an alloy thereof selected from Pt, Ag, Al, Ir, Au, Ru, W, Ti, Ni, Hf, and Cu. Effects of the invention
[0021] The present invention relates to a photoelectric synapse device comprising a photoactive layer based on a non-polarized and / or semi-polarized thin film (e.g., a wurtzite structured semiconductor) (e.g., zinc oxide) and a method for manufacturing the same. For example, the photoelectric synapse device may comprise a metal electrode (e.g., Al)-photoactive layer-metal electrode (e.g., Al) structure (Metal-Semiconductor-Metal, MSM).
[0022] The present invention provides a photoelectric synapse device comprising a thin film in which non-polarized and semi-polarized crystal planes are predominantly grown on a substrate, and a method for manufacturing the same. Brief explanation of the drawing
[0023] FIG. 1 is a schematic diagram showing the structure and operation of a photoelectric synapse device fabricated from a non-polarized or semi-polarized ZnO thin film fabricated by the sol-gel method on a sapphire substrate of the present invention according to one embodiment. FIG. 2 shows the XRD ω / 2θ scan spectra of a ZnO thin film fabricated by the sol-gel method on (a) a c-plane sapphire and (b) an m-plane sapphire substrate in an embodiment of the present invention according to one embodiment; and the XRD intensity ratio of each ZnO plane relative to the total ZnO peak of (c) ZnO / c-plane and (d) ZnO / m-plane sapphire based thereon. FIG. 3 shows (a) a schematic diagram of the structure of an Al-ZnO-Al (MSM) photoelectric synapse device fabricated on c-plane and m-plane sapphire substrates in an embodiment of the present invention according to one embodiment, (b) IV in the dark state (the inset shows the IV characteristics under UV application), (c) a photocurrent curve according to voltage when UV is applied, and (d) a change in photocurrent during natural decay after UV application for 5 seconds. FIG. 4 is a schematic diagram illustrating oxygen adsorption / desorption and carrier generation in (a) a polarization-dominant ZnO thin film on a c-sapphire and (b) a non-polarization / semipolarization-dominant ZnO thin film on an m-sapphire in an embodiment of the present invention, according to one embodiment. FIG. 5 shows (a) photocurrent decay characteristics after two photostimulations (0.5 seconds) and UV off (0.5 seconds), (b) PPF change with increasing Δt, (d) weight change with changing Δt (-100 to +100 seconds), and (c) photostimulation and electrical stimulation profiles to obtain weight change of an Al-ZnO-Al photoelectric synapse device fabricated on c-plane and m-plane sapphire in an embodiment of the present invention according to one embodiment. FIG. 6 shows the EPSC formation and maintenance time characteristics learned by injecting the length of the photostimulation as a dot (0.5 seconds) and a line (1.5 seconds) into an Al-ZnO-Al photoelectric synapse device fabricated on a c-plane (ad) and m-plane (eh) sapphire substrate in an embodiment of the present invention according to one embodiment (i) and (j) the EPSC change according to the photostimulation frequency), and the EPSC formation and maintenance time characteristics learned by injecting the length of the photostimulation as a dot (0.5 seconds) and a line (1.5 seconds) into a ZnO photoelectric synapse device fabricated on a c-plane (ad) and m-plane sapphire substrate in accordance with an embodiment of the present invention. Figure 7 shows the change in EPSC during the second learning and forgetting process after learning, in which an ultraviolet pulse (0.1 second pulse width, duty cycle 50%) is injected 100 times into an Al-ZnO-Al photoelectric synapse device fabricated on (a) c-plane and (b) m-plane sapphire substrates according to one embodiment of the present invention, and after the ultraviolet pulse is terminated and a forgetting process is performed. FIG. 8 shows a visual memory in which, according to one embodiment of the present invention, ultraviolet pulses (0.1 second pulse width, duty cycle 50%) were injected into five of the nine Al-ZnO-Al photoelectric synapse devices fabricated on (a) c-plane and (b) m-plane sapphire substrates in a "T" shape to perform photostimulation learning and forgetting processes through ultraviolet off. Specific details for implementing the invention
[0024] Embodiments of the present invention will be described in detail below with reference to the attached drawings. In describing the present invention, specific descriptions of related known functions or configurations will be omitted if it is determined that such detailed descriptions may unnecessarily obscure the essence of the present invention. Furthermore, the terms used in this specification are used to appropriately express preferred embodiments of the present invention, and these may vary depending on the intentions of the user or operator, or the conventions of the field to which the present invention belongs. Accordingly, the definitions of these terms should be based on the content throughout this specification. Identical reference numerals in each drawing indicate identical components.
[0025] Throughout the specification, when it is stated that a component is located "on" another component, this includes not only cases where a component is in contact with another component, but also cases where another component exists between the two components.
[0026] Throughout the specification, when a part is described as "including" a certain component, this means that it does not exclude other components but may include additional components.
[0027] Hereinafter, the photoelectric synapse device of the present invention will be described in detail with reference to the embodiments and drawings. However, the present invention is not limited to these embodiments and drawings.
[0028] According to one embodiment, the photoelectric synapse device (1) of the present invention may include a substrate (100); a photoactive layer (200) on the substrate (100); and an electrode layer (300) on the photoactive layer (200). The photoelectric synapse device (1) may be a nonpolar and / or semipolar photoelectric synapse device comprising a photoactive layer in which nonpolar and semipolar planes are dominant.
[0029] According to one embodiment, the substrate (100) is a sapphire substrate, a glass substrate, or a silicon substrate, and preferably may be a single-crystal sapphire substrate. The single-crystal sapphire substrate may provide excellent thermal and chemical stability. The sapphire substrate may form a non-polarized and / or semi-polarized thin film by controlling the deposition process on the c-plane, and preferably may be a sapphire substrate having a crystal plane other than the c-plane. For example, it may be an m-plane or r-plane sapphire substrate. This exhibits a unique crystallographic surface, such as the m-plane (10-10), which interacts differently from the lattice of the photoactive component (e.g., wurtzite structured semiconductor) (e.g., zinc oxide). Through this anisotropic interfacial interaction, the nucleation and alignment of zinc oxide particles during heat treatment may be guided and the preferential crystallographic orientation of the thin film may be influenced. In other words, the crystallographic growth orientation of zinc oxide during heat treatment after deposition can be controlled through anisotropic interface interactions with the sapphire substrate.
[0030] According to one embodiment, the substrate (100) may be a conductive substrate, and an insulating layer may be formed on the conductive substrate, and a photoactive layer (200) may be formed on the insulating layer. This allows for amplification and attenuation by three terminals to be implemented when a gate voltage is applied to the substrate, by forming a conductive filament channel within the insulating layer. For example, when a gate voltage is applied to the conductive substrate, a conductive filament channel is formed within the insulating layer, and through this, it is driven in a filament gate format. By utilizing the conductive filament channel within the insulating layer, the conductive substrate (e.g., substrate (100)) and the photoactive layer (200) can be electrically connected, the gate voltage applied to the conductive substrate (e.g., substrate (100)) can be controlled, and the flow of carriers in the conductive channel of the photoactive layer (200) can be controlled.
[0031] According to one embodiment, the conductive substrate acts as a gate electrode (e.g., bottom electrode) and may be selected from silicon, metal, and conductive oxide. For example, the conductive oxide may include at least one of In2O3, ZnO, IZO (Indium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), ZTO (Zinc Tin Oxide), TiO2, ITO (Indium Tin Oxide), HfIZO (Hafnium Indium Zinc Oxide), and SnO2. For example, the metal may include at least one of Ni, Au, Ag, Cu, Pt, Al, Ir, Ru, W, Ti, and Hf. For example, the conductive substrate may be a silicon (Si) semiconductor substrate. The conductive substrate (e.g., Si semiconductor substrate) may be a p-type or n-type silicon (Si) semiconductor substrate to form a heterojunction with the photoactive layer (200) and to induce an internal electric field when forming a conductive filament, and preferably may be p-type. For example, a metal and a conductive oxide may be applied as a coating layer on a transparent substrate (e.g., a glass substrate or a sapphire substrate).
[0032] According to one embodiment, the insulating layer comprises at least one of silicon oxide (e.g., SiO2), silicon nitride oxide (e.g., SiON), and silicon nitride (e.g., SiNx), and a conductive filament channel may be formed inside in response to the application of a gate voltage through the conductive substrate (e.g., substrate (100)). This enables the implementation of a filament gate structure based on the conductive filament channel. That is, a three-terminal device based on the filament gate effect utilizing the conductive filament channel can be implemented, and amplification and attenuation can be controlled by utilizing the gate voltage.
[0033] According to one embodiment, the photoactive layer (200) may include a nonpolar and / or semipolar thin film grown on a substrate (100). For example, the thin film may be deposited on the substrate (100), and the deposition may be performed using at least one of a liquid phase synthesis, chemical vapor deposition (CVD), and physical vapor deposition (PVD) apparatus. For example, the thin film may have a nonpolar and / or semipolar crystal plane that grows preferentially during a heat treatment process after being deposited (or coated) on the substrate. Additionally, by controlling the growth parameters of the CVD and PVD apparatus to control the polarization of the thin film, it may be possible to grow the nonpolar and semipolar planes preferentially over the polar planes.
[0034] According to one embodiment, the thin film comprises a semiconductor having wurzite-structured piezoelectric polarization properties, and may include, for example, at least one of a III-V nitride-based compound semiconductor having wurzite-structured piezoelectric polarization properties and a II-VI compound semiconductor having wurzite-structured piezoelectric polarization properties. The semiconductor may form the thin film by growing the non-polarized and semi-polarized planes preferentially over the polarized planes. The III-V nitride-based compound semiconductor may be gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), etc. The II-VI compound semiconductor may be zinc oxide (ZnO), etc.
[0035] According to one embodiment, the zinc oxide (ZnO) thin film may be a polycrystalline zinc oxide thin film in which nonpolar and semipolar crystal planes are preferentially grown, with planes (100), (002), (101), (102), (110), and (103) growing as main peaks in the XRD pattern. Preferably, nonpolar crystal planes (100) and (110); or semipolar crystal planes (101), (102), and (103) may be preferentially formed over the c-plane (i.e., the polarized plane (002)). For example, zinc oxide grown on an m-plane or r-plane sapphire substrate may have nonpolar and semipolar crystal planes preferentially formed over zinc oxide thin films or polarized zinc oxide grown on a c-plane sapphire substrate (under the same process conditions).
[0036] According to one embodiment, the zinc oxide thin film may have a value according to Formula 1 in the XRD pattern of 50% or less; less than 50%; 48% or less; 45% or less; 40% or less; or 30% or less.
[0037] [Equation 1]
[0038] [Polarized zinc oxide related XRD peak intensity / Zinc oxide related XRD total peak intensity] × 100
[0039] The above total peak may be the sum of the intensities of the nonpolarized, semipolarized, and polarized plane peaks.
[0040] According to one embodiment, the zinc oxide thin film may have a value according to Equation 2 in the XRD pattern of 50% or less; less than 50%; 48% or less; 45% or less; 40% or less; or 30% or less.
[0041] [Equation 2]
[0042] [Area of polarized zinc oxide-related XRD peaks / Total area of zinc oxide-related XRD peaks] × 100
[0043] The above total peak may be the sum of the areas of the non-polarized, semi-polarized, and polarized plane peaks.
[0044] According to one embodiment, in the XRD pattern of the zinc oxide thin film, the peak area of the (100) plane relative to the total peak area (i.e., area ratio (%)) may be 10% to 15%, 10% to 13%, or 12% to 13%; the peak area of the (002) plane may be 40% to 46%, 42% to 46%, or 43% to 44%; the peak area of the (101) plane may be 30% to 32%, or 30% to 31%; the peak area of the (102) plane may be 5% to 8%, 5% to 7%, or 5% to 6%; and the peak area of the (110) plane may be 7% to 9%, or 7% to 8%. In the above XRD pattern, the total zinc oxide peak area may be the sum of the peak areas of the (100) plane, (002) plane, (101) plane, (102) plane and (110) plane.
[0045] According to one embodiment, in the XRD pattern of the zinc oxide thin film, the sum of the peak area of the (100) plane, the peak area of the (101) plane, the peak area of the (102) plane, and the peak area of the (110) plane (i.e., area ratio; percentage (%)) relative to the total peak area may be greater than the peak area of the (002) plane (i.e., area ratio; percentage (%)). For example, the sum of the peak area of the (100) plane, the peak area of the (101) plane, the peak area of the (102) plane, and the peak area of the (110) plane may be greater than 50%; 55% or more; or 60% or more. That is, the zinc oxide thin film may realize a nonpolar and / or semipolar active layer having a crystallographic orientation in which nonpolar / semipolar zinc oxide planes such as (101) and (100) grow preferentially over the polarized (002) zinc oxide plane on an m-plane or r-plane sapphire substrate.
[0046] According to one embodiment, the Full Width at Half Maximum (FWHM) of the peak of the (002) plane in the XRD pattern of the zinc oxide thin film may be 50 arcsec to 1000 arcsec.
[0047] According to one embodiment, the paired pulse-facilitation (PPF) of the photoelectric synapse device (1) may be higher than the PPF of the photoelectric synapse device comprising a polarization film. For example, the PPF of the photoelectric synapse device (1) comprising a thin film (e.g., a wurtzite structured semiconductor) (e.g., zinc oxide) in which the non-polarized and semi-polarized crystal planes are preferentially grown as a photoactive layer may be higher than that of the photoelectric synapse device comprising a polarization film (e.g., a wurtzite structured semiconductor) (e.g., zinc oxide).
[0048] The above polarized thin film may include a polarized thin film that satisfies 50% or less of the value of Equation 1 or Equation 2, or a polarized thin film that falls outside the definition of a photoactive layer (200) including a non-polarized / semi-polarized thin film of the present invention.
[0049] According to one embodiment, the paired pulse-facilitation (PPF) according to Equation 3 may be higher in a photoelectric synapse device (1) comprising a thin film having a greater fraction of non-polarized and semi-polarized planes (e.g., zinc oxide) than in a polarized thin film (e.g., zinc oxide). For example, the polarized (e.g., zinc oxide) thin film may be formed by the same process as the non-polarized and semi-polarized thin film (e.g., zinc oxide) of the photoelectric synapse device (1), differing only in crystal orientation (or, crystal plane of the sapphire substrate).
[0050] [Equation 3]
[0051] PPF=(A2 / A1) × 100 %
[0052] In the above Equation 1, when proceeding in the order of 1) 0.5 seconds of UV application, t seconds of UV termination, 2) 0.5 seconds of UV application, and 3) UV termination, and then performing natural extinction,
[0053] A1 is 1) the photocurrent (EPSC, Excitatory Post Synaptic Current) value after 0.5 seconds of UV application, and
[0054] A2 may be the photocurrent (EPSC, Excitatory Post Synaptic Current) value after 2) 0.5 seconds of ultraviolet application. The above t seconds may be from 0.5 seconds to 15 seconds.
[0055] According to one embodiment, when t second is 0.5 seconds, the PPF may be 170% or more; 175% or more; 178% or more; or 180% or more. When t second is 15 seconds, the PPF may be 140% or more; 145% or more; or 150% or more.
[0056] According to one embodiment, the photoelectric synapse element (1) is ultraviolet light (UV light; e.g., 266 nm, 66 μW cm²). -2 The retention rate of the photocurrent during natural decay after application for about 5 seconds may be 80% or more; or 90% or more. Here, the sum of the time for the application of the ultraviolet light and the natural decay may be within 40 seconds.
[0057] According to one embodiment, the EPSC of a photoelectric synapse device (1) having a nonpolar and / or semipolar photoactive layer may be higher than that of a photoelectric synapse device having a polarized active layer when the photostimulation time, the output of the photostimulation light source, the number of photostimulations, and the photostimulation frequency are increased, and the retention time (or retention rate) may be higher. For example, the nonpolar and semipolar zinc oxide active layer may exhibit a higher EPSC value and retention time (or retention rate) than the polarized zinc oxide active layer (e.g., the manufacturing process is the same except for the crystal orientation of the polarization plane).
[0058] For example, UV (e.g., (UV light; 266 nm, 66 μW cm⁻¹) -2 ) For a pulse duration of 0.5 to 3.0 seconds, the EPSC(mA) is 0.1 or higher; 0.3 or higher; or 0.5 or higher (or lower), and the retention rate within 20 seconds may be 80% or higher; or 90% or higher.
[0059] For example, light intensity 66 to 397 μW·cm -2 at EPSC(mA) is 0.2 or higher; 0.3 or higher; 0.5 or higher; or 0.6 or higher (or lower), and the retention rate within 20 seconds may be 80% or higher; or 90% or higher.
[0060] For example, at a pulse frequency of 20 to 200 mHz, the EPSC(mA) may be 0.2 or more; 0.4 or more; 0.8 or more; 1.0 or more; 1.2 or more; or 1.6 or more (or less), and the retention rate within 150 seconds may be 80% or more.
[0061] According to one embodiment, the thin film may have a thickness of 10 nm to 1000 nm; 10 nm to 800 nm; 10 nm to 500 nm; 10 nm to 200 nm; 10 nm to 100 nm; or 20 nm to 70 nm.
[0062] According to one embodiment, the electrode layer (300) is formed on the photoactive layer (200) as source and drain electrodes, and the electrode layer (300) may comprise at least one metal or alloy thereof selected from Pt, Ag, Al, Ir, Au, Ru, W, Ti, Ni, Hf, and Cu. Preferably, it may be Al.
[0063] According to one embodiment, the thickness of the electrode layer (300) may be 1 nm or more; 10 nm or more; 30 nm or more; 40 nm or more; 50 nm or more (or less); 60 nm or more (or less); 70 nm or more (or less); 100 nm or more (or less).
[0064] According to one embodiment, the present invention provides a method for manufacturing a photoelectric synapse device according to embodiments of the present invention, wherein the manufacturing method may include the steps of: preparing a substrate; forming a photoactive layer based on a thin film in which a non-polarized and / or semi-polarized surface is preferentially grown; and forming an electrode layer on the photoactive layer.
[0065] According to one embodiment, the step of preparing the substrate involves preparing a sapphire substrate, a glass substrate, or a silicon substrate, preferably a single-crystal sapphire substrate. For example, when preparing the sapphire substrate, a sapphire substrate having a crystal plane other than the c-plane (e.g., 100 in FIG. 1) may be prepared to form a non-polarized and / or semi-polarized thin film. Preferably, an m-plane or r-plane sapphire substrate (e.g., 100 in FIG. 1) may be prepared. The sapphire substrate having a crystal plane other than the c-plane (e.g., an m-plane or r-plane sapphire substrate) may guide the nucleation and alignment of zinc oxide particles during heat treatment through anisotropic interfacial interactions and influence the preferential crystallographic orientation of the zinc oxide thin film.
[0066] According to one embodiment, the step of forming the photoactive layer is to form a non-polarized and / or semi-polarized thin film on a prepared substrate, and the step of forming the photoactive layer may include: a step of forming a precursor coating film; a step of performing a first heat treatment; and a step of performing a second heat treatment.
[0067] According to one embodiment, the step of forming the precursor coating film may utilize deposition, liquid phase synthesis, or both. For example, a precursor solution may be prepared and a zinc oxide coating film may be formed through spin coating, spray coating, printing, bar coating, or roll coating. Preferably, a sol-gel process and spin coating may be used. For example, the zinc oxide precursor solution may be formed into a zinc oxide sol by stirring a zinc precursor salt; and monoethanolamine and 2-methoxyethanol; at a temperature of 90°C to 130°C; 100°C to 120°C; or about 100°C (°). The zinc precursor salt may be selected from acetates, nitrates, sulfates, chlorides, and hydrates thereof. For example, the above deposition may utilize chemical vapor deposition (CVD), physical vapor deposition (PVD), hydrothermal synthesis, etc. The above chemical vapor deposition (CVD) is thermal chemical vapor deposition (thermal CVD), and the physical vapor deposition (PVD) may be atomic layer deposition (ALD), electron beam deposition, thermal evaporation, sputtering, etc.
[0068] According to one embodiment, the first heat treatment step is a process of soft baking the coating film, and can be heat treated at a temperature of 100°C to 220°C; 120°C to 220°C; 150°C to 200°C; or 180°C to 200°C for 1 minute or more; 5 minutes or more; 1 minute to 30 minutes; 1 minute to 20 minutes; or 1 minute to 10 minutes. Residual solvent can be removed through this heat treatment.
[0069] According to one embodiment, the second heat treatment step may be performed at a high temperature to increase crystallinity and control the crystallographic growth orientation. That is, the orientation of the thin film (e.g., zinc oxide) may be controlled to a nonpolar and / or semipolar crystallographic orientation. For example, the crystallographic growth orientation may be controlled by utilizing anisotropic interface interactions with the sapphire substrate. For example, zinc oxide on an m-plane sapphire substrate or an r-plane sapphire substrate may be grown such that the planes (100), (110), (101), (102), and (103), which are nonpolar or semipolar crystallographic orientations, have preferential orientation rather than the (002) polarized plane.
[0070] According to one embodiment, the step of the second heat treatment may heat-treat the coating film that has undergone the first heat treatment at 700°C to 1000°C; 800°C to 1000°C; or 800°C to 900°C for less than 60 minutes (or less); less than 10 minutes; less than 8 minutes; or less than 5 minutes. By applying the mentioned temperature range, non-polarized and semi-polarized surfaces may be formed preferentially over polarized surfaces. For example, on an m-plane and / or r-plane sapphire substrate, non-polarized and semi-polarized zinc oxide surfaces may be formed preferentially over the polarized zinc oxide surface of a c-plane sapphire substrate, which is a polarized surface.
[0071] Examples
[0072] Preparation Example 1
[0073] A ZnO thin film was grown using the sol-gel method on a single-crystal sapphire substrate having c-plane (0001) and m-plane (10_10) orientations. Except for the substrate, all sol-gel processes were performed identically.
[0074] More specifically, a ZnO sol solution was prepared, applied onto each sapphire substrate by spin coating, and crystallization was carried out through heat treatment.
[0075] Preparation of ZnO sol solution
[0076] A precursor solution was prepared by dissolving zinc acetate dihydrate and monoethanolamine in 2-methoxyethanol in a 1:1 molar ratio. The solution was mixed and chelated by stirring at 1000 rpm at 1000 °C for 30 minutes to produce a sol.
[0077] Spin coating and heat treatment
[0078] The generated sol was spin-coated onto each sapphire substrate at approximately 6,000 rpm for 30 seconds using 5 drops per cycle. Each deposited layer was soft-baked at approximately 200 °C for 5 minutes to remove residual solvent. After completing the desired number of coating cycles, the films were thermally annealed in ambient air at 900 °C for approximately 1 minute to improve crystallinity. Through this process, polycrystalline ZnO thin films with an orientation-dependent grain structure and optical properties were fabricated.
[0079] Characteristic analysis
[0080] The surface morphology and grain size of the ZnO thin film were analyzed using atomic force microscopy (AFM).
[0081] Crystallographic properties and texture orientation were analyzed using X-ray diffraction (XRD) with θ / 2θ scans (Rigaku SmartLab model and measurement method: manual or standard method).
[0082] The light transmittance was evaluated using UV-visible absorption spectroscopy, and the optical bandgap was estimated through a Tauc plot.
[0083] Example 1
[0084] FIG. 2 shows the XRD ω / 2θ scan spectra of a ZnO thin film fabricated by the sol-gel method on (a) a c-plane sapphire and (b) an m-plane sapphire substrate in an embodiment of the present invention according to one embodiment; and the XRD intensity ratio of each ZnO plane relative to the total ZnO peak of (c) ZnO / c-plane and (d) ZnO / m-plane sapphire based thereon.
[0085] Figures 2(a) and 2(b) are graphs of XRD ω / 2θ scans performed to identify the crystal planes of ZnO thin films deposited by the sol-gel method on c-plane and m-plane sapphire substrates. It can be seen that both samples were not grown in a single direction of ZnO, but rather in various planes such as ZnO (100), (002), (101), (102), and (110). In Figure 2(a), for the ZnO grown on the c-plane sapphire substrate, (002) forms the highest and widest full width at half maximum and represents a larger area than other planes. In Figure 2(b), the ZnO thin film grown on the m-plane sapphire substrate shows the highest peak intensity at (002) but exhibits very thin characteristics. This peak intensity trend is similar to that of (002), and other planes also show similar intensity characteristics. Figures 2(c) and 2(d) show the ratio of each plane to the total intensity of the XRD ZnO peak planes of ZnO thin films fabricated on c-plane and m-plane sapphire substrates. In Figure 2(c), the ZnO thin film grown on the c-plane sapphire substrate has the highest (002) plane at 71.36% relative to the total ZnO peak area, followed by the (101) and (100) planes. In Figure 2(d), the ZnO thin film grown on the m-plane sapphire substrate shows (002) at 43.8%, (101) at 30.12%, and (100) at 12.64%. This indicates that the (002) plane is grown preferentially on the c-plane sapphire substrate, while on the m-plane sapphire, planes (101) and (100), excluding (002), account for more than 50%. From this result, it can be seen that polarized (002) ZnO planes are preferentially grown on the c-plane sapphire substrate, and non-polarized / anti-polarized planes such as (101) and (100) are preferentially grown on the m-plane sapphire substrate over the polarized (002) ZnO planes.
[0086] Preparation Example 2
[0087] Fabrication of photoelectric synapse devices
[0088] A photoelectric synapse device with an Al-ZnO-Al (MSM) structure was fabricated by using a ZnO thin film prepared by the sol-gel method on the c-plane and m-plane sapphire substrates prepared in Preparation Example 1 as the active channel layer, and depositing Al metal on each ZnO thin film. Specifically, a 50 nm thick aluminum (Al) electrode was deposited by thermal evaporation using a shadow mask to define a rectangular sensing area of 50 × 825 μm². The symmetrical electrode configuration was aligned along the long axis of the ZnO thin film to ensure uniform current flow under UV excitation. The structure of the photoelectric synapse device can be seen in Fig. 3(a).
[0089] Characteristic analysis
[0090] The electrical and synaptic performance of the Al-ZnO-Al (MSM) photoelectric synapse device was characterized using an HP4155A semiconductor parameter analyzer. Excitatory postsynaptic current (EPSC) was measured at a constant bias voltage of 1.0 V. Synaptic enhancement and degrade were measured by applying pulsed UV light (266 nm, 66 μW cm⁻¹) to the device. -2 It was emulated by applying ) and monitoring the transient current response.
[0091] Short-term plasticity was evaluated using PPF, and the facilitation index (A2 / A1X 100%) was calculated by applying two consecutive light pulses with different spike intervals. Long-term synaptic behavior was evaluated by applying repetitive light pulses and analyzing learning (EPSC accumulation) and forgetting (EPSC decay) characteristics. For visual memory simulation, image data was encoded by selectively irradiating a 3X3 MSM synaptic element array with patterned light pulses. The EPSC values of each pixel were recorded before and after light exposure to evaluate image retention and memory reinforcement under repetitive learning cycles.
[0092] Example 2
[0093] FIG. 3 shows (a) a schematic diagram of the structure of an Al-ZnO-Al (MSM) photoelectric synapse device fabricated on c-plane and m-plane sapphire substrates according to an embodiment of the present invention, (b) IV in the dark state (the inset shows the IV characteristics under UV application), (c) a photocurrent curve according to voltage when UV is applied, and (d) a change in photocurrent during natural decay after UV application for 5 seconds.
[0094] Figure 3(a) shows a schematic diagram of an Al-ZnO-Al structured photoelectric synapse device fabricated by depositing Al metal on a ZnO thin film fabricated by the sol-gel method on c-plane and m-plane sapphire substrates. The Al metal electrodes correspond to the source and drain electrodes.
[0095] Figure 3(b) shows the current-voltage characteristics in the dark state of Al-ZnO-Al devices fabricated on c-plane and m-plane sapphire substrates. It can be observed that the device fabricated on the m-plane sapphire substrate has a higher current flow compared to the device fabricated on the c-plane sapphire substrate. This is attributed to an increase in intrinsic carrier concentration caused by point defects in the ZnO thin film, which is predominantly non-polarized / anti-polarized, fabricated on the m-plane sapphire substrate.
[0096] In the inset of Fig. 3(b), UV current (UV light; 266 nm, 66 μWcm⁻¹) -2 The current-voltage curves when UV (applied for about 10 seconds) was applied show that higher current flows in both samples compared to the dark state. This is due to a decrease in resistance caused by photoexcited carriers formed in the thin film when UV is applied to the ZnO thin film fabricated by the sol-gel method.
[0097] Figure 3(c) shows the photocurrent when UV is applied, i.e., the value obtained by subtracting the current in the dark state from the current in the UV state, as a function of voltage. This indicates that a ZnO-based photoelectric synapse device with dominant nonpolarization / semipolarization fabricated on an m-plane sapphire substrate can generate more photocurrent than a device fabricated on a c-plane sapphire substrate. This means that the device fabricated on an m-plane sapphire substrate, which has dominant nonpolarization / semipolarization planes, generates more photoexcited carriers than the ZnO device fabricated on a c-plane sapphire substrate, thereby generating more photocurrent for ultraviolet light.
[0098] Figure 3(d) confirms the formation and decay of photoexcitation current as UV light is applied to the two devices for 5 seconds under 1.0 V and then terminated. Similar to the previous results, the ZnO device fabricated on an m-plane sapphire substrate, which is predominantly non-polarized / semi-polarized, not only forms a higher photoexcitation current but also exhibits slower decay characteristics.
[0099] This is because photoexcited carriers cannot recombine rapidly in ZnO thin films fabricated on m-plane sapphire substrates where non-polarized / semipolarized planes are dominant, and because the surface oxygen adsorption / desorption process—the mechanism for photocurrent formation during UV excitation of ZnO thin films—proceeds slowly, resulting in slower photocurrent decay. This slow decay characteristic can be utilized as a persistent photoconductivity (PPC) property that can enhance the learning characteristics induced by photostimulation in photoelectric synapse devices.
[0100] FIG. 4 is a schematic diagram illustrating oxygen adsorption / desorption and carrier generation in (a) a ZnO thin film with a dominant polarized plane on the c-sapphire phase and (b) a ZnO thin film with a dominant non-polarized / anti-polarized plane on the m-sapphire phase, according to one embodiment of the present invention.
[0101] In FIG. 4(a), the ZnO thin film with a dominant polarized plane on the c-sapphire exhibits stronger oxygen adsorption in the dark due to polarization and surface charge imbalance, but the presence of a strong internal electric field accelerates electron-hole recombination, thereby limiting the photocurrent response. However, as can be seen in FIG. 4(b), the ZnO thin film with a dominant nonpolarized / semipolarized plane grown on the m-sapphire exhibits relatively weak oxygen adsorption compared to the polarized (002) surface due to reduced surface polarization. When UV irradiated on ZnO with a dominant nonpolarized / semipolarized plane, photogenerated holes [contain] a relatively small number of adsorbed oxygen ions (O2 - Although it reacts efficiently with ), as the carrier lifetime increases, oxygen desorption occurs more effectively and more electrons are emitted to the conduction band. The reduced internal electric field extends the carrier lifetime, enabling continuous emission of free carriers and a stronger PPC (continuous photoconductivity) reaction. Therefore, the combination of reduced oxygen adsorption, more efficient desorption per adsorbed molecule, suppressed polarization-induced recombination, and extended carrier lifetime can realize a significantly enhanced PPC reaction in ZnO films dominated by non-polarized / antipolarized planes compared to ZnO films dominated by polarization. In other words, in ZnO films dominated by polarization planes, oxygen adsorption is strong, but the recombination rate is fast, so the PPC reaction is suppressed.
[0102] Example 3
[0103] FIG. 5 shows (a) two photostimulations (0.5 seconds) (UV light; 266 nm, 66 μW cm²) of an Al-ZnO-Al photoelectric synapse device fabricated on c-plane and m-plane sapphires in an embodiment of the present invention according to one embodiment. -2 (a) photocurrent decay characteristics after UV off (0.5 sec), (b) change in PPF with increasing Δt, (d) change in weight change with changing Δt (-100 to +100 sec), and (c) photo-stimulation and electrical-stimulation profiles to obtain weight change.
[0104] Figure 5(a) shows that to verify short-term plasticity, an Al-ZnO-Al photoelectric synapse device was fabricated using ZnO thin films deposited by the sol-gel method on c-plane and m-plane sapphire substrates, and the decay phenomenon of the photocurrent (EPSC, Excitatory Post Synaptic Current) formed by two photostimulations was confirmed through a natural decay process after the UV light was turned off and then UV light was applied for 0.5 seconds and then UV light was applied again for 0.5 seconds.
[0105] In the case of the ZnO device fabricated on an m-plane sapphire substrate, more than four times the EPSC was obtained compared to the device fabricated on a c-plane sapphire substrate, and the change in EPSC was small even during the natural decay process after two iterations. This indicates that the photoelectric synapse device fabricated on an m-plane sapphire substrate can store EPSC learned by UV stimulation for a long time. In addition, paired pulse-facilitation (PPF=(A2 / A1)x100%), expressed as the ratio of the first stimulus to the second stimulus, also showed a higher value for the device fabricated on the m-plane sapphire substrate at 178% when the light off time (Δt) was 0.5 s, compared to 158% for the device fabricated on the c-plane substrate. Furthermore, when the PPF was verified by increasing the light off time, as shown in Fig. 5(b), when Δt is 15 seconds, the device fabricated on the m-plane sapphire substrate exhibited a PPF of 148.2%, which is 34.7% higher than that of the device fabricated on the c-plane sapphire substrate (113.5%). To verify another short-term plasticity, as shown in Fig. 5(c), the weight change was measured by applying photostimulation (UV) for 0.1 seconds and then applying electrical stimulation of 1.0 V for 0.1 seconds after Δt, while varying Δt from -100 seconds to +100 seconds. It was observed that the devices exhibited symmetrical characteristics with respect to 0 seconds, and the weight change decreased as Δt increased. However, the device fabricated on the m-plane sapphire substrate showed a higher weight change than the device fabricated on the c-plane sapphire substrate across the entire time range.
[0106] In Fig. 5, the decay of the PPF as Δt increases was fitted using a double exponential function. PPF(Δt) = C1exp(-Δt / τ1) + C2exp(-Δt / τ2) (τ1 and τ2 correspond to the fast decay and slow decay time constants, respectively). For the c-plane (polarized) ZnO device, τ1 0.3 seconds, τ2 While it is 13.6 seconds, for the m-plane ZnO device, τ1 1.6 seconds, τ2 With 16.7 seconds, it indicates that the m-plane sample has a longer decay time in both fast and slow processes.
[0107] In Figures 5(b) and (d), the ZnO thin film with dominant non-polarized and semi-polarized planes fabricated on an m-plane sapphire substrate exhibits superior short-term memory characteristics compared to the ZnO thin film with dominant polarized planes fabricated on a c-plane sapphire substrate.
[0108] Example 4
[0109] FIG. 6 illustrates the EPSC formation and retention time characteristics learned by injecting the length of photostimulation as a dot (0.5 sec) and a line (1.5 sec) into an Al-ZnO-Al photoelectric synapse device fabricated on a c-plane (ad) and m-plane (eh) sapphire substrate in an embodiment of the present invention according to one embodiment (i) and (j) the EPSC change according to the photostimulation frequency), and an EPSC learned by injecting the length of photostimulation as a dot (0.5 sec) and a line (1.5 sec) into a ZnO photoelectric synapse device fabricated on a c-plane (ad) and m-plane sapphire substrate according to an embodiment of the present invention, in accordance with one embodiment of the present invention (i) and (j) the EPSC formation and retention time characteristics learned by injecting the length of photostimulation as a Mohs code "SYNAPSE". In FIG. 6, (a, e) UV pulse duration is 0.5 sec to 3.0 sec, and (b, f) light intensity is 66 to 397 μW·cm². -2 (c, g) the number of pulses is 1 to 20, and (d, h) the pulse frequency is 20 to 200 mHz.
[0110] In Figure 6, it was confirmed that regardless of the substrate, EPSC increased with increasing light source output, frequency, and duration of photostimulation. However, the photoelectric synapse device fabricated on an m-plane sapphire substrate exhibited higher EPSC under the same stimulation conditions and maintained the remaining EPSC for a longer period after photostimulation compared to the photoelectric synapse device fabricated on a c-plane sapphire substrate. This indicates that the ZnO thin film fabricated on the m-plane sapphire substrate, which is predominantly depolarized and semipolarized, exhibits superior photo-synapse characteristics. Furthermore, when EPSC was verified by applying a "SYNAPSE" in the form of a Mohs code by varying the photostimulation cycle to form 0.5 seconds (dots) and 1.5 seconds (lines), the ZnO photoelectric synapse device fabricated on the m-plane sapphire substrate also showed higher EPSC and superior retention characteristics after photostimulation learning. This corresponds to a very important characteristic for neuromorphic vision and in-sensor computing applications, and the combination of pulse-dependent EPSC enhancement (Fig. 6 (ah)) and stable image retention (Fig. 6 (ij)) demonstrates the excellent synaptic performance of the m-planar sapphire-based nonpolar / antipolar dominant ZnO optoelectronic synapse device.
[0111] Example 5
[0112] Figure 7 shows the change in EPSC during the second learning and forgetting process after learning, in which an ultraviolet pulse (0.1 second pulse width, duty cycle 50%) is injected 100 times into an Al-ZnO-Al photoelectric synapse device fabricated on (a) c-plane and (b) m-plane sapphire substrates according to one embodiment of the present invention, and after the ultraviolet pulse is terminated and a forgetting process is performed.
[0113] In Example 4, ultraviolet pulses (0.1 second pulse width, duty cycle 50%) were injected 100 times into an Al-ZnO-Al photoelectric synapse device fabricated on (a) c-plane and (b) m-plane sapphire substrates to obtain a maximum EPSC. After photo-stimulation learning, the ultraviolet light was turned off to attenuate the EPSC to 70% of the maximum EPSC. Then, photo-stimulation learning was performed again using ultraviolet pulses until the maximum EPSC obtained during the first learning was reached. Afterward, the ultraviolet light was turned off again to perform a forgetting process in which the EPSC learned by photo-stimulation disappeared. At this time, 70% of the maximum EPSC obtained by photo-stimulation was defined as the threshold EPSC, which is the boundary between learning and forgetting.
[0114] As shown in Fig. 7(a), it can be observed that the photoelectric synapse device fabricated on a c-plane sapphire substrate shows a decrease in the rate of increase up to the maximum EPSC with increasing optical pulses, whereas the device fabricated on an m-plane sapphire substrate shows a higher EPSC value as the EPSC increases linearly up to 100 repetitions. Additionally, during the forgetting process after the end of photostimulation, the time to reach the forgetting limit is 12 seconds for the device fabricated on the c-plane sapphire substrate, whereas the device fabricated on the m-plane sapphire substrate shows a very long forgetting time of 250 seconds.
[0115] In addition, during the forgetting process after the second learning, the device fabricated on the c-plane sapphire substrate showed a slight increase in the forgetting time to reach the forgetting limit, whereas the device fabricated on the m-plane sapphire substrate showed an EPSC higher than the forgetting limit at 250 seconds during the second forgetting process. This indicates that the ZnO thin film with dominant non-polarized and anti-polarized planes fabricated on the m-plane sapphire substrate exhibits superior long-term memory characteristics compared to the ZnO thin film with dominant polarization fabricated on the c-plane sapphire substrate.
[0116] Example 6
[0117] FIG. 8 shows a visual memory in which, according to one embodiment of the present invention, for nine Al-ZnO-Al photoelectric synapse devices fabricated on (a) c-plane and (b) m-plane sapphire substrates, ultraviolet pulses (0.1 second pulse width, duty cycle 50%) were injected into five devices in a "T" shape to perform photostimulation learning and a forgetting process through turning off the ultraviolet light. At this time, the photostimulation pulse injected during the learning process was injected 100 times to perform the learning process and obtain the maximum EPSC. After photostimulation learning, the ultraviolet light was turned off to perform a forgetting process in which the EPSC was attenuated to 70% of the maximum EPSC. Then, photostimulation learning was performed again using the ultraviolet pulse to reach the maximum EPSC obtained during the first learning, and after photostimulation learning, the ultraviolet light was turned off again to perform a forgetting process in which the EPSC learned by photostimulation disappeared. As in Example 5 above, during optical stimulation learning, all were learned in a dark "T" shape regardless of the substrate; however, as the forgetting process passed, the device fabricated on the c-plane sapphire substrate lost the completely learned "T" visual memory in 25 seconds, whereas the device fabricated on the m-plane sapphire substrate maintained the "T" image for more than 200 seconds. In the second learning, the devices fabricated on each sapphire showed a darker image due to repeated learning compared to the first; however, the photoelectric synapse device fabricated on the c-plane (Fig. 8 (a)) still exhibited the characteristic of completely disappearing in 25 seconds, whereas the photoelectric synapse device fabricated on the m-plane (Fig. 8 (b)) showed a darker "T" image than the first learning at 200 seconds.
[0118] The present invention provides a ZnO thin-film-based photoelectric synapse device and a method for manufacturing the same, which are based on a zinc oxide (ZnO) thin film formed through a sol-gel process and are fabricated on m-plane and r-plane sapphire substrates other than the c-plane, where non-polarized and semi-polarized ZnO thin films can be predominantly grown. Next, aluminum (Al) was deposited as a top electrode to fabricate a photoelectric synapse device with an Al / ZnO / Al structure.
[0119] The present invention fabricates a ZnO photoelectric synapse device in which non-polarized and semi-polarized planes are dominant, and can simultaneously achieve amplification of synaptic current (EPSC) and improvement of retention time in response to ultraviolet (UV) stimulation compared to a device fabricated on a c-plane sapphire substrate in which polarized ZnO planes are dominant. In particular, a device fabricated on an m-plane sapphire substrate can exhibit higher EPSC and long-term memory characteristics compared to a c-plane-based device.
[0120] The present invention can provide a photoelectric synapse device and a method for manufacturing the same, which can simultaneously secure a simple process and excellent substrate compatibility and can mimic short-term and long-term synaptic plasticity according to ultraviolet (UV) stimulation.
[0121] The present invention provides that ZnO thin films fabricated on m-plane and r-plane sapphire substrates preferentially form non-polarized and semi-polarized ZnO planes over the polarized c-plane ZnO plane, which exhibits high EPSC and enhanced memory retention time in response to UV stimulation, and can display characteristics such as a significantly reduced forgetting rate after repeated learning.
[0122] The present invention can provide a photoelectric synapse device (e.g., a non-polarized or semi-polarized photoelectric synapse device) that can implement pattern recognition and memory in an artificial vision system by integrating the synapse characteristics of individual devices in the verification of learning and memory functions of visual patterns (e.g., characters, shapes, etc.) by extending to a 3x3 pixel array structure.
[0123] The present invention can provide a photoelectric synapse device (e.g., a non-polarized or semi-polarized photoelectric synapse device) that can be applied to fields such as neuromorphic computing, artificial vision, next-generation intelligent sensors, and low-power AI systems.
[0124] Although the embodiments have been described above with reference to limited examples and drawings, those skilled in the art can make various modifications and variations from the description above. For example, suitable results may be achieved even if the described techniques are performed in a different order than described, and / or the described components are combined or assembled in a form different from described, or replaced or substituted by other components or equivalents. Therefore, other implementations, other embodiments, and equivalents to the claims below are also within the scope of the claims.
Claims
Claim 1 A photoelectric synapse device comprising: a substrate; a photoactive layer including a nonpolar or semipolar thin film on the substrate; and an electrode layer on the photoactive layer; wherein the nonpolar or semipolar thin film is grown preferentially over the polarized surface by controlling the polarization of the thin film by adjusting growth parameters of a deposition apparatus, and the paired pulse-facilitation (PPF) of the photoelectric synapse device is higher than the PPF of the photoelectric synapse device including the polarized thin film. Claim 2 A photoelectric synapse device according to claim 1, wherein the substrate comprises at least one of a sapphire substrate, a glass substrate, and a silicon substrate. Claim 3 A photoelectric synapse device according to paragraph 2, wherein the sapphire substrate is a sapphire substrate having a plane other than the c-plane. Claim 4 A photoelectric synapse device according to claim 1, wherein the non-polarized or semi-polarized thin film is deposited on the substrate, and the deposition is performed using at least one of a liquid phase synthesis, chemical vapor deposition (CVD), and physical vapor deposition (PVD) apparatus. Claim 5 A photoelectric synapse device according to claim 4, wherein the deposition utilizes at least one of the sol-gel method, thermal chemical vapor deposition (thermal CVD), atomic layer deposition (ALD), sputtering method, and hydrothermal synthesis method. Claim 6 A photoelectric synapse device according to claim 1, further comprising an insulating layer between the substrate and the photoactive layer, wherein when a gate voltage is applied to the substrate, a conductive filament channel is formed within the insulating layer to provide amplification and attenuation functions by three terminals. Claim 7 A photoelectric synapse device according to claim 6, wherein the substrate is a p-type or n-type silicon substrate, and the insulating layer comprises at least one of silicon oxide, silicon nitride oxide, and silicon nitride. Claim 8 A photoelectric synapse device according to claim 1, wherein the thin film comprises at least one of a III-V group nitride-based compound semiconductor and a II-VI group compound semiconductor having wurzite-structured piezoelectric polarization properties. Claim 9 In claim 8, the photoelectric synapse device comprises at least one of gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and zinc oxide (ZnO). Claim 10 A photoelectric synapse device according to claim 1, wherein the thin film comprises a zinc oxide thin film, and the zinc oxide thin film has a value of [polarized zinc oxide-related XRD peak intensity / zinc oxide-related total XRD peak intensity] × 100 in an XRD pattern of 50% or less. Claim 11 delete Claim 12 A photoelectric synapse device according to claim 1, wherein the electrode comprises at least one metal selected from Pt, Ag, Al, Ir, Au, Ru, W, Ti, Ni, Hf, and Cu, or an alloy thereof.
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