Semiconductor device

Abstract

A semiconductor device is provided. The semiconductor device includes an output terminal to which an output voltage is output, a switching converter that controls the output voltage based on a first reference voltage, a load capacitor to which a voltage corresponding to the output voltage is charged, a linear amplifier connected to one end of an AC coupling capacitor and controlling the voltage of the AC coupling capacitor based on a second reference voltage, and a switching circuit that controls the charging speed of the load capacitor and controls the connection between the output terminal and one end and the other end of the AC coupling capacitor.

Description

Technology Field

[0001] The present invention relates to a semiconductor device. Background Technology

[0002] A semiconductor system may include various semiconductor devices operating at different supply voltages. Accordingly, for the smooth operation of the semiconductor system, a semiconductor device capable of generating various supplies as needed is required.

[0003] For example, semiconductor devices requiring high-speed operation, such as signal transmission and reception, need to provide supply voltages that change rapidly. Accordingly, research on semiconductor devices capable of rapidly changing and outputting supply voltages is actively underway. The problem to be solved

[0004] The technical problem that the present invention aims to solve is to provide a semiconductor device capable of generating high voltage and having improved operating speed.

[0005] The technical problems of the present invention are not limited to those mentioned above, and other unmentioned technical problems will be clearly understood by those skilled in the art from the description below. means of solving the problem

[0006] A semiconductor device according to some embodiments for achieving the above technical problem comprises: an output terminal to which an output voltage is output; a switching converter that controls the output voltage based on a first reference voltage; a load capacitor to which a voltage corresponding to the output voltage is charged; a linear amplifier connected to one end of an AC coupling capacitor and controlling the voltage of the AC coupling capacitor based on a second reference voltage; and a switching circuit that controls the charging speed of the load capacitor and controls the connection between the output terminal and one end and the other end of the AC coupling capacitor.

[0007] A semiconductor device according to some embodiments for achieving the above technical problem comprises: an output terminal to which an output voltage is output; a switching converter that controls the output voltage based on a first reference voltage and a power supply voltage; a load capacitor to which a voltage corresponding to the output voltage is charged; a linear amplifier connected to one end of an AC coupling capacitor and controlling the voltage of the AC coupling capacitor based on a second reference voltage and a power supply voltage; a first switch that controls the connection between the output terminal and one end of the load capacitor; a second switch that controls the connection between the output terminal and one end of the AC coupling capacitor; and a third switch that controls the connection between the output terminal and the other end of the AC coupling capacitor.

[0008] A semiconductor device according to some embodiments for achieving the above technical problem comprises an output terminal that outputs an output voltage, a switching converter that controls the output voltage based on a first reference voltage and a power supply voltage, a load capacitor that charges a voltage corresponding to the output voltage, and a first linear amplifier connected to one end of a first AC coupling capacitor and that controls the voltage of the first AC coupling capacitor based on a second reference voltage and a power supply voltage, wherein in a first state in which the output voltage is maintained constant, the switching converter generates the output voltage and the first linear amplifier charges the first AC coupling capacitor, in a second state in which the output voltage changes to a first voltage smaller than a predetermined voltage, the first linear amplifier generates the output voltage without using the first AC coupling capacitor, and in a third state in which the output voltage changes to a second voltage larger than a predetermined voltage, the first linear amplifier generates the output voltage using the first AC coupling capacitor.

[0009] Specific details of other embodiments are included in the detailed description and drawings. Brief explanation of the drawing

[0010] FIG. 1 is a block diagram showing a semiconductor device according to some embodiments. FIG. 2 is a diagram that exemplarily embodies the switching circuit of FIG. 1. FIG. 3 is a timing diagram for explaining the operation of a semiconductor device according to some embodiments. FIGS. 4 and FIGS. 5 are drawings for explaining the operation of a semiconductor device according to some embodiments. FIGS. 6 and 7 are drawings for explaining the effects of a semiconductor device according to some embodiments. FIGS. 8 and 9 are timing diagrams for explaining the operation of a semiconductor device according to several other embodiments. FIG. 10 is a timing diagram for explaining the operation of a semiconductor device according to some other embodiments. FIG. 11 is a diagram illustrating the operation of a semiconductor device according to some other embodiments. FIGS. 12 and FIGS. 13 are timing diagrams for explaining the operation of a semiconductor device according to some other embodiments. FIG. 14 is a drawing showing a semiconductor device according to several other embodiments. FIG. 15 is a drawing showing a semiconductor device according to some other embodiments. FIG. 16 is a drawing showing a semiconductor device according to some other embodiments. FIG. 17 is a drawing showing a semiconductor system according to some embodiments. FIG. 18 is a block diagram showing a wireless communication device according to some embodiments. Specific details for implementing the invention

[0011] Hereinafter, embodiments according to the technical concept of the present invention will be described with reference to the attached drawings.

[0012] FIG. 1 is a block diagram showing a semiconductor device according to some embodiments.

[0013] Referring to FIG. 1, the semiconductor device (1) may include a switching converter (100), a linear amplifier (200), a load capacitor (C1), and an AC coupling capacitor (C2).

[0014] A semiconductor device (1) generates an output voltage (Vout) using a switching converter (100), a linear amplifier (200), a load capacitor (C1), and an AC coupling capacitor (C2), and the generated output voltage (Vout) can function as a supply voltage that provides power to electronic components. These electronic components may be referred to as loads of the semiconductor device (1).

[0015] For example, the output voltage (Vout) can be provided to a digital circuit that processes digital signals, an analog circuit that processes analog signals, or an RF circuit that processes RF signals, etc.

[0016] In some embodiments, the semiconductor device (1) may be a DC-DC converter that generates an output voltage (Vout) by changing the voltage level of an input voltage (e.g., Vbat), which is a DC (Direct Current) voltage. However, the embodiments are not limited thereto, and the technical details according to the present embodiment may also be applied to an AC-DC converter that generates an output voltage (Vout) by changing the voltage level of an input voltage, which is an AC (Alternating Current) voltage.

[0017] The switching converter (100) can control the output voltage (Vout) based on the first reference voltage (Vref1).

[0018] In some embodiments, the switching converter (100) may operate by receiving a first reference voltage (Vref1), an output voltage (Vout), an output current (I1) of a linear amplifier (200), and a voltage (Vc2) of an AC coupling capacitor (C2).

[0019] The first reference voltage (Vref1) is a reference signal for controlling the output voltage (Vout). For example, the switching converter (100) can control the output voltage (Vout) such that the output voltage (Vout) is the value obtained by multiplying the first reference voltage (Vref1) by a predetermined gain.

[0020] The output current (I1) is the current generated and output by the linear amplifier (200), and the voltage (Vc2) of the AC coupling capacitor (C2) may be the voltage difference between one end (N1) and the other end (N2) of the AC coupling capacitor (C2) (e.g., V2-V1).

[0021] In some embodiments, the switching converter (100) may include a plurality of switches and inductors internally.

[0022] As the first reference voltage (Vref1) changes, the on and off of switches placed inside the switching converter (100) are controlled, and accordingly, the path of the inductor current flowing through the inductor inside the switching converter (100) is switched so that the output of the switching converter (100) can be controlled.

[0023] For example, the switching converter (100) can increase the output voltage (Vout) by using the power supply voltage (Vbat) in response to the increase in the first reference voltage (Vref1) so that the output voltage (Vout) corresponds to the first reference voltage (Vref1). And, the switching converter (100) can decrease the output voltage (Vout) by using the power supply voltage (Vbat) so that the output voltage (Vout) corresponds to the first reference voltage (Vref1) in response to the decrease in the first reference voltage (Vref1).

[0024] The load capacitor (C1) can charge a voltage corresponding to the output voltage (Vout) output to the output terminal (OT). As the load capacitor (C1) is charged with a voltage corresponding to the output voltage (Vout), the output voltage (Vout) of the output terminal (OT) can be maintained.

[0025] In some embodiments, the current output from the switching converter (100) may be used to charge the load capacitor (C1) to a voltage corresponding to the output voltage (Vout). However, the embodiments are not limited thereto, and other configurations other than the switching converter (100) may be used to charge the load capacitor (C1).

[0026] The linear amplifier (200) can be connected to one end (N1) of the AC coupling capacitor (C2). The linear amplifier (200) can control the voltage (Vc2) of the AC coupling capacitor (C2) based on the second reference voltage (Vref2).

[0027] In some embodiments, the linear amplifier (200) may operate by receiving a first reference voltage (Vref1), an output voltage (Vout), a voltage (V2) at the other end (N2) of the AC coupling capacitor (C2), a second reference voltage (Vref2), and a voltage (V1) at one end (N1) of the AC coupling capacitor (C2).

[0028] The second reference voltage (Vref2) is a reference signal for controlling the voltage (Vc2) of the AC coupling capacitor (C2). For example, the linear amplifier (200) can control the voltage (Vc2) of the AC coupling capacitor (C2) such that the value obtained by multiplying the second reference voltage (Vref2) by a predetermined gain becomes the voltage (Vc2) of the AC coupling capacitor (C2). To this end, the linear amplifier (200) can operate by receiving the voltage (V2) of the other end (N2) of the AC coupling capacitor (C2) and the voltage (V1) of the first end (N1) of the AC coupling capacitor (C2), which is its own output voltage.

[0029] The switching circuit (300) can control the charging speed of the load capacitor (C1) and control the connection between the output terminal (OT) and the one end (N1) and the other end (N2) of the AC coupling capacitor (C2).

[0030] In some embodiments, the switching circuit (300) may include a plurality of switches for performing such operation. Hereinafter, a semiconductor device (1) including an exemplary switching circuit (300) will be described with reference to FIG. 2, but embodiments are not limited thereto.

[0031] FIG. 2 is a diagram that exemplarily embodies the switching circuit of FIG. 1.

[0032] Referring to FIG. 2, the switching circuit (300) may include a plurality of switches (SW1 to SW4).

[0033] A switch (SW1) can be placed between the switching converter (100) and the load capacitor (C1). A switch (SW1) can be placed between the output terminal (OT) and the load capacitor (C1).

[0034] The switch (SW1) can cause the load capacitor (C1) to be charged at a high speed to a voltage corresponding to the output voltage when the semiconductor device (1) operates in a first state. Additionally, the switch (SW1) can cause the load capacitor (C1) to be charged at a low speed to a voltage corresponding to the output voltage when the semiconductor device (1) operates in a second state or a third state.

[0035] Here, the first state may be a state in which the first reference voltage (Vref1) is maintained constant, and the output voltage (Vout) is also maintained constant. Here, the state in which the first reference voltage (Vref1) is maintained constant includes not only a state in which the first reference voltage (Vref1) is maintained completely constant, but also a state in which it is maintained within a predetermined set range. That is, not only a state in which the first reference voltage (Vref1) is maintained completely at 1V, but also a state in which the first reference voltage (Vref1) is maintained within 0.99V and 1.01V is considered a state in which the first reference voltage (Vref1) is maintained constant. Accordingly, the state in which the output voltage (Vout) is maintained constant includes not only a state in which the output voltage (Vout) is maintained completely constant, but also a state in which it is maintained within a predetermined set range.

[0036] The second state may be, for example, a state where the first reference voltage (Vref1) changes to a low voltage, and the output voltage (Vout) also changes to a low voltage. The third state may be, for example, a state where the first reference voltage (Vref1) changes to a high voltage, and the output voltage (Vout) also changes to a high voltage. A more detailed explanation regarding this will be provided later.

[0037] In some embodiments, the switch (SW1) may be composed of a transistor. In this case, the transistor can be completely turned on when the semiconductor device (1) operates in a first state. Accordingly, the load capacitor (C1) can fully receive the output current output from the switching converter (100) and can charge the voltage corresponding to the output voltage (Vout) at a fast rate.

[0038] Meanwhile, the transistor may be soft-turned or weakly turned on when the semiconductor device (1) operates in a second or third state. When the transistor is soft-turned in this way, the connection between the load capacitor (C1) and the switching converter (100) or the output terminal (OT) is not completely severed, and the load capacitor (C1) maintains a weak connection with the switching converter (100) or the output terminal (OT). Accordingly, the load capacitor (C1) can receive a portion of the output current output from the switching converter (100) and can charge a voltage corresponding to the output voltage (Vout) at a slow speed.

[0039] A switch (SW2) may be placed between one end (N1) and the output terminal (OT) of the AC coupling capacitor (C2), and a switch (SW3) may be placed between the other end (N2) and the output terminal (OT) of the AC coupling capacitor (C2). A switch (SW4) may be placed between the power supply voltage (Vbat) and the other end (N2) of the AC coupling capacitor (C2).

[0040] In some embodiments, the switches (SW2 to SW4) may each be composed of transistors. However, the switches (SW2 to SW4) do not operate in a soft-turn-on manner like switch (SW1), and may operate in a fully-turn-on or fully-turn-off manner.

[0041] Hereinafter, with reference to FIGS. 3 to 5, the operation of a semiconductor device according to several embodiments will be described.

[0042] FIG. 3 is a timing diagram for explaining the operation of a semiconductor device according to some embodiments. FIG. 4 and FIG. 5 are drawings for explaining the operation of a semiconductor device according to some embodiments.

[0043] Referring to FIGS. 3 and 4, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a low voltage (VL), switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) is turned on.

[0044] The switching converter (100) controls the output voltage (Vout) based on the first reference voltage (Vref1) and the output voltage (Vout), and as the switch (SW1) is turned on (fully turned on with the transistor), the load capacitor (C1) is rapidly charged to a voltage corresponding to the output voltage (Vout) by the output current of the switching converter (100).

[0045] The linear amplifier (200) outputs an output current (I1) based on the second reference voltage (Vref2), the voltage (V1) of one end (N1) of the AC coupling capacitor (C1), and the voltage (V2) of the other end (N1) of the AC coupling capacitor (C1) to control the voltage (Vc2) of the AC coupling capacitor (C1).

[0046] Since the switch (SW4) is turned on, the AC coupling capacitor (C1) is charged by the power supply voltage (Vbat) and the output current (I) of the linear amplifier (100), and a voltage (Vc2) is generated in the AC coupling capacitor (C1).

[0047] Since switches (SW2) and (SW3) are turned off, the linear amplifier (200) and the AC coupling capacitor (C1) are not connected to the output terminal (OT). That is, in the state (S1) where the output voltage (Vout) is maintained constant, the linear amplifier (200) and the AC coupling capacitor (C1) do not participate in generating the output voltage (Vout), and the switching converter (100) generates the output voltage (Vout).

[0048] Referring to FIGS. 3 and FIGS. 5, in a second state (S2) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a low voltage (VL), switch (SW1) is soft-turned on, switch (SW2) is turned on, and switches (SW3) and (SW4) are turned off.

[0049] The switching converter (100) operates based on the output current (I1) of the linear amplifier (100), and since the switch (SW1) is soft-turned (the transistor is weakly turned on), the load capacitor (C1) is slowly charged to a voltage corresponding to the output voltage (Vout) by the output current (I1) of the switching converter (100) or the linear amplifier (200).

[0050] Since the switch (SW2) is turned on, the linear amplifier (200) controls the output voltage (Vout) based on the first reference voltage (Vref1) and the output voltage (Vout), and since the switch (SW3) is turned off, the voltage (Vc2) of the AC coupling capacitor (C1) that was charged in the first state (S1) does not participate in the generation of the output voltage (Vout).

[0051] That is, in the second state (S2), the semiconductor device (1) uses a linear amplifier (200) to rapidly raise the output voltage (Vout) to a target voltage corresponding to the first reference voltage (Vref1). At this time, the load capacitor (C1) with a large capacity is weakly connected to the output terminal (OT) (the switch (SW1) is soft-turned), so it is slowly charged while the second state (S2) is maintained at a voltage corresponding to the output voltage (Vout), and does not slow down the rate at which the output voltage (Vout) rises to a target voltage corresponding to the first reference voltage (Vref1).

[0052] This is explained in more detail with reference to FIGS. 6 and FIGS. 7 as follows.

[0053] FIGS. 6 and 7 are drawings for explaining the effects of a semiconductor device according to some embodiments.

[0054] First, FIG. 6 is a drawing showing a semiconductor device (99) composed of a switching converter (199) and a load capacitor (CL), unlike the embodiment described above.

[0055] The switching converter (199) can control the output voltage (Vout) based on the first reference voltage (Vref1) and the output voltage (Vout).

[0056] In the case of the semiconductor device (1) illustrated in FIG. 6, in order to increase the output voltage (Vout), the switching converter (199) must increase the output current in accordance with the increase in the first reference voltage (Vref1) to increase the output voltage (Vout). However, since a large-capacity load capacitor (CL) is connected to the switching converter (199), a large portion of the output current of the switching converter (199) is used to charge the load capacitor (CL). Therefore, the output voltage (Vout) of the semiconductor device (1) cannot rise rapidly in the transition section (TR) as shown in B in FIG. 7.

[0057] The rate of increase (or rate of increase) of the output voltage (Vout) increases as the output current of the switching converter (199) increases, but since there is generally a limit to the amount of current that can flow in a semiconductor device, it is difficult to design it to be infinitely large.

[0058] In addition, the rate of rise of the output voltage (Vout) increases as the capacitance of the load capacitor (CL) decreases; however, since the output ripple voltage increases as the capacitance of the load capacitor (CL) decreases, it is also difficult to design the load capacitor (CL) with a small capacitance.

[0059] Therefore, the semiconductor device (199) has a slow rate of rise of the output voltage (Vout) as B due to the operation of charging the load capacitor (CL) during the transition period (TR) of the output voltage (Vout).

[0060] On the other hand, the semiconductor device (1) according to the present embodiment soft-turns on a switch (SW1) placed between a large-capacity load capacitor (C1) and an output terminal (OT) or a switching converter (100) during the transition period (TR) of the output voltage (Vout), as shown in FIG. 5. Accordingly, the load capacitor (C1) is slowly charged to a voltage corresponding to the output voltage (Vout) during the transition period (TR), but does not have a significant effect on the rise of the output voltage (Vout) as described above in the semiconductor device (199). Furthermore, the semiconductor device (1) according to the present embodiment can rapidly raise the output voltage (Vout) to a target voltage by using a linear amplifier (200) during the transition period (TR) of the output voltage (Vout), as shown in FIG. 7A. Accordingly, the operating speed of the semiconductor device (1) can be improved.

[0061] Next, referring to FIG. 3, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the low voltage (VL). In this case, the semiconductor device (1) performs the operation described earlier with reference to FIG. 4 again.

[0062] In some embodiments, the intermediate voltage (VM) may be a voltage at a level similar to the power supply voltage (Vbat). In this case, the low voltage (VL) may be a voltage at a level lower than the power supply voltage (Vbat), and the high voltage (VH) may be a voltage at a level higher than the power supply voltage (Vbat), but the embodiments are not limited thereto.

[0063] FIGS. 8 and 9 are timing diagrams for explaining the operation of a semiconductor device according to several other embodiments.

[0064] First, referring to FIG. 8, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a high voltage (VH), the semiconductor device (1) performs the operation described above with reference to FIG. 4. That is, switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) can be turned on.

[0065] Next, in a second state (S2) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a low voltage (VL), the semiconductor device (1) performs the operation described above with reference to FIG. 5. That is, switch (SW1) is soft-turned on, switch (SW2) is turned on, and switches (SW3) and (SW4) can be turned off.

[0066] Afterward, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the low voltage (VL). In this case, the semiconductor device (1) can perform the operation described above with reference to FIG. 4 again.

[0067] Next, referring to FIG. 9, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a low voltage (VL), the semiconductor device (1) performs the operation described above with reference to FIG. 4. That is, switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) can be turned on.

[0068] Next, in a second state (S2) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a low voltage (VL), the semiconductor device (1) performs the operation described above with reference to FIG. 5. That is, switch (SW1) is soft-turned on, switch (SW2) is turned on, and switches (SW3) and (SW4) can be turned off.

[0069] Afterward, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the low voltage (VL). In this case, the semiconductor device (1) can perform the operation described above with reference to FIG. 4 again.

[0070] FIG. 10 is a timing diagram for explaining the operation of a semiconductor device according to some other embodiments. FIG. 11 is a diagram for explaining the operation of a semiconductor device according to some other embodiments.

[0071] First, referring to FIG. 10, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a high voltage (VL), the semiconductor device (1) performs the operation described above with reference to FIG. 4. That is, switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) can be turned on.

[0072] Next, referring to FIGS. 10 and FIGS. 11, in a third state (S3) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a high voltage (VL), switch (SW1) is soft-turned on, switch (SW2) is turned off, switch (SW3) is turned on, and switch (SW4) is turned off.

[0073] The switching converter (100) operates based on the output current (I1) of the linear amplifier (100) and the voltage (Vc2) of the AC coupling capacitor (C2), and since the switch (SW1) is soft-turned (the transistor is weakly turned on), the load capacitor (C1) is slowly charged to a voltage corresponding to the output voltage (Vout) by the output current of the switching converter (100) or the voltage (Vc2) of the AC coupling capacitor (C2).

[0074] The linear amplifier (200) operates based on the first reference voltage (Vref1) and the output voltage (Vout), and since the switch (SW3) is turned on, the voltage (Vc2) of the AC coupling capacitor (C1) that was charged in the first state (S1) generates the output voltage (Vout). That is, the output voltage (Vout) can be rapidly increased to a voltage level higher than the power supply voltage (Vbat) by using the voltage (Vc2) of the AC coupling capacitor (C1). In other words, the semiconductor device (1) according to the present embodiment is capable of rapidly increasing the output voltage (Vout) to a voltage level higher than the power supply voltage (Vbat) by using the AC coupling capacitor (C1).

[0075] At this time, the large capacity load capacitor (C1) is weakly connected to the output terminal (OT) (switch (SW1) is soft-turned), so it is slowly charged to a voltage corresponding to the output voltage (Vout), and does not slow down the rate at which the output voltage (Vout) rises to the target voltage.

[0076] Next, referring to FIG. 10, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the high voltage (VL). In this case, the semiconductor device (1) performs the operation described earlier with reference to FIG. 4 again.

[0077] FIGS. 12 and FIGS. 13 are timing diagrams for explaining the operation of a semiconductor device according to some other embodiments.

[0078] First, referring to FIG. 12, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a low voltage (VL), the semiconductor device (1) performs the operation described above with reference to FIG. 4. That is, switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) can be turned on.

[0079] Next, in a third state (S3) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a high voltage (VH), the semiconductor device (1) performs the operation described above with reference to FIG. 11. That is, switch (SW1) can be soft-turned on, switch (SW2) can be turned off, switch (SW3) can be turned on, and switch (SW4) can be turned off.

[0080] Afterward, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the high voltage (VH). In this case, the semiconductor device (1) can perform the operation described above with reference to FIG. 4 again.

[0081] Next, referring to FIG. 13, in a first state (S1) in which the output voltage (Vout) of the semiconductor device (1) is maintained at a constant voltage between an intermediate voltage (VM) and a high voltage (VH), the semiconductor device (1) performs the operation described above with reference to FIG. 4. That is, switch (SW1) is turned on, switch (SW2) and switch (SW3) are turned off, and switch (SW4) can be turned on.

[0082] Next, in a third state (S3) in which the output voltage (Vout) of the semiconductor device (1) changes to a voltage between an intermediate voltage (VM) and a high voltage (VH), the semiconductor device (1) performs the operation described above with reference to FIG. 11. That is, switch (SW1) can be soft-turned on, switch (SW2) can be turned off, switch (SW3) can be turned on, and switch (SW4) can be turned off.

[0083] Afterward, when the output voltage (Vout) reaches the target voltage and the load capacitor (C1) is fully charged, the semiconductor device (1) operates again in a first state (S1) in which the output voltage (Vout) is maintained at a constant voltage between the intermediate voltage (VM) and the high voltage (VL). In this case, the semiconductor device (1) can perform the operation described above with reference to FIG. 4 again.

[0084] FIG. 14 is a drawing showing a semiconductor device according to several other embodiments. The following description focuses on the differences from the previously described embodiments.

[0085] Referring to FIG. 14, the semiconductor device (2) according to the present embodiment may further include an AC coupling capacitor (C3). And, the switching circuit (300-1) of the semiconductor device (2) may further include a switch (SW5) placed between the AC coupling capacitor (C3) and the power supply voltage (Vbat).

[0086] Accordingly, the semiconductor device (2) charges the AC coupling capacitor (C2) and the AC coupling capacitor (C3) using a linear amplifier (200) in the section where the output voltage (Vout) is maintained constant, and can rapidly change the output voltage (Vout) to a target voltage using at least one of the AC coupling capacitor (C2) and the AC coupling capacitor (C3) in the section where the output voltage (Vout) changes. Since the switch (SW1) is soft-turned in the section where the output voltage (Vout) changes, the output voltage (Vout) can be rapidly changed despite the large capacity load capacitor (CL).

[0087] FIG. 15 is a drawing showing a semiconductor device according to several other embodiments. The following description will focus on the differences from the embodiments described above.

[0088] Referring to FIG. 15, the semiconductor device (3) according to the present embodiment may further include a linear amplifier (400). And, the switch (SW2) of the switching circuit (300-2) of the semiconductor device (3) may be placed between the linear amplifier (400) and the output terminal (OT).

[0089] Accordingly, the semiconductor device (3) charges the AC coupling capacitor (C2) using a linear amplifier (200) in the section where the output voltage (Vout) is maintained constant, rapidly changes the output voltage (Vout) to a target voltage using a linear amplifier (400) in the section where the output voltage (Vout) changes to a low voltage, and rapidly changes the output voltage (Vout) to a target voltage using the AC coupling capacitor (C2) in the section where the output voltage (Vout) changes to a high voltage. Since the switch (SW1) is soft-turned in the section where the output voltage (Vout) changes, the output voltage (Vout) can be rapidly changed despite the large capacity load capacitor (CL).

[0090] FIG. 16 is a drawing showing a semiconductor device according to several other embodiments. The following description will focus on the differences from the embodiments described above.

[0091] Referring to FIG. 16, the semiconductor device (4) according to the present embodiment may further include a linear amplifier (400) and an AC coupling capacitor (C3). Additionally, the switching circuit (300-3) of the semiconductor device (3) may further include a switch (SW5) positioned between the AC coupling capacitor (C3) and the power supply voltage (Vbat), and a switch (SW2) may be positioned between the AC coupling capacitor (C3) and the output terminal (OT).

[0092] Accordingly, the semiconductor device (4) can charge the AC coupling capacitor (C2) using a linear amplifier (200) in the section where the output voltage (Vout) is maintained constant, and charge the AC coupling capacitor (C3) using a linear amplifier (400).

[0093] In addition, the semiconductor device (4) can rapidly change the output voltage (Vout) to a target voltage by using at least one of the AC coupling capacitor (C2) and the AC coupling capacitor (C3) during the interval in which the output voltage (Vout) changes. Since the switch (SW1) is soft-turned during the interval in which the output voltage (Vout) changes, the output voltage (Vout) can be rapidly changed despite the large capacity load capacitor (CL).

[0094] FIG. 17 is a drawing showing a semiconductor system according to some embodiments.

[0095] The semiconductor system (1300) may be a single semiconductor integrated circuit, such as a system-on-chip (SoC) in some embodiments, and may include a printed circuit board and packages mounted thereon in some embodiments.

[0096] As illustrated in FIG. 17, the semiconductor system (1300) may include first to fourth functional blocks (1310 to 1340) and a PMIC (1350).

[0097] The first to fourth function blocks (1310 to 1340) can operate based on power provided by the first to fourth supply voltages (VDD1 to VDD4) output from the PMIC (1350).

[0098] For example, at least one of the first to fourth function blocks (1310 to 1340) may be a digital circuit that processes digital signals, such as an application processor (AP), or an analog circuit that processes analog signals, such as an amplifier. Additionally, it may be a circuit that processes mixed signals, such as an analog-to-digital converter (ADC).

[0099] Although the semiconductor system (1300) in FIG. 17 is illustrated as having four functional blocks, in other embodiments the semiconductor system (1300) may have fewer than four or more than five functional blocks.

[0100] A PMIC (Power Management Integrated Circuit) (1350) can generate first to fourth supply voltages (VDD1 to VDD4) from an input voltage (V IN) and can change at least one level of the first to fourth supply voltages (VDD1 to VDD4) according to a voltage control signal (C_V). At least one of the first to fourth function blocks (1310 to 1340) can receive a supply voltage of a level that is dynamically variable according to the required performance and power consumption.

[0101] For example, the first function block (1310) may be an image processor that processes image data, and while processing a video containing a series of images, the first function block (1310) may receive a high level first supply voltage (VDD1), while while processing a photograph containing a single image, the first function block (1310) may receive a low level first supply voltage (VDD1).

[0102] The PMIC (1350) can receive a voltage control signal (C_V) corresponding to the performance and power consumption required by the first function block (1310), and the PMIC (1350) can increase or decrease the level of the first supply voltage (VDD1) based on the voltage control signal (C_V). In this way, the method of dynamically changing the level of the supply voltage of the function block may be referred to as Dynamic Voltage Scaling (DVS).

[0103] In some embodiments, the PMIC (1350) may include the semiconductor device described above, so that the level of the first supply voltage (VDD1) can be changed rapidly. In some embodiments, the first function block (1310) may stop operation while the level of the first supply voltage (VDD1) is changing and may resume operation after the level of the first supply voltage (VDD1) is changed. Accordingly, when the level of the first supply voltage (VDD1) is changed rapidly, the time taken to perform the operation by the first function block (1310) may be shortened, and as a result, the semiconductor system (1300) may provide improved performance.

[0104] FIG. 18 is a block diagram illustrating a wireless communication device according to some embodiments. Specifically, FIG. 18 illustrates a user device (User Equipment; UE) (or terminal) powered by a battery (2500).

[0105] In some embodiments, the wireless communication device (2000) may be included in a wireless communication system using a cellular network such as 5G, LTE, etc., or may be included in a WLAN (Wireless Local Area Network) system or any other wireless communication system.

[0106] In the wireless communication device (2000), the semiconductor devices described above can be used to provide variable power to the power amplifier (2160).

[0107] As illustrated in FIG. 18, the wireless communication device (2000) may include a transceiver (2100), a baseband processor (2200), an antenna (2300), a power circuit (2400), and a battery (2500).

[0108] The transceiver (2100) may include an antenna interface circuit (2110), a receiver including an input circuit (2120), a low-noise amplifier (2130), and a receiving circuit (2140), and a transmitter including a transmitting circuit (2150), a power amplifier (2160), and an output circuit (2170).

[0109] The antenna interface circuit (2110) can connect a transmitter or a receiver to the antenna (2300) depending on the transmission mode or the reception mode. In some embodiments, the input circuit (2120) may include a matching circuit or a filter, a low-noise amplifier (2130) may amplify the output signal of the input circuit (2120), and the reception circuit (2140) may include a mixer for down-conversion.

[0110] In some embodiments, the transmitting circuit (2150) may include a mixer for up-conversion, the power amplifier (2160) may amplify the output signal of the transmitting circuit (2150), and the output circuit (2170) may include a matching circuit or a filter.

[0111] The baseband processor (2200) can transmit and receive baseband signals with the transceiver (2100) and can perform modulation / demodulation, encoding / decoding, etc. In some embodiments, the baseband processor (2200) may be referred to as a modem. The baseband processor (2200) can generate a setting signal (SET) for setting an average power tracking mode or an envelope tracking mode, and can generate a setting signal (SET) for changing the level of the output voltage (Vout).

[0112] The power circuit (2400) can receive an input voltage (VIN, e.g., Vbat of the previously described embodiment) from the battery (2500) and can generate an output voltage (Vout) that provides power to the power amplifier (2160). The power circuit (2400) may include the semiconductor devices described above and may be capable of rapid level change of the output voltage (Vout).

[0113] Although embodiments of the present invention have been described above with reference to the attached drawings, the present invention is not limited to the above embodiments and can be manufactured in various different forms, and those skilled in the art will understand that the present invention can be implemented in other specific forms without changing the technical concept or essential features of the present invention. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive. Explanation of the symbols

[0114] 100: Switching converter 200: Linear amplifier 300: Switching circuit

Claims

Claim 1 A semiconductor device comprising: an output terminal to which an output voltage is output; a switching converter that controls the output voltage based on a first reference voltage; a load capacitor to which a voltage corresponding to the output voltage is charged; a linear amplifier connected to one end of an AC coupling capacitor and controlling the voltage of the AC coupling capacitor based on a second reference voltage; and a switching circuit that controls the charging speed of the load capacitor and controls the connection between the output terminal and one end and the other end of the AC coupling capacitor, wherein the switching circuit controls the load capacitor to be charged at a first speed corresponding to the output voltage in a first state, and controls the load capacitor to be charged at a second speed slower than the first speed corresponding to the output voltage in a second state. Claim 2 A semiconductor device according to claim 1, wherein the switching circuit comprises a switch that controls whether a power supply voltage is applied to the other end of the AC coupling capacitor. Claim 3 A semiconductor device according to paragraph 2, wherein the switching circuit comprises a transistor disposed between one end of the switching converter and the load capacitor, and the transistor is completely turned on in the first state and soft turned on in the second state. Claim 4 A semiconductor device according to paragraph 3, wherein the first state is a state in which the first reference voltage is maintained within a predetermined range, and the second state is a state in which the first reference voltage changes outside the predetermined range. Claim 5 A semiconductor device according to claim 1, wherein the switching circuit does not connect both one end and the other end of the AC coupling capacitor to the output terminal in the first state, and connects one end of the AC coupling capacitor to the output terminal in the second state, and does not connect the other end of the AC coupling capacitor to the output terminal. Claim 6 In claim 5, the switching circuit is a semiconductor device that, in a third state, does not connect one end of the AC coupling capacitor to the output terminal, but connects the other end of the AC coupling capacitor to the output terminal. Claim 7 A semiconductor device according to claim 1, wherein the switching circuit comprises a first switch disposed between one end of the AC coupling capacitor and the output terminal, and a second switch disposed between the other end of the AC coupling capacitor and the output terminal. Claim 8 In claim 7, the semiconductor device further comprises a third switch that controls whether a power supply voltage is applied to the other end of the AC coupling capacitor. Claim 9 A semiconductor device comprising: an output terminal to which an output voltage is output; a switching converter that controls the output voltage based on a first reference voltage and a power supply voltage; a load capacitor to which a voltage corresponding to the output voltage is charged; a linear amplifier connected to one end of an AC coupling capacitor and controlling the voltage of the AC coupling capacitor based on a second reference voltage and the power supply voltage; a first switch that controls the connection between the output terminal and one end of the load capacitor; a second switch that controls the connection between the output terminal and one end of the AC coupling capacitor; a third switch that controls the connection between the output terminal and the other end of the AC coupling capacitor; and a fourth switch that controls whether a power supply voltage is applied to the other end of the AC coupling capacitor. Claim 10 A semiconductor device according to claim 9, wherein in a first state in which the output voltage is maintained constant, the first switch is fully turned on, the second switch does not connect one end of the AC coupling capacitor to the output terminal, and the third switch does not connect the other end of the AC coupling capacitor to the output terminal, and in a second state in which the output voltage changes to a voltage smaller than a predetermined voltage, the first switch is softly turned on, the second switch connects one end of the AC coupling capacitor to the output terminal, and the third switch does not connect the other end of the AC coupling capacitor to the output terminal. Claim 11 A semiconductor device according to claim 9, wherein in a first state in which the output voltage is maintained constant, the first switch is fully turned on, the second switch does not connect one end of the AC coupling capacitor to the output terminal, and the third switch does not connect the other end of the AC coupling capacitor to the output terminal, and in a second state in which the output voltage changes to a voltage greater than a predetermined voltage, the first switch is softly turned on, the second switch does not connect one end of the AC coupling capacitor to the output terminal, and the third switch connects the other end of the AC coupling capacitor to the output terminal. Claim 12 A semiconductor device according to claim 9, wherein in a first state in which the output voltage changes to a voltage smaller than a predetermined voltage, the second switch connects one end of the AC coupling capacitor to the output terminal and the third switch does not connect the other end of the AC coupling capacitor to the output terminal, and in a second state in which the output voltage changes to a voltage larger than the predetermined voltage, the second switch does not connect one end of the AC coupling capacitor to the output terminal and the third switch connects the other end of the AC coupling capacitor to the output terminal. Claim 13 A semiconductor device according to claim 12, wherein the first switch comprises a transistor, and the transistor is soft-turned in the first and second states and fully turned on in the third state in which the output voltage is maintained constant. Claim 14 A semiconductor device according to claim 9, wherein the first switch controls the load capacitor to be charged at a first speed corresponding to the output voltage in a first state, and controls the load capacitor to be charged at a second speed slower than the first speed corresponding to the output voltage in a second state. Claim 15 In claim 9, the switching converter is a semiconductor device that operates by receiving the output voltage, the output current of the linear amplifier, and the voltage of the AC coupling capacitor. Claim 16 In claim 15, the linear amplifier is a semiconductor device that operates by receiving the output voltage, the first reference voltage, the output current of the linear amplifier, the output voltage of the linear amplifier, and the voltage of the other end of the AC coupling capacitor. Claim 17 A semiconductor device comprising: an output terminal to which an output voltage is output; a switching converter that controls the output voltage based on a first reference voltage and a power supply voltage; a load capacitor that is charged with a voltage corresponding to the output voltage; and a first linear amplifier connected to one end of a first AC coupling capacitor and controlling the voltage of the first AC coupling capacitor based on a second reference voltage and the power supply voltage, wherein in a first state in which the output voltage is maintained constant, the switching converter generates the output voltage and the first linear amplifier charges the first AC coupling capacitor; in a second state in which the output voltage changes to a first voltage smaller than a predetermined voltage, the first linear amplifier generates the output voltage without using the first AC coupling capacitor; and in a third state in which the output voltage changes to a second voltage larger than the predetermined voltage, the first linear amplifier generates the output voltage using the first AC coupling capacitor. Claim 18 A semiconductor device according to claim 17, wherein one end thereof further comprises a second AC coupling capacitor connected to the first linear amplifier, and in the second state, the first linear amplifier generates the output voltage using the second AC coupling capacitor. Claim 19 A semiconductor device according to claim 17, further comprising a second linear amplifier, wherein in the second state, the first linear amplifier does not generate the output voltage and the second linear amplifier generates the output voltage. Claim 20 A semiconductor device according to claim 19, wherein one end thereof further comprises a second AC coupling capacitor connected to the first linear amplifier, and in the second state, the second linear amplifier generates the output voltage using the second AC coupling capacitor.

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