REAL RANDOM NUMBER GENERATOR

Abstract

The invention relates to devices for generating real random numbers, comprising a chaotically oscillating digital autonomous Boolean network as the entropy source. According to the invention, the proposed chaotically oscillating digital autonomous Boolean network consists of three interconnected logic elements, two of which represent two-input "exclusive OR" and / or "exclusive OR-NOR" gates, and the third logic element has three inputs and one output, and implements a "counting ones" logic function, in which its output is set to a logic one if a logic one is present at no more than one of its inputs; otherwise, it is set to a logic zero. The technical result achieved is an increase in the rate of generating real random numbers while reducing power consumption.

Description

REAL RANDOM NUMBER GENERATOR FIELD OF INVENTION This invention relates to devices for generating real random numbers, including a chaotically oscillating digital autonomous Boolean network as the source of entropy. The following abbreviations are used in this description: RNG - random number generator PRNG - pseudorandom number generator PLIC - programmable logic integrated circuit ABN - Autonomous Boolean Network SCO - synchronous chaotic oscillator VLSIC - VLSIC - VLSIC Large Scale Integrated Circuit ASIC - application-specific integrated circuit STATE OF THE ART There are known digital pseudorandom number generators (PRNGs) that are based on some cyclic function and include, for example, a linear congruent generator, a linear feedback shift register generator, a generalized feedback shift register generator, and a Mersenne generator. The best results are obtained by using a simple serial number counter with a cryptographic algorithm, such as a block cipher or a one-way hash function. A common disadvantage of all PRNGs is the determination of the resulting sequence, which excludes or greatly complicates the use of pseudorandom numbers for cryptographic purposes, since the entire string of pseudorandom numbers can be predicted if the device's algorithm and the initial or any previous state of the generator are known. Furthermore, all these methods are computationally expensive, and the more stringent the requirements placed on the quality of the random numbers, the more calculations must be performed. Real random number generators are known, based on specific physical principles. Historically, random physical phenomena such as dice rolls, radioactive decay, the digitization of ambient acoustic noise by a microphone, atmospheric noise captured by a radio, etc., have been used. rronnn / rznz / E / YiAi The disadvantage of these devices is their need for a special physical configuration, sensor or transducer, and a computer interface. Furthermore, their operation can be highly dependent on environmental conditions. They require a lot of power, and the speed at which they generate random numbers is often too slow. There are known generators that are based on physical principles but use only electronic components. For example, the ERNIE 1 system and the Ferranti Mark 1 computer used the thermal noise of a resistor. Generators that utilize avalanche breakdown of a reverse-biased pn junction in a Zener diode are frequently used [1]. The disadvantage of such devices is the need to manufacture a separate analog component, which precludes or seriously complicates the fabrication of very-large single-lens integrated circuits (VLSICs) that incorporate RNGs. Furthermore, such generators cannot be implemented on a programmable logic integrated circuit (PLIC). There are known RNGs that utilize the frequency difference between two oscillators caused by thermal drift. For example, the Intel 82802 firmware storage chip has two oscillators, one fast and one slow, located in different parts of the crystal, and it measures the difference between their frequencies. Such an RNG can be implemented entirely using digital logic, as inverters with feedback and a buffer circuit as a delay line are typically used as the oscillator. The disadvantages of such generators include the need to place the oscillators far apart in the crystal topology to reduce thermal correlation between them, low performance (since the deviation needs to accumulate over a period of operation), and poor predictability of the random number quality. Furthermore, such a generator is practically difficult to implement in PLIC, as development tools do not allow for precise control over the physical placement of the elements. As a rule, in the case of automatic placement, the oscillators, which are logically connected, will also be placed very close to each other, resulting in a more significant frequency correlation between them. In recent years, so-called autonomous Boolean networks (ABNs) have been actively explored. Such a network represents a topologically connected graph of logic elements, to which no external control or clock signals are supplied. At the same time, obvious additional requirements are imposed on such a network: no element should have dangling inputs (not connected to any output), and no two outputs should be connected to each other. These requirements are due to the certainty of the state of the logic elements in the network and the electrical safety of its operation. Depending on the topology, the ABN can exhibit different behaviors: it can be in a stable or quasi-stable state, oscillate with a specific frequency and waveform, or be in a state of so-called Boolean chaos. An example of the simplest ABN is a repeater with one output connected to the input.Such a network is in a quasi-steady state, meaning that, depending on the initial state (0 or 1), it will remain in that state indefinitely. Another example is one or more inverters connected in a ring. Depending on the number of inverters in the ring, its behavior will be stable, quasi-steady, or oscillatory. An inverter is most likely to be in a steady state (between 0 and 1), due to its physical implementation as an amplifier with a high gain ratio and negative feedback equal to 1. For the same reason, there may be no generation in very small networks containing elements with a low output signal response rate. With an odd number of inverters, the network will oscillate with a period proportional to the number of inverters. With an even number of inverters, the network is in a quasi-steady state.As can be seen, the random number generator implemented in the Intel 82802 integrated circuit, based on two oscillators and the measurement of the frequency deviation between them, is in fact a special case of ABN. It uses two rings with different odd numbers of inverters. More complex networks can often lead to chaotic behavior. There is a direct, substantive physical analogy that helps visually understand the behavior of ABNs in various situations: a pendulum. After being deflected and released, a simple pendulum begins to oscillate with a stable period. This is an example of oscillatory behavior. If we swing the pendulum upwards, the upper point represents a quasi-stable state; any small deflection would cause the pendulum to swing to the left or right. If we divide the pendulum arm into two parts connected by a hinge, we obtain what is called a chaotic pendulum, whose evolution over time cannot be accurately predicted, since any infinitesimal change in the initial state (down to the quantum level) increases over time and leads to arbitrarily large changes in the pendulum's behavior.Using this analogy, it is possible to measure random deviations in the frequencies of two pendulums that arise from chaotic external effects; however, this will require extensive analysis. On the other hand, it is possible to deflect a chaotic pendulum and obtain a random value in the shortest possible time. As can be seen in the given example, oscillating ABNs can be used to generate random numbers. However, ABNs that initially exhibit chaotic behavior are much more promising. The rate of development of Boolean chaos and its qualitative characteristics are determined by several factors, the most important of which is the characteristic Lyapunov exponent. If the exponential factor is negative, deviations disappear over time. If the exponential factor is greater than zero, the system amplifies random deviations. If the exponential factor is equal to zero, deviations are neither dampened nor amplified, but rather accumulate if they entered the system from the outside. For fast physical generation of random numbers, the exponential factor must be non-negative.A simple pendulum has a negative Lyapunov exponent, meaning its oscillation frequency stabilizes instantly in the absence of external influences. A chaotic pendulum is a specific example of a system with a positive exponent, so any small impact leads to a completely different dynamic after a short time. In binary logic, there are no logic functions that amplify small deviations, but there are functions that prevent the resulting changes from disappearing—for two arguments, these are the XOR (Exclusive OR) and XNOR (Exclusive OR) functions. Any change in any input signal causes a change in the output signal. For this reason, the use of these functions is preferable in RNGs (Relative Logic Components). From the current state of science, ABN circuits are known to exhibit chaotic behavior. Chaos occurs when the network's operation is determined by even the smallest deviations in supply voltage, forward shifts due to thermal fluctuations, startups, and other destabilizing factors. In the literature [3], two- and three-input XOR or XNOR logic gates are considered, where the output is fed back to the inputs through two (or, respectively, three) delay lines. In such networks, chaotic behavior can be observed in a certain proportion of the delay line lengths. The problem with this network is the strong dependence of its behavior not only on the ratio of the delay line lengths but also on its physical implementation; instead of chaos, oscillations could be observed.Furthermore, despite the device's apparent schematic simplicity, it requires a large number of logic elements, since each delay line is a chain of inverters. As a result, a seemingly simple circuit can comprise several dozen elements. Moreover, three out of four variants of this generator share a fundamental drawback: loss of generation after a certain time. The XOR element reaches a stable state with a zero output regardless of the number of inputs, and the XNOR element with two inputs with a one output. The XOR element with four inputs... The three-input XNOR element has an additional stable state, with a one at the output. As shown in reference [4], a more or less stable generation is observed in the case of a three-input XNOR element and delay lines composed of 18, 6, and 2 inverters. In 2009, Rui Zhang et al. [2] proposed a circuit composed of three two-input logic elements, in which Boolean chaos occurs: two XOR gates and one XNOR gate. To implement this circuit, they used discrete components. This circuit also has inherent disadvantages, which will be discussed below. When such a network is implemented in PLIC, the generation may disappear, or oscillations may occur instead of random behavior. In his dissertation [4], David Rosin proposed a more complex circuit that also demonstrates chaotic behavior: large rings of three-input XOR elements, in which each element receives as input a signal from itself and its two nearest neighbors. In this case, the resulting signal is collected at various points around the ring and also combined across the XOR elements. However, in its pure form, such a circuit is inoperable, since rings consisting of an even number of elements have up to four different stable states, and will inevitably stabilize in one of them: the states with all zeros, all ones, and two variants of alternating zeros and ones. To eliminate the steady state, Rosin replaces an XOR element in the generator with an XNOR element. The quality of the resulting chaos in such a generator depends on the number of logic elements in the ring. Rosin suggests using 16 elements. However, the excitation generated in such a system must pass through eight logic elements before reaching the opposite side of the ring, which is comparable in time to a microprocessor clock cycle. Therefore, in terms of hardware implementation, it is desirable to wait several clock cycles to eliminate the correlation between successive values. The disadvantage of the Rosin and Zhang generators is the impossibility of an external destabilizing effect on the network. A real random number generator is known from the prior art, comprising a chaotically oscillating digital autonomous Boolean network as the entropy source (see patent application specification WO2019222866 published in 2019). Similar to the Rosin generator, this generator uses a ring of three XOR elements and one XNOR element, with an additional XOR element to capture signals from the ring. Unlike the Rosin generator, this generator uses an additional inverter to generate a high-frequency periodic signal and destabilize the autonomous Boolean network. rronnn / rznz / E / YiAi This device is the closest in terms of technical substance and the technical result achieved and has been selected as a prototype of the proposed invention. The disadvantages of this prototype also include the excessive time required to generate real random numbers, a plurality of elements, and higher energy consumption. DESCRIPTION OF THE INVENTION Based on this original observation, the main objective of the proposed invention is to provide a real random number generator that includes a chaotically oscillating digital autonomous Boolean network as the source of entropy, which would allow mitigating at least a minimum of one of the above disadvantages, and specifically, increasing a real random number generation rate while reducing energy consumption, which is the task at hand. The objective of this invention is to construct a partially controllable ABN (Analog-Boolean Network) of minimal size that ensures reaching a state of Boolean chaos as quickly as possible. The most important requirement is the impossibility of reaching a stable, quasi-stable, or oscillating state of the network. Furthermore, the rate of increase of chaos depends directly on the size of the propagation paths of cyclic signals present in the network. The larger the path size, the longer the signal must travel before returning to its starting point. Therefore, the network must be as small as possible. This becomes obvious when considering an oscillator consisting of an odd number of inverters: the oscillation period is directly proportional to the length of the ring. For a more detailed analysis, it is best to consider a synchronous Boolean network. The real difference between a synchronous Boolean network and an ABN is that the signal at the outputs of all logic elements changes simultaneously, so the network can be assumed to pass through several states. Theoretically, with identical operating speeds, identical lengths of all conductors, and identical operating conditions, the ABN becomes a synchronous Boolean network. Furthermore, as shown in reference [3], the mutual influence of different network segments can lead to forced synchronization. This is a very important effect that must also be eliminated or minimized. Since the goal is to find the smallest possible network, such networks can be analyzed in increasing order of the number of logic elements.Since several possible logical functions and networks based on them are countable and ordered, a thorough analysis can be carried out. A single-element network can consist of a repeater or an inverter. In the first case, there is no generation, and in the second, there are periodic oscillations. Therefore, a network consisting of a single logical element cannot generate chaos. Now let's consider a network with two elements. Each element can have no more than two inputs, and a total of four different network states are possible. There are many possible combinations of transitions between these states, but they can be grouped by properties. The first category is when there is a degenerate state, in which the network can exist indefinitely. Such networks are obviously unusable. The second category is when there is at least one cycle consisting of two or three states. In this case, one element is in a stable state and the second element oscillates, or both elements oscillate with the same period. Such networks are also unusable. The last possible case is when the network evolves through all four states. In this case, the total number of different cycles is equal to 3! = 6.Classifying all the variants shows that, in this case, one element oscillates with a period of T and the other with a period of 2T, or both elements oscillate with the same period of 2T. Therefore, a two-element lattice cannot be a reliable source of chaos. Therefore, to guarantee chaotic behavior, a network consisting of at least three elements is required. In a generalized case, these should be two- or three-input elements, since the presence of a single-input element makes the network a two-element network. Consequently, at any given time, the network can be in one of eight different states. Zhang's generator is exactly a three-element network. However, according to the results of the analysis of the Zhang generator's state-change graph, regardless of the initial state, this generator enters a four-state cycle, where one element oscillates with a period of T and the other two elements with a period of 2T. Of course, this fact does not preclude reaching chaos, but it indicates the network's sensitivity to the implementation and the cross-impact of the elements on each other. To find the required network, we can immediately discard all networks with a stable state. Furthermore, we can immediately exclude all networks where the cycle has fewer than eight states, as such networks allow for oscillations and cross-impacts. The only remaining networks are those that evolve through all eight states. The total number of possible cycles is 7! = 5040, starting with state 000, passing through all possible states, and returning to state 000 after eight iterations. For further consideration, it is necessary to introduce the concept of autocorrelation of the output signal of a logic element. During the network's operation, the output of each element cycle passes through eight states, which can be denoted using eight-digit binary numbers, such as 01010101b. To calculate the autocorrelation, we will change this number seven times in a cycle, one bit at a time (by transferring the lower-order bit to the higher-order position), while counting each time the number of bits matches the original value in the corresponding positions. If, after comparison, we find that all eight positions are different, then the signal is as well correlated as when all eight positions match. The minimum correlation will be the case of four matches and four differences.The total correlation is defined as the sum of seven absolute values ​​of the difference between the number of matches and 4, divided by half, since this sum is always even. For some sequences, zero autocorrelation is possible. However, in such sequences, the number of zeros and ones is different, and in the case of a network going through a complete cycle of all eight states, each element must have the same number of states with ones and zeros at the output. Among all such sequences, the minimum possible autocorrelation is two. In total, there are only four fundamental sequences with such autocorrelation: 00010111b, 00011011b, 00100111b, and 00101011b. All other sequences with the lowest possible autocorrelation are their derivatives obtained by cyclic shifting and inversion. For a three-element network, the theoretically minimum possible total autocorrelation is 6 and the maximum is 26. A three-bit binary counter has an autocorrelation of 18, and when the corresponding ABN is implemented, chaotic behavior never occurs in such a network. There are 648 topologically distinct networks in total, when going through a complete cycle of the eight states. Among them, 216 networks have the minimum possible total autocorrelation of 6. Of these networks, we must discard those in which the output signals of two different elements are correlated with each other. In such networks, it is theoretically possible to perform phase adjustment of the element's operation, which will lead to signal reordering. There are even networks in which the signals of all three elements are correlated with each other. Such networks are especially dangerous. Among the selected networks, only 80 have no correlation between the element signals. Since we are looking for the smallest possible network, we will give preference to networks with two input elements. There are only 24 such networks. There is one more important circumstance in favor of two-input elements. All the generators considered above are uncontrollable in the sense that no external destabilizing signal can be connected to them to force chaos and allow the networks to cascade into one another. Adding an additional input should transform one network into another, which also fully satisfies the specified criteria. This is most easily achieved by adding a third input to the two-input elements. Since two-input elements can only be XOR or XNOR gates, adding a new input is only possible by obtaining three-input XOR and XNOR gates. In this case, when a logic one is supplied to the third input, the two-input XOR and XNOR gates undergo a mutual transformation. It turns out that, of the remaining twenty-four networks, only eight can be reconfigured in this way with a change in the nature of generation while preserving all basic characteristics. Furthermore, these networks also have a record low level of complexity: each network has two two-input elements. All eight of these networks are grouped in pairs into four reconfigurable networks, each of which consists of three three-input logic elements. Each reconfigurable network corresponds to two original networks. These four networks are functionally completely equivalent, but one network among them has a unique property: all its logic elements are symmetric with respect to their assigned inputs (the inputs of the elements are equivalent), which simplifies network implementation and helps avoid errors. These four Boolean networks are the essence of the invention. They fulfill all the requirements listed above and have an additional modulation property. They all consist of three logic elements: two 3-XOR or 3-XNOR gates and one three-input output gate with a more complex special function called counting ones. These four networks are absolutely identical in the way the elements are connected and differ only in the type of elements used. They are combined into two groups: A and B. Group A uses the same elements, both gates being either 3-XOR or 3-XNOR. Group B uses different elements: one 3-XOR and the other 3-XNOR. The logic schematic of all these networks is shown in the accompanying drawings below. The count ones element can be described as follows: the element's output is set to 1 if no more than one input is 1; otherwise, the output is 0. Therefore, if all three inputs are zero, then the output is also a logic one (see Table 1). Table E Real table of the third logical element (contai· ones”). ΓΓοηηη / ρζηζ / Ε / γίΛΐ Input 3 Input 2 Input 1 Output 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 0 1 1 0 0 1 1 1 0 rronnn / rznz / E / YiAi Depending on the network version, one or two inputs of this element can be inverted. The signals from the three logic elements are sent to the input of the one-counting element. The two inputs of the first XOR / XNOR gate receive a signal from the same gate and from another XOR / XNOR gate. The two inputs of the second XOR / XNOR gate receive a signal from the first XOR / XNOR gate and from the output of the one-counting element. The remaining free inputs of both XOR / XNOR gates are combined and represent the modulation input of the Boolean network. Each of the Boolean networks described is the basic building block used to construct a random number generator. We will call this basic block a chaotic oscillator. It has one output and one modulation input. The chaotic oscillator cannot modulate itself. It is easy to verify that, with such modulation, the chaotic oscillator degenerates into an ordinary oscillator or a stable-level source. Furthermore, it is not recommended to leave the chaotic oscillator completely unmodulated, since, due to the specificities of the physical implementation, the behavior of two unmodulated oscillators can be very different. It is desirable to use a block of oscillators that modulate each other, and it is desirable that the modulation loop be as large as possible to reduce cross-correlation between the oscillators. In theory, the signal from an unmodulated oscillator can be taken from any of the three logic elements. However, to reduce cross-correlation between signals from different oscillators, the chaotic signal must be taken from the one-counting element. A self-contained Boolean network is always in a state of chaotic oscillation, which requires energy. To stop this generation, the network must be modified in such a way that, regardless of the initial state, it is guaranteed to reach the only possible deterministic state. For the networks described above, this cannot be achieved by turning off only one logic element. At least two elements must be turned off, and ideally, these would be the same XOR or XNOR input elements. The network can be turned off by forcing the outputs of these elements to change to 0 or 1. In this case, if the outputs of the XOR / XNOR elements are set to 0, then the network output will be 1, and vice versa. The chaotic oscillator itself cannot be used as a random number generator, as it only has an asynchronous output, which is a wideband chaotic analog signal. Every chaotic oscillator, regardless of its internal structure, must be placed in a synchronous enclosure that performs two functions simultaneously. On the one hand, it provides a stable logic output signal, and on the other hand, it stores the previous state, which, if desired, can be used via modulation inputs as a "seed" to obtain the next random number. The designation and internal diagram of such a synchronous chaotic oscillator (SCO) are shown in the drawings below. The SCO has clock and modulation inputs and two outputs: synchronous (used to generate a random number) and asynchronous (required to modulate other SCOs). A trigger D captures the value of the asynchronous signal on each clock waveform. This value is fed to the synchronous output or, alternatively, can be used for modulation with an external signal via a two-input XOR gate. The random number generator is based on such SCO blocks. Despite mutual modulation, SCO blocks can exhibit a bias in the distribution of zeros and ones at the output; that is, one type of value is more likely to appear at the output than another. This is also due to the specific physical characteristics of the circuit's logic elements. To eliminate this bias, a whitening procedure may be necessary for the resulting random numbers. Therefore, the essence of the invention is that a chaotically oscillating digital autonomous Boolean network includes three interconnected logic elements, two of which are the two-input exclusive OR and / or exclusive ÑOR gates, and the third logic element has three inputs and one output, and implements a special logic function of counting ones, wherein its output is set to a logic one if a logic one is present at no more than one of its inputs; otherwise, it is set to a logic zero. Due to these favorable characteristics, it is possible to obtain truly random numbers in a very short period of time using a generator consisting of only three elements. There is a preferred configuration of the device in which the output of the first two-input logic element is connected to the first input of the second two-input logic element and to the 11 ΓΓοηηη / ρζηζ / Ε / γίΛΐ second input of the third logic element of counting ones, the output of the second logic element of two inputs is connected to its second input, to the second input of the first logic element of two inputs and to the third input of the third logic element of counting ones, and the output of the third logic element of counting ones is connected to its first input, to the first input of the first logic element of two inputs and to the output of the entire network. Due to these favorable characteristics, it is possible to guarantee the chaotic behavior of the autonomous Boolean network, which is the basis of the real random number generator. There is another version of the device, in which the second and / or third input of the third logical element of "counting ones" are inverted. Due to these favorable characteristics, it is possible to provide a specific implementation of the real random number generator. There is yet another modality of the device, in which both two-input “exclusive OR” and / or “exclusive ÑOR” gates have additional third logic inputs, which are combined and connected to an additional external modulation input of a chaotic digital oscillating autonomous Boolean network. Due to these favorable characteristics, it is possible to improve the statistical properties of the real random number generator. In addition, there is a device modality in which the generator has a shutdown input, while the "exclusive OR" and / or "exclusive NOR" gates have additional shutdown inputs with the possibility of forcing the switching of the outputs of both gates to the state of a logic zero or a logic one regardless of the state of other inputs; these inputs are combined and connected to the specified generator stop input. Due to these favorable characteristics, it is possible to turn the real random number generator on and off. There is yet another modality of the device, in which the chaotically oscillating digital autonomous Boolean network is combined with a trigger D in a synchronous chaotic oscillator block that has a clock input connected to the clock input of the trigger D, a modulation input connected to the modulation input of the autonomous Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the trigger D, while the output of the autonomous Boolean network is connected to the data input of the trigger D. Due to these favorable characteristics, it is possible to connect the real rronnn / rznz / E / YiAi random number generator to external clock circuits. In addition, there is a modality of the device, which comprises an additional element of two exclusive OR and / or exclusive ÑOR inputs, the first input of which is connected to the external modulation input, the second input is connected to the trigger output D, and the output is connected to the modulation input of the autonomous Boolean network. Due to these favorable characteristics, it is possible to improve the statistical properties of the real random number generator by changing its initial state. Finally, there is a modality of the device, comprising a set of N blocks of synchronous chaotic oscillators combined in a ring structure, whose clock inputs are combined and connected to a common clock signal, and whose synchronous outputs are connected to an N-bit output of the generator, and a set of N additional two-input exclusive OR gates such that the output of each of these gates is connected to the modulation input of the corresponding block of the synchronous chaotic oscillator, its first input is connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input is connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain. Due to these favorable characteristics, it is possible to generate real multi-bit random numbers. The combination of substantial features of the proposed invention is unknown in the prior art with respect to methods having a similar purpose, thus fulfilling the criterion of novelty of the invention in relation to the method. Furthermore, this solution is not obvious to a person skilled in the art. BRIEF DESCRIPTION OF THE DRAWINGS Other distinctive features and advantages of this invention are clearly apparent from the description provided below for illustrative purposes, without limitation, by means of references to the accompanying drawings, in which: - Figure 1 shows a functional diagram of the autonomous Boolean network according to the invention; - Figure 2 shows a logical structure of the autonomous Boolean network using XOR elements according to the invention; - Figure 3 shows a logical structure of the autonomous Boolean network using rronnn / rznz / E / YiAi XNOR elements according to the invention; - Figure 4 shows a logical structure of the autonomous Boolean network using XOR elements and input inversion of the “counting ones” element according to the invention; - Figure 5 shows a logical structure of the autonomous Boolean network using XNOR elements and input inversion of the “counting ones” element according to the invention; - Figure 6 shows a logical structure of the autonomous Boolean network using XOR and XNOR elements according to the invention; - Figure 7 shows a logical structure of the autonomous Boolean network using XNOR and XOR elements according to the invention; - Figure 8 shows a logical structure of the autonomous Boolean network using XOR and XNOR elements and input inversion of the “counting ones” element according to the invention; - Figure 9 shows a logical structure of the autonomous Boolean network using XNOR and XOR elements and input inversion of the “counting ones” element according to the invention; - Figure 10 shows a logical structure of the autonomous Boolean network having a modulation input according to the invention; - Figure 11 shows a logical structure of the autonomous Boolean network having an enabled modulation and generation input according to the invention, - Figure 12 shows the schematic of the synchronous chaotic oscillator based on the Boolean networks described according to the invention, - Figure 13 shows the designation of the synchronous chaotic oscillator according to the invention; - Figure 14 shows a variant of the synchronous chaotic oscillator using the above value as a seed according to the invention; and - Figure 15 shows a schematic of the random number generator based on a synchronous chaotic oscillator according to the invention. The instructions in the drawings are as follows: - first logical element; - second logical element; - third logical element; rronnn / rznz / E / YiAi XOR gate; XNOR gate; synchronous chaotic oscillator; - chaotic oscillator; trigger D; Modulation - modulation input; Enable generation input; Exit - exit; Synchronous output: synchronous output; Asynchronous output: asynchronous output; Clock - clock signal. According to Figures 1-15, a real random number generator comprising a chaotically oscillating digital autonomous Boolean network as the entropy source includes the following. A chaotically oscillating digital autonomous Boolean network includes three logic elements: 1 - first, 2 - second, and 3 - third, connected together, two of which (1 and 2) represent two exclusive OR inputs and / or exclusive NOR gates, and the third logic element (3) has three inputs (the inputs of all logic elements are designated with Roman numerals I, II, and III) and one output. Logic element 3 implements a special logic function of counting ones, in which its output is set to a logic one if a logic one is present at no more than one of its inputs; otherwise, it is set to a logic zero. The output of the first two-input logic element 1 is preferably connected to the first input of the second two-input logic element 2 and to the second input of the third logic element, a counter of ones 3. The output of the second two-input logic element 2 is connected to its second input, to the second input of the first two-input logic element 1 and to the third input of the third logic element, a counter of ones 3. The output of the third logic element, a counter of ones 3, is connected to its first input, to the first input of the first two-input logic element 1 and to the output of the entire network. The second and / or third entries of the third logical element of "counting ones" 3 can be reversed. In a particular embodiment of the invention, both two-input gates 1 and 2 (exclusive OR and / or non-exclusive OR) have additional third logical inputs, which are combined with each other and 15 ΓΓοηηη / ρζηζ / Ε / γίΛΐ connect to an additional external modulation input of an autonomous digital Boolean network of chaotic oscillation (see Figure 10). In a particular embodiment of the invention, the generator has a shutdown input, and both the exclusive OR gates and / or the exclusive ÑOR gates have additional shutdown inputs with the possibility of forcibly switching the output of both gates to the state of logic zero or logic one regardless of the state of other inputs; these inputs are combined and connected to the specified generator stop input (see Figure 11). In particular, a chaotically oscillating digital autonomous Boolean network can be combined with a trigger D in a synchronous chaotic oscillator block that has a clock input connected to the clock input of the trigger D, a modulation input connected to the modulation input of the Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the trigger D, while the output of the autonomous Boolean network is connected to the data input of the trigger D (see Figures 12-13). In a particular embodiment of the invention, the generator includes an additional two-input exclusive OR” and / or exclusive ÑOR” gate, the first input of which is connected to the external modulation input, the second input is connected to the trigger output D, and the output is connected to the modulation input of the autonomous Boolean network (see Figure 14). In one particular embodiment, the invention includes a plurality of N blocks of synchronous chaotic oscillators combined in a ring structure, whose clock inputs are combined together and connected to a common clock signal, and whose synchronous outputs are connected to the N-bit output of the generator, and a plurality of N additional two-input exclusive OR and / or exclusive ÑOR gates such that the output of each of said gates is connected to the modulation input of the corresponding block of the synchronous chaotic oscillator, its first input is connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input is connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain (see Figure 15). IMPLEMENTATION OF THE INVENTION The real random number generator works as follows. We will provide the most complete example of the implementation of the invention with the understanding that this example does not limit the application of the invention. A chaotically oscillating digital autonomous Boolean network is formed from three interconnected logic elements, two of which represent two-input “exclusive OR” and / or “exclusive OR” gates, and the third logic element is used to implement a special logic function of counting ones, in which its output is set to a logic one if a logic one is present at no more than one of its inputs; otherwise, it is set to a logic zero. A synchronous chaotic oscillator (SCO) is formed, which has clock and modulation inputs and two outputs: a synchronous output used to obtain a random number and an asynchronous output required for modulating other SCOs. Along each clock waveform, a trigger D captures the value of the asynchronous signal. The resulting value is fed to the synchronous output and, on the other hand, is used for the conditional inversion of the input modulation signal via a two-input XOR gate. The random number generator is based on these SCO blocks. A multi-bit real random number generator is constructed according to a circuit in which a ring of SCO blocks, modulated in opposite directions, is used. The modulation input of each SCO block receives a signal from the exclusive OR gate, whose inputs are connected to the asynchronous outputs of the preceding and following SCO blocks in the ring. INDUSTRIAL APPLICABILITY The proposed real random number generator can be practically made by experts in the field and, once implemented, will allow the modality of the stated purpose, which allows us to conclude that the criterion of industrial applicability of the invention is met. In accordance with the proposed invention, a prototype of a true random number generator was produced. During the study, both the aforementioned Zhang and Rosin generators and the Boolean network-based generator described were experimentally tested on the PLIC. The random nature of the numbers from the proposed generator was confirmed by the following experiment, which was carried out using the following PLIC: Altera Cyclone IV EP4CE22F17C6N. The network was in a reset state; that is, the outputs of all logic elements were set to a predefined zero state. Then, in one clock cycle, the reset signal was removed, and in the next clock cycle, the state of the chaotic oscillator output was captured.The data obtained during multiple network reboots passed the randomness test and showed no significant correlation with each other at clock frequencies up to 150 MHz, indicating the onset of chaos in less than 7 nanoseconds. After the whitening procedure, the resulting random numbers passed the 17 tests. ΓΓοηηη / ρζηζ / Ε / γίΛΐ NIST randomness. Therefore, testing of the prototype of a real random number generator has shown that the stated technical result (i.e., an increase in the rate of real random number generation while reducing power consumption) is achieved due to the fact that a chaotically oscillating digital autonomous Boolean network includes three interconnected logic elements, two of which represent two-input “XOR” and / or “XOR” gates, and the third logic element has three inputs and one output, and implements a special logic function of counting ones, in which a logic one is set at its output if a logic one is present at no more than one of its inputs; otherwise, a logic zero is set. Furthermore, the technical result of the invention is a set of the unique possible networks of logic elements, each of which has the following properties: 1. It has no stable states and short cycles, which would lead to the ordering of the network's operation and the disappearance of Boolean chaos. 2. The output signals of all elements have the theoretically lowest possible autocorrelation, forcing the network into chaotic behavior. 3. There is no correlation between the shape of the output signals of all elements, which excludes cross-phase modulation of the elements during network operation. 4. It has the smallest possible size, which provides the fastest possible rate of chaos accumulation due to short propagation loops within the network. 5. It has an external modulation input that allows the network to be destabilized (thus preventing physical equilibrium) and networks to be combined into scalable clusters through the use of cross-modulation. Furthermore, only one network in this set uses the logical elements, which are symmetric input. Therefore, these networks allow the creation of a random number generator with the following unique characteristics: 1. The resulting numbers are truly random, allowing them to be used for cryptographic purposes. 2. The random number generation rate is so high that the network's behavior is unpredictable even during signal propagation through various logic elements. Therefore, when implemented in microprocessor systems, a random number can be obtained in one clock cycle. Such a generation rate practically satisfies any conceivable need. rronnn / rznz / E / YiAi 3. The modulation input allows for further improvement of the characteristics, as it can be fed with another random number (the so-called "seed" of the proposed random number generator). This forces the network to start from a new state each time. 4. The same input allows cross-bit modulation of the proposed generator, which increases the chaos onset rate. 5. The minimum network size makes the proposed generator the most economical in terms of energy consumption. 6. The proposed generator can be implemented with equal efficiency in both discrete elements and in PLIC or ASIC. 7. The proposed generator design is simple and its implementation costs are negligible, making it possible to use it everywhere, including low-cost and energy-saving devices. LITERATURE: [1] Maxim Semiconductors. Building a Low-Cost White-Noise Generator. Application note 3469. [2] R. Zhang, H. L. D. de S. Cavalcante, Z. Gao, D. J. Gauthier, J. E. S. Socolar, M. M. Adams, and D. P. Lathrop. Boolean Chaos. Phys. Rev. E 80, 045202 (2009). [3] David P. Rosin, Damien Rontani, Daniel J. Gauthier, and Eckehard Schóll. Experiments on autonomous Boolean networks. Chaos 23, 025102 (2013). [4] Hugo LD de S. Cavalcante, Daniel J. Gauthier, Joshua E.S. Socolar, and Rui Zhang. On the origin of chaos in autonomous Boolean networks. Phil. Trans. R. Soc. A 368, 495–513 (2010). [5] David Rosin, Dynamics of Complex Autonomous Boolean Networks. Doctoral dissertation. Technische Universitát Berlin.

Claims

1. A real random number generator comprising a chaotically oscillating digital autonomous Boolean network as the entropy source, characterized in that said chaotically oscillating digital autonomous Boolean network includes three interconnected logic elements, the first of which is a two-input “exclusive OR” gate, the second is a two-input “exclusive OR” gate, and the third logic element has three inputs and one output, and implements a “counting ones” logic function, wherein its output is set to a logic one if a logic one is present at no more than one of its inputs;Otherwise, it is set to a logical zero, while the output of the first two-input logic element is connected to the first input of the second two-input logic element and to the second input of the third “counting ones” logic element, the output of the second two-input logic element is connected to its second input, to the second input of the first two-input logic element, and to the third input of the third “counting ones” logic element, and the output of the third “counting ones” logic element is connected to its first input, to the first input of the first two-input logic element, and to the output of the entire network.

2. The generator according to claim 1, characterized in that the second and / or third inputs of the third logical element of “counting ones” are inverted.

3. The generator according to any of claims 1-2, characterized in that both two-input exclusive OR and / or exclusive ÑOR gates have additional third logic inputs, which are combined with each other and connected to an additional external modulation input of the chaotically oscillating digital autonomous Boolean network.

4. The generator according to any of claims 1-3, characterized in that the generator has a shutdown input, whereas the exclusive OR and / or exclusive NOR gates have additional shutdown inputs with the possibility of forcibly changing the output of both gates to logic zero or logic one regardless of the state of the other inputs, these inputs being combined together and connected to the specified generator shutdown input.

5. The generator according to any of claims 3-4, characterized in that the chaotically oscillating digital autonomous Boolean network is combined with a trigger D in a synchronous chaotic oscillator block having a clock input connected to the clock input of the trigger D, a modulation input connected to the modulation input of the autonomous Boolean network, an asynchronous output connected to the output of the autonomous Boolean network, and a synchronous output connected to the output of the trigger D, the output of the autonomous Boolean network being connected to the data input of the trigger D.

6. The generator according to claim 5, characterized in that said generator comprises an additional two-input exclusive OR and / or exclusive ÑOR gate, the first input of which is connected to the external modulation input, the second input is connected to the output of trigger D, and the output is connected to the modulation input of the autonomous Boolean network.

7. The generator according to any of claims 5-6, characterized in that said generator comprises a plurality of N blocks of synchronous chaotic oscillators combined in a ring structure, the clock inputs of which are combined and connected to a common clock signal, and their synchronous outputs are connected to an N-bit output of the generator, and a set of N additional two-input exclusive OR and / or exclusive ÑOR gates such that the output of each gate is connected to the modulation input of the corresponding block of the synchronous chaotic oscillator, its first input being connected to the asynchronous output of the preceding synchronous chaotic oscillator block in the chain, and the second input being connected to the asynchronous output of the following synchronous chaotic oscillator block in the chain.

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