ARC FAULT DETECTION BY ACCUMULATING MACHINE LEARNING CLASSIFICATIONS IN A CIRCUIT BREAKER

Abstract

A circuit breaker with arc fault detection by accumulation of machine learning classifications is provided. The circuit breaker comprises a microcontroller including a processor, memory, and computer-readable software code that, when executed by the processor, causes the microcontroller to: sample analog signals representing one or more of the following: an RSSI signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to derive a dataset; and input the dataset into a machine learning classifier such that an output of the machine learning classifier is a value between 0 and 1 representing a percentage probability that the dataset is from an electric arc.Depending on the probability percentage value, the accumulator value is increased or decreased, and if the accumulator value exceeds an upper threshold, the microcontroller sends a signal to open the circuit breaker.

Description

ARC FAULT DETECTION BY ACCUMULATING MACHINE LEARNING CLASSIFICATIONS IN A CIRCUIT BREAKER BACKGROUND 1. Field Aspects of the present invention relate in general to the detection of arc faults by accumulation of machine learning classifications in a circuit breaker. 2. Description of the Related Technique Circuit breakers are essential for electrical safety. They supply power to connected loads and interrupt the circuit when a fault is detected, such as an overload, short circuit, ground fault, or arcing fault. We need the capabilities of an arc-fault circuit breaker (AFCI) to detect and trip arcing faults without causing unwanted tripping in various residential products (i.e., lighting, microwaves, vacuum cleaners, power tools, etc.). An arc-fault circuit breaker (AFCI) is an advanced circuit breaker that, as a way to reduce the risk of electrical fires, interrupts the circuit when it detects a dangerous electrical arc in the circuit it protects. AFCIs rely on internal electronic components to analyze various analog signals (current and voltage) passing through the circuit breaker to determine if an arc fault exists downstream. Prior art research tends to overlook the use of machine learning classifier inferences (neural network or other) to accumulate positive inferences (and decrease negative inferences) in a final decision to trip the circuit breaker within a specific timeframe to meet safety limits detailed in various industry standards (e.g., UL1699 or equivalents). Therefore, there is a need for better arc fault detection in a circuit breaker. SUMMARY Briefly described, aspects of the present invention relate to thermal management in a circuit breaker. The objective of the described invention is to focus on the types of signals and measurements that must be performed and analyzed, including research on the use of various machine learning mechanisms. A final step utilizing the inferences of the machine learning classifier (neural network or other) is designed to accumulate positive inferences (and decrease negative inferences) to make a final decision to trip the circuit breaker within a specific amount of time to comply with the safety limits detailed in various industry standards (e.g., UL1699 or equivalent standards). According to an illustrative embodiment of the present invention, a circuit breaker comprises a microcontroller that includes a processor and a memory.The circuit breaker further comprises computer-readable software code stored in memory which, when executed by the processor, causes the microcontroller to: sample analog signals representing one or more of the following: a Received Signal Strength Indicator (RSSI) signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to derive a dataset of measurements and characteristics over a period of time; and feed the dataset into a machine-learning classifier residing in the microcontroller such that an output from the machine-learning classifier is a value between 0 and 1 representing a percentage probability that the dataset originated from an electric arc.Based on the probability percentage value, the accumulator value is increased or decreased in proportion to the amount of current passing through the circuit breaker, and if the accumulator value exceeds an upper threshold level, the microcontroller sends an output signal to a trigger circuit that opens the circuit breaker. According to an illustrative embodiment of the present invention, a method for detecting arc faults by accumulating machine learning classifications is provided. The method comprises providing a microcontroller that includes a processor and memory.The method further comprises providing computer-readable software code stored in memory that, when executed by the processor, causes the microcontroller to: sample analog signals representing one or more of the following: a Received Signal Strength Indicator (RSSI) signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to derive a dataset of measurements and characteristics over a period of time; and feed the dataset into a machine-learning classifier residing in the microcontroller such that an output from the machine-learning classifier is a value between 0 and 1 representing a percentage probability that the dataset originated from an electric arc.Based on the probability percentage value, the accumulator value is increased or decreased in proportion to the amount of current passing through the circuit breaker, and if the accumulator value exceeds an upper threshold, the microcontroller sends an output signal to a trigger circuit that opens the circuit breaker. BRIEF DESCRIPTION OF THE FIGURES FIG. 1 illustrates a circuit breaker according to an exemplary embodiment of the present invention. FIG. 2 illustrates an exploded view of the circuit breaker of FIG. 1 according to an exemplary embodiment of the present invention. FIG. 3 illustrates a block diagram of a circuit breaker according to an exemplary embodiment of the present invention. FIG. 4 illustrates a block diagram of a circuit breaker according to an exemplary embodiment of the present invention. FIG. 5 illustrates the description of a neural network according to an exemplary embodiment of the present invention. FIG. 6 illustrates a neural network model, neural network training, a hidden layer of bPRQnn / oznz / R / viAi according to an exemplary embodiment of the present invention. FIG. 7 illustrates a machine learning approach for arch detection according to an exemplary embodiment of the present invention. FIG. 8 illustrates a machine learning classifier according to an exemplary embodiment of the present invention. FIG. 9 illustrates the characteristics of a neural network according to an exemplary embodiment of the present invention. FIG. 10 illustrates a summary of the neural network according to an exemplary embodiment of the present invention. FIG. 11 illustrates a flowchart for the software code that runs on the microcontroller according to an exemplary embodiment of the present invention. FIG. 12 illustrates an example of accumulator increment as a neural network (NN) algorithm detects electric arc events using current and RSSI signals in each half-cycle according to an exemplary embodiment of the present invention. FIG. 13 illustrates a schematic view of a flowchart of an arc fault detection method by accumulating machine learning classifications in a circuit breaker according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION To facilitate understanding of the embodiments, principles, and features of the present invention, they are explained below with reference to implementation in illustrative embodiments. In particular, they are described in the context of using a machine learning classifier with a significant accumulation of inferences over time to create a fully operational arc detection and interruption algorithm in an AFCI (Assisted Circuit Breaker). A circuit breaker with software code provides classifications per half-cycle by accumulating the inference output of a machine learning classifier to provide a final decision to trip the circuit breaker within a specific amount of time to comply with the safety limits detailed in various industry standards. The embodiments of the present invention, however, are not limited to its use in the devices or methods described. The components and materials described hereinafter as constituents of the various embodiments are intended to be illustrative and not restrictive. Many suitable components and materials that would perform the same or a similar function to the materials described herein are intended to be encompassed within the scope of the embodiments of the present invention. These and other embodiments of the circuit breaker according to this disclosure are described below with reference to Figures 1-13. The reference numbers used in the drawings identify similar or identical elements in the different views. The drawings are not necessarily drawn to scale. Consistent with an embodiment of the present invention, FIG. 1 depicts a circuit breaker 105 bPRonn / cznz / R / viAi according to an exemplary embodiment of the present invention. The circuit breaker 105 is an arc-fault circuit breaker (AFCI) capable of detecting and tripping arc faults without causing unwanted tripping in various residential products (i.e., lighting, microwaves, vacuum cleaners, power tools, etc.). An arc-fault circuit breaker (AFCI) is an advanced circuit breaker that, as a means of reducing the risk of electrical fire, interrupts the circuit when it detects a dangerous electrical arc in the circuit it protects. AFCIs rely on internal electronics to analyze various analog signals (current and voltage) passing through the circuit breaker 105 to determine whether an arc fault exists downstream of it. Referring to FIG. 2, an exploded view of the circuit breaker 105 of FIG. 1 is illustrated according to an exemplary embodiment of the present invention. This is an isometric view of an AFCI. The cutaway on the right side shows a printed circuit board assembly (PCBA) 205, which contains a microcontroller 207 and accompanying circuitry. The microcontroller 207 includes logic for detecting and tripping the circuit breaker 105 for overcurrent, differential, and arc faults. Returning now to FIG. 3, which illustrates a block diagram of a circuit breaker 305 according to an exemplary embodiment of the present invention. The circuit breaker 305 comprises a microcontroller 307 including a processor 310(1) and a memory 310(2). The circuit breaker 305 further comprises computer-readable software code 312 stored in the memory 310(2) which, when executed by the processor 310(1), causes the microcontroller 307 to sample analog signals 315 representing one or more of the following: a received signal strength indicator (RSSI) signal 315(1), a voltage signal 315(2), and a current signal 315(3).The execution of the computer-readable software code 312 further causes the microcontroller 307 to perform multiple preprocessing steps 317 on the analog signals 315 to derive a data set 320 of measurements and characteristics over a period of time, e.g., for each half-cycle 322 of current passing through the switch 305. The execution of the computer-readable software code 312 further causes the microcontroller 307 to input the data set 320 into a machine-learning classifier 325 residing in the microcontroller 307 such that an output 327 of the machine-learning classifier 325 is a value between 0 and 1 representing a probability percentage 330 that the data set 320 is from an electric arc 332.Based on the probability percentage value 330, an accumulator value 335 is increased or decreased in proportion to an amount of current 337 passing through the circuit breaker 305, and if the accumulator value 335 passes an upper threshold level 340, the microcontroller 307 sends an output signal 342 to a trigger circuit 345 which then opens the circuit breaker 305. The machine learning classifier 325 can be a trained neural network. The machine learning classifier 325 analyzes and classifies the analog signal data 315 based on specific preprocessing features in each half-cycle. The Received Signal Strength Indicator (RSSI) signal 315(1) and the current signal 315(3) originate from an analog front-end ASIO circuit 350. The analog ASIC 350 acts as the bPRonn / cznz / R / YiAi interface between a radio frequency (RF) coupler, the shunt resistance sensors, and the microcontroller 307. The microcontroller 307 includes logic 352 for detecting and tripping the circuit breaker 305 in the event of overcurrent, differential, and arc faults. In operation, the computer-readable software code 312 digitally converts the Received Signal Strength Indicator (RSSI) signal 315(1), the voltage signal 315(2), and the current signal 315(3). It then extracts the half-cycle characteristics 355 from the RSSI signal 315(1), the voltage signal 315(2), and the current signal 315(3). The set of half-cycle characteristics 355 is then run through the machine-learning classifier 325, and an output from the machine-learning classifier 325 is analyzed to determine whether the half-cycle was an arc. If an arc is inferred, the computer-readable software code 312 increments the value of the accumulator 335 proportionally to the amount of current. The computer-readable software code 312 must check if the accumulator value 335 exceeds a maximum accumulator threshold and, if so, trip circuit breaker 305.If there is no arc inference, the computer-readable software code 312 should decrease the accumulator value 335 proportional to the amount of current. In the previous case, an analog signal representing the RSSI level present in the residential wiring downstream of an AFCI is measured and analyzed in real time to produce a set of features at the end of each half-cycle of the power line frequency (i.e., every 8.33 ms for the 60 Hz frequency in the US). These features are then fed into the 325 machine learning classifier (in our case, a neural network, but other types of classifiers could also be used) that has been previously trained to recognize arcing faults. The output of the 325 classifier is a number between 0 and 1 representing the percentage confidence that the last half-cycle was an arcing fault.We currently have a flat threshold. If this output value exceeds the computer-readable software code 312, it will increment a separate stored value (called an accumulator) in proportion to the amount of current present during this half-cycle event (for example, a peak current value during this half-cycle, but other common measurements such as RMS or average could also be used). If the classifier value 325 is below a threshold, the computer-readable software code 312 will in turn decrement the accumulator by the same amount, in proportion to the amount of current present in that half-cycle. If the accumulator exceeds a maximum threshold, an arc fault will be considered to have occurred, and the AFCI will trip to open the circuit.This accumulator increment and decrement works to average multiple inferences over time while also weighting the amount of current present, to ensure that the AFCI trips within safety limits while providing a maximum amount of time for discriminating residential loads to minimize unwanted trips. While one realization has a hard threshold to increase / decrease, the inference itself could also be used in other weighting schemes, such as one in which inferences at the min. / max. of 0 or 1 would result in full changes in the accumulator (also weighted by the amount of current), with the change being reduced to 0 the closer the inference is to 0.5 (where classifier 325 is unsure whether it is an arc or not). A key advantage is that this approach provides a comprehensive method for harnessing the power of machine learning in AFCIs. Whereas in the past, arc detection analysis algorithms had to be created and refined by multiple people, sometimes resulting in delays of days or weeks to address performance issues identified during testing or in the field, it will now be simpler to capture non-compliance data and add it to our machine learning training set, shortening the time it takes to update AFCI software with performance improvements. The specific utilization of the 325 machine learning classifier is provided, with significant inference accumulation over time to create a fully operational arc detection and interruption algorithm for AFCIs. Figure 4 illustrates a circuit block diagram of a circuit breaker such as an AFCI 405 according to an exemplary embodiment of the present invention. The hardware architecture of the electronics in the AFCI 405 consists of the following component blocks. A microcontroller 407 contains all the logic for detecting and tripping the AFCI 405 for overcurrent, differential, and arc faults. An analog front-end (AFE) ASIC 410 acts as an interface between an RF coupler and shunt resistance sensors and the microcontroller 407. It contains a voltage amplifier (with four gain settings) for the shunt and a received signal strength indicator (RSSI) circuit for the RF coupler. An RF coupler 412 is implemented by means of a capacitive coupling circuit connected to a 120V line voltage.A shunt resistor 415 is located on a neutral line and is used to measure the current passing through the AFCI 405. It is connected to a voltage amplifier in the ASIC 410. A power supply 420, which is an AC / DC switching power supply, converts the 120 V line voltage to 5 V and 3.3 V for the ASIC 410, the microcontroller 407, and a differential circuit. A trigger circuit 425, consisting of an SCR and an inductor, is used to trigger the AFCI 405. A push-to-test (PTT) input 430 is provided as a push button on the AFCI 405, allowing the user to initiate a self-test of the switch electronics. An LED 435 is used to indicate the last trip type when the switch is powered on. The LED 435 will also indicate if the AFCI 405 failed to trip due to a fault. The capacity of switch 440 is an input to the microcontroller 407 that identifies the capacity of AFCI 405 (15A or 20A). As shown in FIG. 5, it illustrates the description of a neural network (NN) 505 according to an exemplary embodiment of the present invention. The NN 505 comprises an input layer 510, a hidden layer 515, and an output layer 520. As shown in FIG. 6, a neural network model 605, a neural network training 610, and a hidden layer 615 are illustrated according to an exemplary embodiment of the present invention. The neural network model 605 is represented by its architecture, which shows how to transform two or more inputs into an output. The transformation is carried out in the form of a learning algorithm. The neural network training 610, i.e., the training of a neural network (NN), involves finding the appropriate weights of the neural connections using a feedback loop. The training of an NN involves feedforward of data signals to generate the output and then backpropagation of errors for gradient descent optimization. The training data includes a split – 80% training, 0% validation, 20% testing, arching samples, and nuisance samples, with the samples randomly distributed across the split. The training method can update the weight and bias values ​​according to optimization and minimizes a combination of squared errors and weights to determine the correct combination for producing a network that generalizes well. The training method parameters are left at their default settings (Note: A validation dataset is not required). The performance function is the mean squared error. It determines the overall network performance by comparing the desired output with the actual output. The hidden layer 615 is located between the algorithm's input and output. In this layer, the function applies weights to the inputs and routes them through an activation function as the output. In short, the hidden layers perform nonlinear transformations on the inputs fed into the neural network. Figure 7 illustrates a machine learning approach for arc detection according to an exemplary embodiment of the present invention. In step 705, analog signals, including current, RSSI, and voltage, are received. In step 710, the analog signals are digitally converted. In step 715, the data is preprocessed into a set of measurements. In step 720, arc detection is performed using a neural network instead of comparing the data against various thresholds. In step 725, the accumulation of multiple arc detections over time is used to trigger an AFCI (Area Fire Control Interrupter). Figure 8 illustrates a machine learning classifier 800 according to an exemplary embodiment of the present invention. It is a high-level diagram describing the aforementioned process in which signal data are analyzed and classified based on specific preprocessing features in each half-cycle. The machine learning classifier 800 consists of three stages. The first stage is sampling and automatic gain control (AGC) 805. It samples a line voltage 810(1), a load current 810(2), and an RSSI 810(3). The next stage is preprocessing 815, in which signal characteristics such as window length, signal geometry, slopes, noise, etc., are calculated. The final stage is a surface neural network 820 with a predefined number of nodes. The input features are fed into a function block (FC) layer, and an output is generated in terms of an arc or no arc. Figure 9 illustrates the characteristics of a neural network according to an exemplary embodiment of the present invention. The characteristics for a neural network include specific data points 905 during an event, the slope of a waveform 920 at the beginning and end, and a half-cycle duration 915. bPRonn / cznz / R / YiAi Figure 10 illustrates the neural network abstract 1005 according to an exemplary embodiment of the present invention. The neural network abstract 1005 includes 10-30 network inputs, a network size of 20-100 nodes, a network training time of minutes, a network response time of 3 milliseconds, ADC signals of load current, RSSI, and an ADC sampling frequency of 10-100 kHz. Figure 11 illustrates a flowchart for software code 312 running on microcontrollers 207, 307, and 407 according to an exemplary embodiment of the present invention. Software code 312 provides half-cycle classifications by accumulating an inference output from a machine learning classifier. In step 1105, analog signals, including current and RSSI, are received. In step 1110, software code 312 performs digital conversion of the analog signals. Then, in step 1115, software code 312 extracts half-cycle features from the analog signals. Next, in step 1120, software code 312 runs a set of half-cycle features through a machine learning classifier. Then, in step 1125, software code 312 analyzes the output of the machine learning classifier to determine whether the half-cycle was an arc or not. In step 1130, if a no-arc inference is derived, the accumulator value is decremented proportionally to a certain amount of current. In step 1135, if an arc inference is derived, the accumulator value is increased proportionally to the amount of current.In step 1140, a check is performed to determine if the accumulator value exceeds a maximum accumulation threshold. If the determination in step 1140 is yes, then in step 1145 an AFCI device is triggered. Figure 12 illustrates an example of accumulator increment when a neural network (NN) algorithm detects arcing events using current and RSSI signals in each half-cycle according to an exemplary embodiment of the present invention. This is an example of an accumulator incrementing 1205 while an NN algorithm detects arcing events using current 1210 and RSSI 1215 signals in each half-cycle. Once the accumulator reaches a defined threshold value, it sends a trip signal 1220 to open a circuit breaker. The threshold value shown here is normalized to 1000. Figure 13 illustrates a schematic view of a flowchart for a method 1300 for detecting arc faults by accumulating machine learning classifications in a circuit breaker according to an exemplary embodiment of the present invention. Reference is made to the elements and features described in Figures 1-12. It should be appreciated that some steps are not required to be performed in any particular order, and that some steps are optional. Method 1300 comprises a step 1305 of providing a microcontroller that includes a processor and memory.Method 1300 further comprises a step 1310 of providing computer-readable software code stored in memory that, when executed by the processor, causes the microcontroller to: sample analog signals representing one or more of the following: a Received Signal Strength Indicator (RSSI) signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to obtain a data set of measurements and characteristics for each half-cycle of current passing through the circuit breaker; and feed the data set into a machine-learning classifier residing in the microcontroller, such that an output of the machine-learning classifier is a value between 0 and 1 representing a percentage probability that the data set originated from an electric arc.Based on the probability percentage value, the accumulator value is increased or decreased in proportion to the amount of current passing through the circuit breaker, and if the accumulator value exceeds an upper threshold, the microcontroller sends an output signal to a trigger circuit that opens the circuit breaker. Although a multilayer neural network is described herein as a machine learning classifier, the present invention also contemplates other types of machine learning classifiers or other forms of machine learning classifiers. For example, other types of machine learning classifiers based on one or more of the features presented above may be implemented without departing from the spirit of the present invention. The techniques described herein may be particularly useful for arc detection in an AFCL circuit breaker. While particular implementations are described in terms of a specific AFCL configuration, the techniques described herein are not limited to such a limited configuration, but can also be used with other configurations and types of circuit breakers. Although embodiments of the present invention have been described in an exemplary manner, it will be evident to those skilled in the art that many modifications, additions, and deletions can be made without departing from the spirit and scope of the invention and its equivalents, as set forth in the following claims. The embodiments and their various advantageous features and details are explained in greater detail with reference to the non-limiting embodiments illustrated in the accompanying drawings and detailed in the following description. Descriptions of starting materials, processing techniques, components, and well-known equipment are omitted to avoid unnecessarily obscuring the embodiments in detail. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments, are given only for illustrative purposes and are not limiting. Various substitutions, modifications, additions, and / or rearrangements within the spirit and / or scope of the underlying inventive concept will become apparent to those skilled in the art upon reading this disclosure. As used herein, the terms comprise, which comprises, include, which includes, which has, which has, or any other variation thereof, are intended to encompass a non-exclusive inclusion. For example, a process, article, or apparatus comprising a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent in that process, article, or apparatus. Furthermore, the examples or illustrations given in this document should not be considered in any way as restrictions, limitations, or express definitions of any term or terms with which they are used. Instead, these examples or illustrations should be considered as describing a particular embodiment and as illustrative only. Those of ordinary skill in the art will appreciate that any term or terms with which these examples or illustrations are used will encompass other embodiments that may or may not be given with or elsewhere in the specification, and all such embodiments are intended to be included within the scope of that term or those terms. In the preceding specification, the invention has been described with reference to specific embodiments. However, a person skilled in the art knows that various modifications and changes can be made without departing from the scope of the invention. Accordingly, the specification and figures should be considered in an illustrative and not restrictive sense, and all such modifications should be included within the scope of the invention. Although the invention has been described with respect to specific embodiments thereof, these embodiments are merely illustrative and not restrictive of the invention. The present description of the illustrated embodiments of the invention is not intended to be exhaustive, nor to limit the invention to the precise forms described herein (and, in particular, the inclusion of any particular embodiment, feature, or function is not intended to limit the scope of the invention to that embodiment, feature, or function). Rather, the description is intended to describe illustrative embodiments, features, and functions in order to provide a person of ordinary skill in the art with the context for understanding the invention without limiting the invention to any particular embodiment, feature, or function described.Although the specific embodiments and examples of the invention are described here for illustrative purposes only, several equivalent modifications are possible within the spirit and scope of the invention, as those skilled in the art will recognize and appreciate. As indicated, these modifications may be made to the invention in light of the foregoing description of the illustrated embodiments of the invention and must be included within the spirit and scope of the invention. Thus, while the invention has been described here with reference to particular embodiments thereof, a latitude of modification, several changes, and substitutions are intended in the preceding disclosures, and it will be appreciated that in some cases certain features of the embodiments of the invention will be employed without a corresponding use of other features without departing from the scope and spirit of the invention as set forth.Therefore, many modifications can be made to adapt a particular situation or material to the essential scope and spirit of the invention. The respective occurrences of the phrases "in an embodiment," "in an embodiment," or "in a specific embodiment," or similar terminology in various places throughout this specification, do not necessarily refer to the same embodiment. Furthermore, the features, structures, or particular characteristics of any particular embodiment may be combined in any suitable manner with one or more other embodiments. It should be understood that other variations and modifications of the embodiments described and illustrated herein are possible in light of the teachings contained herein and should be considered part of the spirit and scope of the invention. In this description, numerous specific details, such as examples of components and / or methods, are provided to give a complete understanding of the embodiments of the invention. However, a person skilled in the art will recognize that an embodiment can be practiced without one or more of the specific details, or with other apparatus, systems, assemblies, methods, components, materials, parts, and / or the like. In other cases, well-known structures, components, systems, materials, or operations are not shown or described in detail to avoid obscuring aspects of the embodiments of the invention. Although the invention may be illustrated using a particular embodiment, this is not, and does not, limit the invention to any particular embodiment, and a person of ordinary knowledge in the art will recognize that other embodiments are readily understandable and form part of this invention. It will also be appreciated that one or more of the elements represented in the drawings / figures can also be implemented in a more separate or integrated manner, or even eliminated or rendered unusable in certain cases, as useful according to a particular application. The benefits, other advantages, and solutions to the problems have been described above with respect to specific implementations. However, the benefits, advantages, solutions to the problems, and any component(s) that may cause any benefit, advantage, or solution to occur or become more pronounced should not be interpreted as a critical, necessary, or essential feature or component.

Claims

1. A circuit breaker, characterized in that it comprises: a microcontroller including a processor and memory, computer-readable software code stored in memory which, when executed by the processor, causes the microcontroller to: sample analog signals representing one or more of the following: a received signal strength indicator (RSSI) signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to obtain a set of measurement and characteristic data over a period of time;and inputting the dataset into a machine learning classifier residing in the microcontroller, such that an output of the machine learning classifier is a value between 0 and 1 representing a percentage probability that the dataset originated from an electric arc, wherein, based on the probability percentage value, the accumulator value is increased or decreased in proportion to the amount of current passing through the circuit breaker, and, if the accumulator value exceeds an upper threshold, the microcontroller sends an output signal to a trip circuit that opens the circuit breaker.

2. The circuit breaker of claim 1, characterized in that the time period is the duration of a half-cycle of the current passing through the circuit breaker and in which the Received Signal Strength Indicator (RSSI) signal and the current signal originate from an analog front-end ASIC circuit.

3. The circuit breaker of claim 2, characterized in that the analog front-end ASIC circuitry acts as an interface between a radio frequency (RF) coupler, shunt resistance sensors and the microcontroller.

4. The circuit breaker of claim 1, characterized in that the machine learning classifier is a trained neural network.

5. The circuit breaker of claim 1, characterized in that the microcontroller includes logic for detecting and tripping the circuit breaker for overcurrent, differential and arc faults.

6. The circuit breaker of claim 1, characterized in that the analog signal data are analyzed and classified from specific preprocessing features in each half-cycle by the machine learning classifier.

7. The circuit breaker of claim 1, characterized in that the computer-readable software code is for: digitally converting the Received Signal Strength Indicator (RSSI) signal, the voltage signal, and the current signal; extracting half-cycle features from the Received Signal Strength Indicator (RSSI) signal, the voltage signal, and the current signal; running the set of half-cycle features through the machine learning classifier; and analyzing an output from the machine learning classifier to determine whether the half-cycle was an arc or not.

8. The circuit breaker of claim 7, characterized in that if there is an arc inference, the computer-readable software code increases the accumulator value proportionally to the amount of current.

9. The circuit breaker of claim 8, characterized in that the computer-readable software code is for checking whether the accumulator value exceeds a maximum accumulator threshold and, if so, tripping the circuit breaker.

10. The circuit breaker of claim 7, characterized in that if there is no arc interference, the computer-readable software code is to decrease the accumulator value proportional to a quantity of the current.

11. A method for detecting arc faults by accumulating machine learning classifications, the method being characterized in that it comprises: providing a microcontroller including a processor and memory; providing computer-readable software code stored in memory which, when executed by the processor, causes the microcontroller to: master analog signals representing one or more of the following: a Received Signal Strength Indicator (RSSI) signal, a voltage signal, and a current signal; perform multiple preprocessing steps on the analog signals to obtain a set of measurement and characteristic data over a period of time;and inputting the dataset into a machine learning classifier residing in the microcontroller, such that an output of the machine learning classifier is a value between 0 and 1 representing a percentage probability that the dataset originated from an electric arc, wherein, based on the probability percentage value, the accumulator value is increased or decreased in proportion to the amount of current passing through the circuit breaker, and, if the accumulator value exceeds an upper threshold, the microcontroller sends an output signal to a trip circuit that opens the circuit breaker.

12. The method of claim 11, characterized in that the time period is the duration of a half-cycle of the current passing through the circuit breaker and in which the received signal strength indicator (RSSI) signal and the current signal originate from an analog front-end ASIC circuit.

13. The method of claim 12, characterized in that the analog front-end ASIC assembly acts as an interface between a radio frequency (RF) coupler, bCAQnn / cznz / e / YiAi shunt resistance sensors and the microcontroller.

14. The method of claim 11, characterized in that the machine learning classifier is a trained neural network.

15. The method of claim 11, characterized in that the microcontroller includes a logic for detecting and tripping the circuit breaker for overcurrent, differential and arc faults.

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