Deep ultraviolet light-emitting diode

Abstract

A deep ultraviolet light-emitting diode is provided. A deep ultraviolet light-emitting diode according to an embodiment comprises: a substrate (121); an n-type semiconductor layer (123) positioned on the substrate (121); a mesa (M) disposed on the n-type semiconductor layer (123) and comprising an active layer and a p-type semiconductor layer (127); n ohmic contact layers coming into contact with the n-type semiconductor layer (123); a p ohmic contact layer coming into contact with the p-type semiconductor layer (127); an n bump electrically connected to the n ohmic contact layers; and a p bump electrically connected to the p ohmic contact layer. The mesa (M) comprises a plurality of vias (127a) which expose a first conductive semiconductor layer. The mesa (M) has a long rectangular shape along the length direction. The vias are aligned to be parallel to one another in a direction perpendicular to the length direction of the mesa (M). The n ohmic contact layers are respectively formed on the first conductive semiconductor layer exposed around the mesa (M) and the first conductive semiconductor layer exposed by means of the vias. Figure 1.

Description

Deep ultraviolet light-emitting diode

[0001] The present invention relates to an inorganic semiconductor light-emitting diode, and in particular to a light-emitting diode that emits deep ultraviolet rays of 300 nm or less.

[0002] Generally, light-emitting diodes that emit ultraviolet rays in the range of 200 to 300 nm can be used for various applications, including sterilization devices, water or air purification devices, high-density optical recording devices, and as excitation sources for bio-aerosol fluorescence detection systems.

[0003] Unlike near-ultraviolet or blue light-emitting diodes, light-emitting diodes that emit relatively deep ultraviolet light include a well layer containing Al, such as AlGaN. Due to the composition of this gallium nitride-based semiconductor layer, deep ultraviolet light-emitting diodes have a structure significantly different from that of blue or near-ultraviolet light-emitting diodes.

[0004] In particular, deep ultraviolet light-emitting diodes according to the prior art have a structure in which the shape and position of the mesa disposed on the n-type semiconductor layer differ from that of general blue light-emitting diodes or near ultraviolet light-emitting diodes. That is, the mesa is formed offset to one side from the center of the n-type semiconductor layer, a p-bump is disposed on the mesa, and an n-bump is disposed spaced apart from the mesa near the other side opposite to the said side.

[0005] These conventional ultraviolet light-emitting diodes generally have the disadvantage of low light output and high forward voltage. In particular, since a p-type GaN layer is included in the p-type semiconductor layer for the ohmic contact, ultraviolet light incident on the p-type semiconductor layer is absorbed and lost by the p-type semiconductor layer. Furthermore, because the n-ohmic contact layer bonded to the n-type semiconductor layer also absorbs light, light traveling to the n-ohmic contact layer is absorbed and lost by the n-ohmic contact layer.

[0006] Furthermore, conventional ultraviolet light-emitting diodes tend to minimize the width of the mesa as much as possible because it is difficult to utilize light emitted from the sides of the mesa. In other words, the width of the mesa is formed to be relatively wide. However, the larger the mesa width, the greater the distance from the n-ohmic contact layer to the central region of the mesa, which is detrimental to current dispersion and consequently leads to a higher forward voltage.

[0007] The problem that the present invention aims to solve is to provide a deep ultraviolet light-emitting diode of a novel structure capable of improving electrical characteristics and / or light output.

[0008] Another problem that the present invention aims to solve is to provide a deep ultraviolet light-emitting diode capable of improving current dispersion performance.

[0009] An ultraviolet light-emitting diode according to one embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a mesa disposed on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; n-ohmic contact layers in contact with the n-type semiconductor layer; a p-ohmic contact layer in contact with the p-type semiconductor layer; an n-bump electrically connected to the n-ohmic contact layer; and a p-bump electrically connected to the p-ohmic contact layer, wherein the mesa comprises a plurality of vias that expose a first conductivity type semiconductor layer, the mesa has an elongated rectangular shape along the longitudinal direction, and the vias are arranged parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, and the n-ohmic contact layers are each formed on the first conductivity type semiconductor layer exposed around the mesa and the first conductivity type semiconductor layer exposed on the vias.

[0010] A light-emitting diode according to another embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a mesa disposed on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; n-ohmic contact layers in contact with the n-type semiconductor layer; and a p-ohmic contact layer in contact with the p-type semiconductor layer, wherein the mesa comprises a plurality of vias that expose a first conductivity type semiconductor layer, the mesa having an elongated rectangular shape along the longitudinal direction, the mesa having a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along the longitudinal direction of the mesa, and also having a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa.

[0011] According to embodiments of the present invention, a deep ultraviolet light-emitting diode can be provided that can secure a large light-emitting area through a mesa having a plurality of vias parallel to each other in a direction perpendicular to the length direction of the mesa, and can evenly distribute current within the mesa by adopting a mesa having a symmetrical structure.

[0012] The advantages and features of the present invention will be discussed in detail in the detailed description or will become clear through the detailed description.

[0013] FIG. 1 is a plan view illustrating a deep ultraviolet light-emitting diode according to one embodiment of the present invention.

[0014] Figure 2 is a cross-sectional view taken along the cut line AA of Figure 1.

[0015] FIG. 3 is a schematic plan view for illustrating a mesa according to one embodiment of the present invention.

[0016] FIG. 4 is a schematic cross-sectional view illustrating a deep ultraviolet light-emitting diode mounted on a submount according to one embodiment of the present invention.

[0017] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. The embodiments described below are provided as examples to ensure that the concept of the present invention is sufficiently conveyed to those skilled in the art to which the present invention pertains. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. Furthermore, in the drawings, the width, length, thickness, etc., of components may be exaggerated for convenience. Also, when one component is described as being "above" or "on" another component, this includes not only cases where each part is "immediately above" or "immediately on" another part, but also cases where another component is interposed between each component and another component. Throughout the specification, identical reference numerals indicate identical components.

[0018] The nitride-based semiconductor layers described below can be grown using various generally known methods, for example, using techniques such as MOCVD (Metal Organic Chemical Vapor Deposition), MBE (Molecular Beam Epitaxy), or HVPE (Hydride Vapor Phase Epitaxy). However, in the embodiments described below, the semiconductor layers are described as being grown in a growth chamber using MOCVD. In the growth process of the nitride-based semiconductor layers, sources introduced into the growth chamber may be generally known sources; for example, TMGa, TEGa, etc. may be used as the Ga source, TMAl, TEAl, etc. may be used as the Al source, TMIn, TEIn, etc. may be used as the In source, and NH3 may be used as the N source. However, the present invention is not limited thereto.

[0019] An ultraviolet light-emitting diode according to one embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a mesa disposed on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; n-ohmic contact layers in contact with the n-type semiconductor layer; a p-ohmic contact layer in contact with the p-type semiconductor layer; an n-bump electrically connected to the n-ohmic contact layer; and a p-bump electrically connected to the p-ohmic contact layer, wherein the mesa comprises a plurality of vias that expose a first conductivity type semiconductor layer, the mesa has an elongated rectangular shape along the longitudinal direction, and the vias are arranged parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, and the n-ohmic contact layers are each formed on the first conductivity type semiconductor layer exposed around the mesa and the first conductivity type semiconductor layer exposed on the vias.

[0020] By forming multiple vias inside the mesa, it is possible to prevent the formation of a non-luminous region inside the mesa. Conventionally, when the width of the mesa is wide, the distance from the n-ohmic contact layer to the inside of the mesa increases, and a non-luminous area is formed. In contrast, the present invention allows for the even distribution of current inside the mesa by arranging multiple vias inside the mesa and forming n-ohmic contact layers within the vias.

[0021] Meanwhile, the plurality of vias may be spaced apart from each other at equal intervals. These intervals can be adjusted so that a non-luminous region is not formed inside the mesa between the vias.

[0022] Furthermore, the mesa has a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along the longitudinal direction of the mesa, and may also have a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa.

[0023] By having a symmetrical structure as described above, the concentration of current through specific locations of the mesa can be prevented.

[0024] Meanwhile, the spacing between the vias may be equal to or greater than the spacing between one end of the via and one edge of the mesa. Additionally, the spacing between the short edge of the mesa and the via may be equal to or greater than the spacing between the vias.

[0025] Meanwhile, an n-ohmic contact layer disposed on a first conductivity-type semiconductor layer exposed around the mesa can surround the mesa. Accordingly, the current can be evenly distributed over the entire region of the mesa.

[0026] Meanwhile, the deep ultraviolet light-emitting diode may further include an n-capping layer and a p-capping layer covering the n-ohmic contact layer and the p-ohmic contact layer, respectively, and the capping layers may cover the upper surface and the side surface of the ohmic contact layers.

[0027] The deep ultraviolet light-emitting diode may further comprise: a lower insulating layer covering the mesa, the n-ohmic contact layer, and the p-ohmic contact layer, and having openings on the upper portion of the n-ohmic contact layer and the p-ohmic contact layer; an n-pad metal layer and a p-pad metal layer disposed on the lower insulating layer and electrically connected to the n-ohmic contact layer and the p-ohmic contact layer, respectively, through the openings of the lower insulating layer; and an upper insulating layer covering the n-pad metal layer and the p-pad metal layer, wherein the n-bump and the p-bump are disposed on the upper insulating layer and can electrically contact the n-pad metal layer and the p-pad metal layer through the openings of the upper insulating layer.

[0028] Furthermore, the n pad metal layer may include a reflective metal layer, and may include, for example, an Al layer.

[0029] In addition, the n-pad metal layer can reflect light emitted through the side of the mesa. Accordingly, the light lost due to emission through the side of the mesa can be reduced, thereby improving the light efficiency of the deep ultraviolet light-emitting diode.

[0030] The deep ultraviolet light-emitting diode further includes an n-capping layer and a p-capping layer covering the n-ohmic contact layer and the p-ohmic contact layer, respectively, and the n-pad metal layer is connected to the n-capping layer and can be electrically connected to the n-ohmic contact layer.

[0031] Furthermore, the n-capping layer may include a reflective metal layer, for example, an Al layer. Accordingly, light emitted from the n-type semiconductor layer can be reflected using the n-capping layer, thereby improving the light efficiency of the deep ultraviolet light-emitting diode.

[0032] In one embodiment, the n-pad metal layer may surround the p-pad metal layer. However, the present invention is not necessarily limited thereto.

[0033] A deep ultraviolet light-emitting diode according to another embodiment of the present invention comprises: a substrate; an n-type semiconductor layer located on the substrate; a mesa disposed on the n-type semiconductor layer and comprising an active layer and a p-type semiconductor layer; n-ohmic contact layers in contact with the n-type semiconductor layer; and a p-ohmic contact layer in contact with the p-type semiconductor layer, wherein the mesa comprises a plurality of vias that expose a first conductivity type semiconductor layer, the mesa has an elongated rectangular shape along the longitudinal direction, the mesa has a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along the longitudinal direction of the mesa, and also has a mirror-plane symmetric structure with respect to a plane passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa.

[0034] By having a symmetrical structure, the current can be prevented from concentrating through specific locations within the mesa, thereby providing a deep ultraviolet light-emitting diode capable of evenly distributing the current within the mesa.

[0035] The vias may have an elongated shape along a direction perpendicular to the length direction of the mesa and may be arranged parallel to each other. By forming the vias in an elongated shape, the current can be evenly distributed not only in the area between the vias but also in the area between the vias and the edge of the mesa.

[0036] Meanwhile, the n-ohmic contact layers may include an n-ohmic contact layer surrounding the mesa around the mesa and n-ohmic contact layers disposed within the vias.

[0037] Meanwhile, the deep ultraviolet light-emitting diode may further include an n-pad metal layer electrically connected to the n-ohmic contact layers; and p-pad metal layers electrically connected to the p-ohmic contact layer, wherein the n-pad metal layer may surround the p-pad metal layers.

[0038] The above n-pad metal layer and p-pad metal layer can be formed in the same process and located at the same level.

[0039] The deep ultraviolet light-emitting diode may also further include a lower insulating layer covering the mesa, the n-ohmic contact layer, and the p-ohmic contact layer, wherein the n-pad metal layer and the p-pad metal layer are disposed on the lower insulating layer and can be electrically connected to the n-ohmic contact layer and the p-ohmic contact layer, respectively, through openings formed in the lower insulating layer.

[0040] Furthermore, the deep ultraviolet light-emitting diode may further include an upper insulating layer covering the n-pad metal layer and the p-pad metal layer; and n-bumps and p-bumps disposed on the upper insulating layer, wherein the n-bumps are electrically connected to the n-pad metal layer and the p-bumps are electrically connected to the p-pad metal layers.

[0041] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0042] FIG. 1 is a schematic plan view for illustrating a deep ultraviolet light-emitting diode according to one embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the cut line AA of FIG. 1. Meanwhile, FIG. 3 is a schematic plan view for illustrating a mesa according to one embodiment of the present invention.

[0043] Referring to FIGS. 1, 2 and 3, the ultraviolet light-emitting diode according to the present embodiment may include a substrate (121), an n-type semiconductor layer (123), an active layer (125), a p-type semiconductor layer (127), an n-ohmic contact layer (129a), a p-ohmic contact layer (129b), an n-capping layer (131a), a p-capping layer (131b), a lower insulating layer (132), an n-pad metal layer (133a), a p-pad metal layer (133b), an upper insulating layer (135), an n-bump (137a) and a p-bump (137b), and an anti-reflection layer (139).

[0044] The substrate (121) is not limited to any substrate capable of growing a nitride-based semiconductor, and may include heterogeneous substrates such as, for example, a sapphire substrate, a silicon substrate, a silicon carbide substrate, or a spinel substrate, and may also include homogeneous substrates such as a gallium nitride substrate, an aluminum nitride substrate, etc.

[0045] An n-type semiconductor layer (123) is located on a substrate (121). The n-type semiconductor layer (123) may include, for example, an AlN buffer layer (about 3.79 μm) and an n-type AlGaN layer. The n-type AlGaN layer may include a lower n-type AlGaN layer (about 2.15 μm) with an Al molar ratio of 0.8 or higher, an intermediate AlGaN layer (1.7 nm) with an Al molar ratio of 0.7 to 0.8, and an upper n-type AlGaN layer with a thickness of about 66.5 nm. The n-type semiconductor layer (123) is formed of a nitride-based semiconductor having a higher bandgap than the active layer so that light generated in the active layer can pass through. When a gallium nitride-based semiconductor layer is grown on a sapphire substrate (121), the n-type semiconductor layer (123) may typically include a plurality of layers to improve crystal quality.

[0046] The mesa (M) is placed on a portion of the n-type semiconductor layer (123). The mesa (M) includes an active layer (125) and a p-type semiconductor layer (127). Generally, the mesa (M) is formed by sequentially growing the n-type semiconductor layer (123), the active layer (125), and the p-type semiconductor layer (127), and then patterning the p-type semiconductor layer (127) and the active layer (125) through a mesa etching process.

[0047] The active layer (125) may be a single quantum well structure or a multiple quantum well structure including a well layer and a barrier layer. The well layer may be formed of AlGaN or AlInGaN, and the barrier layer may be formed of AlGaN or AlInGaN with a bandgap wider than that of the well layer. For example, each well layer may be formed with AlGaN having an Al molar ratio of about 0.5 with a thickness of about 3.1 nm, and each barrier layer may be formed with AlGaN having an Al molar ratio of 0.7 or more with a thickness of about 9 nm or more. In particular, the first barrier layer may be formed thicker than other barrier layers with a thickness of 12 nm or more. Meanwhile, AlGaN layers with an Al molar ratio of 0.7 to 0.8 may be arranged in contact with the top and bottom of each well layer with a thickness of about 1 nm each. However, the Al molar ratio of the AlGaN layer in contact with the last well layer may be 0.8 or more, considering contact with the electron block layer.

[0048] Meanwhile, the p-type semiconductor layer (127) may include an electron block layer and a p-type GaN contact layer. The electron block layer prevents electrons from overflowing from the active layer to the p-type semiconductor layer, thereby improving the recombination rate of electrons and holes. The electron block layer may be formed, for example, from p-type AlGaN with an Al molar ratio of about 0.8, and may be formed with a thickness of, for example, 55 nm. Meanwhile, the p-type GaN contact layer may be formed with a thickness of about 300 nm.

[0049] As clearly illustrated in FIG. 3, the mesa (M) may have an elongated rectangular shape in one direction and includes a plurality of vias (127a) that expose an n-type semiconductor layer (123). Each of the vias (127a) may have an elongated shape and may be arranged in a direction perpendicular to the length direction of the mesa (M). The vias (127a) may be spaced apart from each other and arranged parallel to each other, and furthermore, the vias (127a) may be spaced apart from each other by an equal interval (s1). On one side, the interval (s2) between one end of the length direction of the via (127a) and the edge of the adjacent mesa (M) may be equal to or smaller than the interval (s1) between the vias (127a). Additionally, the gap (s3) between the short edge of the mesa (M) and the adjacent via (127a) may be equal to or greater than the gap (s1) between the vias (127a).

[0050] Furthermore, the mesa (M) has a mirror-plane symmetric structure with respect to a plane crossing the center of the mesa along the length direction of the mesa, and may also have a mirror-plane symmetric structure with respect to a plane crossing the center of the mesa along a direction perpendicular to the length direction of the mesa. Due to this shape, current can be evenly distributed within the mesa (M).

[0051] Referring again to FIGS. 1 and 2, an n-ohmic contact layer (129a) is disposed on an n-type semiconductor layer (123) exposed around the mesa (M) and vias (127a). The n-ohmic contact layer (129a) can be formed by depositing a plurality of metal layers and then alloying these metal layers through a rapid thermal alloy (RTA) process. For example, the n-ohmic contact layer (129a) can be formed by sequentially depositing Cr / Ti / Al / Ti / Au and then alloying them using an RTA process. Thus, the n-ohmic contact layer (129a) becomes an alloy layer containing Cr, Ti, Al, and Au.

[0052] The n-ohmic contact layer (129a) surrounds the mesa (M) along the perimeter of the mesa (M). Additionally, the n-ohmic contact layer (129a) is placed within vias (127a). The width (w1) of the n-ohmic contact layer (129a) surrounding the mesa (M) along the perimeter of the mesa (M) may be smaller than the width (w2) of the n-ohmic contact layer (129a) placed within the vias (127a). By making the width (w2) of the n-ohmic contact layer (129a) placed within the vias (127a) larger than the width (w1) of the n-ohmic contact layer around the mesa, current can be easily supplied into the mesa (M). The width (w1) may be in the range of, for example, 5 to 30 µm, and the width (w2) may be in the range of 10 to 40 µm.

[0053] The n-ohmic contact layer (129a) is spaced apart from the mesa (M) at a certain distance. Therefore, an area is formed between the mesa (M) and the n-ohmic contact layer (129a) where the n-ohmic contact layer (129a) is not present. The distance between the n-ohmic contact layer (129a) and the mesa (M) may be constant along the perimeter of the mesa (M), but is not necessarily limited thereto.

[0054] After the n ohmic contact layer (129a) is formed, a p ohmic contact layer (129b) is formed on the mesa (M). The p ohmic contact layer (129b) can be formed, for example, through an RTA process after depositing Ni / Au. The p ohmic contact layer (129b) makes ohmic contact with the p-type semiconductor layer (127) and covers most of the upper region of the mesa (M), for example, more than 80%.

[0055] Meanwhile, an n-capping layer (131a) and a p-capping layer (131b) may be formed on the n-ohmic contact layer (129a) and the p-ohmic contact layer (129b), respectively. The n- and p-capping layers (131a, 131b) may cover the upper and side surfaces of the n-ohmic contact layer (129a) and the p-ohmic contact layer (129b). These capping layers (131a, 131b) may include a reflective metal layer, such as an Al layer, and specifically may be formed of Cr / Al / Ti / Ni / Ti / Ni / Ti / Ni / Au / Ti. In particular, the n-capping layer (131a) has a wider width than the n-ohmic contact layer (129a) and thus can function as a reflective layer (first reflective layer) that reflects light emitted through the n-type semiconductor layer (123). Furthermore, the n capping layer (131a) may have a height lower than that of the mesa (M), and thus, the upper surface of the n capping layer (131a) may be located below the upper surface of the mesa (M).

[0056] The lower insulating layer (132) covers the mesa (M) and also covers the n-capping layer (131a) and the p-capping layer (131b). The lower insulating layer (132) also covers the n-type semiconductor layer (123) exposed around the mesa (M) and within the vias (127a). Meanwhile, the lower insulating layer (132) has openings (132a) to allow electrical connection to the n-ohmic contact layer (129a) and openings (132b) to allow electrical connection to the p-ohmic contact layer (129b). By etching the lower insulating layer (132), openings (132a, 132b) that expose the capping layers (131a, 131b) can be formed. At this time, the Ti layer on the upper surface of the exposed capi layers (131a, 131b) can be removed by an etching process.

[0057] The lower insulating layer (132) may be formed of, for example, SiO2, but is not limited thereto, and may also be formed of a distributed Bragg reflector.

[0058] Meanwhile, the n-pad metal layer (133a) and the p-pad metal layer (133b) are disposed on the lower insulating layer (132). The n-pad metal layer (133a) and the p-pad metal layer (133b) can be formed together in the same process with the same metal layer and disposed on the same level, i.e., on the lower insulating layer (132). The n-pad and p-pad metal layers (133a, 133b) may include a reflective metal layer, for example, an Al layer, to have a high reflectivity. For example, the n-pad and p-pad metal layers (133a, 133b) can be formed with the same layer structure as the capping layer (131a, 131b).

[0059] The n pad metal layer (133a) is electrically connected to the n ohmic contact layers (129a) through the openings (132a) of the lower insulating layer (132). The n ohmic contact layers (129a) are electrically connected to each other by the n pad metal layer (133a). The n pad metal layer (133a) may extend from the n ohmic contact layers (129a) located below the mesa (M) to the top of the mesa (M).

[0060] Meanwhile, the p pad metal layers (133b) may each be electrically connected to the p ohmic contact layers (129b) through the openings (132b) of the lower insulating layer (132). The p pad metal layers (133b) may be spaced apart from each other and each may be surrounded by the n pad metal layers (133a).

[0061] The n pad metal layer (133a) can function as a reflective layer (second reflective layer) that reflects light emitted through the side of the mesa (M), thereby improving the light efficiency of the light-emitting diode. Additionally, the n capping layer (131a) and the n pad metal layer (133a) can reflect light emitted from the n-type semiconductor layer (123) exposed in the region between the mesa (M) and the n ohmic contact layer (129a).

[0062] The upper insulating layer (135) covers the n-pad metal layer (133a) and the p-pad metal layer (133b). However, the upper insulating layer (135) has openings (135a) that expose the n-pad metal layer (133a) and openings (135b) that expose the p-pad metal layer (133b) on top of the mesa (M). The openings (135a) may be formed to have an elongated shape along the via (127a). As illustrated, the openings (135a) may be positioned above the line passing through the center of the mesa along the short axis direction of the mesa (M). Meanwhile, the openings (135b) may be positioned below the line passing through the center of the mesa along the short axis direction of the mesa (M). The upper insulating layer (135) may be formed of, for example, silicon nitride or silicon oxide.

[0063] n bumps (137a) and p bumps (137b) are located on the upper insulating layer (135). n bumps (137a) cover the opening (135a) and are connected to the n pad metal layer (133a) through the opening (135a). n bumps (137a) are electrically connected to the n-type semiconductor layer (123) through the n pad metal layer (133a) and the n ohmic contact layer (129a). The outer edges of n bumps (137a) and p bumps (137b) may be located on the n ohmic contact layer (129a) surrounding the mesa (M).

[0064] The p bump (137b) covers the openings (135b) and connects to the p pad metal layers (133b) through the openings (135b). The p bump (137b) is electrically connected to the p-type semiconductor layer (127) through the p pad metal layer (133b) and the p ohmic contact layer (129b). The p pad metal layers (133b) can be electrically connected to each other through the p bump (137b).

[0065] The n bump (137a) and p bump (137b) can be formed, for example, from Ti / Au / Cr / Au. As shown in FIG. 1, the n bump (137a) and p bump (137b) can be arranged along the length direction of the mesa (M). The n bump (137a) and p bump (137b) can be spaced about 90 µm apart. By making the spacing between the n bump (137a) and p bump (137b) narrow, the area of ​​the n bump (137a) and p bump (137b) can be made relatively large. Accordingly, heat generated in the light-emitting diode can be easily dissipated, thereby improving the performance of the light-emitting diode.

[0066] Furthermore, the openings (135a, 135b) are covered by n bumps (137a) and p bumps (137b), so that moisture or solder from the outside can be prevented from penetrating through the openings (135a, 135b), thereby improving reliability.

[0067] Meanwhile, as shown in FIG. 2, the upper surface of the n bump (137a) and p bump (137b) may not be flat due to the height difference between the mesa (M) and the n pad metal layer (133a).

[0068] An anti-reflection layer (139) is disposed on the light-emitting side of the substrate (121). The anti-reflection layer (139) may be formed with a transparent insulating layer, such as SiO2, with a thickness that is, for example, an integer multiple of 1 / 4 of the ultraviolet wavelength. Alternatively, a bandpass filter in which layers with different refractive indices are repeatedly stacked may be used as the anti-reflection layer (139).

[0069] FIG. 4 is a schematic cross-sectional view illustrating a deep ultraviolet light-emitting diode mounted on a submount according to one embodiment of the present invention.

[0070] Referring to FIG. 4, the deep ultraviolet light-emitting diode is flip-bonded onto a submount substrate (200). The submount substrate (200) may have electrode pads (201a, 201b) on an insulating substrate, for example, AlN.

[0071] n bumps (137a) and p bumps (137b) can be bonded to electrode pads (201a, 201b) of a submount substrate (200) through solder paste (203a, 203b). However, the present invention is not limited thereto, and a deep ultraviolet light-emitting diode can be bonded to a submount substrate (200) using thermal ultrasonic bonding technology or solder bonding using AuSN.

[0072] For the above, various modifications and changes are possible within the scope of the technical concept according to the claims of the present invention, and the present invention includes all technical concepts according to the claims.

Claims

1. Substrate; An n-type semiconductor layer positioned on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; n-ohmic contact layers contacting the above n-type semiconductor layer; A p-ohmic contact layer contacting the above p-type semiconductor layer; an n bump electrically connected to the above n ohmic contact layer; and A p bump electrically connected to the above p ohmic contact layer is included, The above mesa comprises a plurality of vias exposing the first conductive semiconductor layer, The above mesa has a long rectangular shape along the length direction, The above vias are arranged parallel to each other in a direction perpendicular to the longitudinal direction of the mesa, The above n-ohmic contact layers are each formed on a first conductive semiconductor layer exposed around the mesa and a first conductive semiconductor layer exposed to the vias in a deep ultraviolet light emitting diode.

2. In claim 1, The above multiple vias are deep ultraviolet light emitting diodes spaced at equal intervals from each other.

3. In claim 2, A deep ultraviolet light emitting diode having a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the longitudinal direction of the mesa and also having a mirror-symmetric structure with respect to a plane passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa.

4. In claim 3, A deep ultraviolet light emitting diode in which the spacing between the vias is equal to or greater than the spacing between one end of the via and one edge of the mesa.

5. In claim 4, A deep ultraviolet light emitting diode wherein the spacing between the short side edge of the mesa and the via is equal to or greater than the spacing between the vias.

6. In claim 1, A deep ultraviolet light emitting diode comprising an n-ohmic contact layer disposed on a first conductive semiconductor layer exposed around the mesa, wherein the n-ohmic contact layer surrounds the mesa.

7. In claim 1, A deep ultraviolet light emitting diode further comprising an n capping layer and a p capping layer covering the n ohmic contact layer and the p ohmic contact layer, respectively, wherein the capping layers cover the upper surface and side surfaces of the ohmic contact layers.

8. In claim 1, A lower insulating layer covering the mesa, the n-ohmic contact layer and the p-ohmic contact layer, and having openings on the n-ohmic contact layer and the p-ohmic contact layer; An n-pad metal layer and a p-pad metal layer disposed on the lower insulating layer and electrically connected to the n-ohmic contact layer and the p-ohmic contact layer, respectively, through openings in the lower insulating layer; and Further comprising an upper insulating layer covering the above n pad metal layer and p pad metal layer, A deep ultraviolet light emitting diode in which the n bump and the p bump are disposed on the upper insulating layer and are electrically connected to the n pad metal layer and the p pad metal layer through openings in the upper insulating layer.

9. In claim 8, The above n-pad metal layer is a deep ultraviolet light emitting diode including an Al layer.

10. In claim 9, The above n-pad metal layer is a deep ultraviolet light emitting diode that reflects light emitted through the side surface of the mesa.

11. In claim 8, Further comprising an n capping layer and a p capping layer covering the n ohmic contact layer and the p ohmic contact layer, respectively, A deep ultraviolet light emitting diode in which the above n pad metal layer is connected to the above n capi layer and electrically connected to the above n ohmic contact layer.

12. In claim 11, The above n capping layer is a deep ultraviolet light emitting diode including an Al layer.

13. In claim 8, The above n-pad metal layer is a deep ultraviolet light emitting diode surrounding the above p-pad metal layer.

14. Substrate; An n-type semiconductor layer positioned on the substrate; A mesa disposed on the n-type semiconductor layer and including an active layer and a p-type semiconductor layer; n-ohmic contact layers contacting the n-type semiconductor layer; and It includes a p-ohmic contact layer that contacts the p-type semiconductor layer, The above mesa comprises a plurality of vias exposing the first conductive semiconductor layer, The above mesa has a long rectangular shape along the length direction, A deep ultraviolet light emitting diode having a mirror-symmetric structure with respect to a plane passing through the center of the mesa along the longitudinal direction of the mesa and also having a mirror-symmetric structure with respect to a plane passing through the center of the mesa along a direction perpendicular to the longitudinal direction of the mesa.

15. In claim 14, The above vias have a long shape along a direction perpendicular to the length direction of the mesa and are arranged parallel to each other in a deep ultraviolet light emitting diode.

16. In claim 15, A deep ultraviolet light emitting diode comprising: an n-ohmic contact layer surrounding the mesa and an n-ohmic contact layer disposed within the vias; and 17. In claim 16, an n-pad metal layer electrically connected to the above n-ohmic contact layers; and Further comprising p pad metal layers electrically connected to the above p ohmic contact layer, The above n-pad metal layer is a deep ultraviolet light emitting diode surrounding the above p-pad metal layers.

18. In claim 17, A deep ultraviolet light emitting diode in which the n-pad metal layer and the p-pad metal layer are formed in the same process and positioned at the same level.

19. In claim 18, Further comprising a lower insulating layer covering the mesa, the n-ohmic contact layer and the p-ohmic contact layer, A deep ultraviolet light emitting diode in which the n-pad metal layer and the p-pad metal layer are disposed on the lower insulating layer and are electrically connected to the n-ohmic contact layer and the p-ohmic contact layer, respectively, through openings formed in the lower insulating layer.

20. In claim 19, An upper insulating layer covering the n pad metal layer and the p pad metal layer; Further comprising an n bump and a p bump arranged on the upper insulating layer, A deep ultraviolet light emitting diode in which the n bump is electrically connected to the n pad metal layer, and the p bump is electrically connected to the p pad metal layers.

21. Substrate; An n-type semiconductor layer positioned on the substrate; It is disposed on the above n-type semiconductor layer and includes an active layer and a p-type semiconductor layer, A mesa comprising a plurality of vias exposing the n-type semiconductor layer; n-ohmic contact layers each contacting the n-type semiconductor layer exposed around the mesa and the n-type semiconductor layer exposed through the plurality of vias; First reflective layers covering the upper and side surfaces of the above n ohmic contact layers; A second reflective layer connected to the first reflective layers; n bump connected to the second reflective layer; and A p-bump electrically connected to the p-type semiconductor layer is included, A deep ultraviolet light emitting diode, wherein the n-ohmic contact layer, the first reflective layers, and the second reflective layer comprise Al.

22. In claim 21, A deep ultraviolet light emitting diode in which the width of the n-ohmic contact layer contacting the n-type semiconductor layer around the mesa is narrower than the width of the n-ohmic contact layer contacting the n-type semiconductor layer within the via.

23. In claim 21, The above first reflective layers are positioned lower than the mesa, A deep ultraviolet light emitting diode in which the second reflective layer extends from the first reflective layers to the upper portion of the mesa.