Heat dissipating substrate for semiconductor and preparation method thereof

Abstract

Provided are a heat dissipating substrate (101) and a preparation method thereof, which can form a precise pattern in a thick electrode metal plate and improve insulating strength and peel strength. heat dissipating substrate for semiconductor may include: an electrode metal plate (30) having a plurality of electrode patterns (31) which are electrically insulated from each other by a pattern space (32) formed therebetween; a metal base (10) disposed under the electrode metal plate (30), and configured to diffuse heat conducted from the electrode metal plate (30); an insulating layer (20) formed between the electrode metal plate (30) and the metal base (10); and an insulating material filled portion (201) configured to fill the pattern space (32) and a peripheral portion outside an electrode pattern group composed of the plurality of electrode patterns (31), and support the electrode patterns (31) while brought in direct contact with side surfaces of the plurality of electrode patterns (31). Figure 13

Description

Heat dissipation substrate for semiconductors and method of manufacturing the same

[0001] The present invention relates to a heat dissipation substrate for mounting semiconductor devices, a semiconductor module including the same, and a method for manufacturing the same. More specifically, the present invention relates to a heat dissipation substrate that combines the functions of a heat sink and a circuit board for mounting semiconductor devices, wherein the heat dissipation substrate is equipped with a thick electrode metal plate suitable for mounting high-power semiconductor devices or high-output LEDs, and to a method for manufacturing the heat dissipation substrate and structural features according thereto.

[0002] Recently, active research and development regarding the generation, storage, and utilization of renewable energy, such as solar and wind power, has been underway in the power industry. Active research and development is also being conducted on improving the efficiency and safety of various electrical and electronic devices, as well as energy conservation, including electric vehicle batteries and power grids. The key component used in these applications is the power module, or power semiconductor module, which utilizes power devices. In the lighting sector as well, there is a trend to apply LED light sources, which offer superior efficiency and longevity, to light sources requiring high output, such as automotive headlights, streetlights, and plant growth lights for smart farms.

[0003] Since the current used in these power devices ranges from tens to hundreds of amperes and the voltage is high, ranging from hundreds to thousands of volts, a significant amount of heat is generated in the power modules, which can lead to device malfunctions and reliability issues. To prevent such failures, rapidly dissipating the heat generated by power semiconductor devices has become a major concern. In the case of high-output LED light source modules, heat dissipation is also a critical factor determining the device's lifespan and efficiency.

[0004] Conventional methods for manufacturing metal printed circuit boards for power semiconductors involve inserting an insulating layer between a metal substrate with high thermal conductivity and a copper foil, laminating them under high temperature and high pressure (hot press), and then proceeding through a general printed circuit board manufacturing process. The thermal conductivity of metal printed circuit boards (Metal PCBs) manufactured using conventional technology is generally 3 to 5 W / mK, and a large heat sink must be attached to ensure sufficient heat dissipation. In this process, the general printed circuit board manufacturing process utilizes etching or plating processes to form circuit electrode patterns on a layer made of copper foil.

[0005] However, it is difficult to apply conventional metal printed circuit board manufacturing methods to heat dissipation substrates for high-power semiconductors. This is because it is difficult to handle thick electrode metal plates using etching or plating methods when the thickness of the electrode metal plate is increased for high-power semiconductor mounting. In fact, in this technical field, it is judged that it is difficult to maintain profitability using etching or plating methods when the thickness of the electrode metal plate is 0.3 mm or more. Furthermore, there is a problem in that the cross-sectional profile of the electrode pattern deteriorates, making it prone to insulation breakdown.

[0006] Moreover, etching and plating processes pose a significant problem in that they cause environmental pollution due to the use of toxic chemicals or heavy metals. There is a need for the development of eco-friendly manufacturing methods that can minimize the emission of pollutants and suitable heat dissipation substrate structures.

[0007] The present invention aims to solve the aforementioned problems and provides a heat dissipation substrate for semiconductors having a thick electrode metal plate with a thickness of 0.2 mm or more and a method for manufacturing the same.

[0008] The purpose of the present invention is to provide a heat dissipation substrate for semiconductors having a structure that achieves excellent heat dissipation performance by having a thick electrode metal plate, as well as improved dielectric strength and high peel strength.

[0009] In addition, the method for manufacturing a heat dissipation substrate for semiconductors according to the present invention is intended to provide a method for effectively patterning a thick electrode metal plate and manufacturing a heat dissipation substrate for semiconductors that can provide excellent insulation performance and high peel strength in an environmentally friendly and efficient manner.

[0010] To solve the aforementioned problem, a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: an electrode metal layer having an electrode pattern formed thereon in which a semiconductor device is mounted by a pattern space; a metal base constituting a heat dissipation body that diffuses and dissipates heat emitted from the semiconductor device by thermal conduction; an insulating layer having electrical insulating properties and disposed between the electrode metal layer and the metal base; and a reinforcing projection comprising a groove formed on at least one of the surface of the metal base in contact with the insulating layer and the surface of the electrode metal layer in contact with the insulating layer, the interior of the groove being filled with the same material as the insulating layer, wherein the pattern space is configured to include a portion cut vertically from the surface of the electrode metal layer.

[0011] The above pattern space may be configured to be machined to a depth deeper than the bottom surface of the electrode metal layer and shallower than the bottom surface of the insulating layer to expose the insulating layer.

[0012] The above pattern space may further include a portion formed by isotropic etching.

[0013] The above groove and the above reinforcing projection may have a cross-section in the shape of a dovetail.

[0014] A method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: a cutting step of forming a groove pattern by cutting the electrode metal layer from one side thereof to a predetermined depth shallower than the thickness of the electrode metal layer and leaving a remainder; and an etching step of forming the electrode pattern by etching the remainder left along the groove pattern while the electrode metal layer is bonded to the insulating layer or the ceramic base; wherein the etching step is configured to etch the remainder while the electrode metal layer is bonded to the insulating layer or the ceramic base.

[0015] A method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: a bonding step of forming a multilayer heat dissipation substrate in which a metal base, an insulating layer, and an electrode metal layer are bonded in a stacked form; a cutting step of forming a groove pattern in which a portion of a predetermined thickness is left between adjacent electrode patterns by cutting a groove from the surface of the electrode metal layer to a depth shallower than the bottom surface of the electrode metal layer according to the shape of a pre-designed electrode pattern; and an etching step of electrically insulating the adjacent electrode patterns by completely etching the portion to expose the insulating layer. The bonding step is configured to bond the electrode metal layer and the metal base through the insulating layer, wherein, prior to the bonding step, a groove is formed on the surface of the electrode metal layer or the metal base that contacts the insulating layer, and then a vacuum hot press process is performed to form a reinforcing protrusion connected to the insulating layer simultaneously with the bonding.

[0016] The above groove and the above reinforcing projection may have a cross-section in the shape of a dovetail.

[0017] A method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: a cutting step of forming a groove pattern having a predetermined thickness between adjacent electrode patterns by cutting a groove from the surface of an electrode metal layer to a depth shallower than the bottom surface of the electrode metal layer according to the shape of a pre-designed electrode pattern; a bonding step of bonding a metal base, an insulating layer, and the electrode metal layer in a stacked form in order, wherein the flat bottom surface of the electrode metal layer contacts the insulating layer; and an etching step of electrically insulating the adjacent electrode patterns by completely etching the remaining portion to expose the insulating layer; wherein the bonding step may be configured to bond the electrode metal layer and the metal base through the insulating layer, wherein a groove is formed on the surface of the electrode metal layer or the metal base that contacts the insulating layer prior to the bonding step, and then a vacuum hot press process is performed to form a reinforcing protrusion connected to the insulating layer simultaneously with the bonding.

[0018] The above groove and the above reinforcing projection may have a cross-section in the shape of a dovetail.

[0019] A heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: an electrode metal plate having a plurality of electrode patterns electrically insulated from each other with pattern spaces formed therebetween; a metal base disposed below the electrode metal plate to diffuse heat conducted from the electrode metal plate; an insulating layer formed between the electrode metal plate and the metal base; and an insulating material filling portion formed to fill the periphery outside the electrode pattern group composed of the pattern spaces and the plurality of electrode patterns, and to support them by directly contacting the side of the plurality of electrode patterns.

[0020] The above insulating layer and the above insulating material filling part can be made of the same electrical insulating resin to form an insulating part integrally.

[0021] It may further include an insulating ceramic mesh embedded within the insulating layer between the electrode metal plate and the metal base.

[0022] The metal base further includes a stepped portion that is cut lower than the upper surface located immediately below the plurality of electrode patterns, and the portion below the pattern space and the periphery is further included, and the insulating material filling portion can be extended to directly contact the side and bottom surfaces of the stepped portion.

[0023] At this time, the device further includes a first notch portion formed concavely on the side of the plurality of electrode patterns or a second notch portion formed concavely on the side of the metal base step portion, and the insulating material filling portion may be formed to fill the first notch portion or the second notch portion.

[0024] A method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: a plurality of electrode patterns, pattern spaces formed between the plurality of electrode patterns to electrically insulate them, and a periphery surrounding the outer side of an electrode pattern group composed of the plurality of electrode patterns; a step of cutting an electrode metal plate to form the plurality of electrode patterns from one side to a predetermined depth shallower than its thickness, leaving a remainder to form a groove pattern corresponding to the pattern space and the periphery; a step of printing an insulating resin on at least the electrode metal plate side among the one side of the electrode metal plate where the groove pattern is formed and the one side of a metal base facing it, such that the groove pattern is filled with an insulating material, and bonding the electrode metal plate and the metal base through the insulating resin; and a step of removing the remainder to separate the plurality of electrode patterns from one another.

[0025] When removing the above residue, the residue can be removed by cutting.

[0026] When joining the electrode metal plate and the metal base, an insulating resin can be printed on one side of the electrode metal plate and one side of the metal base, respectively, and the joining can be performed with an insulating ceramic mesh inserted between them.

[0027] A method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention comprises: a step of forming a multilayer substrate in which a metal base, an insulating layer, and an electrode metal plate are stacked in sequence; a step of cutting the multilayer substrate to a predetermined depth deeper than the upper surface of the metal base on the side of the electrode metal plate to form a groove pattern corresponding to a pattern space defining a plurality of electrode patterns and a peripheral area outside the electrode pattern group composed of the plurality of electrode patterns; and a step of filling the groove pattern with an insulating resin and curing it to form an insulating material filling portion.

[0028] When forming the above-mentioned groove pattern, a first notch portion in a concave shape may be formed on the side of the plurality of electrode patterns or a second notch portion in a concave shape may be formed on the side of the stepped portion of the metal base.

[0029] According to the present invention, a heat dissipation substrate for semiconductors having a thick electrode metal plate with a thickness of 0.2 mm or more and a manufacturing method capable of efficiently producing the same are provided.

[0030] According to the present invention, a heat dissipation substrate for semiconductors can be provided having a structure that achieves excellent heat dissipation performance by having a thick electrode metal plate, as well as improved dielectric strength and high peel strength.

[0031] In addition, according to the present invention, a method for manufacturing a heat dissipation substrate for a semiconductor is provided, which can effectively pattern a thick electrode metal plate and efficiently manufacture a heat dissipation substrate for a semiconductor capable of providing excellent insulation performance and high peel strength.

[0032] Furthermore, according to the present invention, by excluding etching and plating processes that cause environmental pollution and replacing them with a machining process that does not use or emit toxic compounds, heavy metal compounds, etc., there is an effect of being able to manufacture a heat dissipation substrate for semiconductors using an eco-friendly process.

[0033] FIG. 1 shows a power semiconductor module according to one embodiment of the present invention.

[0034] FIG. 2 shows an electrode patterning process for a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0035] Figure 3 shows an electrode patterning process using a cutting machine as an embodiment of the present invention.

[0036] FIG. 4 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0037] FIG. 5 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0038] FIG. 6 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0039] FIG. 7 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0040] FIG. 8 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0041] FIG. 9 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0042] FIG. 10 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0043] FIG. 11 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0044] FIG. 12 shows a power semiconductor module to which a heat dissipation substrate for a semiconductor according to one embodiment of the present invention is applied.

[0045] FIG. 13 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0046] Figure 14 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 13.

[0047] FIG. 15 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0048] Figure 16 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 15.

[0049] FIG. 17 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0050] Figure 18 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 17.

[0051] FIG. 19 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0052] Various embodiments of the present invention are described below with reference to the drawings. The technical concept of the present invention may be more clearly understood through these embodiments. Furthermore, the present invention is not limited to the embodiments described below but may be modified in various forms within the scope of the technical concept to which the present invention belongs. Meanwhile, the same reference numerals indicate components having common characteristics from the perspective of the present invention; thus, descriptions of components having the same reference numerals as those mentioned in the description of one drawing may be omitted in the description of another drawing. In this specification, directions such as up, down, top surface, bottom surface, etc., are based on the directions depicted in the referenced drawings.

[0053] FIG. 1 shows a power semiconductor module according to one embodiment of the present invention.

[0054] A power semiconductor module (M) according to one embodiment of the invention in (a) includes a heat dissipation substrate (101) for semiconductors and a power semiconductor device (301). The power semiconductor device (301) is mounted on an electrode pattern (31) on the upper surface of the heat dissipation substrate (101) for semiconductors and is electrically connected through wire bonding (302).

[0055] (b) shows the II' cross-section indicated in (a) above. The semiconductor heat dissipation substrate (101) is composed of a metal base (10), an insulating layer (20), and an electrode metal layer (30) from the bottom of the drawing. The metal base (10) is made of a metal with excellent thermal conductivity, such as copper or aluminum, and the insulating layer (20) may be composed of an electrically insulating synthetic resin, oxide, or nitride. It is preferable that the insulating layer (20) be made of a material with excellent thermal conductivity and heat resistance in addition to electrical insulation, and it may also serve the role of bonding the metal base (10) and the electrode metal layer (30) by having adhesive or bonding properties. The electrode metal layer (30) may be made of a metal with low resistivity and excellent thermal conductivity, such as copper or a copper-manganese alloy. The electrode pattern (31) is formed by a pattern space (32) in which a part of the electrode metal layer (30) is removed down to the bottom to expose the insulating layer (20). Here, it is preferable that the thickness of the electrode metal layer (30) be 0.2 mm or more.

[0056] FIG. 2 shows an electrode patterning process for a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0057] (a) shows the electrode metal layer (30) being patterned using a fixed depth cutting machine (E) so that a number of circuit patterns corresponding to each semiconductor module are arranged in an array form on the electrode metal layer (30) constituting the upper surface of a large-area multilayer heat dissipation substrate (B) as an example of a mass production process.

[0058] (b) shows the configuration of a fixed depth cutting machine (E) in detail (for a description of the specific configuration, refer to Korean Registered Patent Publication No. 10-1336087). By cutting while maintaining a constant depth (d), a groove pattern (32E) forming a pattern space is formed.

[0059] Figure 3 shows an electrode patterning process using a cutting machine as an embodiment of the present invention.

[0060] The present drawing illustrates a method for manufacturing a heat dissipation substrate (M0) for a semiconductor according to a first embodiment. With a metal base (10), an insulating layer (20), and an electrode metal layer (30) stacked in order from the bottom, a pattern space (32) is formed using a fixed depth cutting machine (E) with a depth greater than the thickness of the electrode metal layer (30) and exposing only the insulating layer (20).

[0061] FIG. 4 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M1) for a semiconductor according to a second embodiment.

[0062] (a) As in the embodiment of FIG. 3, a multilayer heat dissipation substrate (101) is formed in which a metal base (10), an insulating layer (20), and an electrode metal layer (30) are stacked in order from bottom to top, and a mask pattern (41) in the shape of an electrode pattern is formed on the upper surface of the electrode metal layer (30).

[0063] (b) A groove pattern (32E) corresponding to the pattern space is formed in the area where the mask pattern (41) is not printed using a fixed depth cutting machine (E). At this time, a remainder with a thickness (t) of 0.05 mm to 0.1 mm is left at the bottom of the groove pattern (32E).

[0064] (c) The remaining portion of the groove pattern bottom is removed by etching so that the insulating layer (20) is exposed. When the multilayer heat dissipation substrate (101) is cut to correspond to each module, the heat dissipation substrate (M1) for semiconductors is completed.

[0065] FIG. 5 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M1) for a semiconductor according to a third embodiment.

[0066] (a) A groove pattern (32E) is formed on the upper surface of the electrode metal layer (30) using a fixed depth cutting machine (E). At this time, a remainder (320) of a predetermined thickness (t) is left at the bottom of the groove pattern (32E). Here, the predetermined thickness (t) is the same as in the embodiment of FIG. 4. Separately from the above, a substrate is prepared in which an insulating layer (20) is laminated on the upper surface of a metal base (10).

[0067] (b) The electrode metal layer (30) having the groove pattern (32E) formed in (a) above is bonded onto a substrate on which an insulating layer (20) is laminated on the upper surface of a metal base (10). A vacuum hot press method may be applied for bonding. Bonding using an adhesive with excellent thermal conductivity is also possible, and the insulating layer (20) may function as an adhesive layer.

[0068] (c) The remaining portion (320) of the bottom of the groove pattern is removed by etching so that the insulating layer (20) is exposed. When the heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate (M1) for the semiconductor is completed.

[0069] FIG. 6 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M2) for a semiconductor according to a fourth embodiment.

[0070] (a) Similar to the embodiment of FIG. 5, a groove pattern (32E) is formed on the electrode metal layer (30), leaving a remainder (331) of a predetermined thickness (t). The difference from FIG. 5 (a) is that the opposite side of the mask pattern (42) is processed with a fixed depth cutting machine (E). Separately, a substrate is prepared in which an insulating layer (20) is laminated on the upper surface of a metal base (10).

[0071] (b) An electrode metal layer (30) having a groove pattern (32E) formed in (a) above is bonded to a substrate having a metal base (10) and an insulating layer (20) laminated thereon. At this time, the surface having the groove pattern is in contact with the insulating layer (20), and the surface having the mask pattern (42) and the remaining portion (331) forms the upper surface.

[0072] (c) The remaining portion (331) exposed from the surface where the mask pattern (42) is formed is removed by etching. Instead of etching, the remaining portion (320) may be further cut using the fixed depth cutting machine (E). In this case, the cutting depth of the fixed depth cutting machine (E) is deeper than the thickness (t) of the remaining portion (331) and does not exceed the depth of the pattern space (32). As a result, a structure is formed in which the insulating layer (20) is exposed through the pattern space (32). When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate (M2) for semiconductors is completed.

[0073] FIG. 7 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M3) for a semiconductor according to a fifth embodiment.

[0074] (a) A ceramic base (11) is applied as a heat sink. A multilayer heat dissipation substrate having a structure in which an electrode metal layer (30) is bonded to the ceramic base (11) is provided, and a mask pattern (41) is formed on the upper surface of the electrode metal layer (30). The ceramic base (11) may be made of a material such as aluminum nitride (AlN) or silicon carbide (SiC), and commercially available technologies such as DCB (Direct Copper Bonding) or AMB (Active Metal Brazing) may be applied to the bonding of the ceramic base (11) and the electrode metal layer (30).

[0075] When forming a groove pattern (32E) using a fixed depth cutting machine (E), a remainder (320) of a predetermined depth (t) is left. A margin is provided so that the cutting tool does not penetrate the electrode metal layer (30) and come into direct contact with the ceramic base (11).

[0076] (b) The remaining portion (320) is removed by etching from the upper surface, and the ceramic base (11) is exposed through the pattern space (32). When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate (M3) for semiconductors is completed.

[0077] FIG. 8 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M3) for a semiconductor according to a sixth embodiment.

[0078] (a) Similar to (a) of FIG. 5 described above, a groove pattern (32E) is formed using a fixed depth cutting machine (E) while a mask pattern (41) is formed on the upper surface of the electrode metal layer (30), and a remainder (320) of a predetermined thickness (t) is left at the bottom of the groove pattern (32E). Separately, a ceramic base (11) is prepared. The material of the ceramic base (11) is as described in the embodiment of FIG. 7.

[0079] (b) The electrode metal layer (30) having a groove pattern (32E) formed so that a remainder (320) remains on the bottom as in (a) above is joined together with the remainder (320) side in contact with the ceramic base (11). The aforementioned DCB or AMB technology may also be applied to the joining process.

[0080] (c) As with (b) of FIG. 7 described above, the remaining portion is removed by etching from the upper surface having the mask pattern (41). When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate (M3) for semiconductors is completed.

[0081] FIG. 9 shows a method for manufacturing a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This figure shows a method for manufacturing a heat dissipation substrate (M4) for a semiconductor according to the seventh embodiment.

[0082] (a) First, as in (a) of FIG. 6 described above, the opposite side of the mask pattern (42) is processed with a fixed depth cutting machine (E) to form a groove pattern (32E) on the electrode metal layer (30) and leave a remainder (331) of a predetermined thickness (t). Separately, a ceramic base (11) is prepared.

[0083] (b) The ceramic base (11) and the electrode metal layer (30) are bonded with the groove pattern (32E) facing the ceramic base (11) and the mask pattern (42) and the remainder (331) positioned on the upper surface opposite to it. The bonding technique is as described in the embodiment of FIG. 8.

[0084] (c) Then, the remaining portion (320) is removed by etching. Instead of etching, the remaining portion (320) may be further cut using the fixed depth cutting machine (E). In this case, the cutting depth of the fixed depth cutting machine (E) is deeper than the thickness (t) of the remaining portion (331) and does not exceed the depth of the pattern space (32). When the multilayer heat dissipation substrate is cut to correspond to each module, the heat dissipation substrate (M4) for semiconductors is completed.

[0085] FIG. 10 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0086] The heat dissipation substrate (M5) for a semiconductor according to the present embodiment is characterized in that a heat sink structure (H) is integrally formed on a metal base (12). The electrode metal layer (30) and the insulating layer (20) may be formed in the same manner as any one of the embodiments of FIGS. 3 to 6 described above. Meanwhile, a ceramic base in which a heat sink structure is integrally formed may be adopted instead of the metal base (12).

[0087] Meanwhile, in the above-described embodiments, the cross-sectional profile of the step portion forming the boundary between the pattern space (32) and the electrode pattern (31) is formed to be perpendicular or nearly perpendicular to the two surfaces from the surface side of the electrode metal layer (30) to the surface where the insulating layer (20) or ceramic base (11) is exposed.

[0088] In the embodiment of FIG. 3, FIG. 6, or FIG. 9, when the pattern space (32) is formed using only the fixed depth cutting machine (E) without an etching process, the step portion is formed substantially vertically. In the embodiment of FIG. 4 to FIG. 9, even when the remaining portion (320, 321) is removed through an etching process, the thickness (t) of the remaining portion is less than 0.1 mm and corresponds to an extremely small part of the electrode metal layer (30). Therefore, even if the remaining portion is removed through an isotropic wet etching process, the radius of curvature (R) of the portion where the step portion meets the insulating layer (20) or the ceramic base (11) is formed to be 0.1 mm or less. Accordingly, excellent insulation characteristics can be obtained between two adjacent electrode patterns (31) with the pattern space (32) in between.

[0089] FIG. 11 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0090] The heat dissipation substrate (M6) for semiconductors according to the present embodiment may further be provided with reinforcing protrusions (21, 23) having a dovetail cross-section on either or both of the surface in contact with the insulating layer (20) of the metal base (10) and the surface in contact with the insulating layer (20) of the electrode metal layer (30). As illustrated, the reinforcing protrusions (21, 23) may be formed by filling a groove with a dovetail cross-section with the same material as the insulating layer (20). As the material of the insulating layer (20), epoxy resin or the like, which has excellent electrical insulation and thermal conductivity, may be applied.

[0091] In the manufacturing process of the heat dissipation substrate (M6) for a semiconductor according to the present embodiment, a dovetail-shaped groove is machined in the metal base (10) and / or the electrode metal layer (30), and the reinforcing protrusions (21, 23) can be formed by interposing an epoxy resin between the metal base (10) and the electrode metal layer (30) and joining them through a vacuum hot press process.

[0092] The reinforcing protrusions (21, 23) formed in this manner can prevent the interface between these layers and the insulating layer (20) from peeling off even if there is a difference in the coefficient of linear expansion between the material forming the metal base (10) and the material forming the electrode metal layer (30).

[0093] FIG. 12 shows a power semiconductor module to which a heat dissipation substrate for a semiconductor according to one embodiment of the present invention is applied.

[0094] A power semiconductor module (M7) to which a heat dissipation substrate (101) for semiconductors according to one embodiment of the invention is applied includes a power semiconductor device (301). The power semiconductor device (301) may be mounted on at least one of a plurality of electrode patterns (31) formed on the upper surface of the heat dissipation substrate (102) for semiconductors and may be electrically connected through wire bonding (302). Meanwhile, as an example of a different form, the power semiconductor device may have a plurality of input / output terminals or pad electrodes, and these may be surface-mounted (SMT) on the plurality of electrode patterns (31) of the heat dissipation substrate (102). The plurality of electrode patterns (31) are formed in the form of an island surrounded by an insulator filled in the periphery of an electrode pattern group composed of a plurality of electrode patterns and a pattern space (32) between electrode patterns.

[0095] FIG. 13 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention. This drawing is a cross-sectional view of a heat dissipation substrate for a semiconductor corresponding to the section II-II' of FIG. 12.

[0096] The above-described heat dissipation substrate (M7) for semiconductors is configured to include, from the bottom of the drawing, a metal base (10), an insulating portion (21) including an insulating layer (20), and a plurality of electrode patterns (31) formed from an electrode metal plate (30). Between the plurality of electrode patterns (31), a pattern space (32) is disposed to electrically insulate adjacent electrode patterns from one another. The periphery of the electrode pattern group composed of the pattern space (32) and the plurality of electrode patterns (31) is filled with an insulating material.

[0097] The metal base (10) is made of a metal with excellent thermal conductivity, such as copper or aluminum. The metal base (10) may be made of a thick metal plate or a metal block. Meanwhile, although not illustrated, a heat dissipation fin structure may be formed on the bottom surface of the metal base (10) to expand the contact area with the outside and increase the heat dissipation effect.

[0098] The insulating portion (21) is composed of an insulating layer (20) between the metal base (10) and the electrode metal plate (30), and an insulating material filling portion in which an insulator is filled in the pattern space (32) and the periphery of the plurality of pattern electrodes (31). The insulating layer (20) may be composed of an electrically insulating synthetic resin, oxide, or nitride. It is preferable that the insulating layer (20) be made of a material that has excellent thermal conductivity and heat resistance in addition to electrical insulation, and it may also serve the function of bonding the metal base (10) and the electrode metal plate (30) by having adhesive or bonding properties. The insulating material filling portion may be made of the same material as the aforementioned insulating layer (20) so that the insulating portion (21) can be formed integrally. As a material for forming the insulating portion (21) that satisfies conditions such as electrical insulation, thermal conductivity, and heat resistance as described above, an epoxy-based synthetic resin may be used.

[0099] The electrode metal plate (30) may be made of a metal with low resistivity and excellent thermal conductivity and processability, such as copper, copper-manganese alloy, aluminum, or nickel. The electrode pattern (31) is partitioned by an insulating space (32) in which a portion of the electrode metal plate (30) is removed down to the bottom to expose the insulating layer (20).

[0100] Here, it is preferable that the thickness (T) of the electrode metal plate (30) be 0.2 mm or more. In addition, when the thickness of the insulating layer (20) is t1, the thickness of the insulating material of the periphery and insulating space (32) is t2, and the height from the bottom surface of the insulating layer (20) to the top surface of the electrode pattern (31) is H, these have the following relationship with each other.

[0101] <Equation 1> t1 < t2 ≤ H

[0102] In other words, it is preferable that the height of the insulator filled in the aforementioned peripheral area and insulating space (32) be formed to be higher than the bottom surface of the electrode pattern (31) and lower than or equal to the top surface of the electrode pattern (31). This structure can improve the dielectric strength between the plurality of electrode patterns (31), as well as the dielectric strength between the semiconductor heat dissipation substrate (101) and the external circuit. Additionally, since at least a portion of the electrode pattern (31) is embedded in the insulating material filling portion, the peel strength for the plurality of electrode patterns (31) is improved.

[0103] Figure 14 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 13.

[0104] First, as illustrated in (a), a groove pattern (330) of a certain depth corresponding to the aforementioned pattern space and periphery is formed on one surface of the electrode metal plate (30) by cutting (milling) using a cutting tool such as an end mill. The depth of the groove pattern (330) is made shallower than the thickness of the electrode metal plate (30) so that a remainder (331) is left at the bottom of the groove pattern (330). The remainder (331) may be left for the entire portion corresponding to the pattern space and periphery when viewed in a planar view. In addition, the thickness of the remainder (331) is preferably less than 0.2 mm, and more preferably can be formed with a thickness of 0.05 mm to 0.1 mm.

[0105] As shown in (b), an insulating resin (200), such as epoxy resin, is printed on the upper surface of a metal base (10), and the same insulating resin (200) is printed on the surface where the groove pattern (330) is formed, so that the two surfaces coated with the insulating resin (200) face each other.

[0106] As shown in (c), the members prepared in the above process (b) are joined through a vacuum hot press process. As a result, the insulating resin (200) printed on each of the mutually facing surfaces of the two members is cured integrally to form an insulating part (21).

[0107] However, unlike the examples of (b) and (c) above, an insulating resin (200) may be applied to either the upper surface of the metal base (10) or the surface of the electrode metal plate (30) where the groove pattern (330) is formed, with a sufficient thickness, and the two may be bonded together.

[0108] Next, as shown in (d), the aforementioned residual portion (331), that is, the portion in which a plurality of electrode patterns (31) partitioned by the aforementioned groove pattern (330) are connected to each other in a thin thickness, is removed through etching or milling to form a pattern space (32). Then, a heat dissipation substrate for a semiconductor in a single module unit is completed by cutting along the cutting line (CT) indicated in the drawing.

[0109] FIG. 15 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0110] The semiconductor heat dissipation substrate (M8) according to the present embodiment differs from the semiconductor heat dissipation substrate (101) according to the embodiment of FIG. 13 described above in that it includes an insulating mesh (25) within the insulating portion (22), while the remaining portions are identical. The insulating mesh (25) may be a solid inorganic insulating material, such as a mesh made of ceramic material. The insulating mesh (25) is made of a ceramic material that has a higher resistivity and higher thermal conductivity than the insulating material forming the remaining portion of the insulating portion (22), and can contribute to improving the dielectric strength and thermal conductivity between the electrode pattern (31) and the metal base (10). In addition, it can also contribute to suppressing thermal expansion of the insulating portion (22) or increasing mechanical strength.

[0111] Figure 16 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 15.

[0112] First, (a) shows a state in which an insulating resin (200) is printed on the surface of the electrode metal plate (30) where the groove pattern (330) is formed and on the upper surface of the metal base (10), as in (b) of FIG. 15 described above, and the insulating mesh (25) is placed between the facing insulating resins (200).

[0113] (b) shows that a vacuum hot press process is performed in the above state so that the electrode metal plate and the metal base (10) are bonded with the insulating mesh (25) interposed within the insulating part (22), and the remaining part is removed through an etching or milling process as described in (d) of Fig. 3 above, thereby forming a plurality of electrode patterns (31), pattern spaces (32), and peripheries. Then, when cut along the cutting line (CT), the heat dissipation substrate for semiconductors according to the present embodiment is completed.

[0114] FIG. 17 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0115] The heat dissipation substrate (M9) for semiconductors according to the present embodiment is formed with the following structure in the insulating portion (23), the portion forming the pattern space (322) between the plurality of electrode patterns (31) and the portion forming the peripheral portion outside the plurality of electrode patterns (31). First, the upper surface of the insulating portion (23) is formed at the same height as the upper surface of the plurality of electrode patterns (31). Second, in that portion, the bottom surface of the insulating portion (23) extends in the thickness direction of the metal base (11). That is, the portion excluding the part facing the bottom surface of the electrode pattern (31) on the upper surface of the metal base (11) has a structure in which the remaining portion is carved to a predetermined depth and filled with an insulator.

[0116] In other words, when the thickness of the electrode pattern (31) is T, the thickness of the insulating layer between the electrode pattern (31) and the metal base (11) is t1, and the thickness of the part corresponding to the pattern space (322) and the surrounding part of the insulating part (23) is t3, the following relationship is established.

[0117] <Equation 2> T + t1 < t3

[0118] In a semiconductor heat dissipation substrate (103) with such a structure, the side of the electrode pattern (31) is entirely embedded in the insulating portion (23), and as with the embodiment of FIG. 13 described above, the dielectric strength between the multiple electrode patterns (31) and the external conductor is improved, and the peel strength of the electrode pattern (31) is also improved. In addition, since the pattern space (322) and the periphery of the insulating portion (23) are supported by engaging with the stepped portion formed on the upper surface of the metal base (11), it is resistant to lateral loads, and deformation or damage caused by the difference in thermal expansion rates between the metal and the insulator can be prevented. Due to this structure, the peel strength between the insulating portion (23) and the metal base (11) is also improved.

[0119] Figure 18 shows a process for manufacturing a heat dissipation substrate for a semiconductor according to Figure 17.

[0120] As illustrated in (a), a multilayer substrate is prepared in which a metal base (10), an insulating layer (20), and an electrode metal plate (30) are stacked in order from bottom to top. This multilayer substrate can be prepared by printing or applying a flexible resin between two opposing surfaces of the metal base (10) and the electrode metal plate (30), as in the previously described embodiment, and bonding them through a vacuum hot press process.

[0121] As illustrated in (b), a groove pattern is formed by performing a cutting operation, such as milling using an end mill tool, on the surface of the electrode metal plate (30) to cut the pattern space (322) between the plurality of electrode patterns (31) and the outer periphery of the electrode pattern group composed of the plurality of electrode patterns (31) deeper than the upper surface of the metal base (10). That is, by cutting deeper than the sum of the thickness T of the electrode metal plate (30) and the thickness t1 of the insulating layer (20), a step portion (111) is formed on the upper part of the metal base (11) that is lower than the portion facing the bottom surface of the electrode pattern (31).

[0122] Then, as shown in (c), an insulating resin is filled into the groove pattern, which is the cut portion, and cured to form an insulating material filling portion (201). The insulating material filling portion (201) may be formed from the same insulating material as the aforementioned insulating layer (20). Through this, the insulating layer (20) and the insulating material filling portion (201) become an integral part in the insulating portion (23). By cutting along the cutting line (CT), a semiconductor heat dissipation substrate for a semiconductor module is completed.

[0123] FIG. 19 shows a heat dissipation substrate for a semiconductor according to one embodiment of the present invention.

[0124] The semiconductor heat dissipation substrate (M10) according to the present embodiment differs from the semiconductor heat dissipation substrate (103) according to the embodiment of FIG. 6 in that it includes a first notch portion (312) formed on the side of the electrode pattern (31) by cutting and / or a second notch portion (122) formed on the side of the stepped portion (121) of the metal base (12). In addition, except for the difference in the structure of the insulating material filling portion (202) formed by filling the first notch portion (312) and / or the second notch portion (122), the rest of the configuration of the present embodiment is the same as the embodiment of FIG. 6 described above.

[0125] Here, the first notch (312) and the second notch (122) may be formed concavely inward from the side that is perpendicular to the upper and lower surfaces of the electrode pattern (31) and the metal base (12). The first and second notches (312, 122) may be formed by cutting using a form tool manufactured to fit the shape of the groove pattern and the notch, instead of a conventional end mill, in the cutting process described above with reference to FIG. 7 (b). The notches may be formed simultaneously with the groove pattern or after the groove pattern is formed. The cutting process using the form tool may proceed in a direction parallel to the metal base (12).

[0126] The heat dissipation substrate (104) for a semiconductor according to the present embodiment may include both the first notch portion (312) and the second notch portion (122), or may be configured to include only one of them. The first notch portion (312) and the second notch portion (122) cause the sides of the insulating material filling portion (202) to engage with the electrode pattern (31) and the metal base (12), respectively, thereby greatly improving the peel strength of the heat dissipation substrate (104) for a semiconductor.

[0127] The present invention can be used to manufacture a heat dissipation substrate that combines the functions of a heat sink and a circuit board for mounting semiconductor devices. The semiconductor heat dissipation substrate according to the present invention can be utilized in the manufacture of semiconductor modules including power semiconductor devices or high-output LEDs.

Claims

1. An electrode metal layer in which an electrode pattern on which a semiconductor element is mounted is formed by a pattern space; A metal base constituting a heat sink that spreads and dissipates heat emitted from the semiconductor element through thermal conduction; An insulating layer having electrical insulation properties and disposed between the electrode metal layer and the metal base; and It includes a groove formed on at least one of a surface of the metal base that contacts the insulating layer and a surface of the electrode metal layer that contacts the insulating layer, and a reinforcing protrusion in which the inside of the groove is filled with the same material as the insulating layer. The above pattern space includes a portion that is vertically cut from the surface of the electrode metal layer. Heat sink substrate for semiconductors.

2. In paragraph 1, The above pattern space is cut to a depth deeper than the bottom surface of the electrode metal layer and shallower than the bottom surface of the insulating layer, thereby exposing the insulating layer. Heat sink substrate for semiconductors.

3. In paragraph 1, The above pattern space further includes a portion formed by isotropic etching, Heat sink substrate for semiconductors.

4. In paragraph 1, The above groove and the above reinforcing projection have a dovetail cross-section, Heat sink substrate for semiconductors.

5. In a method for manufacturing a heat dissipation substrate for a semiconductor, a pattern space is formed so that an electrode metal layer formed on a metal base or an insulating ceramic base is bonded to form an electrode pattern. A cutting step of cutting the electrode metal layer from one side to a predetermined depth shallower than the thickness of the electrode metal layer and leaving a remainder to form a groove pattern; and An etching step of forming the electrode pattern by etching the remaining portion left along the groove pattern while the electrode metal layer is bonded to the insulating layer or the ceramic base; The above etching step is to etch the residual portion in a bonded state so that the residual portion is positioned on the opposite side of the surface where the residual portion is bonded to the insulating layer or the ceramic base in the electrode metal layer. A method for manufacturing a heat dissipation substrate for semiconductors.

6. A bonding step for forming a multilayer heat dissipation substrate in which a metal base, an insulating layer, and an electrode metal layer are sequentially laminated and bonded; A cutting step of cutting a groove with a shallower depth than the bottom surface of the electrode metal layer from the surface of the electrode metal layer according to the shape of a pre-designed electrode pattern to form a groove pattern with a residual portion of a predetermined thickness left between adjacent electrode patterns; and An etching step for electrically insulating the adjacent electrode patterns by completely etching the remaining portion to expose the insulating layer; The above bonding step bonds the electrode metal layer and the metal base via the insulating layer, but prior to the bonding step, a groove is formed on the surface of the electrode metal layer or the metal base that comes into contact with the insulating layer, and then a vacuum hot press process is performed to form a reinforcing protrusion connected to the insulating layer at the same time as bonding. A method for manufacturing a heat dissipation substrate for semiconductors.

7. In paragraph 6, The above groove and the above reinforcing projection have a dovetail cross-section, A method for manufacturing a heat dissipation substrate for semiconductors.

8. A cutting step of cutting a groove with a shallower depth than the bottom surface of the electrode metal layer from the surface of the electrode metal layer according to the shape of a pre-designed electrode pattern, thereby forming a groove pattern in which a residual portion of a predetermined thickness is left between adjacent electrode patterns; A bonding step of sequentially bonding a metal base, an insulating layer, and the electrode metal layer in a laminated form, such that the flat bottom surface of the electrode metal layer is in contact with the insulating layer; and An etching step for electrically insulating the adjacent electrode patterns by completely etching the remaining portion to expose the insulating layer; The above bonding step bonds the electrode metal layer and the metal base via the insulating layer, but prior to the bonding step, a groove is formed on the surface of the electrode metal layer or the metal base that comes into contact with the insulating layer, and then a vacuum hot press process is performed to form a reinforcing protrusion connected to the insulating layer at the same time as bonding. A method for manufacturing a heat dissipation substrate for semiconductors.

9. In paragraph 8, The above groove and the above reinforcing projection have a dovetail cross-section, A method for manufacturing a heat dissipation substrate for semiconductors.

10. An electrode metal plate having a plurality of electrode patterns electrically insulated from each other with pattern spaces formed therebetween; A metal base disposed under the electrode metal plate to diffuse heat conducted from the electrode metal plate; An insulating layer formed between the electrode metal plate and the metal base; and An insulating material filling portion formed to fill the outer peripheral portion of the electrode pattern group composed of the pattern space and the plurality of electrode patterns and to directly contact the side surfaces of the plurality of electrode patterns and support them; Heat sink substrate for semiconductors.

11. In paragraph 10, The above insulating layer and the above insulating material filling part are made of the same electrically insulating resin and form an insulating part integrally. Heat sink substrate for semiconductors.

12. In paragraph 10, Further comprising an insulating ceramic mesh embedded in the insulating layer between the electrode metal plate and the metal base. Heat sink substrate for semiconductors.

13. In paragraph 10, The metal base further includes a stepped portion cut lower than the upper surface located directly below the plurality of electrode patterns, wherein the insulating material filling portion is extended to directly contact the side and bottom surfaces of the stepped portion. Heat sink substrate for semiconductors.

14. In paragraph 13, It further includes a first notch portion concavely formed on the side of the plurality of electrode patterns or a second notch portion concavely formed on the side of the metal base step portion, and the insulating material filling portion is formed to fill the first notch portion or the second notch portion. Heat sink substrate for semiconductors.

15. A method for manufacturing a heat dissipation substrate for a semiconductor, the heat dissipation substrate having a plurality of electrode patterns, a pattern space formed between the plurality of electrode patterns to electrically insulate them, and a peripheral portion surrounding the outside of an electrode pattern group composed of the plurality of electrode patterns, A step of cutting an electrode metal plate that will form the above plurality of electrode patterns from one side to a predetermined depth that is shallower than the thickness thereof and leaving a remainder to form a groove pattern corresponding to the pattern space and the peripheral area; A step of printing an insulating resin on at least one side of the electrode metal plate on which the groove pattern is formed and one side of the metal base facing the electrode metal plate so that the groove pattern is filled with an insulating material, and joining the electrode metal plate and the metal base using the insulating resin; and A step of removing the residue to separate the plurality of electrode patterns from each other; Method for manufacturing a heat dissipation substrate for semiconductors.

16. In paragraph 15, When removing the above residue, the residue is removed by cutting and processing. Method for manufacturing a heat dissipation substrate for semiconductors.

17. In paragraph 15, When bonding the electrode metal plate and the metal base, an insulating resin is printed on each of one side of the electrode metal plate and one side of the metal base, and bonded while inserting an insulating ceramic mesh between them. Method for manufacturing a heat dissipation substrate for semiconductors.

18. A step of forming a multilayer substrate in which a metal base, an insulating layer, and an electrode metal plate are sequentially laminated; A step of cutting the multilayer substrate to a predetermined depth deeper than the upper surface of the metal base from the electrode metal plate side to form a pattern space defining a plurality of electrode patterns and a groove pattern corresponding to the peripheral portion outside the electrode pattern group composed of the plurality of electrode patterns; and A step of filling the home pattern with an insulating resin and curing it to form an insulating material filling portion; including; Method for manufacturing a heat dissipation substrate for semiconductors.

19. In paragraph 18, When forming the above home pattern, a first notch portion having a concave shape is formed on the side of the plurality of electrode patterns, or a second notch portion having a concave shape is formed on the side of the step portion of the metal base. Method for manufacturing a heat dissipation substrate for semiconductors.