A lead frame for semiconductor package, a semiconductor device and a method of manufacturing the lead frame

Abstract

The object of the present disclosure is to provide a led frame allowing to provide robust stress buffering and thus minimize die crack risk during eutectic die bonding process. According to the first aspect, there is a lead frame for semiconductor package, comprising a lead frame body made of copper or copper alloy and a dual layer plating formed on the lead frame body, the lead frame body having a first surface for attaching a semiconductor die and a second surface opposite to said first surface. The dual layer plating comprises a metallic, stress buffer layer directly coupled to the lead frame body, and a cladding layer covering the stress buffer layer, made of metal able to form a eutectic or diffusion bond. An important benefit of incorporating such stress-buffering layer into the lead frame eliminates the need for adding additional stress-buffer layers to the back-metal stack. The invention also provides a semiconductor package comprising said lead frame. There is also disclosed a method of manufacturing of a lead frame is provided, comprising: providing a metal sheet made of copper or copper alloy, being a preform of a lead frame body; plating at least a surface intended to be a die attach surface of a first surface of the lead frame, the first surface being intended for attaching a semiconductor die, with a stress buffer layer; plating the stress buffer layer with a cladding layer made of metal able to form eutectic or diffusion bond stamping the plated metal sheet to obtain final lead frame geometry. The step of stamping may be alternatively performed before the step of plating. Figure 4