DEVICE FOR MEASURING THE AMPLITUDE OF A HARMONIC SIGNAL

Abstract

The utility model relates to electrical measuring equipment and can be used in measuring transducers recording the amplitude of a sinusoidal voltage. A device for measuring the amplitude of a harmonic signal comprises first and second multiplication units and a square root extraction unit, the output of which is the output of the device, a quadrature phase shifter and an adder, wherein the input of the device is connected to the first and second inputs of the first multiplication unit and the input of the quadrature phase shifter, the output of which is connected to the first and second inputs of the second multiplication unit, and the outputs of the first and second multiplication units are connected, respectively, to the first and second inputs of the adder, the output of which is connected to the input of the square root extraction unit. The technical result of the claimed utility model is to increase the accuracy of measuring the amplitude of a harmonic signal and to expand the operating frequency range. 2 fig.

Description

[0001] The utility model relates to electrical measuring equipment and can be used in measuring transducers that record the value of the amplitude of sinusoidal voltage.

[0002] A device is known for measuring the amplitude of a sinusoidal voltage, containing a storage capacitor connected to the circuit of the measured voltage through a rectifier and functionally connected to a pulse discharge former [USSR Author's Certificate No. 354357 IPC 8 G01R 19 / 04, published 09.10.1972].

[0003] The disadvantage of the known device is the low measurement accuracy due to the presence of pulsations in the output signal caused by significant voltage drops on the storage capacitor.

[0004] The closest analogue to the proposed utility model is a device for measuring the frequency and amplitude of sinusoidal voltage [USSR Author's Certificate No. 1023246 IPC 8G01R 23 / 00, G01R19 / 22, published 15.06.1983], comprising three differentiation block devices connected in series with an input and a first division block and a first square root extraction block connected in series, a first multiplication block, a first subtraction block, a second division block and a second square root extraction block connected in series, the output of which is the output of the measured amplitude, a second multiplication block and a second subtraction block connected in series, as well as two squaring blocks, wherein the output of the first differentiation block is connected to the input of the second multiplication block and, through the first squaring block, to the input of the first subtraction block, the output of the second differentiation block is connected to the first input of the first multiplication block and, through the second squaring block, to the second input of the second subtraction block, the output of which is connected to the first input of the first division block,the output of the third differentiation block is connected to the second input of the second multiplication block, the second input of the first multiplication block is connected to the input of the device, the output of the first subtraction block is connected to the second input of the first division block, the output of which is connected to the second input of the second division block.

[0005] This technical solution is selected as a prototype.

[0006] A disadvantage of this device is the low accuracy of amplitude measurement, due to the use of numerous mathematical operations on the measured signal. Furthermore, practical differentiator circuits have poor noise immunity and a limited operating frequency range. Furthermore, when implementing differentiator circuits using operational amplifiers (op amps), squaring the frequency signal sharply reduces the upper limit of the operating frequency range due to the fixed maximum output voltage of the op amp.

[0007] The technical result of the claimed utility model is to increase the accuracy of measuring the amplitude of a harmonic signal and to expand the operating frequency range.

[0008] The specified technical result is achieved in that a quadrature phase shifter and an adder are additionally introduced into a known device for measuring the amplitude of a harmonic signal, containing first and second multiplication blocks and a square root extraction block, the output of which is the output of the device, wherein the input of the device is connected to the first and second inputs of the first multiplication block and the input of the quadrature phase shifter, the output of which is connected to the first and second inputs of the second multiplication block, and the outputs of the first and second multiplication blocks are connected, respectively, to the first and second inputs of the adder, the output of which is connected to the input of the square root extraction block.

[0009] The significant differences in the proposed device for measuring the amplitude of a harmonic signal are the introduction of a quadrature phase shifter and adder, as well as a new arrangement of connections between the device's elements. The combination of these elements and the connections between them ensures a positive effect—improved amplitude measurement accuracy and a wider operating frequency range.

[0010] The essence of the utility model is explained by the drawings. Fig. 1 shows a functional diagram of a device for measuring the amplitude of a harmonic signal, Fig. 2 - time diagrams of voltages u вх , u1-u4and u вых .

[0011] The device for measuring the amplitude of a harmonic signal (Fig. 1) contains a quadrature phase shifter 1, multiplication units 2, 3, an adder 4 and a square root extraction unit 5.

[0012] The amplitude measuring device operates as follows. The measured sinusoidal voltage u вхis fed to the inputs of the quadrature phase shifter 1 and the inputs of the first multiplication block 2. At the output of the quadrature phase shifter 1, a voltage u1 is formed, equal in amplitude and shifted in phase relative to u вх at an angle of 90° in the direction of advance (Fig. 2):

[0013]

[0014] The output voltage of quadrature phase shifter 1 is fed to the inputs of the second multiplication block 2. The inputs of the first and second multiplication blocks are individually combined, resulting in them operating in quadrature mode.

[0015] The frame signals are fed to the inputs of multiplication blocks 2, 3 - respectively, voltage u вх and u1, equal in amplitude U m вх and shifted in phase relative to each other by an angle of 90°:

[0016]

[0017] where U u вх - input voltage amplitude.

[0018] At the outputs of multipliers 2, 3, voltages u2, u3 are generated, obtained after squaring the voltages u вх and u1:

[0019]

[0020] After summing the voltages u2 and u3 in adder 4 and trigonometric transformations, at its output we have a constant voltage u4 (Fig. 3):

[0021]

[0022] After the square root extraction operation in square root extraction block 5, voltage U is generated at the output of the device. вых , equal to the amplitude of the input voltage U m вх :

[0023]

[0024] Thus, by reducing numerous mathematical operations on the input signal, the accuracy of amplitude measurement is increased, and by eliminating the operation of squaring the frequency signal, the operating frequency range of the device is significantly expanded.

[0025] In the practical implementation of the proposed device for measuring the amplitude of a harmonic signal, the quadrature phase shifter 1 can be implemented according to the circuit (RU Patent No. 127554, H03B 27 / 00. Quadrature Signal Generator, published on April 27, 2013). Signal multipliers on the K525PS3 microcircuit can be used as multipliers 2 and 3, while combining their x and y information inputs. Adder 4 is a conventional adder on an operational amplifier. A circuit on an operational amplifier can be used as square root extraction unit 5, by including the squarer on the K525PS3 microcircuit in its negative feedback circuit.

Claims

A device for measuring the amplitude of a harmonic signal, comprising first and second multiplication units and a square root extraction unit, the output of which is the output of the device, characterized in that a quadrature phase shifter and an adder are additionally introduced into it, wherein the input of the device is connected to the first and second inputs of the first multiplication unit and the input of the quadrature phase shifter, the output of which is connected to the first and second inputs of the second multiplication unit, and the outputs of the first and second multiplication units are connected respectively to the first and second inputs of the adder, the output of which is connected to the input of the square root extraction unit.

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