Quantum control system with qubit response-referenced calibration method.

Abstract

A quantum control system with end-to-end calibration of the cryogenic signal chain (10) It is explained that the system is a digital-analog system positioned in the cryogenic temperature phase. a converter (DAC) (100), at least one quantum bit (qubit) (104) and an analog-to-digital converter (ADC) (106) includes. A calibration engine (108) applies digital input codes to the DAC (100) and each The code measures the quantum mechanical response of the qubit (104) via the ADC (106). The measured responses Based on this, a calibration transfer that maps the desired qubit rotation angles to the DAC (100) input codes. The function is determined and stored in a calibration memory (102). The transfer function transfers the signal chain. Characterizing DACs (100) as a combined input-output system, their nonlinearity and signal path It captures the distortions together. The calibration reference captures the qubit (104) without requiring an external device. It is obtained from quantum state transitions.

Description

TARIFF Quantum calibration method with qubit response reference. CONTROL SYSTEM TECHNICAL FIELD The present invention provides 5% of the electronics for controlling and reading qubits in quantum computing systems. It is related. More specifically, the invention is a superconducting digital-based system based on Josephson junction circuits. an analog-to-analog converter (DAC), based on at least one quantum bit (qubit) and Josephson junction circuits. end-to-end signal chain containing a superconducting analog-to-digital converter (ADC) a system, method and computer for calibration and operation of this chain It relates to the readable medium. 10 STATE OF THE ART Cryogenic Quantum Control Architecture In quantum processors based on superconducting qubits, precision is required for performing gate operations. Control signals are needed, as well as precise readout signals for determining the qubit state. Common In these approaches, these signals are generated and processed by room temperature electronics; then 15 The qubits are transferred to a cryogenic environment. This transfer involves passing through multiple temperature stages. This necessitates additional complexity and losses at the system level. In this architecture, each qubit typically has 2-4 modules, ranging from room temperature to cryogenic phases. This requires coaxial cable. In a quantum processor containing many qubits, these cables facilitate signal transmission. In addition, by transferring heat from high-temperature phases to low-temperature phases, the dilution coolant 20 This increases the thermal load. Current dilution coolers can only be used thousands of times before cooling capacity is exceeded. It can accommodate coaxial cable of a certain size. This situation can be controlled with room temperature electronics. This practically limits the number of qubits to around 1000; this value is for error-tolerant quantum computing. It is well below the millions of qubits required for computation [1][2]

[28] . To alleviate this bottleneck, at least some of the control and readout electronics should be placed near the qubits. Approaches to cryogenic processing have been developed. Within this scope, Josephson joint-based approaches have been implemented. Superconducting circuits, superconducting DACs that convert digital information into qubit control signals, and qubits They can be realized as superconducting ADCs that digitize the response [2][4][8]

[20] . Josephson junction-based superconducting logic families utilize Josephson junctions in superconducting environments. Digital processing at high speeds and low energy consumption by using active switching elements. 30 It does. These families include Single Flux Quantum (SFQ) logic and its derivatives (RSFQ, ERSFQ, eSFQ), This includes the Adiabatic Quantum Flux Parameter (AQFP) logic and Reciprocal Quantum Logic (RQL). In this specification, SFQ logic is used as a primary example; however, the calibration of the invention methodology, superconducting DACs implemented with any family of logic based on Josephson junctions. And this applies to ADCs. Superconducting DAC Architectures Superconducting DAC applications are divided into two main categories based on how the output signal is generated. Pulse counting-based DACs. In this architecture, qubit control is directly achieved via SFQ pulse sequences. This is performed. Each SFQ pulse carries a constant magnetic flux quantum (Φ0 ≈ 2.07 × 10⁻¹⁵ Wb) and the qubit It produces a constant-angle rotation on the Bloch sphere. The amplitude of the individual pulses varies from manufacturing tolerances. They are largely independent; since each pulse is the physical result of flux quantization in the superconducting ring. It carries a quantized value. Therefore, in this architecture, integration in the traditional sense is not linear. (INL) does not occur naturally. SFQ-based qubit control experiments in the known state of the art 10 [1][3][9] mainly use this category. Amplitude-based (SQUID-array) DACs. In this architecture, the DAC output is a series of DC SQUID cells. It is the total analog voltage or current produced by the weighted activation of each SQUID. The output produced by the cell corresponds to the critical current (Ic) of the Josephson junctions in that cell, and the polarization conditions and depends on the mutual inductance values. The critical current of Josephson junctions is 15, within the manufacturing tolerances. Because it can vary by approximately 10-20% across the chip depending on the connection, between SQUID cells Systematic differences in output occur. These differences result in cumulative integral nonlinearity (INL). This can lead to exceeding 10% or more of the full scale. Calibration Problem Superconducting DACs and ADCs exhibit transfer behavior that deviates from ideal linear behavior in practical applications. They may exhibit these characteristics. The main sources of these deviations include tunnel barrier thickness and Josephson junction critical current variations, depending on manufacturing tolerances in the junction area, affect DC SQUIDs. The inherently nonlinear flux-voltage characteristics, in the polarization current distribution Variations and mutual inductance differences are involved. In conventional room temperature technology, DACs and ADCs are used with known voltage or frequency references. It is routinely calibrated by comparison. However, the cryogenic within the dilution cooler... at these temperatures, a readily available precision system allows for the independent calibration of superconducting converters. No reference is found. Furthermore, even if the converters are calibrated individually, the qubit response from the DAC output and... Total end-to-end transfer up to ADC reading; cryogenic cable attenuation, impedance The discrepancies depend on factors such as qubit parameters and readout resonator characteristics. This 30 The factors vary from qubit to qubit and from cooling to cooling. Current Calibration Approaches A significant portion of the current state of the art's qubit calibration approaches are performed at room temperature. It has been developed for systems that use working control electronics. In this context, qubit settings Software-based workflows for automatic execution [5][6], Hamiltonian model Calibration methods based on the determination of parameters [7] and quantum controller architectures 5

[18] has been explained. In these approaches, room temperature DACs operate with high linearity, Calibration primarily focuses on adjusting qubit parameters. Digital control of superconducting qubits is realized through SFQ pulse sequences [1][3]

[19] and it has been shown that multi-qubit systems are operated at millikelvin temperatures [9]. However, these studies Because it uses a pulse-counting based DAC, the INL problem in the amplitude domain does not naturally occur, and 10 End-to-end transfer function calibration has not been addressed. In a recent study

[33] , SFQ control electronics and transmon qubits were used in a single multichip. The module shows an active quantum processor unit integrated via a flip-chip junction. The system uses a DC-SFQ converter and a passive transmission line (PTL) transmitter to deliver SFQ voltage pulses. Capacitively coupled to the qubit, time-sharing multiplexing with a 1:4 digital demultiplexer (DMX) 15 Bias current optimization and pulse count calibration are being implemented by measuring Rabi oscillations. However, the DAC structure in

[33] is implemented with a single SFQ with a constant area (Φ0) on each clock edge. It is a pulse-counting based DC-SFQ converter that generates a pulse; the gate rotation angle is applied to the pulse. The number of pulses is proportional to np, and since the field of each pulse is quantized, the DAC output is naturally linear. Therefore, the problem of integral nonlinearity (INL) in the amplitude domain does not arise in

[33] and 20 Calibration consists of determining the bias operating point and the number of pulses. In the present invention, however... Amplitude-based SQUID-array DAC (100) is the weighted sum of many DC SQUID cells. It produces a continuous analog amplitude; the Josephson junction critical current (Ic) propagation occurs during this summation process. This leads to nonlinearity, and a nonlinear transfer function of the qubit is quantum mechanical. This reveals a fundamentally different calibration problem that requires reversing the response. 25 In addition, in

[33] , the reading is performed via room temperature RF electronics and cryogenic Calibration of an end-to-end signal chain containing a superconducting ADC has not been addressed. Software-level calibration to compensate for qubit frequency variability in the DigiQ architecture. It has been shown that methods can be applied

[10] ; however, this study shows the frequency of SFQ pulse sequences. It focuses on the adjustment and addresses the nonlinearity of the DAC transfer function in the amplitude domain. 30 He won't take it. The use of superconducting DACs in the field of quantum annealing for qubit flux polarization and Methods for calibration of superconducting DACs have been defined

[11]

[12]

[13] . In these approaches, superconducting DACs Qubit control is performed using this method, and the qubit's own response is used as the calibration reference. It is used. However, calibration, flux biasing processes described in

[11]

[12]

[13] 35 It is aimed at: static (DC) adjustment of the qubit potential well, thermal equilibrium of the qubit. The response in this situation is used. This process is coherent quantum dynamics that does not involve a gate operation. It is a static optimization that does not require calibration. In the present invention, however, calibration is performed via gate operation. This is carried out within the context of: measuring coherent Rabi oscillations, and applying a sliding motion throughout the gate duration. The amplitude-rotation angle relationship of the signal is determined. Rabi calibration is performed using coherent quantum mechanics of the qubit. It requires evolution and the nonlinear inverse through the sinusoidal response function P(|1⟩) = sin²(Ω·t / 2). It involves making a transformation. In flux polarization calibration, the qubit response is a time-independent process. This is an equilibrium state and does not require a nonlinear inverse transformation. Due to this structural difference, The calibration method of the present invention differs fundamentally from

[11]

[12]

[13] . In addition, The flux-biased DACs used in

[11]

[12]

[13] have a structurally linear output; each DAC has 10 Since the code corresponds to a specific quantum step of flux, the integral is nonlinear in the amplitude domain. (INL) problem does not occur naturally. In the present invention, however, the amplitude-based SQUID-sequence DAC (100), The Josephson junction exhibits a pronounced INL due to critical current (Ic) spread; therefore Calibration is not just an offset correction, but the inverse of a nonlinear transfer function. This requires mapping via translation. This difference means that the calibration method of the present invention is 15 Quantum annealing type flux polarization calibrations are motivated by both physical and mathematical reasons. It reinforces their structural separation. Methodologies for accelerating Rabi oscillation measurements

[14] , open source calibration frameworks

[16] and model-based approaches to qubit read optimization

[15] However, all of these studies use room temperature control electronics, and 20 It does not address the calibration of the superconducting DAC transfer function. Cryogenic CMOS-based qubit control and readout chains have been implemented

[17] ; however, this approach It uses semiconductor CMOS technology and avoids Josephson junction critical current spread. It does not address the resulting nonlinearity problem of the DAC. 25 for in-situ calibration of qubit control parameters in multi-qubit systems Scalable methods have been developed

[32] . In this approach, qubit error detection events are feedback By using it as a signal, the control parameters of multiple qubits can be optimized in parallel. However, calibration is performed using room temperature arbitrary waveform generators (AWG) and linear

[32] . This is accomplished using DACs; the calibrated parameters are pulse amplitude, frequency, and These are independent proportional quantities, such as the DRAG coefficient. In the present invention, calibration is performed linearly. It involves mapping the transfer function of a non-superconducting DAC via inversion, and It solves a structurally different problem than adjusting independent proportional parameters. Bayesian gate tuning methods

[23] , binary search-based Hamiltonian tracking

[24] and signal chain distortion Compensation approaches

[25]

[26] have been described. All of these studies are room temperature control electronics. It uses and assumes that the DAC is linear. 35 An amplitude-based SQUID-array DAC architecture has been defined for superconducting digital-to-analog conversion.

[27] . However, this reference refers to improving DAC linearity at the hardware level, i.e., critical current It focuses on reducing INL at its source by reducing its spread. The present invention, however, aims to achieve this. It adopts the opposite approach: accepting the DAC's natural INL as given and calibrating the system end-to-end. It compensates at the level of 5. The Need in Technology None of the approaches described above can achieve the nonlinearity of amplitude-based superconducting DACs. the transfer function, the quantum mechanical response of the qubit in a cryogenic environment without an external reference. It does not address end-to-end calibration. Therefore, the following features are included in the technique. A calibration approach that provides: 10 (a) A single end-to-end system showing the path from a superconducting DAC through qubits to a superconducting ADC. considering it as such; (b) the quantum of the qubit instead of relying on an external voltage or frequency standard at cryogenic temperature using its mechanical response as a calibration reference; (c) nonlinearity of converters, signal path attenuation, impedance mismatches and qubit 15 Compensating for sources of degradation, including parameter variations, at the chain level; (d) simpler superconducting converters with relaxed linearity specifications It allows its use. THE PURPOSE OF THE INVENTION The present invention is a superconducting digital-to-analog converter based on Josephson junction circuits. (DAC) is a superconducting circuit based on at least one quantum bit (qubit) and Josephson junction circuits. calibration of the end-to-end signal chain including the analog-to-digital converter (ADC) and a quantum control system for its operation, related methods and computer It aims to provide a readable environment. Within the scope of the invention, the signal chain is treated as a combined input-output system, rather than as separate components. It is considered as a system. The calibration reference is an external precise voltage source or frequency. It is obtained directly from the measured quantum state transitions of the qubit, without requiring a synthesizer. This A calibration that maps the desired qubit operations to the DAC's digital input codes, based on measurements. The transfer function is defined and stored. Thanks to this approach, DAC nonlinearity, signal path attenuation, and impedance mismatches are eliminated. and sources of degradation across the chain, including qubit parameter changes, regardless of the components. They are compensated together without being characterized. The invention relates to the linearity of a superconducting DAC or ADC. It is not dependent on; it is simpler and has lower power consumption with relaxed linearity specifications. It enables the use of superconducting converters. A BRIEF DESCRIPTION OF THE INVENTION The invention, in its first aspect, is an amplitude-based SQUID-array superconducting DAC (100), with at least one qubit (104) and a method for calibrating the end-to-end signal chain containing a superconducting ADC (106) 5 In the method, a large number of digital input codes are applied to the superconducting DAC (100) and for each code The quantum mechanical response of the qubit (104) is measured via a superconducting ADC (106). The measured responses Based on this, a calibration that maps the desired qubit operations to the corresponding DAC (100) input codes. The transfer function is determined and stored in a calibration memory (102). This transfer function Quantum gate operations are performed on qubit (104) using. 10 The calibration transfer function characterizes the signal chain as a combined input-output system. DAC (100) nonlinearity, signal path attenuation, impedance mismatches and qubit (104) sources of degradation across the chain, including specific coupling differences, and system components. It captures them together without independently characterizing them separately before integration. Calibration The reference can be obtained directly from 15 without requiring an external high-precision voltage source or frequency synthesizer. The qubit (104) is obtained from the measured quantum state transitions. In a preferred implementation mode, the quantum mechanical response of the qubit (104) is the Rabi oscillation. This is determined through measurements. In the first variation (amplitude Rabi), a fixed gate time is selected and The DAC (100) input codes are scanned and the excited state population P(|1⟩) is measured for each code; desired The DAC (100) input code satisfying the condition P(|1⟩) = sin²(θ / 2) for the rotation angle θ is determined directly. Second 20 In one variation (time-dependent Rabi), the gate time is scanned for each DAC (100) entry code. The frequency is extracted and the frequency-code mapping is reversed to correspond to the desired rotation angles. Codes are determined. The calibration mapping obtained in both variations is stored in the calibration memory (102) It is hidden. The calibration method can be applied in two different operating modes of the superconducting DAC (100). The first 25 In single-code mode, a single DAC (100) input code is applied during the gate time and the pulse shape is DAC by an analog low-pass filter located on the signal path between qubit (100) and qubit (104) It is determined that the nonlinearity of the DAC (100) in this mode leads only to a proportional amplitude error. Second In envelope synthesis mode, the DAC (100) applies a different input code in each clock cycle to the desired It synthesizes the pulse envelope; in this mode, end-to-end calibration provides the correct total rotation angle, peak 30. It determines the code. As part of further improvements, Ramsey fringe measurements can be applied for phase calibration. ADC (106) To optimize the discrimination threshold, receiver operating characteristic (ROC) analysis can be performed. Calibration The computation time for a qubit can be reduced with adaptive algorithms (binary search, Bayesian optimization). The leakage rate outside the subspace can be monitored, and the impact shape parameters can be adjusted accordingly. In an extended form of the first operating mode with quadrature correction, from the output of the DAC (100) The amplitude of the quadrature (Q) correction signal generated via the analog differentiation circuit is also measured end-to-end. It can be optimized within the scope of calibration; this optimization is due to the nonlinearity of DAC (100), analog It absorbs both approximations and signal path asymmetries in the circuit. 5 Secondly, the invention is structured to perform the calibration described above. The quantum control system (10) provides. The invention, in its third aspect, stores the instructions that carry out the method. It provides a non-volatile, computer-readable medium. DESCRIPTION OF THE FIGURES FIGURE 1 shows the system-level block diagram of the quantum control system (10). Superconducting DAC 10 (100), qubit (104) and superconducting ADC (106) form the end-to-end signal chain. Calibration engine (108) and calibration memory (102) within the cryogenic limit, room temperature controller (110) within the limit It is located outside. FIGURE 2 shows the transfer characteristic of the superconducting DAC (100). The dashed line is the ideal linear. Its characteristic is that the flat curve represents the true nonlinear transfer curve. The difference between the two curves is at least 15 Large deviation is shown as integral nonlinearity (INL). Calibrated input code How (n_kal) compensates for the deviation is explained below. Calibrated code (nkal), It provides the correct input code corresponding to the desired output value, retrieved from the calibration memory (102). FIGURE 3 shows the block diagram of the read path. Qubit (104) is a read signal path component (118) It is connected to the superconducting ADC (106) via. The read signal path component (118) is 20 application dependent. as a readout resonator, Josephson parametric amplifier (JPA) or traveling wave parametric It may include an amplifier (JTWPA). A state discrimination unit (120) at the output of the ADC (106) is threshold-based. By comparison, it determines whether the qubit is in the |0⟩ or |1⟩ state. Calibration engine (108), ADC (106) Optimize the discrimination threshold by applying ROC analysis to the output distributions and calibrate the results. It stores it in its memory (102). 25 FIGURE 4 shows the flowchart of the calibration sequence run by the calibration engine (108). (500) shows. The flowchart in question includes the initial step (501), the step where the first DAC input code is selected (502), and the first gate. It starts with step (503) where the duration is determined. Following this, step (504) where the qubit (104) is reset to its initial state, gate 30 with the selected entry code. Step (505) where the duration is applied to the DAC (100) and step (506) where the reading is made via the ADC (106) is being carried out. Whether the measurement repetitions have been completed is checked with decision step (507); sufficient number (508) step in which the probability of 𝑃(∣ 1⟩) is calculated if it is obtained again and the second excited qubit Step (509) is performed where the penetration rate of the situation P(∣ 2⟩) is monitored. Decision step (510) is to determine whether the breach in question is below the predetermined threshold value 𝜀. It is being evaluated; if the threshold value is exceeded, parameter adjustment step (511) is applied. 5 Then, it is checked whether all gate times have been scanned with decision step (512) and the relevant The step where the value of Ω(n) is extracted using sinusoidal fitting after the scan is complete. (513) is being executed. After the decision step (514) whether all input codes are completed, the Ramsey measurement Step 10 where the ADC (106) discrimination threshold is determined using ROC analysis with step (515) performed. (516) is executed; then the transfer function is obtained in step (517) using the Ω−1 inversion. is being done. The obtained calibration data is saved to the calibration memory (102) (518), after which verification step (519) is applied and the accuracy obtained is compared with the predefined minimum accuracy The decision step (520) checks whether the value satisfies the minimum value. 15 If the accuracy condition is met, the calibrated code corresponding to the target frequency. The step determined is (521) and the said code is applied to the DAC (100) and the gate on the qubit (104) After the step (522) in which the process is carried out, the process is completed with the final step (523). FIGURE 5, a multiqubit system containing N parallel DAC (100) - qubit (104) - ADC (106) signal chains. It shows the quantum computing system. The shared calibration engine (108) serves all chains. 20 FIGURE 6 is a six-panel figure showing the complete end-to-end amplitude Rabi calibration: (a) JoSIM The transfer function of the 8-bit superconducting DAC (100) characterized by circuit simulation and (b) Amplitude Rabi oscillation (P(|1⟩) dependent on DAC (100) input code measurement), (c) calibration search showing DAC (100) codes corresponding to the target rotation angle. Table: 25 of end-to-end calibrated codes versus uncalibrated (linear assumption) codes. comparison, (d) end-to-end calibrated at eight different target rotation angles (π / 8 to π) and Comparison of uncalibrated gate error rates, (e) qubit (104) during calibrated π pulse. Time-dependent evolution of populations (P(|0⟩), P(|1⟩), P(|2⟩)), (f) 6-bit, 8-bit and 10-bit DAC (100) Comparison of π and π / 2 gate error rates obtained by end-to-end calibration at different resolutions. FIGURE 7 shows the component-based calibration strategy of the end-to-end calibration approach and the 30 uncalibrated components. It is a three-panel figure showing comparative performance depending on the situation: (a) signal path attenuation Variation of π / 2 gate error rate depending on factor (α): end-to-end calibration without attenuation. While independently maintaining a low failure rate, component-based and uncalibrated strategies lead to increasing attenuation. is significantly impaired by (b) qubit-DAC coupling mismatch (g / gnom) π / 2 (c) Change in gate failure rate showing the combined effect of attenuation factor and coupling factor. Contour diagram: Advantage ratio of end-to-end calibration compared to component-based calibration. FIGURE 8, a four-panel diagram showing the effect of end-to-end calibration in two different DAC (100) operating modes. It is a figure: (a) 5 for rotation π in Mod A (single-code, pulse shaping with Bessel low-pass filter). Comparison of ideal and nonlinear DAC (100) waveforms; nonlinearity of DAC (100). (b) It only leads to a proportional amplitude error, the pulse shape is not distorted as it is determined by the filter. Ideal and nonlinear DAC (100) waveform for π rotation in Mod B (envelope synthesis, Gaussian waveform) Comparison of forms; since each clock instance corresponds to a different DAC (100) code, pulse Inter-sample distortion is observed as follows, (c) every 10 at five target rotation angles from π / 8 to π. Comparison of end-to-end calibrated and uncalibrated gate failure rates for two modes, (d) end-to-end Comparison of the remaining amplitude error per sample in both modes after tip calibration. FIGURE 9, Mod A after end-to-end calibration at 6-bit, 8-bit and 10-bit DAC (100) resolutions. This is a four-panel figure comparing Mod A and Mod B performances: (a) For three bit depth in Mod A (b) Target rotation angle dependent error rate for three bit depth in Mod B 15 (c) bar graph comparison for all bit depths and modes, (d) leakage to the |2⟩ state. Curves showing that the ratio is independent of the DAC (100) bit depth. FIGURE 10, DRAG correction active in third operating mode (single-code mode with quadrature correction). This is a two-panel figure showing the effect of the coefficient (βeff) on leakage and accuracy: (a) βeff value depending on |2⟩ infiltration rate (left axis, solid line and solid circle markers) and door infidelity (right 20 (axis, dashed line and open square markers) curves; with leakage minimum (βeff(L) ≈ 1.38, open circle) The optimum accuracy (βeff(F) ≈ 0.50, open square) occurs at different βeff values; horizontal dotted The DRAG line represents the uncorrected reference seepage value, and the vertical dotted lines indicate the two optimum points. (b) Parametric curve in the leakage-infidelity Pareto space; leakage optimum (open circle), accuracy The optimum (open square) and the reference point without DRAG correction (filled diamond) are marked; curve 25 The numerical values ​​on the screen represent the corresponding βeff values. In digital DRAG correction, the phase is also shown. and leakage optima occur at different β values ​​

[31] ; however, passive analog hardware, leakage It shifts the optimum to a higher βeff value compared to the digital state, and this shift is hardware-specific. Therefore, it requires experimental calibration. EXPLANATION OF REFERENCES IN THE FIGURES 30 - Quantum control system 100 - Superconducting digital-to-analog converter (DAC) 102 - Calibration memory 104 - Quantum bit (qubit) 106 - Superconducting analog-to-digital converter (ADC) 108 - Calibration motor 110 - Room temperature controller 112 - Low-pass filter (LPF) 5 114 - Multiplexer 116 - Feedback controller 118- Reading signal path component 120- Status distinction unit 500 - Calibration Flowchart 10 501 - Getting Started 502 - Selecting the Initial Entry Code 503 - Selecting the First Gate Timing 504 - Qubit Reset to Initial State 505 - Applying Selected Code and Gate Time to DAC 15 506 - Reading from ADC 507 - Checking whether the required number of repetitions has been completed. 508 - Calculation of Probability P(∣1⟩) 509 - Monitoring the P(∣2⟩) Penetration Rate 510 - Checking if the Infiltration is Below the Threshold Value 20 511 - Parameter Adjustment Step 512 - Checking whether all door times have been scanned. 513 - Extraction of the Ω(N) Value 514 - Checking if all access codes have been scanned. 515 - Performing the Ramsey Measurement 25 516 - Determining the ADC Threshold Value with ROC Analysis 517 - Obtaining the Transfer Function Through Inversion 518 - Saving Calibration Data to Memory 519 - Verification Step 520 - Verifying Whether Target Accuracy Has Been Achieved 521 - Determining the Calibrated Code Corresponding to the Target Frequency 5 522 - Implementing the Calibrated Code and Executing the Gate Operation 523 - Finishing Step EXPLANATION OF THE INVENTION System Overview Referring to FIGURE 1, the quantum control system (10) of a cryogenic cooling device has a cryogenic temperature of 10 It includes a superconducting digital-to-analog converter (DAC) (100) in its phase. DAC (100), It includes Josephson junction-based circuits and takes digital input codes and converts those codes into corresponding analog signals. It generates driving signals. The DAC (100) is associated with a quantum bit (qubit) (104) via a signal path. This signal path, Depending on the application, cryogenic cable may include attenuator and filter components. Kubit (104), 15 It responds to applied driving signals with the evolution of its quantum state. This response is observed in the Bloch sphere. It is expressed as a rotation on it. The qubit (104) is a superconducting analog-to-digital through a read signal path component (118). It is connected to the converter (ADC) (106). This read path is a read path depending on the application. resonator, Josephson parametric amplifier (JPA), traveling wave parametric amplifier (JTWPA) or 20 It may include another cryogenic amplifier stage. The ADC (106) includes Josephson junction-based circuits. and digitizes the read signal from the qubit (104). DAC (100), qubit (104) and ADC (106) together. It forms an end-to-end signal chain. The system (10) also includes a calibration memory (102) and a calibration engine (108). Calibration The motor (108) sends test codes to the DAC (100) during the calibration sequence and 25 qubits for each code. (104) measures the response via ADC (106). Based on these measurements, the desired qubit (104) operations It defines a calibration transfer function that maps to the corresponding DAC (100) input codes and writes to the calibration memory (102). During normal operation, the calibration memory (102) is calibrated. It provides the codes to the DAC (100). The room temperature controller (110) is located above the cryogenic limit and the calibration engine (108) 30 He coordinates the work. Implementation of the Calibration Engine Calibration engine (108) can be used on different hardware platforms depending on the application. can be realized. In the first form of realization, the calibration engine (108) is at room temperature. It is implemented as a software module running on the controller (110). This module is the calibration sequence. determines its parameters, these parameters are assigned to DAC (100) and ADC (106) units in the cryogenic phase 5 transmits via digital interface, ADC (106) collects measurement results, sinusoidal fitting and transfer The function performs the calculations and writes the results to the calibration memory (102). In a second implementation form, the calibration engine (108) is fully or partially cryogenic. It is implemented as a digital processing unit positioned in the stage. This unit uses cryogenic CMOS. It could be an ASIC based on a superconducting logic system or a digital control circuit based on superconducting logic. Cryogenic 10 This design eliminates the communication delay between room temperature and the cryogenic phase, thus providing a more efficient solution. It can provide fast calibration cycles. In a hybrid implementation, timing and DAC / ADC Communication can be carried out on the cryogenic side, while computationally intensive processes can be performed on the room temperature side. In terms of the present invention, the calibration engine (108) is on a specific hardware platform. It is not critical to perform the calibration; the calibration methodology requires that the calibration sequence be executed and that 15 It can work with any computing unit capable of processing the results. Superconducting DAC Applications Superconducting DAC (100) can be constructed using any of the various architectures known in the field. These can be implemented. Among them are dual-weighted or single-weighted flip-flop cells driven by flip-flop cells. Series SQUID amplifier DAC configurations, consisting of weighted DC SQUID amplifier cells, are digitally 20 Josephson junction oscillator DAC structures and pulse controlled by a regulated polarity current. Intensity modulation DAC structures are applicable. A specific DAC is relevant in the present invention. The choice of architecture is not critical; end-to-end calibration methodology, different superconducting DAC (100) It can work with applications. The application where the calibration transfer function makes the most significant contribution is amplitude-based (SQUID-25) (series) are superconducting DACs. In such DACs, the Josephson junction critical current spreads out. The resulting integral nonlinearity (INL) directly affects the transfer function of DAC (100) and This creates a significant source of error that needs to be compensated for with end-to-end calibration. Pulse counting based. In DAC architectures, the variability of individual pulse amplitudes and pulse shaping filters are also important factors. Impedance mismatches, although to a lesser extent, can be compensated for through end-to-end calibration. 30 It can produce an amplitude ambiguity. Sources of Nonlinearity in Superconducting DACs Referring to FIGURE 2, the transfer characteristic of the superconducting DAC (100) is due to various mechanisms. It can deviate from the ideal linear characteristic. In FIGURE 2, the dashed line represents the ideal linear characteristic, and the smooth curve represents the ideal linear characteristic. It represents the true nonlinear transfer curve. The difference between the two curves is the integral nonlinearity. It is defined as (INL). 5 The primary source of these deviations is the variability of the critical current (Ic) of Josephson joints. Lithographic tolerances in the area and irregularities in tunnel barrier thickness affect the critical current of the chip. This can lead to a difference of approximately 10-20% throughout. SQUID in DAC (100) Due to these differences, the cells produce different output amplitudes when open. Binary weighted In configurations, the accumulation of these errors in highly significant bit segments results in integral linear 10 Not having it can lead to exceeding 10% or more of the full scale. Secondly, DC SQUID The cells inherently exhibit a nonlinear flux-voltage characteristic; this characteristic, polarization conditions and mutual inductance values ​​contribute to intercellular differences. It is found. In a single-weighted (thermometer-coded) configuration, each code increment adds 15 additional SQUID cells. This corresponds to activation, and since each cell makes a positive contribution to the output, the individual cell The monotonicity of the transfer function is ensured, regardless of the variability in its parameters. The calibration approach of the present invention does not require a monotonicity condition; however, a monotonic transfer This function facilitates the creation of a calibration lookup table without ambiguity. DAC Operating Modes 20 The superconducting DAC (100) can be used in different operating modes depending on the application. These modes are: The structural aspect of how the nonlinearity of the DAC (100) affects the qubit (104) control signal. They differ in that they need to be considered separately to understand the effect of end-to-end calibration in each mode. should be taken. First operating mode (single-code mode): In this mode, a single digital 25 is sent to the DAC (100) for the duration of the gate time. Input code is applied. DAC (100) output is a step function with constant amplitude. Qubit (104) control The pulse is an analog low-pass filter located in the signal path between the DAC (100) and the qubit (104). (112) is shaped by. This filter is, for example, a Bessel low-phase filter with a linear phase characteristic. It can be a filter that passes through. In this mode, the nonlinearity of the DAC (100) leads only to a proportional amplitude error. It opens; the pulse shape is not distorted as it is determined by the filter. End-to-end calibration, accurate rotation 30 It compensates for this proportional error by specifying the single DAC (100) input code that provides the angle. With DAC (100) Signal path between qubits (104) passive analog low-pass filters, depending on the application, IQ additional pulse shaping such as mixers (signal combiners) and passive analog differentiator circuits It may include components. End-to-end calibration detects imperfections of these components individually. They absorb together without requiring characterization. Second operating mode (envelope synthesis mode): In this mode, the DAC (100) synthesizes a different digital element in each clock cycle. By applying the input code, it directly synthesizes the desired pulse envelope. Each clock instance represents the current pulse envelope. It is set to a DAC (100) code corresponding to the amplitude value. This mode is arbitrary waveform generator 5 (AWG) is a similar working method and Gaussian envelopes, DRAG pulses or other shaped Envelopes can be synthesized. In this mode, each clock instance corresponds to a different DAC (100) code, The nonlinearity of DAC (100) creates intersample distortion in the shape of the pulse envelope. End to end Calibration determines the peak code that provides the correct total rotation angle; however, in individual samples... Deformation is outside the scope of end-to-end calibration. 10 Third operating mode (single-code mode with quadrature correction): A combination of the first operating mode. In its extended form, the DAC (100) output splits into two paths after the low-pass filter. The first path, The second way carries the filtered signal directly as an in-phase (I) component. by passing it through an analog differentiating circuit (for example, a series capacitor or an RC high-pass filter) The quadrature (Q) generates the correction signal. The Q component is proportional to the time derivative of the I component and is 15 This mode is aimed at suppressing the leakage of the qubit (104) outside the computational subspace. The hardware fix known as DRAG (Derivative Removal by Adiabatic Gate) It is a realization at the level of analog differentiation. The analog differentiation circuit does not produce an ideal mathematical derivative; it is a band differentiation. It provides a limited approximation. However, end-to-end calibration absorbs this approximation: The calibration engine (108) optimizes the I and Q channel amplitudes together to minimize leakage and 20 The balance between rotational accuracy is determined by the actual response of the qubit (104). In this mode, the gate The total digital memory requirement per DAC is one or two input codes (100). Single DAC When (100) is used, I and Q are derived from the same source and one byte per gate is sufficient; two separate DACs When (100) is used, the amplitudes of I and Q can be adjusted independently and two bytes per gate are required. Each In both cases, the digital waveform memory requirement is met by example 25, which is required by the second operating mode. It is several orders of magnitude lower compared to code storage per unit. This mode of operation Analog pulse shaping hardware, filter design, derivative circuit implementation, and DRAG correction. The coefficient optimization is summarized below. Passive analog differentiator circuit (e.g., RC high) low-pass filter, time constant τ = 0.53 ns), the output of DAC (100) passed through the low-pass filter to time It generates the derivative according to a band-limited approach. The 3 dB cutoff frequency of this circuit (f3dB = 1 / (2πτ)) is 30 qubits. The anharmonicity frequency is related to |α|; the derivative approximation breaks down when f3dB < |α| and higher The Q amplitude is higher, and therefore a higher effective DRAG correction coefficient (βeff) is required. DRAG correction The coefficient was obtained through end-to-end calibration by optimizing the I and Q channel amplitudes together experimentally. It is determined as follows. Figure 8 compares the behavior of these two operating modes under end-to-end calibration. Figure 8(a) shows the nonlinear DAC in the first operating mode, Figure 8(b) shows it in the second operating mode. (100) shows the comparison of the ideal linear DAC waveforms. FIGURE 8(c) shows the comparison of the waveforms for both modes. It compares end-to-end calibrated and uncalibrated gate failure rates at different rotation angles. FIGURE 8(d) shows the remaining amplitude error per sample in both modes after end-to-end calibration: 5 In the first operating mode, a single fixed error value, and in the second operating mode, the INL profile of the envelope. A scattered error pattern reflecting this is observed. In both operating modes, end-to-end calibration accurately achieves the target rotation angle. The effect of residual distortion in the second operating mode on gate accuracy is similar to that of the first operating mode. It is comparable to quantization error. The first mode of operation requires simpler hardware. 10 (a single DAC (100) code and an analog filter); the second operating mode is finer angular resolution. This is because the total rotation angle is determined as an integral of the area under the impact envelope and the peak The unit change in the code has a smaller angular aspect compared to the unit code change in the first mode. It leads to change. Calibration Motor: Rabi Oscillation Measurement 15 Referring to FIGURE 4, the calibration engine (108) utilizes the quantum mechanical response of the qubit (104) Calibration determines the transfer function. This response is the physical phenomenon known as Rabi oscillation: Depending on the driving amplitude, the qubit (104) is periodic between the ground state |0⟩ and the excited state |1⟩. It exhibits transitions. The excited state population is of the form P(|1⟩) = sin²(θ / 2), where θ is the rotation angle. and is a function of sliding amplitude and gate duration. 20 First variation: Amplitude Rabi (FDVA) In a preferred implementation mode, the calibration engine (108) is fixed-time and variable-amplitude. (FDVA) runs a Rabi scan. In this variation, the gate time Tgate is kept constant and the DAC (100) input Scanning is performed via the codes. The following steps are applied for each digital entry code: Step 1: The qubit (104) is reset to the base state |0⟩ in order to fix the initial condition of the measurements. 25 The reset is performed using a waiting period that is 3-5 times the qubit relaxation time T1. This can be done; alternatively, active reset protocols can be implemented. Step 2: DAC (100) is set to the corresponding n code and the driving signal corresponding to this code is constant The T gate is applied to the qubit (104). In the first operating mode (single-code mode) the DAC (100) output It is a constant amplitude step, and the pulse shape is determined by the low-pass filter in the signal path. 30 In the second operating mode (envelope synthesis mode), the DAC (100) produces a predefined envelope profile. It synthesizes the pulse envelope by applying a different code in each clock cycle within this framework; in this case, n, It is interpreted as the top code of the envelope. Step 3: The ADC (106) reads the state of qubit (104) and produces a binary measurement result (|0⟩ or |1⟩). Step 4: To ensure statistical reliability, Steps 1-3 are repeated M times with the same code. M, Selectable depending on the application (e.g., 100-1000). Aroused state as a result of repetitions. The population is defined as P(|1⟩) = (number of measurements that yield the result |1⟩) / M. Step 5: Steps 1-4 are executed for each of the n codes in the set of codes to be calibrated. All codes 5 After scanning, the change of the P(|1⟩) value depending on the DAC (100) input code is obtained. FIGURE 6(b) shows the amplitude Rabi curve obtained as a result of this scan. DAC (100) input As the code increases, the driving amplitude increases and the qubit (104) exhibits a periodic oscillation. The first oscillation The peak corresponds to a π rotation, and the first zero crossing corresponds to a 2π rotation. The oscillation between codes. Irregularities in speed reflect the nonlinearity of the DAC (100) transfer function. 10 The calibration transfer function is determined by inverting the scan data. For a desired rotation angle θ, the calibration engine (108) is in the first lobe of the Rabi curve (first π peak). Determines the DAC (100) input code that satisfies the condition P(|1⟩) = sin²(θdesired / 2) (region before point). For example, the code corresponding to the maximum P(|1⟩) for the π gate is the condition P(|1⟩) = 0.5 for the π / 2 gate. The code that provides the most accurate measurement data is selected. For intermediate angles, the code where the P(|1⟩) value is closest to the target is the one with the most accurate measurement data. can be determined through linear interpolation. FIGURE 6(c) shows the result of this inversion. This shows the calibration lookup table. The main advantage of this variation is that each measurement point provides direct information on the angle of rotation. No sinusoidal fitting or frequency subtraction step is required; the P(|1⟩) value is one-to-one with the rotation angle. This is related. This simplifies the calibration algorithm and reduces the computational load. 20 Second variation: Time-Bound Rabbi (FDSVA) In an alternative implementation method, the calibration engine (108) for each DAC (100) input code n It scans the gate time. For each pair (n, Tgate), P(|1⟩) is measured. Thus, the temporal Rabi for each n code is obtained. oscillation is obtained. By fitting a sinusoidal model to the obtained P(|1⟩)-Tgate data, the relevant Rabi frequency is determined. Ω(n) is extracted. Ω(n) is a 25 related to the effective driving amplitude seen by the qubit (104) in the code in question. It is a magnitude. For a selected gate T, the rotation angle θ(n) is calculated as Ω(n) × Tgate and the desired θistened. The closest n code is determined. This variation requires more measurement points compared to the first variation (number of codes × gate time). step); in contrast, the verification of the Rabi frequency independently of the code and gate time It enables optimization to be performed within the calibration sequence. Both variations are included in the existing invention 30. It is valid within this scope and can be selected according to the requirements of the application. Nonlinear inverse problem In both variations, determining the calibration transfer function is done using a conventional converter. It involves a structurally different nonlinear inverse problem from calibration. Traditional DAC In its calibration, the response of the test load is linearly proportional to the driving amplitude; several point measurements and Linear interpolation is sufficient. In the present invention, however, the response of the qubit (104) is periodic with the driving amplitude 5 and is in a nonlinear relationship (Rabi oscillation: P(|1⟩) = sin²(Ω·t / 2)). Therefore, calibration, This is not a simple linear scaling operation, but one that requires the inversion of a periodic function. It is a measurement and calculation process. This structural difference differentiates the present invention from three separate approaches in the known state of the art. Explains: (i) Traditional DAC calibration methods, linear or low-order polynomial test load 10 (ii) room temperature based qubit Calibration methods [5][6][7] assume that the DAC transfer function is linear and only (iii) SFQ pulse counting based qubit control studies [1][3][9], pulse It establishes a linear relationship between the number and the angle of rotation and a transfer function in the amplitude domain. It does not require calibration. The present invention addresses a problem that none of these three approaches alone addresses. solves the problem: a nonlinear DAC (100) transfer function, a periodic qubit (104) Calibration via inversion of the response, without external reference. Calibration period The total duration of a calibration based on full code scanning depends on the number of input codes scanned per measurement. The number of repetitions at point M and the gate duration T, which is constant in the first variation, are used to reset the qubit with gate 20. It depends on the duration. The duration of a single repetition is determined by the time required for the qubit (104) to reset. It is suppressible and on the order of approximately 100 μs. In the first variation (amplitude Rabi), Ncode is the number of codes, M When scanned repeatedly, the total time is calculated as approximately Ncode × M × 100 μs. For example, 8-bit (256 a 10-bit (1024 code) DAC (100) with M=100 repetitions in about 2.6 seconds, and a 10-bit (1024 code) DAC (100) It can be calibrated in approximately 10 seconds. In the second variation (time-dependent Rabi), K units of 25 are required for each code. Since the gate time step is also scanned, the total time increases by a factor of K. Shorter calibration times. When targeted, the adaptive algorithms described below can be applied. Multiparameter calibration extension Calibration occurs when the third operating mode (single-code mode with quadrature correction) is used. The procedure can be extended to a two-dimensional optimization. In the first stage, the amplitude described above is 30 The co-phase (I) channel amplitude is calibrated by running a Rabi scan and providing the target rotation angle. DAC (100) input code is determined. In the second stage, quadrature (Q) channel is determined by keeping the I channel amplitude constant. The amplitude is scanned; for each amplitude Q, the leakage rate P(|2⟩) of the qubit outside the computational subspace (104) is measured. and the Q amplitude that minimizes leakage is determined. The Q amplitude is determined in the configuration using two separate DACs (100). It can be expressed as the ratio of the second DAC (100) code to the first DAC (100) code. This ratio is the ratio of the qubit (104) to the anharmonicity, frequency-dependent attenuation in the signal path and the analog derivative circuit It varies depending on bandwidth; therefore, it's more of an experimental calculation than a theoretical one. Optimization is preferred for determination. This two-stage calibration involves adjusting the I and Q channel parameters end-to-end. optimize as an end and the superconducting DAC (100) integral nonlinearity, analog derivative 5 The circuit's band-limited approximation, filter impedance mismatches, and signal path attenuation are all addressed by a single unit. They absorb together within an effective DRAG correction coefficient (βeff). The effective DRAG correction factor βeff is derived from the theoretical β value (β = -) in standard DRAG theory. 1 / (2α), for transmon qubit α = -350 MHz, β ≈ 0.5) can deviate significantly. This deviation may be greater than one It has several physical mechanisms. Firstly, a passive analog differentiator circuit (for example, an RC high 10 (pass filter) does not produce an ideal mathematical derivative; below the 3 dB cutoff frequency (f3dB = 1 / (2πRC)) While providing an accurate frequency-proportional amplitude response, above this frequency the amplitude reaches saturation and the phase changes. The shift deviates from the ideal 90 degrees. The non-computational transition of the qubit (104) (|1⟩ → |2⟩) anharmonicity Since the frequency occurs around |α|, the amplitude and phase response of the derivative circuit in this frequency region, It directly determines the leakage suppression effectiveness. In cases where f3dB < |α|, the derivative circuit is at the critical frequency 15. In this region, it both weakens the amplitude and increases the phase error; this results in a higher Q for leakage suppression. Secondly, the amplitude, and therefore the higher βeff, is required. Secondly, in the first operating mode, the pulse envelope I(t) is a It is the step function passed through the Bessel low-pass filter, as assumed by standard DRAG theory. It is not a Gaussian envelope; therefore, the temporal form of its derivative differs from theoretical expectation. Thirdly, The nonlinearity of the superconducting DAC (100) causes the actual value of the I channel amplitude to be 20 times lower than the nominal value. It shifts and affects the optimal Q / I ratio. The net effect of these three mechanisms is an unpredictable deviation of βeff from the theoretical β value. In numerical simulations, the RC time constant τ = 0.53 ns, the Bessel filter cutoff frequency is 30 MHz, and With anharmonicity parameter α = -350 MHz, βeff ≈ 1.37 was obtained; this is higher than the theoretical value of β ≈ 0.5. It is approximately 2.7 times. This deviation is not simply a scaling factor, but rather the frequency-dependent amplitude of the RC circuit and 25 the combination of phase distortion, Bessel-Gauss shape mismatch and DAC (100) nonlinearity This is the effect. In a system that produces an ideal DRAG pulse with a conventional digital AWG, phase optimum (β ≈ The infiltration optimum (β ≈ 1.0) and the infiltration optimum (β ≈ 1.0) occur at different values ​​

[31] ; however, this distinction is analytically It can be calculated. In passive analog hardware, the leakage optimum shifts to a value of βeff ≈ 1.37, while in digital hardware... Depending on the situation, it includes an additional deviation; this additional deviation is hardware-specific and cannot be predicted analytically. 30 This result reveals a synergistic advantage of the present invention: passive analog pulse shaping. The hardware alone cannot provide ideal DRAG correction (band-limited approximation, phase distortion); end-to-end UCA Rabi calibration alone cannot correct the impact shape (it only optimizes the total rotation angle). However, the combination of the two allows the calibration to absorb analog hardware imperfections within βeff. By doing so, it achieves gate accuracy approaching that of an ideal DRAG system based on digital AWG. This combination, 35 The total digital memory requirement per gate operation is several orders of magnitude higher compared to the digital AWG approach. This reduces the order of magnitude; because in the AWG approach, a separate I and Q code is stored for each clock instance. In the passive analog approach, one or two DAC (100) codes per gate are sufficient. Infiltration monitoring is also applicable in the first and second operating modes. In these modes, the third qubit (104) The penetration rate to the energy level (|2⟩), the pulse shape parameters (gate time, filter bandwidth) 5 It depends on the selection. The calibration motor (108) applies a calibrated gate after which the P(|2⟩) value is determined. By measuring, it can monitor the level of infiltration; if the infiltration exceeds a predetermined threshold, a strike is triggered. The parameters can be readjusted. Digital verification Referring to FIGURE 6, the effectiveness of the amplitude Rabi calibration method (first variation) described above is 10 This has been verified through numerical simulation. The verification was carried out using two independent and accepted physics-based methods. It is based on the integration of simulation tools. DAC model (circuit level): Superconducting DAC (100) transfer function, JoSIM superconducting circuit JoSIM was obtained using the simulator

[29] . JoSIM provides a complete physical model of Josephson joints. It is a SPICE-like transient analysis simulator featuring an RCSJ model (resistive-capacitive shunt junction). 15 The simulator measures the Josephson junction current-phase relationship, junction capacitance, shunt resistance, and magnetic flux. It solves the quantization from first principles (ab initio). In the simulation, an 8-bit (256 channel) thermometer is coded. The complete range includes DACs, DC2SFQ converters, Josephson transmission lines (JTL), and SFQ2DC converters. It is modeled with a circuit topology. The critical currents of the Josephson junctions in each SQUID cell are: 20 to reflect the typical dispersion level observed in the production process (10-20% Ic variability). JoSIM has been assigned. It is widely used in superconducting circuit design and has been proven with experimental results. It is an open-source simulator whose consistency has been verified

[29] . DAC obtained from the simulation (100) The transfer function is the result of a complete circuit transient analysis for each input code; therefore, it is ideal. It does not include component models or linear approaches. Qubit model (quantum level): Qubit (104) response, QuTiP open quantum systems framework

[30] 25 It was calculated using QuTiP, a superconducting qubit that numerically solves the Lindblad master equation. an open-source quantum simulation used as a standard reference tool in research It is a library. The qubit (104) is represented as a transmon model with three energy levels (|0⟩, |1⟩, |2⟩); This three-level model accurately describes the effects of leakage outside the computational subspace. It is necessary for capture. The model, Lindblad 30, captures the T1 relaxation and T2* decoherence channels. It includes through superoperators. The effect of the DAC (100) output on the qubit (104) in the rotating frame. It is modeled with a time-dependent Hamiltonian; where the driving amplitude is the JoSIM circuit. This corresponds to the analog output waveform obtained from the simulation. Simulation parameters: Parameters used in the simulation (qubit transfer frequency 6 GHz, anharmonicity -350 MHz, T1 = 45 μs, T2* = 22.5 μs, coupling strength g = 35 MHz, gate time 40 ns, The DAC clock frequency (20 GHz) is consistent with experimental studies in the current state of the technology. Qubit parameters are the values ​​reported in the latest generation transmon qubit studies [3][9]

[21]

[22] . It is within the ranges. The DAC clock frequency reflects the typical operating frequency of SFQ logic circuits [2][3]. 4. 5 A Bessel low-pass filter (30 MHz cutoff frequency) provides smooth analog output from SFQ pulse sequences. It is a standard signal conditioning element used to obtain envelopes. Simulation chain integrity: DAC (100) circuit simulation with qubit (104) quantum Combining the simulations creates a physics-based representation of the end-to-end signal chain. DAC (100) Nonlinearities in the transfer function, filter-induced pulse shaping, time-dependent 10 driving signals and all physical effects including the multi-level quantum dynamics of the qubit (104) is included in the simulation. The simulation results demonstrate the effectiveness of the calibration methodology of the present invention. It is presented for the purpose of demonstrating the scope of the invention, based on specific simulation parameters or It is not limited to vehicles. FIGURE 6(a) shows the transfer characteristic of the DAC (100) obtained by JoSIM circuit simulation and the associated 15 This shows the INL profile. The solid line represents the ideal linear transfer function, and the dashed line represents the JoSIM profile. The actual transfer function obtained from the simulation, and the dotted line, represent the integral nonlinearity. (INL) represents the profile (right vertical axis, LSB unit). Horizontal axis is the DAC input code (n), left vertical axis is the vertical axis. The axis is given as the normalized output voltage (Vout / Vmax). The transfer function is ideally linear. It deviates systematically from the characteristic; this deviation is in the channel timing 20 in the thermometer-coded structure. This is due to differences and mutual loading in the aggregation network. For 8-bit DAC (100) The maximum INL was measured as 16.1 LSB. FIGURE 6(b) shows the amplitude Rabi curve obtained for all 256 DAC (100) input codes. The line shows the P(|1⟩) value (vertical axis) measured at a constant gate time for each DAC code (n, horizontal axis). It represents the DAC code corresponding to the rotation π. The dashed vertical line indicates the DAC code corresponding to the rotation π; the arrow indicates the code value 25. It has been stated that as the DAC (100) input code increases, the driving amplitude increases and the qubit (104), periodic Rabi It exhibits oscillation. The first peak (P(|1⟩) ≈ 1) corresponds to the rotation of π. DAC (100) Its nonlinearity causes the Rabi curve to deviate from the ideal sinusoidal shape; however, the amplitude In the Rabi variation, this deviation does not affect the inversion accuracy, since calibration is directly measured. It uses the values ​​P(|1⟩). 30 FIGURE 6(c) shows the calibration lookup table obtained from the amplitude Rabi scan. Horizontal The vertical axis is given as the target rotation angle (θ, degrees), and the vertical axis is given as the DAC code (n). Solid circle plane. line end-to-end calibrated DAC codes, blank square dashed line uncalibrated (linear (calculated by assumption) codes, and the dotted line represents the ideal linear mapping. Two mappings The difference between them is the reflection of the nonlinearity of DAC (100) on the calibration transfer function. It shows. FIGURE 6(d) shows the end-to-end calibrated target at eight different target rotation angles (from π / 8 to π) and It compares uncalibrated gate failure rates (1-F, logarithmic scale). Horizontal axis is the target. The rotation angle (θ) and the vertical axis error rate (1-F) are given on a logarithmic scale. Slanted hatching 5 ( / / / ) columns are uncalibrated results, cross-scan (xxx) columns are end-to-end calibrated This represents the results. When calibration is applied, the error rate for all gates is at the level of 10-3 or While obtained under these conditions; the error rate is significant in the uncalibrated state, especially at intermediate rotation angles. It increases in this way. This difference is due to the nonlinearity of DAC (100) in the case of uncalibrated incorrect code. This stems from the fact that it leads to the choice. 10 FIGURE 6(e) shows the time-dependent evolution of qubit (104) populations during calibrated π pulse. The horizontal axis represents time (t, ns), and the vertical axis represents population probability (P). The solid line represents population P(|0⟩), the dashed line represents population P(|1⟩); both curves are indicated by arrows. It is marked. The infiltration population P(|2⟩) is shown with a dotted line on the right vertical axis. Vertical dotted lines indicate the start and end times of the door opening. Transition from P(|0⟩) to P(|1⟩) 15 While observed, the leakage of P(|2⟩) into the second excited state is negligible. This result is due to the use of Leaking outside the computational subspace in the pulse parameters did not constitute a dominant source of error. truths. FIGURE 6(f), π obtained by end-to-end calibration at 6-bit, 8-bit and 10-bit DAC (100) resolutions. It compares the error rates of the π / 2 gate. The horizontal axis represents the DAC bit depth (N), and the vertical axis represents the error rate. The ratio is given as (1-F) on a logarithmic scale. The slash-hatched ( / / / / ) columns represent the π gate error rate. Backslash scanned (\\\\) columns represent the π / 2 gate error rate. Higher resolution, Rabi Because it allows for a denser sampling of the curve, a DAC closer to the target rotation angle. This results in the finding of code (100). This is the end-to-end calibration of DAC (100) resolution. that it directly affects accuracy and that higher resolution provides finer angular precision 25 It shows. The Advantages of End-to-End Calibration Over Component-Based Calibration Referring to FIGURE 7, the end-to-end calibration approach of the present invention allows for the individual calibration of the components. quantitatively demonstrate the superiority it provides compared to traditional approaches based on... For this purpose, a comparative simulation of three different calibration strategies was performed. 30 The three calibration strategies compared are: (i) uncalibrated strategy, DAC (100) transfer It operates on the assumption that the function is linear and that there is no loss or deviation in the signal path. and calculates the DAC (100) code for the desired rotation angle in linear proportion; (ii) component-based calibration The strategy assumes that the DAC (100) transfer function is known nominally (e.g. at room temperature). (or characterized by an auxiliary reference) but signal path attenuation and qubit coupling (iii) is unaware of the incompatibility of the end-to-end calibration strategy of the present invention By measuring the true response of the qubit (104) with the amplitude Rabi scan according to the method, all in the chain It characterizes the deteriorations together. In the simulation, the signal path between the DAC (100) and the qubit (104) is 5 with two independent distortion sources. (i) attenuation factor (α, 0 to 1) representing cryogenic cable and link losses is modeled. between; (ii) qubit-DAC coupling deviating from the design value, where α = 1 represents the lossless condition. The coupling mismatch factor (g / gnom; 1.0 represents the nominal value) represents the strength of the coupling. These two Parameters include assembly geometry, cable lengths, and cooling cycles in real cryogenic systems. It carries uncertainty due to the variability between them. In the three panels in FIGURE 7, both parameters are 10 The effect on calibration accuracy is compared for three different strategies. This is the same across all panels. Line styles used: (i) uncalibrated strategy, with blank square dashed line; (ii) component-based (iii) calibration strategy, with a dashed-dotted line with an empty circle; (iii) end-to-end calibration strategy, with a solid tile It is indicated by a marked solid line. FIGURE 7(a) shows the error rate of the π / 2 gate as a function of the signal path attenuation factor (α, horizontal axis) (1-15 F, vertical axis, shows the change in logarithmic scale. End-to-end calibration (iii), attenuation. The factor maintains a consistently low error rate across the entire range from 0.70 to 1.00. Component-based (ii) and uncalibrated (i) strategies deteriorate significantly with increasing weakening. This result, Even if the component-based approach knows the DAC (100) transfer function, the unknown in the signal path It shows that it cannot compensate for the attenuation. End-to-end calibration shows that the actual response of the qubit (104) is 20 Since it is measured, the attenuation is automatically included in the calibration transfer function. FIGURE 7(b), π / 2 gate error due to qubit-DAC coupling mismatch (g / gnom, horizontal axis). It shows the change in the ratio. As the coupling factor deviates from the nominal value, component-based (ii) and uncalibrated (i) strategies deteriorate significantly, while end-to-end calibration (iii) all couplings It maintains a low error rate in its values. This result shows that end-to-end calibration is cubit (104) 25 This also shows that it is resilient against uncertainties in its parameters. FIGURE 7(c) illustrates the advantage (iii) of end-to-end calibration over (ii) component-based calibration. It is a contour diagram that shows the three-dimensional parameter space. The horizontal axis represents the attenuation factor (α), The vertical axis represents the coupling mismatch factor (g / gnom). Contour lines are component-based. 30 that keeps the ratio of the calibration error rate to the end-to-end calibration error rate ((1-F)ii / (1-F)iii) constant These are curves; the numerical label on each contour line indicates the value of this ratio. Straight, thick lines represent 100. The dashed lines represent the 50, 500, and 2000 levels, and the dotted line represents the 10 level. The plus (+) sign indicates the nominal operating point (α = 1.0, g / gnom = 1.0). The point closest to the nominal point... The contour lines around it are sparse and of low value; this situation indicates that the component has minimal chain disruption. This shows that the base calibration also exhibits acceptable performance. 35 from the nominal point. As we move away, the contour values ​​increase rapidly and exceed 2000; this indicates weakening and adhesion. When discrepancies increase together, the advantage provided by end-to-end calibration is more than three orders of magnitude greater. This shows that it has grown. This result indicates that end-to-end calibration is particularly important when dealing with multiple sources of degradation simultaneously. This reveals that it is of critical importance under realistic cryogenic conditions. These comparative results reveal the fundamental weakness of the component-based approach: DAC (100) and qubit 5 Attenuation, impedance mismatches and coupling occurring in the signal path between (104) Cross-effects, such as incompatibilities, cannot be compensated for when the components are characterized separately. These cross-reactions affect assembly geometry, cable lengths, and manufacturing tolerances in cryogenic environments. It varies depending on the environment and may differ in each cooling cycle. End-to-end calibration. Since it uses the quantum mechanical response of the qubit (104) as a direct reference, all 10 in the chain It automatically detects sources of distortion within the calibration transfer function. Comparative Verification of DAC Operating Modes Referring to FIGURE 8, the end-to-end calibration of the two DAC (100) operating modes described above. Its behavior was compared using numerical simulation. In the simulation, the 8-bit behavior characterized by JoSIM was used. A (256 channel) superconducting DAC (100) and a 3-level transmon qubit (104) model were used. Both 15 A full 256-code amplitude Rabi scan was performed for the mod. FIGURE 8(a), pulse in first operating mode (single-code, 4th order Bessel low-pass filter). (shaping) π rotation at the calibration point ideal (linear DAC) and real (nonlinear) Compares waveforms (DAC). The horizontal axis represents time (t, ns), and the vertical axis represents normalized amplitude (I / Imax). It is given as follows: A solid line represents the ideal linear DAC output, and a dashed line represents the 20-bit JoSIM output. The nonlinear DAC (100) represents the output. The vertical dotted lines represent the start and end of the gate pulse. It marks the end times. The double-sided arrow (ΔA) at the peak indicates the proportionality between the two waveforms. It shows the amplitude difference. The difference between the two waveforms is only a proportional amplitude offset, not the pulse shape. It is not damaged. This situation is not due to the nonlinearity of the DAC (100) in single-code mode, but rather to the pulse shape. It confirms that it only affects the amplitude. End-to-end calibration, the correct rotation angle from the Rabi curve is 25 By identifying the code that provides this error, it completely compensates for this proportional error. FIGURE 8(b), π rotation calibration in second operating mode (envelope synthesis, Gaussian waveform). It compares the ideal and real waveforms at the point. The same line styles as in Panel (a) are used: The solid line represents the ideal, the dashed line represents the actual DAC (100) output. In this mode, each clock sample is different. Since it corresponds to the DAC (100) code and each code has its own unique INL error, wave 30 Inter-sample distortion is observed in the form. End-to-end calibration, accurate total rotation. It determines the vertex code that provides the angle; however, it cannot correct the distortion in individual examples, because Rabi measurement only measures the total rotation result (integral of the impact area), not the individual sample. It does not separate their amplitudes. FIGURE 8(c) shows the end-to-end calibrated and uncalibrated gate failure rates for both modes in five different configurations. It compares the rotation angle (from π / 8 to π). Horizontal axis is the target rotation angle (θ), vertical axis is the error rate. It is given on a logarithmic scale as (1-F). There are four columns for each angle of rotation (from left to right): slash hatch ( / / / ) column first operating mode uncalibrated, cross hatch (xxx) column first Operating mode E2E calibrated, reverse slash scan (\\\) column second operating mode uncalibrated, 5 The dot-scan (...) column represents the results in the second operating mode E2E calibrated. In both modes End-to-end calibration provides a significant improvement compared to the uncalibrated state. At the π gate. Calibrated and uncalibrated error rates are the same for both modes; because the peak of the Rabi curve The point gives the same code in both cases. The calibration advantage arises at rotation angles other than π. It emerges. The first operating mode (single-code) transitions to the second operating mode (envelope synthesis) at some intermediate angles. 10 The higher error rate compared to single-code is due to the coarser angular resolution. In this mode, an integer code change corresponds to a larger angular step, while in envelope synthesis... In this mode, the unit change in the peak code provides a finer angular differentiation across the pulse area. FIGURE 8(d) shows the remaining amplitude error per sample in both modes after end-to-end calibration. It compares the two. The horizontal axis represents the time within the gate interval (t, ns), and the vertical axis represents the amplitude error (ε). is given. The straight line represents the error per sample (εB(t)) of the second mode of operation; this error is the error of the envelope. It displays a diffuse pattern reflecting the INL profile. The dashed horizontal line indicates the fixed first operating mode. It represents the proportional error (εA). In both modes, the total rotation angle is obtained correctly; The remaining error is a residual that affects waveform integrity, not limiting gate accuracy. Multi-Bit Depth Comparative Validation 20 Referring to FIGURE 9, the performance of the end-to-end calibration approach depends on the DAC (100) resolution, Three different bit depths (6-bit, 8-bit, 10-bit) characterized by JoSIM circuit simulation. They were compared. A full code scan was performed for all three DAC (100) instances in both operating modes. Amplitude Rabi calibration has been performed. All panels have three bit depth with the following line styles. It is shown as: N=6 dashed line and open square marker, N=8 solid line and solid circle marker, 25 N=10 dotted dashed lines and open diamond marker. Figures 9(a) and 9(b) are for the first operating mode (single-code) and the second operating mode (envelope synthesis), respectively. Error rate (1−F, vertical axis, logarithmic) depending on the target rotation angle (θ, horizontal axis) at three bit depth. scale) shows. Higher DAC (100) resolution leads to more intensive sampling of the Rabi curve. This allows for finding code that is closer to the target rotation angle. Especially for small rotations 30 With angles (π / 8, π / 4), 10-bit resolution has a significantly lower error rate compared to 6-bit and 8-bit. It provides. FIGURE 9(c) shows the error rates (1−F, vertical axis, logarithmic) for all bit depths and operating modes. (scale) compares as a bar graph. Each angle group has six bars from left to right: 6-bit. Mode A (scan oblique), 6-bit Mode B (backscan oblique), 8-bit Mode A (crossscan xxx), 8-bit Mode 35 B (dot scan ...), 10-bit Mod A (plus scan+++), 10-bit Mod B (black fill). This panel has two basic modes. The finding reveals: firstly, the higher DAC (100) resolution is achieved through end-to-end calibration. firstly, it consistently improved its accuracy; secondly, the envelope synthesis mode was single-code at the same bit depth. It has been observed that it provides a finer angular resolution depending on the mode. FIGURE 9(d), the penetration rate to the |2⟩ state (P(|2⟩), vertical axis, logarithmic scale) DAC (100) bit 5 It presents curves that show it is independent of depth. Mode A curves (top labeled A) (cluster) panel (a) with the same line styles and filled markers; Mod B curves (labeled as B) (subset) is shown with dotted lines and open markers. Leakage, all bit depths and operation The error budget remains negligible for the modes (in the range of 10-8 to 10-13). This result indicates a positive impact on the error budget. The dominant source is not leakage, but rotation angle error caused by DAC (100) code quantization. truths. Verification of Third Operating Mode (Quadrature Correction) The numerical simulation chain described above utilizes the third operating mode (single-code with quadrature correction). (mode) was also used to verify the two-stage calibration. In this simulation, the first In the first stage, after the I channel amplitude is calibrated with amplitude Rabi scan, in the second stage the Q channel amplitude is 15 The leakage rate of the qubit to the second excited state for each Q value was systematically scanned (104). P(|2⟩) and gate accuracy were measured. Parameters used in the simulation: 8-bit (256 channel) JoSIM DAC (100) (maximum INL = 16.1 LSB), RC differentiation circuit time constant τ = 0.53 ns (3 dB cutoff frequency f3dB = 1 / (2πτ) ≈ 300 MHz), 4th order NbN superconducting LC Bessel low-pass filter (cutoff Frequency 30 MHz, parasitic model (including IDC finger inductance and inductor parasitic capacitance), 20 Transmon anharmonicity α = -350 MHz, coupling strength g = 35 MHz, gate time 40 ns, and DAC clock. Its frequency is 20 GHz. Referring to FIGURE 10(a), the βeff scan revealed two different optima. The penetration optimum is βeff ≈ 1.38 It occurs at a value of 9.59 × 10-9, and at this point, P(|2⟩) = 9.59 × 10-9, with the DRAG uncorrected case (P(|2⟩)). A 5.1-fold improvement was achieved based on (= 4.93 × 10-8). The optimum accuracy is at a value of βeff ≈ 0.50, i.e., 25 This occurs at the point β ≈ 0.5, as predicted by standard DRAG theory, and at this point the gate is broken. Its accuracy reaches its highest value with F = 0.999995. Ideal DRAG with digital AWG. When applied, the phase optimum and the infiltration optimum are found at different β values ​​(β ≈ 0.5 and β ≈ 0.5, respectively). It is known that the leakage optimum in passive analog hardware is βeff ≈ 1.38

[31] . The drift includes an additional 38% deviation relative to the digital state; this additional deviation is in band 30 of the RC differentiator circuit. The combination of limited approximation, Bessel-Gauss envelope mismatch and DAC (100) nonlinearity. This is the effect. The magnitude of this shift is different in each signal chain; therefore, the optimal βeff value... It should be determined by end-to-end calibration, not theoretical calculation. FIGURE 10(b) shows this binary optimum structure in the infiltration-infidelity Pareto space. DRAG The uncorrected reference point (diamond) performs poorly in both metrics. Accuracy optimum. (squared, βeff ≈ 0.50), provides near-perfect door accuracy while reducing infiltration by 1.9 times. Infiltration The optimum (circle, βeff ≈ 1.38) reduces leakage by 5.1 times but reduces gate infidelity to 4.30 × 10⁻⁴. It enhances. In the context of quantum error correction, the |2⟩ state is infiltrated by surface codes 5. While |0⟩-|1⟩ rotation errors are uncorrectable, they are correctable. Therefore, the error correction threshold is reached. In closely working systems, the calibration engine (108) can choose the penetration optimum. This dual optimum structure allows end-to-end calibration to absorb analog hardware imperfections. It shows that its capacity is beyond a mere βeff proportional correction: calibration engine (108), Explore the Pareto trade-off between leakage and accuracy through the actual response of the qubit (104) and 10 It selects the operating point that is suitable for the target error budget. Simulation results are passive analog differentiation. The DRAG pulse shaping performed with the circuit is consistent with independent βeff scan results. (Leakage optimum βeff ≈ 1.37, 4.8-fold improvement). The physical mechanisms of the deviation are described above (see More). Parameterized calibration extension is explained in detail. Calibration Motor: Ramsey Fringe Measurement 15 As part of the improvement of the calibration procedure, the calibration engine (108) has been modified to control signals. To calibrate the phase sensitivity, a Ramsey fringe measurement is performed. The Ramsey array; (a) The first π / 2 on the qubit (104) using the DAC (100) input code calibrated for π / 2 rotation. (a) applying the pulse, (b) waiting for a variable delay time τ, (c) a second π / 2 It includes the application of the pulse and (d) measuring the state of the qubit (104) via the ADC (106). 20 The behavior P(|1⟩) - τ obtained by repeating the sequence for different τ values ​​(Ramsey fringes), frequency mismatch between driver signal and qubit (104) transition frequency and the associated phase errors This reveals the information obtained, which is used for calibration transfer in terms of gates requiring phase sensitivity. It can be used by the calibration engine (108) for the purpose of improving its function. Calibration Engine: ADC Threshold Optimization with ROC Analysis 25 Referring to FIGURE 3, the reading of the state of the qubit (104) is done by reading the qubit via a read signal path. It includes a read path to which it is connected to a superconducting ADC (106). The ADC (106) reads the signal. digitizes and applies threshold-based comparison through a state discrimination unit (120) of the qubit. It is determined whether it is in the |0⟩ or |1⟩ state. Another aspect of the calibration procedure is calibration. The engine (108) optimizes this separation threshold using ROC analysis. For this purpose, qubits (104) are 30 respectively. The ADC (106) output distributions are obtained for each state, prepared in the |0⟩ and |1⟩ states. The discrimination threshold is scanned across the output range of the ADC (106); correct and incorrect classification rates for each threshold. The threshold is calculated and selected that maximizes the probability of correctly distinguishing between the states |0⟩ and |1⟩. Nonlinearities in the transfer characteristic of ADC (106) are included in this threshold selection process; this Therefore, ADC (106) is not necessarily linear. For the cases |0⟩ and |1⟩ of ADC (106) It is sufficient to produce sufficiently separable output distributions. Matched on the raw ADC (106) output more advanced discrimination methods such as filters or machine learning-based classifiers applicable. 5 Determining the state of a qubit (104) requires one or more signal conditionings depending on the application. It may include steps such as I / Q demodulation, weighted integration with paired filter. This may include acquiring, IQ-based coordinate transformation, and threshold-based or statistical classification. Demodulation in readout architectures that produce direct binary output, such as the Josephson photon counter (JPM). This step could be eliminated entirely. In terms of the present invention, these signal conditioning steps are specific to 10 different factors. its configuration is not critical; end-to-end calibration transfer function, ADC (106) and characterize the entire signal chain together, including subsequent processing stages. does. In the context of Rabi oscillation calibration, the linear transfer characteristic of the superconducting ADC (106) If they are not, the Rabi frequency estimate is 15 provided that the ADC (106) transfer function is monotonic. It does not affect it. This is because the frequency information of the Rabi oscillation is encoded in temporal modulation. The output of ADC (106) is PADC(t), which is a monotonic transformation of the real population P(t). Monotonic The transformation preserves the fundamental frequency component and zero crossings of the signal; hence the Rabi frequency estimation. It is not affected. This feature also relaxes the linearity requirement for ADC (106) and the present invention 20 on both DAC (100) and ADC (106) sides contribute to its resistance to manufacturing tolerances. It is located. Calibration Memory The calibration transfer function can be stored in different formats depending on the application. A primary one... In this way, the corresponding superconducting DAC (100) digital input for each desired rotation angle θ is given. A lookup table (LUT) is used that directly stores the code; this format is the fastest at runtime. It provides access. In a second form, a parametric model (piecemeal) fitted to the measured Rabi data. polynomial or spline function) is stored and the DAC (100) code corresponding to the desired rotation angle It is calculated at runtime; this format requires less memory but introduces additional computational overhead. Each Both forms are valid within the scope of the present invention. The calibration outputs determined by the calibration engine (108) are stored in the calibration memory (102) 30 Calibration memory (102) is stored at room temperature (FPGA block RAM or host memory) or it can be accomplished using any suitable memory technology at cryogenic temperatures. Memory The choice of technology is not critical in terms of the current invention. Calibration Verification Referring to FIGURE 4, after the calibration transfer function is stored in the calibration memory (102), The calibration engine (108) can run a verification step. In the verification step, calibration A known quantum gate operation is applied using the transfer function (102) in memory and the measured The accuracy value is compared against a predetermined threshold (Fmin). If the accuracy meets this threshold... Calibration is considered complete; otherwise, the calibration sequence is repeated from the beginning. 5 Measurement types that can be used in the verification step include Rabi oscillation measurements and Ramsey fringe measurements. measurements include spectroscopy measurements and randomized benchmarking measurements. It can be obtained. In randomized benchmarking, randomly selected Clifford gate sequences are applied and A reversal gate is added that allows a return to the expected state; the measured average accuracy, the gate It is used as an estimate of the error rate per error, independent of SPAM errors. 10 Adaptive Calibration In a preferred implementation method aimed at reducing calibration time, calibration Instead of scanning all 2N DAC (100) input codes, the engine (108) applies an adaptive algorithm. In the adaptive algorithm, the next test is performed by evaluating the previously measured qubit (104) responses. The DAC (100) code to be selected is chosen. The binary search approach selects the DAC 15 corresponding to a desired rotation angle. It can enable the code (100) to be determined with a smaller number of measurements. Alternatively, the calibration engine (108) can perform a search based on Bayesian optimization. This In the approach, the change of the Rabi frequency depending on the DAC (100) input code is a Gaussian process (GP) regression. It is represented by the GP model. The GP model is based on previously measured data points, each of which is yet to be calculated. It provides an average estimate and an uncertainty estimate for the unmeasured DAC (100) code. The next test 20 The code to be developed will have an acquisition function (expected improvement) that strikes a balance between discovery and improvement. The GP model is selected using information gain or upper confidence limit after each new measurement. It is updated. Calibration is performed when the uncertainty falls below a predetermined threshold or a certain number of... The process ends when the measurement is reached. A suitable 25-bit exponential quadratic or Matérn kernel function can be used as the kernel function of the GP model. It is the initial selection; core hyperparameters, marginal likelihood after the first few measurements. It can be automatically adjusted to maximize its efficiency. Recalibration and Slippage Monitoring Calibration transfer function, temperature fluctuations, joint aging or other slow processes Due to parametric changes, it may drift over time. The present invention addresses the management of such drifts. 30 For this purpose, it provides recalibration mechanisms at different time scales. Calibration per cooling cycle (mandatory): A complete calibration scan after each thermal cycle. is executed. Limited shifts in Josephson junction parameters may occur between thermal cycles. Full Calibration scanning automatically compensates for these shifts within the end-to-end mapping. Periodic recalibration (recommended): Calibration engine (108) in long-term operation, beforehand By operating a defined door and checking the measurement result, the door accuracy is verified at specific intervals. This can be verified. When the measured accuracy falls below a predetermined threshold, the study is considered to have drifted. A targeted recalibration is triggered within a limited code range around that point. Continuous drift monitoring (advanced): In some implementation forms, the system monitors cryostat temperature. By monitoring its sensors, it recalibrates if temperature fluctuations exceed a certain threshold. It can trigger the procedure. 10 Closed-Loop Feedback During Computation In an advanced implementation form, the quantum control system (10) performs quantum computing operations. a real-time feedback that monitors the qubit (104) state measurements received via ADC (106) during the process It includes a feedback controller (116). The feedback controller (116) is the expected gate results. By observing the deviation from the behavior, it was determined that a shift occurred in the signal chain characteristics. 15 It can. When a deviation is detected, the calibrated digital input codes are updated in real time. The feedback controller can operate at different delay scales depending on the application. A first one In this implementation model, gate results are evaluated after each quantum computing cycle. (approximately 1-10 μs delay). In a second implementation mode, over a specific number of cycles. A statistical drift indicator is calculated (on a millisecond scale). As a feedback law, the measured 20 Proportional-integral (PI) control based on the amount of deviation can be applied. Correction amount, calibration. It is limited by the resolution of the transfer function (102) in its memory; a shift beyond this limit is detected. When this happens, the periodic recalibration mechanism is triggered. Multiqubit Scaling Referring to FIGURE 5, the calibration approach of the present invention is applicable to multiqubit systems. Each 25 The calibration transfer function corresponding to each qubit and each signal chain is determined separately, and It is stored. Three scaling architectures are envisioned: Dedicated DAC per qubit: Each qubit has its own individually calibrated dedicated superconductor. It has a DAC. For N qubits, N separate DACs (100) and N separate calibration transfer functions are required. This The architecture ensures maximum parallelism. 30 DAC shared with time division multiplexing: A DAC (100), an analog switch or multiplexer It serves M qubits via. The calibration transfer function is separate for each qubit-DAC pair. The total number of DACs is reduced by a factor of M, but the parallelism of qubit operations is limited. Multiplexer (114) in tree topology of thermally controlled superconducting transmission line switches This can be achieved by combining them. In this structure, a specific segment of a superconducting transmission line is combined. High attenuation when the region is returned to normal via a local heater, superconducting. When maintained in this state, low-loss transmission is achieved. Alternatively, Mach-Zehnder interferometer (MZI) based switching structures can be used; in this structure, the kinetic energy in one arm of the waveguide is 5 Constructive or destructive interference is obtained by thermally changing the inductance and is programmable. attenuation is provided. The multiplexer (114) operates in time division multiplexing mode, using a single DAC (100) It redirects to different qubits in sequence (104). Shared calibration engine: A single calibration engine (108) sequentially controls the entire N signal chain. or it operates in time-division mode. A calibration engine provides 10 cubits per second in a full scan. At this level, calibration can be performed in a shorter time using adaptive methods. Cross-calibration is used to further reduce calibration time in multiqubit systems. This approach is applicable. In this approach, the calibration transfer determined for a first signal chain is used. The function starts with the calibration of a second chain with a similar hardware configuration. It is used as an estimate. The effectiveness of cross-calibration depends on the hardware similarity between the two chains. It is connected and the highest transfer efficiency is expected on DAC (100) chips manufactured on the same wafer. Hierarchical calibration. The calibration process can be performed in a three-stage hierarchical structure. In the first stage (component-level calibration), the transfer characteristic of the superconducting DAC (100) It is characterized independently; at this stage, known digital input codes are applied to the DAC and the output is... The amplitude of the DAC can be approximately 20 by measuring it through a reference measuring device or a known load impedance. Input-output curve is obtained. In the second stage (qubit-level calibration), the basic (104) of the qubit is obtained. parameters (transition frequency, anharmonicity, T1 relaxation time, T2 decoherence time) of a superconductor These parameters are determined by spectroscopy and relaxation measurements carried out via ADC (106). System-level calibration is used to narrow the search range. In the third stage (system (level calibration), the end-to-end calibration procedure described in Claim 1 is applied; however, the search, 25 A narrowed-down digital entry code is used, based on initial estimates from the first and second stages. This is performed within the range. This hierarchical approach reduces calibration time compared to full range scanning. It shortens it significantly. Superconducting Logic Families The calibration, scaling, and closed-loop feedback arrangements described above apply to a specific 30 It is not limited to the superconducting digital logic family. DAC (100) and ADC (106) are Josephson junctions. It can be implemented using any family of superconducting logic based on; these include Fast Single Flux. Quantum Flux Parameter (RSFQ), Energy Efficient RSFQ (ERSFQ / eSFQ), Adiabatic Quantum Flux Parameter (AQFP) and Reciprocal Quantum Logic (RQL) are included. The calibration methodology is based on the selected superconductor. It operates independently of the logic family. 35 Cryogenic CMOS and Other DAC Architectures The end-to-end calibration method described above is not specific to SQUID-array superconducting DACs. And it is also applicable to other DAC architectures operating in cryogenic environments. Cryogenic CMOS DACs (for example, Intel Horse Ridge II or similar cryogenic integrated circuits), MOSFET mismatch errors and Due to temperature-dependent threshold voltage shifts, a linear 5 differs from the room temperature characteristics. It exhibits a profile of not being present. End-to-end calibration, regardless of the DAC architecture, optimizes the signal chain. Since it is characterized as a unified input-output system, these different nonlinearity mechanisms It absorbs the same qubit response using a referenced procedure. Similarly, pulse-counting based DACs (e.g., structures that generate amplitude with SFQ pulse sequences), Alternative cryogenic 10 such as delta-sigma DACs or cryogenic SiGe BiCMOS-based converters Converter architectures can also be calibrated as part of end-to-end calibration. Each of these architectures... In one case, the DAC transfer function is affected by different physical mechanisms (quantization noise, element (mismatch, thermal drift) deviates from the ideal; calibration transfer function, internal structure of the DAC It automatically detects these deviations from the qubit response without requiring a related model. In general, this forms the technical basis for the broad scope of cryogenic DAC specified in Claim 34. 15 HOW THE INVENTION WAS APPLIED TO INDUSTRY The current invention is used in quantum computing systems that utilize superconducting qubits. It is directly applicable. The calibration method can be used with any family of logic based on Josephson connectives. Signal containing superconducting DAC (100) and ADC (106) implemented (RSFQ, ERSFQ, AQFP, RQL). It operates in the chains. The system can be used in existing dilution cooler infrastructures without requiring additional equipment. can be established; the calibration engine (108) can be implemented with standard digital logic circuits. The end-to-end calibration approach helps to relax the DAC (100) and ADC (106) manufacturing tolerances. Because it enables this, it contributes to reducing the production cost of superconducting converters. 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[33] C. Jordan, J. Bernhardt, J. Rahamim, A. Kirichenko, K. Bharadwaj, L. Fry-Bouriaux, A. Somoroff, K. Porsch, K.-T. Tsai, J. Walter, A. Weis, M.-J. Yu, M. Renzullo, J. Javelle, C. Checkley, O. Mukhanov, D. Yohannes, I. Vernik ve S.-J. Han, "A quantum computer controlled by superconducting digital electronics at millikelvin temperature," Nature Electronics, 2026. DOI: 10.1038 / s41928-026-01576-6 30

Claims

REQUESTS 1. An amplitude-based SQUID-array superconducting digital-to-analog converter (DAC) (100) is very A number of DC SQUID cells produce analog output, primarily and cumulatively, and the SQUID cells The critical current propagation of Josephson junctions leads to integral nonlinearity (INL) at the full-scale output. a superconducting circuit containing at least one quantum bit (qubit) (104) and Josephson junction based circuits. Analog-to-digital converter (ADC) (106) and superconducting DAC (100), qubit (104) and ADC (106) is positioned in the cryogenic temperature stage of a cryogenic cooling device. It is a method for calibrating and operating an end-to-end signal chain, characterized by: - Implementation of numerous digital input codes to superconducting DAC (100), - for each of the numerous digital input codes, the quantum mechanical response of at least one qubit (104) is 10 Measurement via superconducting ADC (106); where a calibration reference is an external without requiring a sensitive voltage source or frequency synthesizer, directly to the qubit (104) that it was obtained from measured quantum state transitions, - Based on measured quantum mechanical responses, the desired qubit rotation angles can be determined in a superconductor. A calibration transfer 15 that maps the DAC (100) to the corresponding digital input codes. Determination of the function; here, the calibration transfer function of the superconducting DAC. from the output (100) to the superconducting ADC (106) reading through at least one qubit (104). the end-to-end signal chain, the transfer of the individual components that make up the signal chain. characterizes it as a unified input-output system without specifying its individual characteristics. doing, 20 - storing the calibration transfer function in a calibration memory (102), - the corresponding quantum gate operation for a desired quantum gate operation using the calibration transfer function Determining the digital input code and applying this code to the superconducting DAC (100) to the qubit (104) Performing quantum gate operation on It includes the steps. 25 2. It is a method according to claim 1, and its characteristic is; - measuring the quantum mechanical response using a fixed-time and variable-amplitude Rabi scan. It includes; here, a fixed door duration Tdoor is selected, each of the numerous digital entry codes. For the qubit (104) to be reset to the ground state, the corresponding analog driving signal is fixed along the gate T. application and excited state population P(|1⟩) 30 via superconducting ADC (106). measurement of the calibration transfer function; the measured P(|1⟩) values ​​of the target rotation The DAC (100) input codes satisfying the condition P(|1⟩) = sin²(θ / 2) corresponding to the angle are directly It is obtained by determining...

3. It is a method according to claim 2, and its characteristic is; - statistical uncertainty of the excited state population P(|1⟩) for each digital input code Zeroing of the qubit (104) to reduce, application of the driving signal and measurement It is determined by repeating the steps M times.

4. It is a method according to claim 1, and its characteristic is; - Measuring the quantum mechanical response using a Rabi scan with constant amplitude and variable duration 5 including; where the qubit (104) is reset to the base state for each digital input code, the relevant Implementation of analog driving signal over variable gate times and superconducting ADC Measurement of the excited state population P(|1⟩) via (106); measured P(|1⟩)-Tgate time By fitting a sinusoidal model to the series, the Rabi frequency Ω(n) is determined for each digital input code. Calibration by extraction; and by parametric inversion of the extracted Ω(n)-n mapping 10 The transfer function must be defined.

5. It is a method according to claim 1, and its characteristic is; - also includes a Ramsey fringe measurement to improve phase calibration; where a calibrated digital input code obtained from the calibration transfer function Applying a first π / 2 rotation pulse to the qubit (104) using a variable delay 15 waiting for a period of τ, applying a second rotational pulse π / 2 to the qubit (104), driving To determine the frequency mismatch between the signal and the transition frequency of the qubit (104), The number of delay times τ for each of the qubit (104) state of the superconducting ADC (106) calibration transfer based on measurement and determined frequency misalignment. The improvement of its function is the key. 20 6. It is a method according to claim 4, and its characteristic is; - The derived Rabi frequency mapping Ω(n) is θtarget = for the target rotation angle θtarget. The inversion of the Ω(n)·T gate condition by parametrically specifying the input code n that satisfies the gate condition; Here, this parametric inversion shows the nonlinear transfer of the superconducting DAC (100). Its characteristic is that it naturally absorbs the linearity without requiring a separate linearity correction. 25 7. It is a method according to claim 1, and its characteristic is; - operation of superconducting ADC (106) without applying linearity correction and qubit (104) state separation, threshold-based comparison of superconducting ADC (106) output values end-to-end calibration, where monotonic transfer of the superconducting ADC (106) The nonlinearities in the function are absorbed within the calibration transfer function. It is the act of doing.

8. It is a method according to claim 1, and its characteristic is; - also involves optimizing a separation threshold of the superconducting ADC (106); where Preparation of the qubit (104) in the ground state and a first output from the superconducting ADC (106) Measurement of the distribution of values, preparation of the qubit (104) in the excited state and superconductor Measuring a second output values ​​distribution from the ADC (106) can determine the candidate discrimination thresholds. Scanning of the output range of the superconducting ADC (106) and a receiver operating characteristic 5 Probability of correctly distinguishing between the ground state and the excited state based on (ROC) analysis. The maximizing discrimination threshold is selected and stored in the calibration memory (102).

9. It is a method according to claim 1, and its characteristic is; - from the critical current variability of Josephson junctions of superconducting DAC (100) resulting in an integral nonlinearity (INL) exceeding 5% of the full-scale output. that; and the calibration transfer function of the superconducting DAC (100) is nonlinear. It compensated for the transfer characteristic within end-to-end mapping without requiring redesign. It is the fact that.

10. It is a method according to claim 1, and its characteristic is; - Determining the calibration transfer function of the superconducting DAC (100) all digital 15 Instead of scanning input codes, the test relies on previously measured quantum mechanical responses. It should include an adaptive algorithm that selects each successive digital input code to be entered; the adaptive algorithm, a binary search approach and a Bayesian optimization It must include at least one of these approaches.

11. It is a method according to claim 10, and its characteristic is; 20 - The Bayesian optimization approach uses at least quadratic exponential and Matérn kernel functions. It includes a regression model using a Gaussian process (GP); the Gaussian process model is more For each DAC (100) input code that has not yet been measured from the previously measured data points, one To provide an average estimate and an uncertainty estimate; and the next DAC (100) to be tested The choice of entry code reduces the expected recovery (EI), upper confidence threshold (UCB), and information gain by 25%. It is determined by an acquisition function selected from the resulting group.

12. It is a method according to claim 1, and its characteristic is; - involves performing the calibration in a hierarchical structure; where the superconducting DAC (100) component of the transfer characteristic is characterized in order to obtain an initial estimate. Calibration at level 30 of the qubit (104) parameters via superconducting ADC (106) Calibration at the qubit level was determined by spectroscopy and relaxation measurements. The end-to-end signal chain is combined using the quantum mechanical response of the qubit (104). It has system-level calibration stages where the component is calibrated; Searching for system-level calibration, including calibrations at the level and qubit level. It provides initial estimates that narrow the range.

13. It is a method according to Claim 1, and its characteristic is; - The quantum control system (10) is heated to room temperature and then returned to cryogenic temperatures. After each thermal cycle in which it is cooled, the calibration transfer function is reset to 5. This involves conducting a complete calibration scan to determine the cause; whereby again The determined calibration transfer function is a Josephson junction dependent on the thermal cycle. It automatically detects parameter drifts within end-to-end mapping.

14. It is a method according to claim 13, and its characteristic is; - a predefined quantum gate 10 using the stored calibration transfer function the process is run periodically and the resulting gate accuracy is measured using a superconducting ADC. (106) involves measuring the measured gate accuracy through a predetermined threshold Upon falling below the value, a limited digital entry code close to the current operating point. This involves triggering a targeted recalibration within the specified range.

15. It is a method according to claim 14, and its characteristic is; 15 - After the calibration transfer function is defined, the stored calibration transfer function using at least one validation gate operation, the validation gate operation gate the accuracy of the gate is measured via a superconducting ADC (106) and the measured gate accuracy If it fails to meet a predetermined minimum accuracy threshold, calibration transfer will occur. It involves triggering the redefinition of its function. 20 16. It is a method according to claim 14, and its characteristic is; - monitoring of the temperature sensors of the cryogenic cooling device and the location of the qubit (104). the temperature fluctuation in the temperature phase exceeding a predetermined slip threshold This includes automatically triggering the recalibration procedure in that case.

17. It is a method according to claim 1, and its characteristic is; 25 - characteristics of the end-to-end signal chain during quantum computing operations It includes real-time compensation of shifts; which is achieved through a superconducting ADC (106). Monitoring the state measurements of at least one qubit (104) obtained, quantum gate results by evaluating the deviation of the signal chain from the expected behavior 30 Real-time calibrated digital input codes stored in calibration memory (102) It has been updated accordingly.

18. It is a method according to Claim 1, and its characteristic is; - calibration transfer function, signal between superconducting DAC (100) and qubit (104) Signal attenuation along the path, impedance mismatches, qubit-specific coupling. signal including inconsistencies and passive analog pulse shaping circuit approximations end-to-end mapping without requiring the characterization of individual components to detect their malfunctions 5 It captures them together; here, even when signal chain gain bias is present, it is at the end. The purpose of end calibration is to ensure the targeted gate accuracy.

19. It is a method according to Claim 1, and its characteristic is; - The superconducting DAC (100) has a single weighted configuration, each digital input code The increase corresponds to a monotonic increase in the output of the superconducting DAC (100) and calibration 10 each of the transfer functions on the transfer characteristic of the monotonic superconducting DAC (100) This means that a unique digital input code is defined to correspond to a target rotation angle.

20. It is a method according to Claim 1, and its characteristic is; - In a quantum control system (10) containing numerous signal chains, the first signal chain A second 15 with similar component characteristics to the calibration transfer function determined for the transmission of the first estimate to the signal chain and the calibration of the second signal chain starting from the initial estimate given, the search should be carried out within a narrower range. It includes.

21. It is a method according to Claim 1, and its characteristic is; - storing the calibration transfer function in the calibration memory (102), a search 20 Direct mapping or superconducting DAC (100) input codes in qubit table (LUT) format (104) It must include at least one of the parametric model formats that relate to rotation angles.

22. It is a method according to Claim 1, and its characteristic is; - The quantum control system contains (10) N signal chains; each signal chain has its own It includes a superconducting DAC (100), a corresponding qubit (104) and a corresponding superconducting ADC (106); 25 Determining an individual calibration transfer function for each of the N signal chains. and includes storing each of them in the respective calibration memory (102); where N signals The calibration of the chain can be done sequentially or multi-sequentially with a shared calibration engine (108). The reason is that it was carried out in parallel with a number of calibration engines (108).

23. It is a method according to Claim 1, and its characteristic is; 30 - involves operating the superconducting DAC (100) in a first operating mode; first operating mode in this mode, a single digital input code is applied during the gate time and a superconducting DAC is used. (100) output is a passive analog located on the signal path between DAC (100) and qubit (104). by low-pass filter (112) and optional additional pulse shaping components shaping; in this mode the nonlinearity of the superconducting DAC (100) is only one This leads to proportional amplitude error and does not distort the pulse shape; end-to-end calibration. This proportional error is compensated by determining the single DAC (100) input code that provides the correct rotation angle. that he has done so.

24. It is a method according to Claim 1, and its characteristic is; - involves operating the superconducting DAC (100) in a second operating mode; second operating mode In this mode, the DAC (100) applies a different digital input code in each clock cycle to the desired Synthesizing the pulse envelope; in this mode each clock sample corresponds to a different DAC (100) code 10 Due to the nonlinearity of DAC (100) in the shape of the pulse envelope, the examples are inter-examples. creating distortion; the peak that provides the correct total rotation angle of end-to-end calibration. It is about determining the code.

25. A superconducting digital-to-analog converter (DAC) (100) has at least one quantum bit (qubit) (104), a superconducting analog-to-digital converter (ADC) (106), a calibration memory (102) and a 15 Cryogenic cooling of the calibration engine (108); DAC (100), qubit (104) and ADC (106). a quantum control system in which the device is positioned at the cryogenic temperature stage (10) Its characteristic is; - superconducting DAC (100) takes the digital input codes and drives the corresponding analog. It is structured to generate signals, 20 - to digitize a read signal from at least one qubit (104) of a superconducting ADC (106). the fact that it is structured in such a way, - calibration engine (108), numerous digital input codes to superconducting DAC (100) by applying the quantum mechanical response of at least one qubit (104) for each digital input code. Measuring via superconducting ADC (106), the desired qubit 25 based on the measured responses To define a calibration transfer function that maps the operations to the DAC (100) input codes and is configured to store in calibration memory (102), - calibration transfer function from the output of superconducting DAC (100) through the signal path end-to-end signal from at least one qubit (104) to the superconducting ADC (106) readout. the chain, including individual components 30, such as attenuation and impedance mismatches in the signal path. as a combined input-output system without specifying the transfer characteristics separately a matching that characterizes, - using the calibration transfer function of the calibration engine (108) the desired quantum By determining the corresponding digital entry codes for gate operations, the superconducting DAC (100) It is structured to be implemented, 35 - a calibration reference, an external high-precision voltage source, or a frequency synthesizer without requiring, directly obtained from the measured quantum state transitions of at least one qubit (104). having been done It includes.

26. It is a system according to claim 25, and its characteristic is; 5 - each with a corresponding superconducting DAC (100), a corresponding qubit (104) and a corresponding superconducting ADC (106) has a large number of signal chains containing; where calibration memory (102) each It is the storage of an individual calibration transfer function for a signal chain.

27. It is a system according to claim 26, and its characteristic is; - a single calibration engine (108) is shared among numerous signal chains and 10 to calibrate each signal chain sequentially or in time-division multiplexing It is structured.

28. It is a system according to claim 25, and its characteristic is; - superconducting DAC (100) to many qubits (104) via time division multiplexing having a multiplexer (114) configured to connect; where calibration 15 its memory (102), formed by a superconducting DAC (100) and numerous qubits (104) each It stores a corresponding calibration transfer function for each pair.

29. It is a system according to claim 25, and its characteristic is; - superconducting DAC (100) and superconducting ADC (106), fast single flux quantum (RSFQ) The logic is energy-efficient fast single-flux quantum (ERSFQ) logic, adiabatic quantum flux 20 from the group consisting of the parameter quantum logic (AQFP) and the mutual quantum logic (RQL) The selected one is implemented using a Josephson junction-based superconducting logic family. It is the fact that.

30. It is a system according to claim 25, and its characteristic is; - communication of the calibration memory (102) with the superconducting DAC (100) via a digital interface 25 establishing a room temperature memory or cryogenic temperature stage or near it. It is the possession of at least one implanted cryogenic memory.

31. It is a system according to claim 25, and its characteristic is; - during quantum computing operations, superconducting ADC from (106) qubit (104) states to monitor measurements and compensate for shifts in the characteristics of the end-to-end signal chain 30 a real-time configured to adjust calibrated digital input codes It has a feedback controller (116).

32. A superconducting digital-to-analog converter (DAC) (100) has at least one quantum bit (qubit) (104) and containing a superconducting analog-to-digital converter (ADC) (106) and DAC (100), qubit (104) and ADC (106) is positioned in the cryogenic temperature stage of a cryogenic cooling device. a method for the calibration and operation of an end-to-end signal chain, at least one a non-volatile computer that stores instructions executed when run by the processor It is a readable medium, and its characteristic is; - Implementation of numerous digital input codes to superconducting DAC (100), - for each of the numerous digital input codes, the quantum mechanical response of at least one qubit (104) is 10 Measurement via superconducting ADC (106); where a calibration reference is an external without requiring a sensitive voltage source or frequency synthesizer, directly to the qubit (104) that it was obtained from measured quantum state transitions, - Based on measured quantum mechanical responses, the desired qubit rotation angles can be determined in a superconductor. A calibration transfer 15 that maps the DAC (100) to the corresponding digital input codes. determining the function; here, the end-to-end signal calibration transfer function. a chain with a combined input without separately specifying the transfer characteristics of the individual components. characterizing it as an output system, - storing the calibration transfer function in a calibration memory (102), - the corresponding 20 for a desired quantum gate operation using the calibration transfer function. Determining the digital input code and applying this code to the superconducting DAC (100) to the qubit (104) Performing quantum gate operation on It includes the steps.

33. It is a method according to Claim 1, and its characteristic is; - at least one qubit (104) must be a superconducting transmon type qubit. 25 34. A digital-to-analog converter (DAC) (100) operating in a cryogenic environment, at least one quantum bit an analog-to-digital converter for measuring the quantum state of (qubit) (104) and qubit (104). A cryogenic cooling device containing (ADC) (106) and DAC (100), qubit (104) and ADC (106). Calibration of an end-to-end signal chain positioned at the cryogenic temperature stage and a method for its operation, its characteristic is; 30 - Applying numerous digital input codes to the DAC (100), - for each of the numerous digital input codes, the quantum mechanical response of at least one qubit (104) Measurement via ADC (106); where a calibration reference, an external precision voltage without requiring a source or frequency synthesizer, the measured quantum of the qubit (104) directly derived from state transitions, - Based on the measured quantum mechanical responses, the desired qubit rotation angles of the DAC (100) a calibration transfer function that maps to corresponding digital input codes determination; here the calibration transfer function is at least one qubit 5 from the output of DAC (100). end-to-end signal chain from (104) to ADC (106) reading, signal chain without separately determining the transfer characteristics of the individual components that make it up characterizing it as an input-output system, - storing the calibration transfer function in a calibration memory (102), - the corresponding 10 for a desired quantum gate operation using the calibration transfer function. Determining the digital input code and applying this code to the DAC (100) and on the qubit (104) execution of quantum gate operation It includes the steps.

35. It is a method according to claim 34, and its characteristic is; - DAC (100) is a superconducting DAC containing Josephson junction-based circuits and 15 The ADC (106) is a superconducting ADC containing Josephson junction-based circuits.

36. It is a method according to claim 35, and its characteristic is; - superconducting DAC (100), numerous DC SQUID cells weighted and aggregated. It is an amplitude-based SQUID-array DAC that produces analog output and in the SQUID cells The integral linear 20 at the full-scale output of the critical current spread of Josephson junctions. This leads to non-existence (INL).

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