Graphene Suspension Coated Printed Circuit Board and Its Manufacturing Method

TR202612727A2Pending Publication Date: 2026-08-21GRAPHENE ENHANCED CONDUCTİVE SOLUTİONS ARGE & TEKNOLOJİ ANONİM ŞİRKETİ
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
TR202612727
Authority / Receiving Office
TR · TR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2026-07-29
Publication Date
2026-08-21

Smart Images

  • Figure 00000015_0000
    Figure 00000015_0000
  • Figure 00000016_0000
    Figure 00000016_0000
  • Figure 00000017_0000
    Figure 00000017_0000
Patent Text Reader

Abstract

The invention is a printed circuit board containing at least one electrically insulating carrier layer (3) and a copper or copper alloy layer (2) formed on the said insulating carrier layer (3) to form at least one solder zone (5) with multiple electrically insulated copper circuit paths (6) and other electrically isolated copper paths; - The presence of a graphene coating (1) containing reduced graphene oxide (rGO) particles on at least one surface of the copper or copper alloy layer (2) facing outwards from the insulating carrier layer (3), - The graphene coating in question (1) was formed by electrophoretic deposition using a graphene suspension containing 5 to 15 mg of reduced graphene oxide (rGO) and 0.2 to 3 mg of magnesium salt in every 100 ml of the liquid phase, which consists of 70 to 95% isopropyl alcohol and 5 to 30% pure water, with a total volume of 100%, and - It is characterized by containing at least one solder mask layer positioned on the graphene coating (1) such that the solder sites (5) are exposed. SUMMARY Graphene Suspension Coated Printed Circuit Board and Its Manufacturing Method The invention is a printed circuit board containing at least one electrically insulating carrier layer (3) and a copper or copper alloy layer (2) formed on the said insulating carrier layer (3) to form at least one solder zone (5) with multiple electrically insulated copper circuit paths (6) and other electrically isolated copper paths; - The presence of a graphene coating (1) containing reduced graphene oxide (rGO) particles on at least one surface of the copper or copper alloy layer (2) facing outwards from the insulating carrier layer (3), - The graphene coating in question (1) was formed by electrophoretic deposition using a graphene suspension containing 5 to 15 mg of reduced graphene oxide (rGO) and 0.2 to 3 mg of magnesium salt in every 100 ml of the liquid phase, which consists of 70 to 95% isopropyl alcohol and 5 to 30% pure water, with a total volume of 100%, and - It is characterized by containing at least one solder mask layer positioned on the graphene coating (1) such that the solder sites (5) are exposed.
Need to check novelty before this filing date? Find Prior Art

Description

1 TAR I FNAME Graphene Suspension Coated Printed Circuit Board and Its Production Method 5 Technical Area The invention relates to printed circuit boards and their components used in the field of electricity and electronics. It is related to production methods. Previous Technique In current technology, printed circuit boards consist of an electrically insulating carrier substrate. It includes the conductive layers and circuit paths created on it. The aforementioned circuit paths enable the transmission of electric current between circuit elements. It provides an insulating substrate; glass fiber reinforced epoxy laminate, polyimide, 20 electrical insulators suitable for ceramic or printed circuit board production. It can consist of materials. Conductive layer and circuit paths. Copper or copper alloys are commonly used in its production. Electron scattering during the transmission of electric current in copper circuit paths. This can occur. Also, in high-frequency alternating current applications, 25 The resulting surface effect causes electrical losses and an increase in impedance. This can happen. This situation affects the electrical conductivity and energy of printed circuit boards. This can negatively affect its efficiency. In current technology, graphene coating is used to increase electrical conductivity. 30 Applications are known. However, current graphene coating methods; high processing temperature, high cost, and suitability for mass production on an industrial scale. It may be inadequate in terms of this. 2 Also, the circuit paths on the printed circuit board are electrically separated from each other. its isolation, all in the coating process carried out using an electric field This makes it difficult to apply an electric field to the circuit paths simultaneously. Therefore, graphene coating is suitable for the circuit board manufacturing process and the entire circuit 5 It needs to be implemented in a way that includes all routes. In conclusion, it increases the electrical conductivity of printed circuit boards by producing electrons. scattering and electrical discharges occurring in high-frequency alternating current. Low-cost, low-temperature applicable, and industrial 10 that reduces losses. A graphene coating method suitable for large-scale production is needed. Purpose of the Invention The main purpose of the invention is to protect copper circuit traces from solder mask application before 15 minutes. A printed circuit board with increased electrical conductivity thanks to its graphene coating. The goal is to obtain the card. Another aim of the invention is to utilize the lattice effect of graphene coating to collect electrons. reducing scattering and re-inclusion of scattered electrons into the electric current 20 The goal is to obtain a printed circuit board that enables this. Another purpose of the invention is to address surface phenomena that occur in high-frequency alternating current. A printed circuit board that reduces electrical losses, leakage, and impedance due to its effect. The goal is to obtain the card. 25 Another purpose of the invention is to apply an electric field to the entire circuit paths that are isolated from each other. The goal is to obtain a printed circuit board manufacturing method that ensures its implementation. Within this scope, temporary short circuit paths are created between the circuit paths, and A dead zone is left where the copper is not etched for electrode connection. Coating 30 After the procedure, short circuit paths and dead zones are removed, and functional circuit paths are created. is obtained. 3 Another aim of the invention is to create a low-cost and applicable solution that can be used at low temperatures. A graphene coating method suitable for high-volume production on an industrial scale has been obtained. to do. Another objective of the invention is to determine the ratio of isopropyl alcohol to the type of magnesium salt and A graphene suspension with improved coating efficiency is obtained by regulating its quantity. is to do. Another objective of the invention is to achieve 10 by regulating the coating time and the applied voltage. an electrophoretic coating method that provides better graphene coating to do. Another aim of the invention is to produce graphene through the use of platinum-coated titanium anodes. an electrophoretic 15 that prevents the suspension from being affected by the anode material The method is to obtain the coating. The circuit board was developed to achieve the aforementioned objectives; - copper or copper alloy layer (2) out from the insulating carrier layer (3) The observer has 20 reduced graphene oxide (rGO) particles on at least one of its surfaces. having a graphene coating (1) containing, - The graphene coating in question (1) will have a total volume of 100%. each of the liquid phases consists of 70% to 95% isopropyl alcohol and 5% to 30% pure water. 100 ml contains 5 to 15 mg of reduced graphene oxide (rGO) and 0.2 to 3 mg of other substances. Electrophoretic analysis using a graphene suspension containing magnesium salt 25 because it was created by accumulation, and - The graphene coating (1) will leave the solder areas (5) exposed. by containing at least one solder mask layer positioned on it It is characterized by... Explanation of the Figures 4 Figure 1, attached hereto, shows the graphene coating layer of a graphene-coated circuit board. Schematic cross-section view including copper layer and insulating carrier layer. It shows. Figure 2 shows the dead zone and solder zone created before the graphene coating process. circuits including circuit paths, short circuit paths and isolated circuit paths It shows a schematic top view of the card. Figure 3 shows the circuit paths and the graphene coating process between these circuit paths. It shows a detailed schematic view of the short-circuit path created. 10 Figure 4: Electrophoretic deposition of a circuit board in graphene suspension. platinum-coated titanium with circuit board electrode used in coating by this method. It shows a schematic view of the coating assembly containing the anode. Figure 5: Preliminary preparation of the printed circuit board, graphene coating, short circuit paths. cleaning of the conductive metal layer and insulating carrier layers production including the stages of joining and application of solder mask It shows the flowchart of the method. The main parts shown in the figures are listed below by number and name. (1) Graphene coating (2) Conductive metal layer (3) Insulating carrier layer (4) Dead zone 25 (5) Solder area (6) Circuit paths (7) Short circuit paths (8) Printed circuit board (9) Plate (cathode) for electric field 30 (10) Graphene oxide particles Detailed Description of the Invention The invention relates to printed circuit boards and their components used in the field of electricity and electronics. It relates to production methods. The invention, in particular, concerns copper circuitry on printed circuit boards. 5 paths, electrophoretic coating method before solder mask application It relates to increasing electrical conductivity by coating with graphene. The subject of the invention is a circuit board; insulating carrier layer (3), conductive metal layer (2), solder area (5), circuit traces (6), isolated remaining circuit traces (8) and graphene coating 10 (1) is included. In order to make graphene coating, on the top of the circuit board, A dead zone (4) is left for electrode connection and the remaining circuit paths are isolated. (8) Short circuit paths (7) are created for the application of electric field. Graphene Short circuit paths (7) after coating process by laser ablation method is cut or destroyed. The dead zone (4) is cut with a guillotine or 15 circuit paths that function only after their short circuit is eliminated by laser ablation is obtained. Then the solder mask is produced in its normal manufacturing process form. It can be coated. To obtain the circuit board that is the subject of the invention, an insulating carrier substrate 20 was first required. The preliminary preparation of the materials is carried out. During the design of the circuit board, Circuit paths for the entire circuit to be connected and for an electric field to be applied. Short circuit paths (7) are created in the necessary areas between (6-8). Also, on the top side for coating, there is a dead zone (4) that allows the electrode to be attached. is left as is. Then, the circuit board undergoes photomasking and 25 in the normal production flow. It is formed by an acid bath. The insulating carrier substrate in question is preferably FR- It consists of 4 ingredients. To prepare the graphene suspension (9), 80% isopropyl alcohol and 20% pure water were used. It is used. 10 milligrams of reduced graphene oxide are added to 100 ml of the prepared mixture. (rGO) and 3 milligrams of magnesium nitrate [Mg(NO₃)₂] are added. The resulting graphene suspension (9) is mechanically mixed and put into an ultrasonic bath 6 It is being held in abeyance. The component ratios in question are in different configurations of the invention. While it may vary, achieving optimum technical benefit The specified rates are preferred for this purpose. Graphene particles are electrophoretically deposed (EPD) using an electric field. The coating is applied to the circuit board for 5 minutes under a voltage of V. Platinum-coated titanium anode (10) is used during the process. Graphene coated circuit The card is dried by baking it at 160 °C for 5 minutes, and the graphene coating (1) is obtained. Short circuit paths (7) after graphene coating process by laser ablation method is cut or destroyed. The dead zone (4) is cut by guillotine or The short circuit is eliminated only by laser ablation. Thus, the function is restored. Circuit paths are obtained. In multilayer circuit boards, graphene-coated tracks are used at this stage. They can be combined. Finally, the solder mask, in the normal production process. It is covered in this way. Optimization of the suspension used in graphene coating, 20 The isopropyl ratio was increased; the type and amount of magnesium salt were adjusted according to the previous technique. It has been modified. Different coating times and strengths (V) were tested during EDP coating. Optimizing coating time and strength has resulted in a better coating. This is important in terms of its application. Also, different suspensions and coatings are available. Better results can be obtained by experimenting with different durations. 25 During EDP coating, to prevent the suspension from being affected by the anode material... Platinum coated titanium anode (10) is used. Graphene coating (1) reduces electron scattering during electrical conduction. This creates a cabling effect. In this way, the scattered electrons are drawn into the current. 7 graphene coating (1), also the surface effect (skin) that occurs at high frequencies in alternating current It provides better conductivity during the effect. In measurements carried out in different laboratories, 5 containing graphene coating (1) An increase in conductivity was achieved on the circuit board. Sample No. Resistivity (Ω·cm) Conductivity ( / Ω·cm) Sample No. Resistivity (Ω·cm) Conductivity ( / Ω·cm) 1 1.22E-05 82.127,53 391 1.17E-05 85.418,35 2 1.31E-05 76,370.93 392 1.26E-05 79,594.38 3 1.33E-05 75.315,09 393 1.24E-05 80.377,27 4 1.33E-05 75.199,59 394 1.32E-05 76.015,71 1.35E-05 73,951.95 395 1.35E-05 74,175.7 Table 1: Samples 001-005 represent reference circuit boards without graphene coating; 391-395 Samples numbered [number] contain graphene-coated circuit boards, produced using the method described in the specification. It shows. Linear analysis was carried out at the Energy Efficiency Laboratory of Istanbul University. In current conductivity measurements, experiments are conducted with reference samples and graphene-coated samples. The resistivity and conductivity values ​​of the samples were compared. Measurement The results showed that the resistivity values ​​of graphene-coated circuit boards decreased, and An increase in electrical conductivity values ​​has been observed. 15 Keysight E4990A at Acıbadem University Biotechnology Laboratory In alternating current measurements performed using an impedance analyzer, Reference samples and graphene-coated samples were tested in different frequency ranges. compared. Especially in the 85 kHz-105 kHz frequency range, 20 in the specification. Graphene-coated circuit board numbered (391-395) produced using the described method. their cards have lower impedance and higher compared to reference samples. It has been reported that it exhibits conductivity. These measurements show that the graphene coating is both linear. 8 electrical conductivity of the circuit board in both current and high-frequency alternating current. It shows that it has improved its performance. 2-5 layered reduced graphene oxide in the preparation of graphene suspension (9) (rGO) is used. Reduced graphene oxide (rGO) is a mixture of unreduced graphene 5 It forms a more homogeneous mixture and has better conductivity compared to oxidized (GO). It is preferred because of its effectiveness. In higher concentrations. Due to the occurrence of agglomeration, the amount of reduced graphene oxide (rGO) is 10 It has been determined as mg / 100 ml. To ensure better solubility of graphene oxide, the mixture should contain 80%. Isopropyl alcohol is used. The pure water in the mixture is a magnesium salt. It enables the dissolution of graphene oxides. Magnesium nitrate [Mg(NO₃)₂] has a positive effect on graphene oxides. charging and moving under an electric field and being coated onto the circuit board It provides. To reduce clumping, the amount of magnesium nitrate [Mg(NO₃)₂] is 15 It has been determined as 3 mg / 100 ml. The nitrate form of magnesium salt is less. It is preferred because of its reactive properties. As mentioned above, graphene particles are homogeneous in the liquid medium. distribution in this way, electrical charging and applied electric field 20 to ensure that it is transported and deposited on the conductive surface of the circuit board by means of its effect Graphene suspension is used. Accordingly, graphene suspension (9) is 80% 100 ml of mixture containing isopropyl alcohol and 20% pure water contains 10 mg of reduced graphene. It is prepared by adding oxide (rGO) and 3 mg of magnesium nitrate [Mg(NO₃)₂]. The resulting graphene suspension (9) is mechanically mixed and ultrasound 25 It is being kept in the bathroom. The production method of the graphene-coated circuit board, which is the subject of the invention, involves the following stages: It includes: • Preliminary preparation of the insulating carrier substrate with a conductive layer on top 30 to be done, 9 • Applying graphene coating onto the prepared insulating substrate, • Unwanted conductive connections that may form after graphene coating and elimination of short circuit paths, • Joining the insulating carrier substrate layers and • Application of solder mask to the assembled structure. 5 The insulating carrier substrate in question is FR-4, a preferred application. It consists of the following materials. The invention is designed for use in electrical and electronic circuits; it is electrically... insulating at least one insulating carrier layer (3) and said insulating carrier layer 10 (3) several electrically isolated from each other to form at least one solder area (5) with a copper circuit path (6) a printed circuit board containing a formed copper or copper alloy layer (2) having a card; - The insulating carrier of the copper or copper alloy layer (2) 15 reduced graphene on at least one surface facing outwards from the layer (3). The presence of a graphene coating (1) containing oxide (rGO) particles, - The graphene coating in question (1) will have a total volume of 100%. each of the liquid phases consists of 70% to 95% isopropyl alcohol and 5% to 30% pure water. 100 ml contains 5 to 15 mg of reduced graphene oxide (rGO) and 0.2 to 3 mg of 20 Electrophoretic using a graphene suspension containing magnesium salt because it was created by accumulation, and - The graphene coating (1) will leave the solder areas (5) exposed. by containing at least one solder mask layer positioned on it It is characterized by... 25 The insulating substrate used in the invention has copper or at least one surface made of copper or an electrically insulating material with a conductive layer made of copper alloy It is a panel. The insulating carrier substrate in question is glass fiber reinforced epoxy laminate. (FR-4), FR-2, CEM-1, CEM-3, polyimide-based flexible circuit board substrate, PTFE-based 30 high-frequency laminate, ceramic-based substrate such as alumina or aluminum nitride, Metal-core insulating laminate (MCPCB), BT resin-based laminate, Rogers type. high-frequency laminate or a similar material on which a conductive layer can be formed. It can be an electrically insulating material. Suitable for the production of single-sided, double-sided, or multi-layer printed circuit boards. Specifically, a conductive layer formed on at least one surface of the insulating carrier substrate. Circuit paths are created on it, and these circuit paths are made with graphene. It is coated. In the preferred application of the invention, it serves as an insulating carrier substrate. FR-4 uses copper as the conductive layer.

Claims

11 SYSTEMS 1. The invention is for use in electrical and electronic circuits; it is electrically designed. insulating at least one insulating carrier layer (3) and the said insulating carrier layer (3) located on and electrically isolated from each other, more than one 5 to form at least one solder area (5) with a copper circuit path (6) a printed circuit board containing a formed copper or copper alloy layer (2) It has a card and its feature is; - The copper or copper alloy layer (2) from the insulating carrier layer (3) reduced graphene oxide (rGO) 10 on at least one outward-facing surface The presence of a graphene coating (1) containing particles, - The graphene coating in question (1) is 70% such that the total volume is 100%. every 100% of the liquid phase consists of 95% isopropyl alcohol and 5% to 30% pure water. 5 to 15 mg of reduced graphene oxide (rGO) and 0.2 to 3 mg of magnesium per ml. Electrophoretic deposition using a graphene suspension containing salt 15 because it was created using this method, and - The graphene coating (1) will leave the solder areas (5) exposed. It must contain at least one layer of solder mask positioned on it.

2. The printed circuit board mentioned in Claim 1 is characterized by its graphene coating (1) 20 the reduced graphene oxide (rGO) particles it contains are arranged in 2 to 5 graphene layers. It is having.

3. The printed circuit board mentioned in Claim 1 is characterized by its composition: graphene particles in liquid phase. homogeneous distribution within it, dissolution of magnesium salt and reduced 25 Graphene oxide (rGO) particles become positively charged and are then placed in a circuit under an electric field. To ensure its transfer to the card, the graphene suspension contains 80% isopropyl by volume. Each 100 ml of the liquid phase, consisting of alcohol and 20% pure water, contains 10 mg of reduced graphene. It contains oxide (rGO) and 3 mg of magnesium nitrate [Mg(NO₃)₂]. 12 4. The printed circuit board mentioned in Claim 1 is characterized by its graphene suspension. The magnesium salt found is magnesium nitrate [Mg(NO₃)₂].

5. The printed circuit board mentioned in Claim 1 is characterized by its graphene-coated copper circuit board. The top 5 of multiple electrically insulating carrier layers (3) containing pathways (6) It has a multi-layered structure formed by joining layers on top of each other.

6. The invention is a method for obtaining a graphene-coated printed circuit board; its characteristic feature is: - copper or copper alloy layer on an electrically insulating substrate (3) (2), short circuit paths (7) that temporarily connect the circuit paths (6) to each other and 10 dead zone left uneroded to form an electrode connection (4) formatting to include, - a liquid phase consisting of 70% to 95% isopropyl alcohol by volume and 5% to 30% pure water 0.2 to 3 mg of reduced graphene oxide (rGO) with 5 to 15 mg of reduced graphene oxide (rGO) per 100 ml Preparation of a graphene suspension by adding magnesium salt, 15 - mechanical mixing of the prepared graphene suspension and ultrasound being left in the bath, - Placing the printed circuit board inside the graphene suspension, dead zone (4) connecting to the cathode junction and at least one anode opposite the printed circuit board placement, 20 - reduced graphene oxide (rGO) particles by applying an electric field conductive metal layer circuit paths by electrophoretic deposition method (6) depositing and forming a graphene coating (1), - drying of graphene coating (1), - removal of short circuit paths (7) and dead zone (4) with circuit paths (6) 25 electrically isolated from each other by disconnecting their electrical connection obtaining the functional circuit paths (6) and - graphene coated printed circuit board with solder areas (5) exposed The process involves the steps for applying solder mask. 13 7. The method described in Claim 6 is characterized by the volumetric reduction of a graphene suspension. 10 mg per 100 ml of liquid phase consisting of 80% isopropyl alcohol and 20% pure water. with reduced graphene oxide (rGO) in a quantity and having 2 to 5 graphene layers. It is prepared by adding 3 mg of magnesium salt.

8. The method described in Claim 6, its characteristic feature is; graphene suspension. magnesium salt used in its preparation is magnesium nitrate [Mg(NO₃)₂] It is the fact that.

9. The method of obtaining the printed circuit board mentioned in Claim 6, and its characteristic; 10 The copper layer (2) was made into a circuit by applying photomasking and acid bath processes. including pathways (6), short circuit pathways (7) and dead zone (4) It is the formatting.

10. The method of obtaining the printed circuit board mentioned in Claim 6, and its characteristic is; 15 The electrophoretic deposition process was carried out under a voltage of 30 V for 5 minutes. It is the realization of.

11. This is the method for obtaining the printed circuit board mentioned in Claim 6, and its characteristics are as follows: The electrophoretic deposition process involves the use of platinum-coated titanium anodes. 20 12. This is the method for obtaining the printed circuit board mentioned in Claim 6, and its characteristics are as follows: The graphene-coated circuit board is baked at 160°C for 5 minutes. It is drying.

13. This is the method for obtaining the printed circuit board mentioned in Claim 6, and its characteristics are as follows: Laser ablation of short circuit paths (7) after graphene coating (1) process It is the cutting or destruction of something by means of this method.

14. This is the method for obtaining the printed circuit board mentioned in Claim 6, and its characteristic is; 30 The dead zone (4) is separated from the circuit board by cutting it with a guillotine. 14 15. Claim 6 refers to the method of obtaining the printed circuit board and its characteristics are as follows: laser ablation of the electrical connection of the dead zone (4) with the circuit pathways (6) cutting by this method.

16. This is the method for obtaining the printed circuit board mentioned in Claim 6, and its characteristics are as follows: Multiple insulating carriers containing graphene coated copper circuit paths (6) Electrical connection of the layer (3), short circuit paths (7) and dead zone (4) It is the joining process after removal and before the solder mask is applied.