Semiconductor processing method

Abstract

A semiconductor processing tool includes a cleaning chamber configured to perform a post-chemical mechanical polishing / planarization (post-CMP) cleaning operation in an oxygen-free (or in a near oxygen-free) manner. An inert gas may be provided into the cleaning chamber to remove oxygen from the cleaning chamber such that the post-CMP cleaning operation may be performed in an oxygen-free (or in a near oxygen-free) environment. In this way, the post-CMP cleaning operation may be performed in an environment that may reduce oxygen-causing corrosion of metallization layers and / or metallization structures on and / or in the semiconductor wafer, which may increase semiconductor processing yield, may decrease semiconductor processing defects, and / or may increase semiconductor processing quality, among other examples.

Description

[Technical Field]

[0001] Some embodiments of this disclosure relate to semiconductor processing methods and tools. [Previous Technology]

[0002] Polishing or planarization techniques such as chemical mechanical polishing / planarization (CMP) can be used to planarize layers, substrates, or semiconductor wafers. A chemical mechanical planarization process may include depositing a slurry (or abrasive compound) onto a polishing pad. A semiconductor wafer may be mounted on a carrier, which may rotate the semiconductor wafer as it is pressed against the polishing pad. The slurry and polishing pad act as abrasives, polishing or planarizing one or more layers (e.g., metallization layers) of the semiconductor wafer as it rotates. The polishing pad may also be rotated to ensure a continuous supply of slurry to the polishing pad. [Summary of the Invention]

[0003] Some embodiments of this disclosure provide a semiconductor processing method. The method includes removing oxygen from a cleaning chamber. The method includes performing a chemical mechanical polishing post-cleaning operation in the cleaning chamber after removing oxygen from the cleaning chamber.

[0004] Some embodiments of this disclosure provide a semiconductor processing tool. The semiconductor processing tool includes a chemical mechanical planarization (CMP) cleaning chamber in which a semiconductor wafer is processed during a cleaning operation. The semiconductor processing tool includes a first nozzle configured to provide a cleaning agent to the CMP cleaning chamber during the cleaning operation. The semiconductor processing tool includes one or more second nozzles configured to provide an inert gas to the CMP cleaning chamber to remove oxygen from the CMP cleaning chamber.

[0005] Some embodiments of this disclosure provide a semiconductor processing method. The method includes positioning a semiconductor wafer in a process chamber of a chemical mechanical planarization (CMP) tool. The method includes performing a CMP operation to planarize one or more metallization layers of the semiconductor wafer in the process chamber. The method includes transferring the semiconductor wafer from the process chamber to a cleaning chamber of the CMP tool after performing the CMP operation. The method further includes performing a post-CMP cleaning operation to clean the semiconductor wafer in the cleaning chamber. An oxygen concentration in the cleaning chamber is in the range of about 0% to about 10%.

Implementation Method

[0007] The following disclosure provides many different embodiments or examples to implement the different features of this disclosure. Specific examples of components and their arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, if the specification describes a first feature formed above or on a second feature, it indicates that embodiments may include those where the first and second features are in direct contact, or embodiments where an additional feature is formed between the first and second features so that the first and second features are not in direct contact. Furthermore, in various examples, this disclosure may use repeated symbols and / or letters. Such repetition is for simplification and clarity and does not imply any association between the various embodiments and / or configurations discussed.

[0008] Furthermore, the spatial terms used, such as "below," "lower," "above," "higher," etc., are for the purpose of describing the relationship between one element or feature and another element(s) in the diagram. In addition to the orientation shown in the diagram, these spatial terms are intended to include different orientations of the device in use or operation. The device may be turned to different orientations (rotated 90 degrees or other orientations), and the spatial terms used herein can be interpreted accordingly.

[0009] The semiconductor substrate can be cleaned in one or more post-chemical mechanical planarization (CMP) cleaning operations following a CMP operation. To perform a CMP cleaning operation, the semiconductor substrate can be positioned in a cleaning chamber (e.g., a cleaning chamber for a planarization tool, such as a CMP tool), and cleaning can be performed using various cleaning agents and various purging agents. Because of oxygen in the environment within the cleaning chamber, oxygen in the purging agent, oxygen in the cleaning agent, and / or oxygen from other sources within the cleaning chamber, the CMP cleaning operation may cause corrosion of the semiconductor substrate.

[0010] Some embodiments described herein provide a semiconductor processing tool including a cleaning chamber configured to perform post-chemical mechanical planarization (CMP) cleaning operations in an oxygen-free (or near-oxygen-free) environment. An inert gas may be supplied to the cleaning chamber to purge or remove oxygen, enabling the CMP cleaning operations to be performed in an oxygen-free (or near-oxygen-free) environment. This allows the CMP cleaning operations to be performed in an environment that reduces oxygen-induced corrosion of metallization layers and / or metallization structures on and / or within semiconductor wafers, which can increase semiconductor process yield, reduce semiconductor process defects, and / or improve semiconductor process quality, etc.

[0011] Figure 1 is a schematic diagram of an example chemical mechanical planarization tool 100 described herein. The chemical mechanical planarization tool 100 includes a semiconductor processing tool capable of grinding or planarizing a semiconductor wafer, a semiconductor device, and / or other types of semiconductor substrates. The chemical mechanical planarization tool 100 includes one or more process chambers 102 in which layers and / or structures of the semiconductor wafer are ground or planarized. In some embodiments, the process chamber 102 is configured to grind or planarize the surface (or layers or structures) of the semiconductor wafer using a combination of chemical and mechanical forces (e.g., chemical etching and free abrasive grinding). In the process chamber 102, the chemical mechanical planarization tool 100 is configured to utilize abrasive and etchant chemical slurries by combining a polishing pad and a retaining ring (e.g., typically having a diameter larger than the semiconductor wafer). To perform the chemical mechanical planarization operation, the chemical mechanical planarization tool 100 uses a dynamic polishing head to press the polishing pad against the semiconductor wafer in the process chamber 102, and the dynamic polishing head is held in place by the retaining ring. Dynamic polishing heads can rotate through different axes to remove material and smooth any irregularities in the layers or structures of a semiconductor wafer, thereby making the layers or structures of the semiconductor wafer appear flat or planar.

[0012] The chemical mechanical planarization tool 100 includes a transfer chamber 104, in which a semiconductor wafer is transferred back and forth between a process chamber 102 and the transfer chamber 104. Furthermore, the semiconductor wafer is transferred between the transfer chamber 104 and one or more cleaning chambers 106 included in the chemical mechanical planarization tool 100. The cleaning chamber 106 (also referred to as a chemical mechanical planarization cleaning chamber or a post-chemical mechanical planarization cleaning chamber) is a component of the chemical mechanical planarization tool 100 configured to perform a post-chemical mechanical planarization cleaning operation to clean or remove residual slurry and / or remove material from the semiconductor wafer that has undergone the chemical mechanical planarization operation. In some embodiments, the chemical mechanical planarization tool 100 includes a plurality of cleaning chambers 106, and the chemical mechanical planarization tool 100 is configured to process the semiconductor wafer by a sequence of a plurality of post-chemical mechanical planarization cleaning operations in the plurality of cleaning chambers 106. As an example, the chemical mechanical planarization tool 100 can process semiconductor wafers in a first chemical mechanical planarization post-cleaning operation in a cleaning chamber 106a, in a second chemical mechanical planarization post-cleaning operation in a cleaning chamber 106b, and in a third chemical mechanical planarization post-cleaning operation in a cleaning chamber 106c, etc.

[0013] The cleaning chamber 106 uses cleaning agents such as isopropyl alcohol (IPA), chemical solutions including a variety of cleaning chemicals, and / or other types of cleaning agents to clean the semiconductor wafer. The chemical mechanical planarization tool 100 includes one or more types of cleaning chambers 106. Each type of cleaning chamber 106 is configured to use a different type of cleaning device to clean the semiconductor wafer. In some embodiments, the cleaning chamber 106 includes a brush cleaning chamber. A brush cleaning chamber is a cleaning chamber that includes one or more cleaning brushes (or roller brushes) configured to spin or rotate to brush-clean the semiconductor wafer. In some embodiments, the cleaning chamber 106 includes a pen cleaning chamber. A pen cleaning chamber is a cleaning chamber that includes a cleaning pen (or cleaning pencil) configured to provide fine-tuning and detailed cleaning of the semiconductor substrate.

[0014] In some embodiments, the cleaning chambers 106 of the chemical mechanical planarization tool 100 are arranged such that the semiconductor wafer is first processed in one or more brush cleaning chambers (e.g., to remove a large amount of removed material and residual slurry from the semiconductor wafer), and then processed in a pen cleaning chamber (e.g., to perform detailed cleaning of structures and / or grooves in the semiconductor wafer). As an example, cleaning chambers 106a and 106b may be configured as brush cleaning chambers, while cleaning chamber 106c may be configured as a pen cleaning chamber.

[0015] The chemical mechanical planarization tool 100 includes a purge chamber 108 configured to purge a semiconductor wafer after one or more chemical mechanical planarization post-cleaning operations. The purge chamber 108 purges the semiconductor wafer to remove residual cleaning agent. The purge chamber 108 is configured to purge the semiconductor wafer using a purge agent such as deionized water (DIW) or other types of purge agents. The semiconductor wafer is transferred directly from the cleaning chamber 106 to the purge chamber 108, or the semiconductor wafer is transferred to the purge chamber 108 via a transfer chamber 104. In some embodiments, the semiconductor wafer is processed in the purge chamber 108 during a drying operation, wherein the semiconductor wafer is dried to prevent oxidation and / or other types of contamination.

[0016] The chemical mechanical planarization tool 100 includes a plurality of transfer devices 110. The transfer devices 110 include robotic arms or other types of transfer devices configured to transfer semiconductor wafers between process chambers 102, transfer chambers 104, one or more cleaning chambers 106 and / or purge chambers 108.

[0017] As described above, Figure 1 is provided as an example. Other examples may differ from those described with respect to Figure 1.

[0018] Figure 2 is a schematic diagram of an example embodiment 200 described herein. Example embodiment 200 includes an example of a process flow path 202 for processing a semiconductor wafer by a chemical mechanical planarization tool 100. As shown in Figure 2, the process flow path 202 includes processing the semiconductor wafer in one or more chemical mechanical planarization operations within one or more process chambers 102. After completing one or more chemical mechanical planarization operations, the semiconductor wafer is transferred from the process chamber 102 to a transfer chamber 104. The semiconductor wafer travels through the transfer chamber 104 and is then transferred from the transfer chamber 104 to a cleaning chamber 106a.

[0019] In cleaning chamber 106a, a semiconductor wafer is processed in a post-chemical mechanical planarization cleaning operation. Transfer device 110 transfers the semiconductor wafer from cleaning chamber 106a to cleaning chamber 106b. In cleaning chamber 106b, the semiconductor wafer is processed in a post-chemical mechanical planarization cleaning operation. Transfer device 110 transfers the semiconductor wafer from cleaning chamber 106b to cleaning chamber 106c. In cleaning chamber 106c, the semiconductor wafer is processed in a post-chemical mechanical planarization cleaning operation. Transfer device 110 transfers the semiconductor wafer from cleaning chamber 106c to purge chamber 108. In purge chamber 108, the semiconductor wafer is processed in a purge operation and / or a drying operation. The semiconductor wafer can then be transferred to a transfer carrier for storage, or to another semiconductor tool for further processing.

[0020] As described above, Figure 2 is provided as an example. Other examples may differ from those described with respect to Figure 2.

[0021] Figure 3 is a schematic diagram of an example embodiment 300 of the cleaning chamber 106 described herein. The cleaning chamber 106 described in conjunction with Figure 3 is an example of a brush cleaning chamber, which includes one or more nozzles configured to provide inert gas into the cleaning chamber 106 to purge or remove oxygen from the cleaning chamber 106.

[0022] As shown in Figure 3, the cleaning chamber 106 includes a housing 302. The housing 302 includes an opening 304 through which semiconductor wafers can be transferred into and / or from the cleaning chamber 106 (e.g., via a transfer device 110). In some embodiments, the housing 302 is configured to be hermetically sealed, such that the environment within the housing 302 can be controlled to reduce or minimize the entry of oxygen and other types of contaminants.

[0023] The cleaning chamber 106 includes a wafer stage 306 within the housing 302. The wafer stage 306 includes a suction cup, a platform, or other type of component configured to support a semiconductor wafer. In some embodiments, the wafer stage 306 is configured to rotate such that the semiconductor wafer located on the wafer stage 306 is rotated (e.g., during a cleaning operation following chemical mechanical planarization).

[0024] The cleaning chamber 106 includes a cleaning brush 308 configured to rotate mechanically or physically relative to a semiconductor wafer located on the wafer stage 306. In some embodiments, the cleaning brush 308 is configured to rise and fall to allow the semiconductor wafer to be transferred to and / or from the wafer stage 306. A nozzle 310 is included to dispense cleaning agent onto the semiconductor wafer located on the wafer stage 306.

[0025] As further shown in Figure 3, the cleaning chamber 106 includes one or more nozzles configured to supply inert gas into the cleaning chamber 106 to purge or remove oxygen from the cleaning chamber 106. The inert gas includes argon (Ar), nitrogen (N2), helium (He), and / or other inert gases. In some embodiments, the cleaning chamber 106 includes a single nozzle configured to dispense inert gas into the cleaning chamber 106.

[0026] In some embodiments, the cleaning chamber 106 includes a plurality of nozzles configured to distribute inert gas into the cleaning chamber 106 to increase the flow rate of inert gas into the chamber, thereby increasing the uniformity of inert gas distribution into the cleaning chamber 106 and / or reducing the duration for removing oxygen from the cleaning chamber 106. In some embodiments, the cleaning chamber 106 includes a nozzle 312a and a nozzle 314a located on or near a first side of the cleaning chamber 106, and a nozzle 312b and a nozzle 314b located on or near a second side of the cleaning chamber 106. In some embodiments, the first side and the second side are opposite sides of the cleaning chamber 106. In some embodiments, the first side and the second side are adjacent sides of the cleaning chamber 106.

[0027] In some embodiments, the cleaning chamber 106 includes nozzles configured to provide inert gas into the cleaning chamber 106 through different angles and / or in different directions to increase the uniformity of inert gas distribution into the cleaning chamber 106. As shown in Figure 3, a first subset of nozzles (e.g., nozzles 312a and 312b) is configured to provide a generally horizontal inert gas flow 316a and an inert gas flow 316b to the cleaning chamber 106, respectively. A second subset of nozzles (e.g., nozzles 314a and 314b) is configured to provide a generally downward or generally vertical inert gas flow 318a and an inert gas flow 318b to the cleaning chamber 106, respectively. However, nozzles 312a, 312b, 314a, and / or 314b may be configured to provide inert gas in diagonal or angular directions. In addition, the nozzle can be configured to deliver inert gas into the cleaning chamber 106 at multiple angles or directions.

[0028] Oxygen is removed from the cleaning chamber 106 via an exhaust port 320 in the housing 302. The exhaust port 320 may be located on the opposite side of the cleaning chamber 106 relative to the nozzles 312a, 312b, 314a, and / or 314b, such that inert gas is allowed to flow through the cleaning chamber 106 to the exhaust port 320 to purge or remove oxygen from the cleaning chamber 106. In some embodiments, the nozzles 312a, 312b, 314a, and 314b are located at or near the top of the cleaning chamber 106, and the exhaust port 320 is located at or near the bottom of the cleaning chamber 106. In some embodiments, the nozzles 312a, 312b, 314a, and 314b are located at or near the bottom of the cleaning chamber, and the exhaust port 320 is located at or near the top of the cleaning chamber 106.

[0029] As described above, Figure 3 is provided as an example. Other examples may differ from those described with respect to Figure 3.

[0030] Figures 4A and 4B are schematic diagrams of an example embodiment 400 of another cleaning chamber 106 described herein. The cleaning chamber 106 described in conjunction with Figures 4A and 4B is an example of a pen-type cleaning chamber, which includes one or more nozzles configured to provide inert gas into the cleaning chamber 106 to purge or remove oxygen from the cleaning chamber 106.

[0031] As shown in Figure 4A, the cleaning chamber 106 includes a housing 402. The housing 402 includes an opening 404 through which semiconductor wafers can be transferred into and / or from the cleaning chamber 106 (e.g., via a transfer device 110). In some embodiments, the housing 402 is configured to be hermetically sealed, such that the environment within the housing 402 can be controlled to reduce or minimize the entry of oxygen and other types of contaminants.

[0032] The cleaning chamber 106 includes a wafer stage 406 within the housing 402. The wafer stage 406 includes a suction cup, a platform, or other type of component configured to support a semiconductor wafer. In some embodiments, the wafer stage 406 is configured to rotate such that the semiconductor wafer located on the wafer stage 406 is rotated (e.g., during a post-chemical mechanical planarization cleaning operation), such that the semiconductor wafer is cleaned while rotating.

[0033] The cleaning chamber 106 includes a cleaning head 408. In some embodiments, the cleaning head 408 is configured to rise and fall to allow semiconductor wafers to be transferred onto and / or from the wafer stage 406. The cleaning head 408 includes a cleaning pen 410 configured to mechanically or physically clean the rotating semiconductor wafer located on the wafer stage 406. Furthermore, the cleaning head 408 includes a nozzle 412 configured to dispense cleaning agent onto the semiconductor wafer located on the wafer stage 406. The nozzle 412 is further configured to provide inert gas into the cleaning chamber 106 to purge or remove oxygen from the cleaning chamber 106. This allows inert gas and cleaning agent to be provided by a single nozzle (e.g., simultaneously or sequentially), which increases the performance of the cleaning chamber 106 without increasing its complexity. Oxygen is removed from the cleaning chamber 106 via an exhaust port 414 in the housing 402.

[0034] Figure 4B illustrates various details of the plurality of nozzles 412. As shown in Figure 4B, the nozzle 412 includes a head 416 and an elongated body 418. The head 416 includes a plurality of inlets 420, including an inlet 420a and an inlet 420b, wherein a cleaning agent 422 is supplied to the nozzle 412 through inlet 420a and an inert gas 424 is supplied to the nozzle 412 through inlet 420b. The cleaning agent 422 and / or inert gas 424 flow through the head 416, through the elongated body 418, and out of the nozzle 412 through an opening 426 and into the cleaning chamber 106. The elongated body 418 may be elongated to reduce turbulence of the cleaning agent 422 and / or inert gas 424 flowing through the nozzle 412.

[0035] As described above, Figures 4A and 4B are provided as examples. Other examples may differ from those described with respect to Figures 4A and 4B.

[0036] Figures 5A to 5E are schematic diagrams of an example embodiment 500 described herein. Example embodiment 500 includes an example in which a semiconductor wafer 502 includes one or more metallization layers 504, and the semiconductor wafer 502 is processed by a chemical mechanical planarization tool 100.

[0037] In some embodiments, the semiconductor wafer 502 is formed of silicon (Si) (e.g., a silicon substrate), a silicon-containing material, a III-V compound semiconductor material such as gallium arsenide (GaAs), silicon-on-insulator (SOI), or other types of semiconductor materials. In some embodiments, the semiconductor wafer 502 is formed of a doped material such as silicon-doped material (e.g., p-doped or n-doped material).

[0038] One or more metallization layers 504 include metal layers formed on the semiconductor wafer 502, metal layers formed in openings or recesses in the semiconductor wafer (or another layer on the semiconductor wafer) (e.g., plugs, interconnects, vias), and / or other types of metal structures. One or more metallization layers 504 include one or more metallic materials, such as ruthenium (Ru), cobalt (Co), copper (Cu), gold (Ag), aluminum (Al), silver (Ag), tungsten (W), molybdenum (Mo), metal alloys, and / or other types of metallic materials. In some embodiments, the thickness of one or more metallization layers 504 is in the range of approximately 20 angstroms (Å) to approximately 20,000 angstroms. However, other thickness values ​​for one or more metallization layers 504 are within the scope of this disclosure. In some embodiments, the area metal density of one or more metallization layers 504 is greater than 1%. However, other values ​​for area metal density are also within the scope of this disclosure.

[0039] As shown in Figure 5A, a semiconductor wafer 502 is placed or positioned in the process chamber 102 of the chemical mechanical planarization tool 100. In some embodiments, the transfer device 110 transfers the semiconductor wafer 502 from the transfer chamber 104 to the process chamber 102.

[0040] As shown in Figure 5B, in process chamber 102, one or more metallization layers 504 are ground or planarized in a chemical mechanical planarization operation. The one or more metallization layers 504 are ground or planarized to planarize the one or more metallization layers 504, to remove excess material from the one or more metallization layers 504, to reduce the thickness of the one or more metallization layers 504, and / or for other purposes. In some embodiments, at least about 10 angstroms of material is removed from the one or more metallization layers 504 in the chemical mechanical planarization operation. However, other values ​​of material removed from the one or more metallization layers 504 are within the scope of this disclosure.

[0041] As shown in Figure 5C, a semiconductor wafer 502 is transferred to the cleaning chamber 106 of a chemical mechanical planarization tool 100. In some embodiments, a transfer device 110 transfers the semiconductor wafer 502 from a transfer chamber 104 to the cleaning chamber 106. In some specific embodiments, the transfer device 110 transfers the semiconductor wafer 502 from the process chamber 102 to the transfer chamber 104, and then, after a chemical mechanical planarization operation, transfers the semiconductor wafer 502 from the transfer chamber 104 to the cleaning chamber 106.

[0042] As shown in Figure 5D, an inert gas 506 is supplied to the cleaning chamber 106 to remove oxygen 508 from the cleaning chamber 106. The inert gas 506 is supplied to the cleaning chamber 106 via one or more nozzles (e.g., nozzles 312a, 312b, 314a, 314b, and / or nozzle 412). The inert gas 506 is supplied to the cleaning chamber such that approximately 90% to approximately 100% of the oxygen 508 is removed from the cleaning chamber 106, thereby reducing and / or minimizing the possibility of oxidation of one or more metallization layers 504. However, other values ​​of inert gas 506 concentration are also within the scope of this disclosure. The inert gas 506 is supplied to the cleaning chamber 106, and oxygen 508 is removed or discharged from the cleaning chamber 106 via exhaust ports (e.g., exhaust ports 320 and 414). In this way, a certain amount of inert gas 506 is provided to the cleaning chamber 106, such that the environment in the cleaning chamber 106 is controlled to include approximately 0% to approximately 10% oxygen. This allows the semiconductor wafer 502 to be cleaned in an oxygen-free (or near-oxygen-free) environment in the cleaning chamber 106, thereby reducing and / or minimizing the possibility of oxidation of one or more metallization layers 504.

[0043] In some embodiments, inert gas 506 is supplied to the cleaning chamber 106 at a specific flow rate (or within a flow rate range) to remove a sufficient amount of oxygen 508 from the cleaning chamber 106. As an example, inert gas 506 may be supplied to the cleaning chamber 106 at a flow rate ranging from approximately 500 standard cubic centimeters per minute (sccm) to approximately 50,000 standard cubic centimeters per minute (sccm) to reduce the oxygen concentration of oxygen 508 in the cleaning chamber 106 to the range of approximately 0% to approximately 10%. However, other flow rate values ​​are also within the scope of this disclosure.

[0044] In some embodiments, a controller associated with the cleaning chamber 106 (e.g., device 600 described in conjunction with Figure 6) causes an inert gas 506 to be supplied to the cleaning chamber 106 based on or in response to the semiconductor wafer 502 being transferred into the cleaning chamber 106. In some embodiments, the controller causes the inert gas 506 to be supplied to the cleaning chamber 106 before the semiconductor wafer 502 is transferred into the cleaning chamber 106. In this way, the controller causes the cleaning chamber 106 to be "pre-purged," such that oxygen 508 is removed from the cleaning chamber 106 before the semiconductor wafer 502 is placed in the cleaning chamber 106, which further reduces the exposure of the semiconductor wafer 502 to oxygen 508. In these embodiments, the controller may further cause an inert gas 506 to be supplied to the cleaning chamber 106 after the semiconductor wafer 502 is supplied to the cleaning chamber 106, in order to remove any oxygen 508 that may have entered the cleaning chamber 106 due to the opening of the cleaning chamber 106 for transferring the semiconductor wafer 502 to the cleaning chamber 106.

[0045] In some embodiments, the controller may cause inert gas 506 to be provided to the cleaning chamber 106 for a specific duration prior to the transfer of the semiconductor wafer 502 to the cleaning chamber 106. In this way, the cleaning chamber 106 is "pre-purged" for a sufficient duration before the semiconductor wafer 502 is transferred to the cleaning chamber 106 to completely purge the oxygen 508 from the cleaning chamber 106. The controller may determine the duration (or start time) based on various factors, such as the estimated time when the semiconductor wafer 502 will be transferred to the cleaning chamber 106, the oxygen concentration of oxygen 508 measured or sensed in the cleaning chamber 106 (e.g., the duration may be increased for a higher oxygen concentration, or decreased for a lower oxygen concentration), and / or whether the cleaning chamber 106 has been purged in a previous cleaning operation. The controller may determine the measured or sensed oxygen concentration based on sensor data received by one or more oxygen sensors associated with the cleaning chamber 106.

[0046] In some embodiments, the controller causes inert gas 506 to be supplied to the cleaning chamber 106 based on a determination that the oxygen concentration in the cleaning chamber 106 is greater than a threshold oxygen concentration (e.g., 5% or another threshold oxygen concentration). In this way, the controller causes inert gas 506 to be supplied to the cleaning chamber 106 to reduce the oxygen concentration to be equal to or below the threshold oxygen concentration. In some embodiments, the controller causes inert gas 506 to stop being supplied to the cleaning chamber 106 based on a determination that the oxygen concentration in the cleaning chamber 106 is equal to or below the threshold oxygen concentration. In some embodiments, the controller causes inert gas 506 to be supplied to the cleaning chamber 106 based on receiving input (e.g., from the operator of the chemical mechanical planarization tool 100).

[0047] In some embodiments, the controller controls or adjusts (e.g., increases or decreases) the flow rate of inert gas 506 into the cleaning chamber 106 to purge oxygen 508 from the cleaning chamber 106 at a specific removal rate. For example, the controller may increase the flow rate to reduce the purging time, or the controller may decrease the flow rate to increase the purging time. In some embodiments, the controller controls or adjusts (e.g., increases or decreases) the flow rate of inert gas 506 into the cleaning chamber 106 based on the measured or sensed oxygen concentration of oxygen 508 in the cleaning chamber 106. As an example, the controller may increase the flow rate of inert gas 506 into the cleaning chamber 106 based on determining that the oxygen concentration in the cleaning chamber 106 is greater than a threshold oxygen concentration (e.g., 10% or some other threshold oxygen concentration). As other examples, the controller may decrease the flow rate of inert gas 506 into the cleaning chamber 106 based on determining that the oxygen concentration in the cleaning chamber 106 is less than a threshold oxygen concentration. In some embodiments, the controller controls or adjusts (e.g., increases or decreases) the flow rate of inert gas 506 into the cleaning chamber 106 as a function of the measured or sensed oxygen concentration 508 in the cleaning chamber 106. In these embodiments, the controller sets the flow rate of inert gas 506 into the cleaning chamber 106 to a specific flow rate setting for a particular measured or sensed oxygen concentration.

[0048] Additionally and / or alternatively, the controller causes the number of nozzles (e.g., nozzles 312a, 312b, 314a, and / or 314b, etc.) through which inert gas 506 flows into the cleaning chamber 106 to increase or decrease, so as to purge oxygen 508 from the cleaning chamber 106 at a specific removal rate. As an example, the controller causes the number of nozzles through which inert gas 506 flows into the cleaning chamber 106 to increase the removal rate of oxygen 508 from the cleaning chamber 106. As an example, the controller causes the number of nozzles through which inert gas 506 flows into the cleaning chamber 106 to decrease the removal rate of oxygen 508 from the cleaning chamber 106.

[0049] As shown in Figure 5E, a cleaning agent 510 supplied via nozzles (e.g., nozzle 310, nozzle 412) in the cleaning chamber 106 is used to clean the semiconductor wafer 502. In the cleaning chamber 106, the semiconductor wafer 502 is processed during a post-chemical mechanical planarization cleaning operation, and the oxygen concentration in the cleaning chamber 106 is maintained within a specific range. For example, the environment in the cleaning chamber 106 is controlled to include approximately 0% to approximately 10% oxygen, thus allowing the semiconductor wafer 502 to be cleaned in an oxygen-free (or near-oxygen-free) environment in the cleaning chamber 106 to reduce and / or minimize the possibility of oxidation of one or more metallization layers 504.

[0050] In some embodiments, oxygen 508 is removed from the cleaning chamber 106 prior to the post-chemical mechanical planarization (CMP) cleaning operation. In these embodiments, after the removal of oxygen 508 from the cleaning chamber 106, the semiconductor wafer 502 is processed in the CMP cleaning operation within the cleaning chamber 106. In some embodiments, the controller causes the processing of the semiconductor wafer 502 in the CMP cleaning operation and the removal of oxygen 508 from the cleaning chamber 106 to occur simultaneously within the cleaning chamber 106. In these embodiments, the controller causes inert gas 506 to flow into the cleaning chamber 106, and a cleaning agent 510 is provided into the cleaning chamber 106.

[0051] In some embodiments, during the post-chemical mechanical planarization cleaning operation, the semiconductor wafer 502 is rotated on a wafer stage (e.g., by wafer stage 306 or wafer stage 406) to dispense cleaning agent 510 and allow cleaning of various portions of the semiconductor wafer 502. In some embodiments, the semiconductor wafer 502 is mechanically cleaned in conjunction with chemical cleaning using cleaning agent 510. As an example, the semiconductor wafer 502 may be mechanically cleaned by cleaning brush 308 or cleaning pen 410, and the semiconductor wafer 502 is rotated on a wafer stage.

[0052] As described above, Figures 5A to 5E are provided as examples. Other examples may differ from those described with respect to Figures 5A to 5E.

[0053] Figure 6 is a schematic diagram of example components of a device 600. In some embodiments, the chemimechanical planarization tool 100 and / or the transport device 110 may include one or more devices 600 and / or one or more components of device 600. For example, the chemimechanical planarization tool 100 may include devices 600 (e.g., a controller and / or one or more sensors) associated with the cleaning chamber 106 to control the supply of inert gas 506 to various aspects of the cleaning chamber 106 in order to remove oxygen 508 from the cleaning chamber. As shown in Figure 6, device 600 may include a bus 610, a processor 620, a memory 630, a storage component 640, an input component 650, an output component 660, and a communication component 670.

[0054] Bus 610 includes components that allow wired and / or wireless communication between components of device 600. Processor 620 includes a central processing unit (CPU), graphics processing unit (GPU), microprocessor, controller, microcontroller, digital signal processor (DSP), field programmable gate array (FPGA), application-specific integrated circuit (ASIC), or other types of processing components. Processor 620 is implemented in hardware, firmware, or a combination of hardware and software. In some embodiments, processor 620 includes one or more processors that can be programmed to perform functions. Memory 630 includes random access memory (RAM), read-only memory (ROM), and / or other types of memory (e.g., flash memory, magnetic memory, and / or optical memory).

[0055] Storage component 640 stores information and / or software related to operating device 600. For example, storage component 640 may include hard disk, magnetic disk, optical disk drive, solid state disk drive, compact disc, digital versatile disc, and / or other types of non-transitory computer-readable media. Input component 650 enables device 600 to receive input signals, such as user input and / or sensed input. For example, input component 650 may include touch screen, keyboard, keypad, mouse, button, switch, microphone, keypad, sensor, GPS component, accelerometer, gyroscope, and / or actuator. Output component 660 enables device 600 to provide output signals, such as via display, speaker, and / or one or more light-emitting diodes (LEDs). Communication component 670 enables device 600 to communicate with other devices, such as via wired and / or wireless connections. For example, communication component 670 may include a receiver, transmitter, transceiver, modem, network interface card, and / or antenna.

[0056] Device 600 may perform one or more processes described herein. For example, a non-transitory computer-readable medium (e.g., memory 630 and / or storage component 640) may store a set of instructions (e.g., one or more instructions, code, software code, and / or program code) for executing processor 620. Processor 620 may execute the aforementioned set of instructions to perform one or more processes described herein. In some embodiments, execution of the aforementioned set of instructions by processor 620 causes one or more processors 620 and / or device 600 to perform one or more processes described herein. In some embodiments, hardwired circuitry may be used instead of software instructions, or a combination of hardwired circuitry and software instructions may be used to perform one or more processes described herein. Therefore, the embodiments described herein are not limited to any particular combination of hardwired circuitry and software.

[0057] The number and arrangement of components shown in Figure 6 are provided as examples. Device 600 may include additional components, fewer components, different components, or components arranged differently from those shown in Figure 6. Additionally or alternatively, one set of components of device 600 (e.g., one or more components) may perform one or more functions described as being performed by another set of components of device 600.

[0058] Figure 7 is a flowchart of an example process 700 related to cleaning after chemical mechanical planarization. In some embodiments, one or more process blocks of Figure 7 may be performed by a chemical mechanical planarization tool (e.g., chemical mechanical planarization tool 100). Additionally or alternatively, one or more process blocks of Figure 7 may be performed by one or more components of device 600, such as processor 620, memory 630, storage component 640, input component 650, output component 660, and / or communication component 670.

[0059] As shown in Figure 7, process 700 may include removing oxygen from a cleaning chamber (block 710). For example, as described above, the chemical mechanical planarization tool 100 may remove oxygen 508 from a cleaning chamber (e.g., one or more of cleaning chambers 106, 106a, 106b, and / or 106c).

[0060] As further shown in Figure 7, process 700 may include performing a post-chemical mechanical planarization cleaning operation in the cleaning chamber after removing oxygen from the cleaning chamber (block 720). For example, as described above, the chemical mechanical planarization tool 100 may perform a post-chemical mechanical planarization cleaning operation in the cleaning chamber after removing oxygen from the cleaning chamber.

[0061] Process 700 may include additional embodiments, such as any single embodiment or any combination of embodiments described below and / or combined with one or more processes described in other sections.

[0062] In a first embodiment, removing oxygen from the clean chamber includes providing an inert gas (e.g., a generally horizontal flow 316a and / or a generally horizontal flow 316b, a generally vertical flow 318a and / or a generally vertical flow 318b, an inert gas 424 and / or an inert gas 506) into the clean chamber to remove oxygen from the clean chamber. In a second embodiment (performed alone or in conjunction with the first embodiment), the inert gas includes at least one of argon, nitrogen, or helium. In a third embodiment (performed alone or in conjunction with the first and / or second embodiments), providing the inert gas into the clean chamber includes providing the inert gas into the clean chamber via a plurality of nozzles (e.g., nozzles 312a, 312b, 314a, 314b) in the clean chamber.

[0063] In the fourth embodiment (performed alone, or in conjunction with one or more of the first to third embodiments), providing inert gas to the cleaning chamber includes providing inert gas to the cleaning chamber via an inlet 420b located on a nozzle 412, the nozzle 412 being configured to dispense cleaning agent (e.g., cleaning agent 422 and / or cleaning agent 510) into the cleaning chamber. In the fifth embodiment (performed alone, or in conjunction with one or more of the first to fourth embodiments), removing oxygen from the cleaning chamber includes removing oxygen from the cleaning chamber such that the remaining oxygen concentration in the cleaning chamber is between approximately 0% and approximately 10%.

[0064] Although Figure 7 shows an example block of process 700, in some embodiments, process 700 may include more blocks, fewer blocks, different blocks, or blocks arranged differently from those shown in Figure 7. Additionally, two or more blocks of process 700 may be executed in parallel.

[0065] Figure 8 is a flowchart of an example process 800 related to cleaning after chemical mechanical planarization. In some embodiments, one or more process blocks of Figure 8 may be performed by a chemical mechanical planarization tool (e.g., chemical mechanical planarization tool 100). Additionally or alternatively, one or more process blocks of Figure 8 may be performed by one or more components of device 600, such as processor 620, memory 630, storage component 640, input component 650, output component 660 and / or communication component 670.

[0066] As shown in Figure 8, process 800 may include positioning a semiconductor wafer in the process chamber (block 810) of a chemical mechanical planarization tool 100. For example, as described above, the chemical mechanical planarization tool 100 (e.g., using a transfer device 110) may position a semiconductor wafer 502 in the process chamber 102 of the chemical mechanical planarization tool 100.

[0067] As further shown in Figure 8, process 800 may include performing a chemical mechanical planarization operation to planarize one or more metallization layers (block 820) of a semiconductor wafer in a process chamber. For example, as described above, a chemical mechanical planarization tool 100 (e.g., using process chamber 102) may perform a chemical mechanical planarization operation to planarize one or more metallization layers 504 of a semiconductor wafer 502 in process chamber 102.

[0068] As further shown in Figure 8, process 800 may include transferring the semiconductor wafer from the process chamber to the cleaning chamber (block 830) of the chemical mechanical planarization tool after performing a chemical mechanical planarization operation. For example, as described above, the chemical mechanical planarization tool 100 may transfer the semiconductor wafer 502 from the process chamber 102 (e.g., using a transfer device 110) to the cleaning chamber 106 of the chemical mechanical planarization tool 100 after performing a chemical mechanical planarization operation.

[0069] As further shown in Figure 8, process 800 may include performing a post-chemical mechanical planarization cleaning operation to clean the semiconductor wafer (block 840) in the cleaning chamber. For example, as described above, the chemical mechanical planarization tool 100 may perform (e.g., using the cleaning chamber 106) a post-chemical mechanical planarization cleaning operation to clean the semiconductor wafer 502 in the cleaning chamber 106. In some embodiments, the oxygen concentration in the cleaning chamber 106 is in the range of approximately 0% to approximately 10%.

[0070] Process 800 may include additional embodiments, such as any single embodiment or any combination of embodiments described below and / or in combination with one or more processes described in other sections.

[0071] In a first embodiment, process 800 includes providing an inert gas (e.g., a generally horizontal flow 316a and / or a generally horizontal flow 316b, a generally vertical flow 318a and / or a generally vertical flow 318b, inert gas 424 and / or inert gas 506) into a cleaning chamber 106 to remove oxygen 508 from the cleaning chamber 106 prior to a post-chemical mechanical planarization cleaning operation. In a second embodiment (performed alone or in conjunction with the first embodiment), process 800 includes providing an inert gas (e.g., a generally horizontal flow 316a and / or a generally horizontal flow 316b, a generally vertical flow 318a and / or a generally vertical flow 318b, inert gas 424 and / or inert gas 506) into a cleaning chamber 106 to remove oxygen 508 from the cleaning chamber 106 during a post-chemical mechanical planarization cleaning operation.

[0072] In the third embodiment (performed alone, or together with the first and / or second embodiments), process 800 includes supplying an inert gas (e.g., a generally horizontal flow 316a and / or a generally horizontal flow 316b, a generally vertical flow 318a and / or a generally vertical flow 318b, inert gas 424 and / or inert gas 506) at a specific flow rate into a cleaning chamber 106 to remove oxygen 508 from the cleaning chamber 106, such that the oxygen concentration in the cleaning chamber 106 is in the range of about 0% to about 10%. In the fourth embodiment (performed alone, or together with one or more of the first to third embodiments), the inert gas includes at least one of argon, nitrogen, or helium.

[0073] Although Figure 8 shows an example block of process 800, in some embodiments, process 800 may include more blocks, fewer blocks, different blocks, or blocks arranged differently from those shown in Figure 8. Additionally, two or more blocks of process 800 may be executed in parallel.

[0074] Thus, the semiconductor processing tool includes a cleaning chamber configured to perform post-chemical mechanical planarization cleaning operations in an oxygen-free (or near-oxygen-free) environment. An inert gas can be supplied to the cleaning chamber to remove oxygen from it, allowing the post-chemical mechanical planarization cleaning operations to be performed in an oxygen-free (or near-oxygen-free) environment. This allows the post-chemical mechanical planarization cleaning operations to be performed in an environment that reduces oxygen-induced corrosion on and / or in the metallization layers and / or metallization structures on and / or within the semiconductor wafer, which can increase semiconductor process yield, reduce semiconductor process defects, and / or improve semiconductor process quality, etc.

[0075] As described in more detail above, some embodiments described herein provide a semiconductor processing method. The method includes removing oxygen from a cleaning chamber. The method includes performing a chemical mechanical polishing post-cleaning operation in the cleaning chamber after removing oxygen from the cleaning chamber.

[0076] In some embodiments, removing oxygen from the cleaning chamber includes supplying an inert gas to the cleaning chamber to remove oxygen from the cleaning chamber. In some embodiments, the inert gas includes at least one of argon, nitrogen, or helium. In some embodiments, supplying the inert gas to the cleaning chamber includes supplying the inert gas to the cleaning chamber via a plurality of nozzles in the cleaning chamber. In some embodiments, supplying the inert gas to the cleaning chamber includes supplying the inert gas to the cleaning chamber via an inlet located on a nozzle, and the nozzle is configured to dispense a cleaning agent into the cleaning chamber. In some embodiments, removing oxygen from the cleaning chamber includes removing oxygen from the cleaning chamber such that the remaining oxygen concentration in the cleaning chamber is in the range of about 0% to about 10%.

[0077] As described in more detail above, some embodiments described herein provide a semiconductor processing tool. The semiconductor processing tool includes a chemical mechanical planarization (CMP) cleaning chamber in which a semiconductor wafer is processed during a cleaning operation. The semiconductor processing tool includes a first nozzle configured to provide a cleaning agent to the CMP cleaning chamber during the cleaning operation. The semiconductor processing tool includes one or more second nozzles configured to provide an inert gas to the CMP cleaning chamber to remove oxygen from the CMP cleaning chamber.

[0078] In some embodiments, one or more second nozzles are configured to provide an inert gas to a chemical mechanical planarization (CMP) cleaning chamber to remove oxygen from the CMP cleaning chamber, thereby removing approximately 90% to approximately 100% of the oxygen in the CMP cleaning chamber. In some embodiments, a first nozzle and one or more second nozzles are located on the same nozzle.

[0079] In some embodiments, one or more second nozzles include a first subset of one or more second nozzles and a second subset of one or more second nozzles. The first subset of one or more second nozzles is located near a first side of one of the chemical mechanical planarization cleaning chambers. The second subset of one or more second nozzles is located near a second side of one of the chemical mechanical planarization cleaning chambers. Moreover, the second side is relative to the first side. In some embodiments, the first subset of one or more second nozzles includes a third nozzle and a fourth nozzle. The third nozzle is configured to provide a generally downward flow in the chemical mechanical planarization cleaning chamber. The fourth nozzle is configured to provide a generally horizontal flow in the chemical mechanical planarization cleaning chamber.

[0080] In some embodiments, one or more second nozzles are located near the top of one of the chemical mechanical leveling (CML) cleaning chambers. Furthermore, oxygen is removed from the CML cleaning chamber via an exhaust port located near the bottom of one of the CML cleaning chambers. In some embodiments, one or more second nozzles are located near the bottom of one of the CML cleaning chambers. Furthermore, oxygen is removed from the CML cleaning chamber via an exhaust port located near the top of one of the CML cleaning chambers.

[0081] In some embodiments, the semiconductor processing tool further includes a cleaning device. The cleaning device is included in a chemical mechanical planarization cleaning chamber and is configured to physically clean the semiconductor wafer during a cleaning operation. In some embodiments, the cleaning device includes at least one of a cleaning pen or a cleaning brush.

[0082] As described in more detail above, some embodiments described herein provide a semiconductor processing method. The method includes positioning a semiconductor wafer in a process chamber of a chemical mechanical planarization (CMP) tool. The method includes performing a CMP operation to planarize one or more metallization layers of the semiconductor wafer in the process chamber. The method includes transferring the semiconductor wafer from the process chamber to a cleaning chamber of the CMP tool after performing the CMP operation. The method further includes performing a post-CMP cleaning operation to clean the semiconductor wafer in the cleaning chamber. An oxygen concentration in the cleaning chamber is in the range of approximately 0% to approximately 10%.

[0083] In some embodiments, the method further includes providing an inert gas into a cleaning chamber prior to a post-chemical mechanical planarization cleaning operation to remove oxygen from the cleaning chamber. In some embodiments, the method further includes providing an inert gas into a cleaning chamber during a post-chemical mechanical planarization cleaning operation to remove oxygen from the cleaning chamber. In some embodiments, the method further includes providing an inert gas into the cleaning chamber at a specific flow rate to remove oxygen from the cleaning chamber such that the oxygen concentration in the cleaning chamber is in the range of about 0% to about 10%. In some embodiments, the inert gas includes at least one of argon, nitrogen, or helium.

[0084] The features of several embodiments summarized above enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art should understand that this disclosure can be readily used as the basis for designing or modifying other processes and structures to achieve the same purpose and / or advantages as the embodiments described in this specification. Those skilled in the art should also understand that such equivalent configurations do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made to this disclosure without departing from its spirit and scope. [Simplified Explanation of the Diagram]

[0006] The various aspects of this disclosure will be better understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, according to standard industry practice, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. Figure 1 is a schematic diagram of an example chemical mechanical planarization tool described herein. Figure 2 is a schematic diagram of an example embodiment described herein. Figures 3, 4A, and 4B are schematic diagrams of an example embodiment of a cleaning chamber described herein. Figures 5A through 5E are schematic diagrams of an example embodiment described herein. Figure 6 is a schematic diagram of an example component of one or more devices of Figure 1. Figures 7 and 8 are flow diagrams of an example process related to post-chemical mechanical planarization (post-CMP) cleaning. [Biomaterial Storage]

[0086] None

Claims

1. A semiconductor processing method, comprising: Oxygen is removed from a clean chamber; And after the oxygen is removed from the cleaning chamber, a chemical mechanical planarization post-cleaning operation is performed in the cleaning chamber.

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